xref: /openbmc/linux/drivers/hwmon/w83795.c (revision edff2f8d)
1 /*
2  *  w83795.c - Linux kernel driver for hardware monitoring
3  *  Copyright (C) 2008 Nuvoton Technology Corp.
4  *                Wei Song
5  *  Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
6  *
7  *  This program is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License as published by
9  *  the Free Software Foundation - version 2.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License
17  *  along with this program; if not, write to the Free Software
18  *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19  *  02110-1301 USA.
20  *
21  *  Supports following chips:
22  *
23  *  Chip       #vin   #fanin #pwm #temp #dts wchipid  vendid  i2c  ISA
24  *  w83795g     21     14     8     6     8    0x79   0x5ca3  yes   no
25  *  w83795adg   18     14     2     6     8    0x79   0x5ca3  yes   no
26  */
27 
28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/init.h>
31 #include <linux/slab.h>
32 #include <linux/i2c.h>
33 #include <linux/hwmon.h>
34 #include <linux/hwmon-sysfs.h>
35 #include <linux/err.h>
36 #include <linux/mutex.h>
37 #include <linux/delay.h>
38 
39 /* Addresses to scan */
40 static const unsigned short normal_i2c[] = {
41 	0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
42 };
43 
44 
45 static int reset;
46 module_param(reset, bool, 0);
47 MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
48 
49 
50 #define W83795_REG_BANKSEL		0x00
51 #define W83795_REG_VENDORID		0xfd
52 #define W83795_REG_CHIPID		0xfe
53 #define W83795_REG_DEVICEID		0xfb
54 #define W83795_REG_DEVICEID_A		0xff
55 
56 #define W83795_REG_I2C_ADDR		0xfc
57 #define W83795_REG_CONFIG		0x01
58 #define W83795_REG_CONFIG_CONFIG48	0x04
59 #define W83795_REG_CONFIG_START	0x01
60 
61 /* Multi-Function Pin Ctrl Registers */
62 #define W83795_REG_VOLT_CTRL1		0x02
63 #define W83795_REG_VOLT_CTRL2		0x03
64 #define W83795_REG_TEMP_CTRL1		0x04
65 #define W83795_REG_TEMP_CTRL2		0x05
66 #define W83795_REG_FANIN_CTRL1		0x06
67 #define W83795_REG_FANIN_CTRL2		0x07
68 #define W83795_REG_VMIGB_CTRL		0x08
69 
70 #define TEMP_READ			0
71 #define TEMP_CRIT			1
72 #define TEMP_CRIT_HYST			2
73 #define TEMP_WARN			3
74 #define TEMP_WARN_HYST			4
75 /* only crit and crit_hyst affect real-time alarm status
76  * current crit crit_hyst warn warn_hyst */
77 static const u16 W83795_REG_TEMP[][5] = {
78 	{0x21, 0x96, 0x97, 0x98, 0x99},	/* TD1/TR1 */
79 	{0x22, 0x9a, 0x9b, 0x9c, 0x9d},	/* TD2/TR2 */
80 	{0x23, 0x9e, 0x9f, 0xa0, 0xa1},	/* TD3/TR3 */
81 	{0x24, 0xa2, 0xa3, 0xa4, 0xa5},	/* TD4/TR4 */
82 	{0x1f, 0xa6, 0xa7, 0xa8, 0xa9},	/* TR5 */
83 	{0x20, 0xaa, 0xab, 0xac, 0xad},	/* TR6 */
84 };
85 
86 #define IN_READ				0
87 #define IN_MAX				1
88 #define IN_LOW				2
89 static const u16 W83795_REG_IN[][3] = {
90 	/* Current, HL, LL */
91 	{0x10, 0x70, 0x71},	/* VSEN1 */
92 	{0x11, 0x72, 0x73},	/* VSEN2 */
93 	{0x12, 0x74, 0x75},	/* VSEN3 */
94 	{0x13, 0x76, 0x77},	/* VSEN4 */
95 	{0x14, 0x78, 0x79},	/* VSEN5 */
96 	{0x15, 0x7a, 0x7b},	/* VSEN6 */
97 	{0x16, 0x7c, 0x7d},	/* VSEN7 */
98 	{0x17, 0x7e, 0x7f},	/* VSEN8 */
99 	{0x18, 0x80, 0x81},	/* VSEN9 */
100 	{0x19, 0x82, 0x83},	/* VSEN10 */
101 	{0x1A, 0x84, 0x85},	/* VSEN11 */
102 	{0x1B, 0x86, 0x87},	/* VTT */
103 	{0x1C, 0x88, 0x89},	/* 3VDD */
104 	{0x1D, 0x8a, 0x8b},	/* 3VSB */
105 	{0x1E, 0x8c, 0x8d},	/* VBAT */
106 	{0x1F, 0xa6, 0xa7},	/* VSEN12 */
107 	{0x20, 0xaa, 0xab},	/* VSEN13 */
108 	{0x21, 0x96, 0x97},	/* VSEN14 */
109 	{0x22, 0x9a, 0x9b},	/* VSEN15 */
110 	{0x23, 0x9e, 0x9f},	/* VSEN16 */
111 	{0x24, 0xa2, 0xa3},	/* VSEN17 */
112 };
113 #define W83795_REG_VRLSB		0x3C
114 
115 static const u8 W83795_REG_IN_HL_LSB[] = {
116 	0x8e,	/* VSEN1-4 */
117 	0x90,	/* VSEN5-8 */
118 	0x92,	/* VSEN9-11 */
119 	0x94,	/* VTT, 3VDD, 3VSB, 3VBAT */
120 	0xa8,	/* VSEN12 */
121 	0xac,	/* VSEN13 */
122 	0x98,	/* VSEN14 */
123 	0x9c,	/* VSEN15 */
124 	0xa0,	/* VSEN16 */
125 	0xa4,	/* VSEN17 */
126 };
127 
128 #define IN_LSB_REG(index, type) \
129 	(((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
130 	: (W83795_REG_IN_HL_LSB[(index)] + 1))
131 
132 #define IN_LSB_SHIFT			0
133 #define IN_LSB_IDX			1
134 static const u8 IN_LSB_SHIFT_IDX[][2] = {
135 	/* High/Low LSB shift, LSB No. */
136 	{0x00, 0x00},	/* VSEN1 */
137 	{0x02, 0x00},	/* VSEN2 */
138 	{0x04, 0x00},	/* VSEN3 */
139 	{0x06, 0x00},	/* VSEN4 */
140 	{0x00, 0x01},	/* VSEN5 */
141 	{0x02, 0x01},	/* VSEN6 */
142 	{0x04, 0x01},	/* VSEN7 */
143 	{0x06, 0x01},	/* VSEN8 */
144 	{0x00, 0x02},	/* VSEN9 */
145 	{0x02, 0x02},	/* VSEN10 */
146 	{0x04, 0x02},	/* VSEN11 */
147 	{0x00, 0x03},	/* VTT */
148 	{0x02, 0x03},	/* 3VDD */
149 	{0x04, 0x03},	/* 3VSB	*/
150 	{0x06, 0x03},	/* VBAT	*/
151 	{0x06, 0x04},	/* VSEN12 */
152 	{0x06, 0x05},	/* VSEN13 */
153 	{0x06, 0x06},	/* VSEN14 */
154 	{0x06, 0x07},	/* VSEN15 */
155 	{0x06, 0x08},	/* VSEN16 */
156 	{0x06, 0x09},	/* VSEN17 */
157 };
158 
159 
160 #define W83795_REG_FAN(index)		(0x2E + (index))
161 #define W83795_REG_FAN_MIN_HL(index)	(0xB6 + (index))
162 #define W83795_REG_FAN_MIN_LSB(index)	(0xC4 + (index) / 2)
163 #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
164 	(((index) & 1) ? 4 : 0)
165 
166 #define W83795_REG_VID_CTRL		0x6A
167 
168 #define W83795_REG_ALARM(index)		(0x41 + (index))
169 #define W83795_REG_BEEP(index)		(0x50 + (index))
170 
171 #define W83795_REG_CLR_CHASSIS		0x4D
172 
173 
174 #define W83795_REG_FCMS1		0x201
175 #define W83795_REG_FCMS2		0x208
176 #define W83795_REG_TFMR(index)		(0x202 + (index))
177 #define W83795_REG_FOMC			0x20F
178 
179 #define W83795_REG_TSS(index)		(0x209 + (index))
180 
181 #define TSS_MAP_RESERVED		0xff
182 static const u8 tss_map[4][6] = {
183 	{ 0,  1,  2,  3,  4,  5},
184 	{ 6,  7,  8,  9,  0,  1},
185 	{10, 11, 12, 13,  2,  3},
186 	{ 4,  5,  4,  5, TSS_MAP_RESERVED, TSS_MAP_RESERVED},
187 };
188 
189 #define PWM_OUTPUT			0
190 #define PWM_FREQ			1
191 #define PWM_START			2
192 #define PWM_NONSTOP			3
193 #define PWM_STOP_TIME			4
194 #define W83795_REG_PWM(index, nr)	(0x210 + (nr) * 8 + (index))
195 
196 #define W83795_REG_FTSH(index)		(0x240 + (index) * 2)
197 #define W83795_REG_FTSL(index)		(0x241 + (index) * 2)
198 #define W83795_REG_TFTS			0x250
199 
200 #define TEMP_PWM_TTTI			0
201 #define TEMP_PWM_CTFS			1
202 #define TEMP_PWM_HCT			2
203 #define TEMP_PWM_HOT			3
204 #define W83795_REG_TTTI(index)		(0x260 + (index))
205 #define W83795_REG_CTFS(index)		(0x268 + (index))
206 #define W83795_REG_HT(index)		(0x270 + (index))
207 
208 #define SF4_TEMP			0
209 #define SF4_PWM				1
210 #define W83795_REG_SF4_TEMP(temp_num, index) \
211 	(0x280 + 0x10 * (temp_num) + (index))
212 #define W83795_REG_SF4_PWM(temp_num, index) \
213 	(0x288 + 0x10 * (temp_num) + (index))
214 
215 #define W83795_REG_DTSC			0x301
216 #define W83795_REG_DTSE			0x302
217 #define W83795_REG_DTS(index)		(0x26 + (index))
218 #define W83795_REG_PECI_TBASE(index)	(0x320 + (index))
219 
220 #define DTS_CRIT			0
221 #define DTS_CRIT_HYST			1
222 #define DTS_WARN			2
223 #define DTS_WARN_HYST			3
224 #define W83795_REG_DTS_EXT(index)	(0xB2 + (index))
225 
226 #define SETUP_PWM_DEFAULT		0
227 #define SETUP_PWM_UPTIME		1
228 #define SETUP_PWM_DOWNTIME		2
229 #define W83795_REG_SETUP_PWM(index)    (0x20C + (index))
230 
231 static inline u16 in_from_reg(u8 index, u16 val)
232 {
233 	/* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
234 	if (index >= 12 && index <= 14)
235 		return val * 6;
236 	else
237 		return val * 2;
238 }
239 
240 static inline u16 in_to_reg(u8 index, u16 val)
241 {
242 	if (index >= 12 && index <= 14)
243 		return val / 6;
244 	else
245 		return val / 2;
246 }
247 
248 static inline unsigned long fan_from_reg(u16 val)
249 {
250 	if ((val == 0xfff) || (val == 0))
251 		return 0;
252 	return 1350000UL / val;
253 }
254 
255 static inline u16 fan_to_reg(long rpm)
256 {
257 	if (rpm <= 0)
258 		return 0x0fff;
259 	return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
260 }
261 
262 static inline unsigned long time_from_reg(u8 reg)
263 {
264 	return reg * 100;
265 }
266 
267 static inline u8 time_to_reg(unsigned long val)
268 {
269 	return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
270 }
271 
272 static inline long temp_from_reg(s8 reg)
273 {
274 	return reg * 1000;
275 }
276 
277 static inline s8 temp_to_reg(long val, s8 min, s8 max)
278 {
279 	return SENSORS_LIMIT(val / 1000, min, max);
280 }
281 
282 static const u16 pwm_freq_cksel0[16] = {
283 	1024, 512, 341, 256, 205, 171, 146, 128,
284 	85, 64, 32, 16, 8, 4, 2, 1
285 };
286 
287 static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
288 {
289 	unsigned long base_clock;
290 
291 	if (reg & 0x80) {
292 		base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
293 		return base_clock / ((reg & 0x7f) + 1);
294 	} else
295 		return pwm_freq_cksel0[reg & 0x0f];
296 }
297 
298 static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
299 {
300 	unsigned long base_clock;
301 	u8 reg0, reg1;
302 	unsigned long best0, best1;
303 
304 	/* Best fit for cksel = 0 */
305 	for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
306 		if (val > (pwm_freq_cksel0[reg0] +
307 			   pwm_freq_cksel0[reg0 + 1]) / 2)
308 			break;
309 	}
310 	if (val < 375)	/* cksel = 1 can't beat this */
311 		return reg0;
312 	best0 = pwm_freq_cksel0[reg0];
313 
314 	/* Best fit for cksel = 1 */
315 	base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
316 	reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
317 	best1 = base_clock / reg1;
318 	reg1 = 0x80 | (reg1 - 1);
319 
320 	/* Choose the closest one */
321 	if (abs(val - best0) > abs(val - best1))
322 		return reg1;
323 	else
324 		return reg0;
325 }
326 
327 enum chip_types {w83795g, w83795adg};
328 
329 struct w83795_data {
330 	struct device *hwmon_dev;
331 	struct mutex update_lock;
332 	unsigned long last_updated;	/* In jiffies */
333 	enum chip_types chip_type;
334 
335 	u8 bank;
336 
337 	u32 has_in;		/* Enable monitor VIN or not */
338 	u8 has_dyn_in;		/* Only in2-0 can have this */
339 	u16 in[21][3];		/* Register value, read/high/low */
340 	u8 in_lsb[10][3];	/* LSB Register value, high/low */
341 	u8 has_gain;		/* has gain: in17-20 * 8 */
342 
343 	u16 has_fan;		/* Enable fan14-1 or not */
344 	u16 fan[14];		/* Register value combine */
345 	u16 fan_min[14];	/* Register value combine */
346 
347 	u8 has_temp;		/* Enable monitor temp6-1 or not */
348 	s8 temp[6][5];		/* current, crit, crit_hyst, warn, warn_hyst */
349 	u8 temp_read_vrlsb[6];
350 	u8 temp_mode;		/* Bit vector, 0 = TR, 1 = TD */
351 	u8 temp_src[3];		/* Register value */
352 
353 	u8 enable_dts;		/* Enable PECI and SB-TSI,
354 				 * bit 0: =1 enable, =0 disable,
355 				 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
356 	u8 has_dts;		/* Enable monitor DTS temp */
357 	s8 dts[8];		/* Register value */
358 	u8 dts_read_vrlsb[8];	/* Register value */
359 	s8 dts_ext[4];		/* Register value */
360 
361 	u8 has_pwm;		/* 795g supports 8 pwm, 795adg only supports 2,
362 				 * no config register, only affected by chip
363 				 * type */
364 	u8 pwm[8][5];		/* Register value, output, freq, start,
365 				 *  non stop, stop time */
366 	u16 clkin;		/* CLKIN frequency in kHz */
367 	u8 pwm_fcms[2];		/* Register value */
368 	u8 pwm_tfmr[6];		/* Register value */
369 	u8 pwm_fomc;		/* Register value */
370 
371 	u16 target_speed[8];	/* Register value, target speed for speed
372 				 * cruise */
373 	u8 tol_speed;		/* tolerance of target speed */
374 	u8 pwm_temp[6][4];	/* TTTI, CTFS, HCT, HOT */
375 	u8 sf4_reg[6][2][7];	/* 6 temp, temp/dcpwm, 7 registers */
376 
377 	u8 setup_pwm[3];	/* Register value */
378 
379 	u8 alarms[6];		/* Register value */
380 	u8 beeps[6];		/* Register value */
381 
382 	char valid;
383 	char valid_limits;
384 	char valid_pwm_config;
385 };
386 
387 /*
388  * Hardware access
389  * We assume that nobdody can change the bank outside the driver.
390  */
391 
392 /* Must be called with data->update_lock held, except during initialization */
393 static int w83795_set_bank(struct i2c_client *client, u8 bank)
394 {
395 	struct w83795_data *data = i2c_get_clientdata(client);
396 	int err;
397 
398 	/* If the same bank is already set, nothing to do */
399 	if ((data->bank & 0x07) == bank)
400 		return 0;
401 
402 	/* Change to new bank, preserve all other bits */
403 	bank |= data->bank & ~0x07;
404 	err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
405 	if (err < 0) {
406 		dev_err(&client->dev,
407 			"Failed to set bank to %d, err %d\n",
408 			(int)bank, err);
409 		return err;
410 	}
411 	data->bank = bank;
412 
413 	return 0;
414 }
415 
416 /* Must be called with data->update_lock held, except during initialization */
417 static u8 w83795_read(struct i2c_client *client, u16 reg)
418 {
419 	int err;
420 
421 	err = w83795_set_bank(client, reg >> 8);
422 	if (err < 0)
423 		return 0x00;	/* Arbitrary */
424 
425 	err = i2c_smbus_read_byte_data(client, reg & 0xff);
426 	if (err < 0) {
427 		dev_err(&client->dev,
428 			"Failed to read from register 0x%03x, err %d\n",
429 			(int)reg, err);
430 		return 0x00;	/* Arbitrary */
431 	}
432 	return err;
433 }
434 
435 /* Must be called with data->update_lock held, except during initialization */
436 static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
437 {
438 	int err;
439 
440 	err = w83795_set_bank(client, reg >> 8);
441 	if (err < 0)
442 		return err;
443 
444 	err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
445 	if (err < 0)
446 		dev_err(&client->dev,
447 			"Failed to write to register 0x%03x, err %d\n",
448 			(int)reg, err);
449 	return err;
450 }
451 
452 static void w83795_update_limits(struct i2c_client *client)
453 {
454 	struct w83795_data *data = i2c_get_clientdata(client);
455 	int i, limit;
456 
457 	/* Read the voltage limits */
458 	for (i = 0; i < ARRAY_SIZE(data->in); i++) {
459 		if (!(data->has_in & (1 << i)))
460 			continue;
461 		data->in[i][IN_MAX] =
462 			w83795_read(client, W83795_REG_IN[i][IN_MAX]);
463 		data->in[i][IN_LOW] =
464 			w83795_read(client, W83795_REG_IN[i][IN_LOW]);
465 	}
466 	for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
467 		if ((i == 2 && data->chip_type == w83795adg) ||
468 		    (i >= 4 && !(data->has_in & (1 << (i + 11)))))
469 			continue;
470 		data->in_lsb[i][IN_MAX] =
471 			w83795_read(client, IN_LSB_REG(i, IN_MAX));
472 		data->in_lsb[i][IN_LOW] =
473 			w83795_read(client, IN_LSB_REG(i, IN_LOW));
474 	}
475 
476 	/* Read the fan limits */
477 	for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
478 		u8 lsb;
479 
480 		/* Each register contains LSB for 2 fans, but we want to
481 		 * read it only once to save time */
482 		if ((i & 1) == 0 && (data->has_fan & (3 << i)))
483 			lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
484 
485 		if (!(data->has_fan & (1 << i)))
486 			continue;
487 		data->fan_min[i] =
488 			w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
489 		data->fan_min[i] |=
490 			(lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
491 	}
492 
493 	/* Read the temperature limits */
494 	for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
495 		if (!(data->has_temp & (1 << i)))
496 			continue;
497 		for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
498 			data->temp[i][limit] =
499 				w83795_read(client, W83795_REG_TEMP[i][limit]);
500 	}
501 
502 	/* Read the DTS limits */
503 	if (data->enable_dts) {
504 		for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
505 			data->dts_ext[limit] =
506 				w83795_read(client, W83795_REG_DTS_EXT(limit));
507 	}
508 
509 	/* Read beep settings */
510 	for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
511 		data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
512 
513 	data->valid_limits = 1;
514 }
515 
516 static struct w83795_data *w83795_update_pwm_config(struct device *dev)
517 {
518 	struct i2c_client *client = to_i2c_client(dev);
519 	struct w83795_data *data = i2c_get_clientdata(client);
520 	int i, tmp;
521 
522 	mutex_lock(&data->update_lock);
523 
524 	if (data->valid_pwm_config)
525 		goto END;
526 
527 	/* Read temperature source selection */
528 	for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
529 		data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
530 
531 	/* Read automatic fan speed control settings */
532 	data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
533 	data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
534 	for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
535 		data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
536 	data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
537 	for (i = 0; i < data->has_pwm; i++) {
538 		for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
539 			data->pwm[i][tmp] =
540 				w83795_read(client, W83795_REG_PWM(i, tmp));
541 	}
542 	for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
543 		data->target_speed[i] =
544 			w83795_read(client, W83795_REG_FTSH(i)) << 4;
545 		data->target_speed[i] |=
546 			w83795_read(client, W83795_REG_FTSL(i)) >> 4;
547 	}
548 	data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
549 
550 	for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
551 		data->pwm_temp[i][TEMP_PWM_TTTI] =
552 			w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
553 		data->pwm_temp[i][TEMP_PWM_CTFS] =
554 			w83795_read(client, W83795_REG_CTFS(i));
555 		tmp = w83795_read(client, W83795_REG_HT(i));
556 		data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
557 		data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
558 	}
559 
560 	/* Read SmartFanIV trip points */
561 	for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
562 		for (tmp = 0; tmp < 7; tmp++) {
563 			data->sf4_reg[i][SF4_TEMP][tmp] =
564 				w83795_read(client,
565 					    W83795_REG_SF4_TEMP(i, tmp));
566 			data->sf4_reg[i][SF4_PWM][tmp] =
567 				w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
568 		}
569 	}
570 
571 	/* Read setup PWM */
572 	for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
573 		data->setup_pwm[i] =
574 			w83795_read(client, W83795_REG_SETUP_PWM(i));
575 
576 	data->valid_pwm_config = 1;
577 
578 END:
579 	mutex_unlock(&data->update_lock);
580 	return data;
581 }
582 
583 static struct w83795_data *w83795_update_device(struct device *dev)
584 {
585 	struct i2c_client *client = to_i2c_client(dev);
586 	struct w83795_data *data = i2c_get_clientdata(client);
587 	u16 tmp;
588 	int i;
589 
590 	mutex_lock(&data->update_lock);
591 
592 	if (!data->valid_limits)
593 		w83795_update_limits(client);
594 
595 	if (!(time_after(jiffies, data->last_updated + HZ * 2)
596 	      || !data->valid))
597 		goto END;
598 
599 	/* Update the voltages value */
600 	for (i = 0; i < ARRAY_SIZE(data->in); i++) {
601 		if (!(data->has_in & (1 << i)))
602 			continue;
603 		tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
604 		tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
605 		data->in[i][IN_READ] = tmp;
606 	}
607 
608 	/* in0-2 can have dynamic limits (W83795G only) */
609 	if (data->has_dyn_in) {
610 		u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
611 		u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
612 
613 		for (i = 0; i < 3; i++) {
614 			if (!(data->has_dyn_in & (1 << i)))
615 				continue;
616 			data->in[i][IN_MAX] =
617 				w83795_read(client, W83795_REG_IN[i][IN_MAX]);
618 			data->in[i][IN_LOW] =
619 				w83795_read(client, W83795_REG_IN[i][IN_LOW]);
620 			data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
621 			data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
622 		}
623 	}
624 
625 	/* Update fan */
626 	for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
627 		if (!(data->has_fan & (1 << i)))
628 			continue;
629 		data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
630 		data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
631 	}
632 
633 	/* Update temperature */
634 	for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
635 		data->temp[i][TEMP_READ] =
636 			w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
637 		data->temp_read_vrlsb[i] =
638 			w83795_read(client, W83795_REG_VRLSB);
639 	}
640 
641 	/* Update dts temperature */
642 	if (data->enable_dts) {
643 		for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
644 			if (!(data->has_dts & (1 << i)))
645 				continue;
646 			data->dts[i] =
647 				w83795_read(client, W83795_REG_DTS(i));
648 			data->dts_read_vrlsb[i] =
649 				w83795_read(client, W83795_REG_VRLSB);
650 		}
651 	}
652 
653 	/* Update pwm output */
654 	for (i = 0; i < data->has_pwm; i++) {
655 		data->pwm[i][PWM_OUTPUT] =
656 		    w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
657 	}
658 
659 	/* update alarm */
660 	for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
661 		data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
662 
663 	data->last_updated = jiffies;
664 	data->valid = 1;
665 
666 END:
667 	mutex_unlock(&data->update_lock);
668 	return data;
669 }
670 
671 /*
672  * Sysfs attributes
673  */
674 
675 #define ALARM_STATUS      0
676 #define BEEP_ENABLE       1
677 static ssize_t
678 show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
679 {
680 	struct w83795_data *data = w83795_update_device(dev);
681 	struct sensor_device_attribute_2 *sensor_attr =
682 	    to_sensor_dev_attr_2(attr);
683 	int nr = sensor_attr->nr;
684 	int index = sensor_attr->index >> 3;
685 	int bit = sensor_attr->index & 0x07;
686 	u8 val;
687 
688 	if (nr == ALARM_STATUS)
689 		val = (data->alarms[index] >> bit) & 1;
690 	else		/* BEEP_ENABLE */
691 		val = (data->beeps[index] >> bit) & 1;
692 
693 	return sprintf(buf, "%u\n", val);
694 }
695 
696 static ssize_t
697 store_beep(struct device *dev, struct device_attribute *attr,
698 	   const char *buf, size_t count)
699 {
700 	struct i2c_client *client = to_i2c_client(dev);
701 	struct w83795_data *data = i2c_get_clientdata(client);
702 	struct sensor_device_attribute_2 *sensor_attr =
703 	    to_sensor_dev_attr_2(attr);
704 	int index = sensor_attr->index >> 3;
705 	int shift = sensor_attr->index & 0x07;
706 	u8 beep_bit = 1 << shift;
707 	unsigned long val;
708 
709 	if (strict_strtoul(buf, 10, &val) < 0)
710 		return -EINVAL;
711 	if (val != 0 && val != 1)
712 		return -EINVAL;
713 
714 	mutex_lock(&data->update_lock);
715 	data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
716 	data->beeps[index] &= ~beep_bit;
717 	data->beeps[index] |= val << shift;
718 	w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
719 	mutex_unlock(&data->update_lock);
720 
721 	return count;
722 }
723 
724 /* Write 0 to clear chassis alarm */
725 static ssize_t
726 store_chassis_clear(struct device *dev,
727 		    struct device_attribute *attr, const char *buf,
728 		    size_t count)
729 {
730 	struct i2c_client *client = to_i2c_client(dev);
731 	struct w83795_data *data = i2c_get_clientdata(client);
732 	unsigned long val;
733 
734 	if (strict_strtoul(buf, 10, &val) < 0 || val != 0)
735 		return -EINVAL;
736 
737 	mutex_lock(&data->update_lock);
738 	val = w83795_read(client, W83795_REG_CLR_CHASSIS);
739 	val |= 0x80;
740 	w83795_write(client, W83795_REG_CLR_CHASSIS, val);
741 	mutex_unlock(&data->update_lock);
742 	return count;
743 }
744 
745 #define FAN_INPUT     0
746 #define FAN_MIN       1
747 static ssize_t
748 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
749 {
750 	struct sensor_device_attribute_2 *sensor_attr =
751 	    to_sensor_dev_attr_2(attr);
752 	int nr = sensor_attr->nr;
753 	int index = sensor_attr->index;
754 	struct w83795_data *data = w83795_update_device(dev);
755 	u16 val;
756 
757 	if (nr == FAN_INPUT)
758 		val = data->fan[index] & 0x0fff;
759 	else
760 		val = data->fan_min[index] & 0x0fff;
761 
762 	return sprintf(buf, "%lu\n", fan_from_reg(val));
763 }
764 
765 static ssize_t
766 store_fan_min(struct device *dev, struct device_attribute *attr,
767 	      const char *buf, size_t count)
768 {
769 	struct sensor_device_attribute_2 *sensor_attr =
770 	    to_sensor_dev_attr_2(attr);
771 	int index = sensor_attr->index;
772 	struct i2c_client *client = to_i2c_client(dev);
773 	struct w83795_data *data = i2c_get_clientdata(client);
774 	unsigned long val;
775 
776 	if (strict_strtoul(buf, 10, &val))
777 		return -EINVAL;
778 	val = fan_to_reg(val);
779 
780 	mutex_lock(&data->update_lock);
781 	data->fan_min[index] = val;
782 	w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
783 	val &= 0x0f;
784 	if (index & 1) {
785 		val <<= 4;
786 		val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
787 		       & 0x0f;
788 	} else {
789 		val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
790 		       & 0xf0;
791 	}
792 	w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
793 	mutex_unlock(&data->update_lock);
794 
795 	return count;
796 }
797 
798 static ssize_t
799 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
800 {
801 	struct w83795_data *data;
802 	struct sensor_device_attribute_2 *sensor_attr =
803 	    to_sensor_dev_attr_2(attr);
804 	int nr = sensor_attr->nr;
805 	int index = sensor_attr->index;
806 	unsigned int val;
807 
808 	data = nr == PWM_OUTPUT ? w83795_update_device(dev)
809 				: w83795_update_pwm_config(dev);
810 
811 	switch (nr) {
812 	case PWM_STOP_TIME:
813 		val = time_from_reg(data->pwm[index][nr]);
814 		break;
815 	case PWM_FREQ:
816 		val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
817 		break;
818 	default:
819 		val = data->pwm[index][nr];
820 		break;
821 	}
822 
823 	return sprintf(buf, "%u\n", val);
824 }
825 
826 static ssize_t
827 store_pwm(struct device *dev, struct device_attribute *attr,
828 	  const char *buf, size_t count)
829 {
830 	struct i2c_client *client = to_i2c_client(dev);
831 	struct w83795_data *data = i2c_get_clientdata(client);
832 	struct sensor_device_attribute_2 *sensor_attr =
833 	    to_sensor_dev_attr_2(attr);
834 	int nr = sensor_attr->nr;
835 	int index = sensor_attr->index;
836 	unsigned long val;
837 
838 	if (strict_strtoul(buf, 10, &val) < 0)
839 		return -EINVAL;
840 
841 	mutex_lock(&data->update_lock);
842 	switch (nr) {
843 	case PWM_STOP_TIME:
844 		val = time_to_reg(val);
845 		break;
846 	case PWM_FREQ:
847 		val = pwm_freq_to_reg(val, data->clkin);
848 		break;
849 	default:
850 		val = SENSORS_LIMIT(val, 0, 0xff);
851 		break;
852 	}
853 	w83795_write(client, W83795_REG_PWM(index, nr), val);
854 	data->pwm[index][nr] = val;
855 	mutex_unlock(&data->update_lock);
856 	return count;
857 }
858 
859 static ssize_t
860 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
861 {
862 	struct sensor_device_attribute_2 *sensor_attr =
863 	    to_sensor_dev_attr_2(attr);
864 	struct w83795_data *data = w83795_update_pwm_config(dev);
865 	int index = sensor_attr->index;
866 	u8 tmp;
867 
868 	/* Speed cruise mode */
869 	if (data->pwm_fcms[0] & (1 << index)) {
870 		tmp = 2;
871 		goto out;
872 	}
873 	/* Thermal cruise or SmartFan IV mode */
874 	for (tmp = 0; tmp < 6; tmp++) {
875 		if (data->pwm_tfmr[tmp] & (1 << index)) {
876 			tmp = 3;
877 			goto out;
878 		}
879 	}
880 	/* Manual mode */
881 	tmp = 1;
882 
883 out:
884 	return sprintf(buf, "%u\n", tmp);
885 }
886 
887 static ssize_t
888 store_pwm_enable(struct device *dev, struct device_attribute *attr,
889 	  const char *buf, size_t count)
890 {
891 	struct i2c_client *client = to_i2c_client(dev);
892 	struct w83795_data *data = w83795_update_pwm_config(dev);
893 	struct sensor_device_attribute_2 *sensor_attr =
894 	    to_sensor_dev_attr_2(attr);
895 	int index = sensor_attr->index;
896 	unsigned long val;
897 	int i;
898 
899 	if (strict_strtoul(buf, 10, &val) < 0)
900 		return -EINVAL;
901 	if (val < 1 || val > 2)
902 		return -EINVAL;
903 
904 	mutex_lock(&data->update_lock);
905 	switch (val) {
906 	case 1:
907 		/* Clear speed cruise mode bits */
908 		data->pwm_fcms[0] &= ~(1 << index);
909 		w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
910 		/* Clear thermal cruise mode bits */
911 		for (i = 0; i < 6; i++) {
912 			data->pwm_tfmr[i] &= ~(1 << index);
913 			w83795_write(client, W83795_REG_TFMR(i),
914 				data->pwm_tfmr[i]);
915 		}
916 		break;
917 	case 2:
918 		data->pwm_fcms[0] |= (1 << index);
919 		w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
920 		break;
921 	}
922 	mutex_unlock(&data->update_lock);
923 	return count;
924 }
925 
926 static ssize_t
927 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
928 {
929 	struct w83795_data *data = w83795_update_pwm_config(dev);
930 	int index = to_sensor_dev_attr_2(attr)->index;
931 	unsigned int mode;
932 
933 	if (data->pwm_fomc & (1 << index))
934 		mode = 0;	/* DC */
935 	else
936 		mode = 1;	/* PWM */
937 
938 	return sprintf(buf, "%u\n", mode);
939 }
940 
941 /*
942  * Check whether a given temperature source can ever be useful.
943  * Returns the number of selectable temperature channels which are
944  * enabled.
945  */
946 static int w83795_tss_useful(const struct w83795_data *data, int tsrc)
947 {
948 	int useful = 0, i;
949 
950 	for (i = 0; i < 4; i++) {
951 		if (tss_map[i][tsrc] == TSS_MAP_RESERVED)
952 			continue;
953 		if (tss_map[i][tsrc] < 6)	/* Analog */
954 			useful += (data->has_temp >> tss_map[i][tsrc]) & 1;
955 		else				/* Digital */
956 			useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1;
957 	}
958 
959 	return useful;
960 }
961 
962 static ssize_t
963 show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
964 {
965 	struct sensor_device_attribute_2 *sensor_attr =
966 	    to_sensor_dev_attr_2(attr);
967 	struct w83795_data *data = w83795_update_pwm_config(dev);
968 	int index = sensor_attr->index;
969 	u8 val = index / 2;
970 	u8 tmp = data->temp_src[val];
971 
972 	if (index & 1)
973 		val = 4;
974 	else
975 		val = 0;
976 	tmp >>= val;
977 	tmp &= 0x0f;
978 
979 	return sprintf(buf, "%u\n", tmp);
980 }
981 
982 static ssize_t
983 store_temp_src(struct device *dev, struct device_attribute *attr,
984 	  const char *buf, size_t count)
985 {
986 	struct i2c_client *client = to_i2c_client(dev);
987 	struct w83795_data *data = w83795_update_pwm_config(dev);
988 	struct sensor_device_attribute_2 *sensor_attr =
989 	    to_sensor_dev_attr_2(attr);
990 	int index = sensor_attr->index;
991 	unsigned long tmp;
992 	u8 val = index / 2;
993 
994 	if (strict_strtoul(buf, 10, &tmp) < 0)
995 		return -EINVAL;
996 	tmp = SENSORS_LIMIT(tmp, 0, 15);
997 
998 	mutex_lock(&data->update_lock);
999 	if (index & 1) {
1000 		tmp <<= 4;
1001 		data->temp_src[val] &= 0x0f;
1002 	} else {
1003 		data->temp_src[val] &= 0xf0;
1004 	}
1005 	data->temp_src[val] |= tmp;
1006 	w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
1007 	mutex_unlock(&data->update_lock);
1008 
1009 	return count;
1010 }
1011 
1012 #define TEMP_PWM_ENABLE   0
1013 #define TEMP_PWM_FAN_MAP  1
1014 static ssize_t
1015 show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
1016 		     char *buf)
1017 {
1018 	struct w83795_data *data = w83795_update_pwm_config(dev);
1019 	struct sensor_device_attribute_2 *sensor_attr =
1020 	    to_sensor_dev_attr_2(attr);
1021 	int nr = sensor_attr->nr;
1022 	int index = sensor_attr->index;
1023 	u8 tmp = 0xff;
1024 
1025 	switch (nr) {
1026 	case TEMP_PWM_ENABLE:
1027 		tmp = (data->pwm_fcms[1] >> index) & 1;
1028 		if (tmp)
1029 			tmp = 4;
1030 		else
1031 			tmp = 3;
1032 		break;
1033 	case TEMP_PWM_FAN_MAP:
1034 		tmp = data->pwm_tfmr[index];
1035 		break;
1036 	}
1037 
1038 	return sprintf(buf, "%u\n", tmp);
1039 }
1040 
1041 static ssize_t
1042 store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
1043 	  const char *buf, size_t count)
1044 {
1045 	struct i2c_client *client = to_i2c_client(dev);
1046 	struct w83795_data *data = w83795_update_pwm_config(dev);
1047 	struct sensor_device_attribute_2 *sensor_attr =
1048 	    to_sensor_dev_attr_2(attr);
1049 	int nr = sensor_attr->nr;
1050 	int index = sensor_attr->index;
1051 	unsigned long tmp;
1052 
1053 	if (strict_strtoul(buf, 10, &tmp) < 0)
1054 		return -EINVAL;
1055 
1056 	switch (nr) {
1057 	case TEMP_PWM_ENABLE:
1058 		if (tmp != 3 && tmp != 4)
1059 			return -EINVAL;
1060 		tmp -= 3;
1061 		mutex_lock(&data->update_lock);
1062 		data->pwm_fcms[1] &= ~(1 << index);
1063 		data->pwm_fcms[1] |= tmp << index;
1064 		w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
1065 		mutex_unlock(&data->update_lock);
1066 		break;
1067 	case TEMP_PWM_FAN_MAP:
1068 		mutex_lock(&data->update_lock);
1069 		tmp = SENSORS_LIMIT(tmp, 0, 0xff);
1070 		w83795_write(client, W83795_REG_TFMR(index), tmp);
1071 		data->pwm_tfmr[index] = tmp;
1072 		mutex_unlock(&data->update_lock);
1073 		break;
1074 	}
1075 	return count;
1076 }
1077 
1078 #define FANIN_TARGET   0
1079 #define FANIN_TOL      1
1080 static ssize_t
1081 show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
1082 {
1083 	struct w83795_data *data = w83795_update_pwm_config(dev);
1084 	struct sensor_device_attribute_2 *sensor_attr =
1085 	    to_sensor_dev_attr_2(attr);
1086 	int nr = sensor_attr->nr;
1087 	int index = sensor_attr->index;
1088 	u16 tmp = 0;
1089 
1090 	switch (nr) {
1091 	case FANIN_TARGET:
1092 		tmp = fan_from_reg(data->target_speed[index]);
1093 		break;
1094 	case FANIN_TOL:
1095 		tmp = data->tol_speed;
1096 		break;
1097 	}
1098 
1099 	return sprintf(buf, "%u\n", tmp);
1100 }
1101 
1102 static ssize_t
1103 store_fanin(struct device *dev, struct device_attribute *attr,
1104 	  const char *buf, size_t count)
1105 {
1106 	struct i2c_client *client = to_i2c_client(dev);
1107 	struct w83795_data *data = i2c_get_clientdata(client);
1108 	struct sensor_device_attribute_2 *sensor_attr =
1109 	    to_sensor_dev_attr_2(attr);
1110 	int nr = sensor_attr->nr;
1111 	int index = sensor_attr->index;
1112 	unsigned long val;
1113 
1114 	if (strict_strtoul(buf, 10, &val) < 0)
1115 		return -EINVAL;
1116 
1117 	mutex_lock(&data->update_lock);
1118 	switch (nr) {
1119 	case FANIN_TARGET:
1120 		val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
1121 		w83795_write(client, W83795_REG_FTSH(index), val >> 4);
1122 		w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
1123 		data->target_speed[index] = val;
1124 		break;
1125 	case FANIN_TOL:
1126 		val = SENSORS_LIMIT(val, 0, 0x3f);
1127 		w83795_write(client, W83795_REG_TFTS, val);
1128 		data->tol_speed = val;
1129 		break;
1130 	}
1131 	mutex_unlock(&data->update_lock);
1132 
1133 	return count;
1134 }
1135 
1136 
1137 static ssize_t
1138 show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1139 {
1140 	struct w83795_data *data = w83795_update_pwm_config(dev);
1141 	struct sensor_device_attribute_2 *sensor_attr =
1142 	    to_sensor_dev_attr_2(attr);
1143 	int nr = sensor_attr->nr;
1144 	int index = sensor_attr->index;
1145 	long tmp = temp_from_reg(data->pwm_temp[index][nr]);
1146 
1147 	return sprintf(buf, "%ld\n", tmp);
1148 }
1149 
1150 static ssize_t
1151 store_temp_pwm(struct device *dev, struct device_attribute *attr,
1152 	  const char *buf, size_t count)
1153 {
1154 	struct i2c_client *client = to_i2c_client(dev);
1155 	struct w83795_data *data = i2c_get_clientdata(client);
1156 	struct sensor_device_attribute_2 *sensor_attr =
1157 	    to_sensor_dev_attr_2(attr);
1158 	int nr = sensor_attr->nr;
1159 	int index = sensor_attr->index;
1160 	unsigned long val;
1161 	u8 tmp;
1162 
1163 	if (strict_strtoul(buf, 10, &val) < 0)
1164 		return -EINVAL;
1165 	val /= 1000;
1166 
1167 	mutex_lock(&data->update_lock);
1168 	switch (nr) {
1169 	case TEMP_PWM_TTTI:
1170 		val = SENSORS_LIMIT(val, 0, 0x7f);
1171 		w83795_write(client, W83795_REG_TTTI(index), val);
1172 		break;
1173 	case TEMP_PWM_CTFS:
1174 		val = SENSORS_LIMIT(val, 0, 0x7f);
1175 		w83795_write(client, W83795_REG_CTFS(index), val);
1176 		break;
1177 	case TEMP_PWM_HCT:
1178 		val = SENSORS_LIMIT(val, 0, 0x0f);
1179 		tmp = w83795_read(client, W83795_REG_HT(index));
1180 		tmp &= 0x0f;
1181 		tmp |= (val << 4) & 0xf0;
1182 		w83795_write(client, W83795_REG_HT(index), tmp);
1183 		break;
1184 	case TEMP_PWM_HOT:
1185 		val = SENSORS_LIMIT(val, 0, 0x0f);
1186 		tmp = w83795_read(client, W83795_REG_HT(index));
1187 		tmp &= 0xf0;
1188 		tmp |= val & 0x0f;
1189 		w83795_write(client, W83795_REG_HT(index), tmp);
1190 		break;
1191 	}
1192 	data->pwm_temp[index][nr] = val;
1193 	mutex_unlock(&data->update_lock);
1194 
1195 	return count;
1196 }
1197 
1198 static ssize_t
1199 show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1200 {
1201 	struct w83795_data *data = w83795_update_pwm_config(dev);
1202 	struct sensor_device_attribute_2 *sensor_attr =
1203 	    to_sensor_dev_attr_2(attr);
1204 	int nr = sensor_attr->nr;
1205 	int index = sensor_attr->index;
1206 
1207 	return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1208 }
1209 
1210 static ssize_t
1211 store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1212 	  const char *buf, size_t count)
1213 {
1214 	struct i2c_client *client = to_i2c_client(dev);
1215 	struct w83795_data *data = i2c_get_clientdata(client);
1216 	struct sensor_device_attribute_2 *sensor_attr =
1217 	    to_sensor_dev_attr_2(attr);
1218 	int nr = sensor_attr->nr;
1219 	int index = sensor_attr->index;
1220 	unsigned long val;
1221 
1222 	if (strict_strtoul(buf, 10, &val) < 0)
1223 		return -EINVAL;
1224 
1225 	mutex_lock(&data->update_lock);
1226 	w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1227 	data->sf4_reg[index][SF4_PWM][nr] = val;
1228 	mutex_unlock(&data->update_lock);
1229 
1230 	return count;
1231 }
1232 
1233 static ssize_t
1234 show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1235 {
1236 	struct w83795_data *data = w83795_update_pwm_config(dev);
1237 	struct sensor_device_attribute_2 *sensor_attr =
1238 	    to_sensor_dev_attr_2(attr);
1239 	int nr = sensor_attr->nr;
1240 	int index = sensor_attr->index;
1241 
1242 	return sprintf(buf, "%u\n",
1243 		(data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1244 }
1245 
1246 static ssize_t
1247 store_sf4_temp(struct device *dev, struct device_attribute *attr,
1248 	  const char *buf, size_t count)
1249 {
1250 	struct i2c_client *client = to_i2c_client(dev);
1251 	struct w83795_data *data = i2c_get_clientdata(client);
1252 	struct sensor_device_attribute_2 *sensor_attr =
1253 	    to_sensor_dev_attr_2(attr);
1254 	int nr = sensor_attr->nr;
1255 	int index = sensor_attr->index;
1256 	unsigned long val;
1257 
1258 	if (strict_strtoul(buf, 10, &val) < 0)
1259 		return -EINVAL;
1260 	val /= 1000;
1261 
1262 	mutex_lock(&data->update_lock);
1263 	w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1264 	data->sf4_reg[index][SF4_TEMP][nr] = val;
1265 	mutex_unlock(&data->update_lock);
1266 
1267 	return count;
1268 }
1269 
1270 
1271 static ssize_t
1272 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1273 {
1274 	struct sensor_device_attribute_2 *sensor_attr =
1275 	    to_sensor_dev_attr_2(attr);
1276 	int nr = sensor_attr->nr;
1277 	int index = sensor_attr->index;
1278 	struct w83795_data *data = w83795_update_device(dev);
1279 	long temp = temp_from_reg(data->temp[index][nr]);
1280 
1281 	if (nr == TEMP_READ)
1282 		temp += (data->temp_read_vrlsb[index] >> 6) * 250;
1283 	return sprintf(buf, "%ld\n", temp);
1284 }
1285 
1286 static ssize_t
1287 store_temp(struct device *dev, struct device_attribute *attr,
1288 	   const char *buf, size_t count)
1289 {
1290 	struct sensor_device_attribute_2 *sensor_attr =
1291 	    to_sensor_dev_attr_2(attr);
1292 	int nr = sensor_attr->nr;
1293 	int index = sensor_attr->index;
1294 	struct i2c_client *client = to_i2c_client(dev);
1295 	struct w83795_data *data = i2c_get_clientdata(client);
1296 	long tmp;
1297 
1298 	if (strict_strtol(buf, 10, &tmp) < 0)
1299 		return -EINVAL;
1300 
1301 	mutex_lock(&data->update_lock);
1302 	data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1303 	w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1304 	mutex_unlock(&data->update_lock);
1305 	return count;
1306 }
1307 
1308 
1309 static ssize_t
1310 show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1311 {
1312 	struct w83795_data *data = dev_get_drvdata(dev);
1313 	int tmp;
1314 
1315 	if (data->enable_dts & 2)
1316 		tmp = 5;
1317 	else
1318 		tmp = 6;
1319 
1320 	return sprintf(buf, "%d\n", tmp);
1321 }
1322 
1323 static ssize_t
1324 show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1325 {
1326 	struct sensor_device_attribute_2 *sensor_attr =
1327 	    to_sensor_dev_attr_2(attr);
1328 	int index = sensor_attr->index;
1329 	struct w83795_data *data = w83795_update_device(dev);
1330 	long temp = temp_from_reg(data->dts[index]);
1331 
1332 	temp += (data->dts_read_vrlsb[index] >> 6) * 250;
1333 	return sprintf(buf, "%ld\n", temp);
1334 }
1335 
1336 static ssize_t
1337 show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1338 {
1339 	struct sensor_device_attribute_2 *sensor_attr =
1340 	    to_sensor_dev_attr_2(attr);
1341 	int nr = sensor_attr->nr;
1342 	struct w83795_data *data = dev_get_drvdata(dev);
1343 	long temp = temp_from_reg(data->dts_ext[nr]);
1344 
1345 	return sprintf(buf, "%ld\n", temp);
1346 }
1347 
1348 static ssize_t
1349 store_dts_ext(struct device *dev, struct device_attribute *attr,
1350 	   const char *buf, size_t count)
1351 {
1352 	struct sensor_device_attribute_2 *sensor_attr =
1353 	    to_sensor_dev_attr_2(attr);
1354 	int nr = sensor_attr->nr;
1355 	struct i2c_client *client = to_i2c_client(dev);
1356 	struct w83795_data *data = i2c_get_clientdata(client);
1357 	long tmp;
1358 
1359 	if (strict_strtol(buf, 10, &tmp) < 0)
1360 		return -EINVAL;
1361 
1362 	mutex_lock(&data->update_lock);
1363 	data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1364 	w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1365 	mutex_unlock(&data->update_lock);
1366 	return count;
1367 }
1368 
1369 
1370 static ssize_t
1371 show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1372 {
1373 	struct w83795_data *data = dev_get_drvdata(dev);
1374 	struct sensor_device_attribute_2 *sensor_attr =
1375 	    to_sensor_dev_attr_2(attr);
1376 	int index = sensor_attr->index;
1377 	int tmp;
1378 
1379 	if (data->temp_mode & (1 << index))
1380 		tmp = 3;	/* Thermal diode */
1381 	else
1382 		tmp = 4;	/* Thermistor */
1383 
1384 	return sprintf(buf, "%d\n", tmp);
1385 }
1386 
1387 /* Only for temp1-4 (temp5-6 can only be thermistor) */
1388 static ssize_t
1389 store_temp_mode(struct device *dev, struct device_attribute *attr,
1390 		const char *buf, size_t count)
1391 {
1392 	struct i2c_client *client = to_i2c_client(dev);
1393 	struct w83795_data *data = i2c_get_clientdata(client);
1394 	struct sensor_device_attribute_2 *sensor_attr =
1395 	    to_sensor_dev_attr_2(attr);
1396 	int index = sensor_attr->index;
1397 	int reg_shift;
1398 	unsigned long val;
1399 	u8 tmp;
1400 
1401 	if (strict_strtoul(buf, 10, &val) < 0)
1402 		return -EINVAL;
1403 	if ((val != 4) && (val != 3))
1404 		return -EINVAL;
1405 
1406 	mutex_lock(&data->update_lock);
1407 	if (val == 3) {
1408 		/* Thermal diode */
1409 		val = 0x01;
1410 		data->temp_mode |= 1 << index;
1411 	} else if (val == 4) {
1412 		/* Thermistor */
1413 		val = 0x03;
1414 		data->temp_mode &= ~(1 << index);
1415 	}
1416 
1417 	reg_shift = 2 * index;
1418 	tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1419 	tmp &= ~(0x03 << reg_shift);
1420 	tmp |= val << reg_shift;
1421 	w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
1422 
1423 	mutex_unlock(&data->update_lock);
1424 	return count;
1425 }
1426 
1427 
1428 /* show/store VIN */
1429 static ssize_t
1430 show_in(struct device *dev, struct device_attribute *attr, char *buf)
1431 {
1432 	struct sensor_device_attribute_2 *sensor_attr =
1433 	    to_sensor_dev_attr_2(attr);
1434 	int nr = sensor_attr->nr;
1435 	int index = sensor_attr->index;
1436 	struct w83795_data *data = w83795_update_device(dev);
1437 	u16 val = data->in[index][nr];
1438 	u8 lsb_idx;
1439 
1440 	switch (nr) {
1441 	case IN_READ:
1442 		/* calculate this value again by sensors as sensors3.conf */
1443 		if ((index >= 17) &&
1444 		    !((data->has_gain >> (index - 17)) & 1))
1445 			val *= 8;
1446 		break;
1447 	case IN_MAX:
1448 	case IN_LOW:
1449 		lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1450 		val <<= 2;
1451 		val |= (data->in_lsb[lsb_idx][nr] >>
1452 			IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
1453 		if ((index >= 17) &&
1454 		    !((data->has_gain >> (index - 17)) & 1))
1455 			val *= 8;
1456 		break;
1457 	}
1458 	val = in_from_reg(index, val);
1459 
1460 	return sprintf(buf, "%d\n", val);
1461 }
1462 
1463 static ssize_t
1464 store_in(struct device *dev, struct device_attribute *attr,
1465 	 const char *buf, size_t count)
1466 {
1467 	struct sensor_device_attribute_2 *sensor_attr =
1468 	    to_sensor_dev_attr_2(attr);
1469 	int nr = sensor_attr->nr;
1470 	int index = sensor_attr->index;
1471 	struct i2c_client *client = to_i2c_client(dev);
1472 	struct w83795_data *data = i2c_get_clientdata(client);
1473 	unsigned long val;
1474 	u8 tmp;
1475 	u8 lsb_idx;
1476 
1477 	if (strict_strtoul(buf, 10, &val) < 0)
1478 		return -EINVAL;
1479 	val = in_to_reg(index, val);
1480 
1481 	if ((index >= 17) &&
1482 	    !((data->has_gain >> (index - 17)) & 1))
1483 		val /= 8;
1484 	val = SENSORS_LIMIT(val, 0, 0x3FF);
1485 	mutex_lock(&data->update_lock);
1486 
1487 	lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1488 	tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1489 	tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1490 	tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1491 	w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1492 	data->in_lsb[lsb_idx][nr] = tmp;
1493 
1494 	tmp = (val >> 2) & 0xff;
1495 	w83795_write(client, W83795_REG_IN[index][nr], tmp);
1496 	data->in[index][nr] = tmp;
1497 
1498 	mutex_unlock(&data->update_lock);
1499 	return count;
1500 }
1501 
1502 
1503 #ifdef CONFIG_SENSORS_W83795_FANCTRL
1504 static ssize_t
1505 show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1506 {
1507 	struct sensor_device_attribute_2 *sensor_attr =
1508 	    to_sensor_dev_attr_2(attr);
1509 	int nr = sensor_attr->nr;
1510 	struct w83795_data *data = w83795_update_pwm_config(dev);
1511 	u16 val = data->setup_pwm[nr];
1512 
1513 	switch (nr) {
1514 	case SETUP_PWM_UPTIME:
1515 	case SETUP_PWM_DOWNTIME:
1516 		val = time_from_reg(val);
1517 		break;
1518 	}
1519 
1520 	return sprintf(buf, "%d\n", val);
1521 }
1522 
1523 static ssize_t
1524 store_sf_setup(struct device *dev, struct device_attribute *attr,
1525 	 const char *buf, size_t count)
1526 {
1527 	struct sensor_device_attribute_2 *sensor_attr =
1528 	    to_sensor_dev_attr_2(attr);
1529 	int nr = sensor_attr->nr;
1530 	struct i2c_client *client = to_i2c_client(dev);
1531 	struct w83795_data *data = i2c_get_clientdata(client);
1532 	unsigned long val;
1533 
1534 	if (strict_strtoul(buf, 10, &val) < 0)
1535 		return -EINVAL;
1536 
1537 	switch (nr) {
1538 	case SETUP_PWM_DEFAULT:
1539 		val = SENSORS_LIMIT(val, 0, 0xff);
1540 		break;
1541 	case SETUP_PWM_UPTIME:
1542 	case SETUP_PWM_DOWNTIME:
1543 		val = time_to_reg(val);
1544 		if (val == 0)
1545 			return -EINVAL;
1546 		break;
1547 	}
1548 
1549 	mutex_lock(&data->update_lock);
1550 	data->setup_pwm[nr] = val;
1551 	w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1552 	mutex_unlock(&data->update_lock);
1553 	return count;
1554 }
1555 #endif
1556 
1557 
1558 #define NOT_USED			-1
1559 
1560 /* Don't change the attribute order, _max and _min are accessed by index
1561  * somewhere else in the code */
1562 #define SENSOR_ATTR_IN(index) {						\
1563 	SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL,	\
1564 		IN_READ, index), \
1565 	SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in,	\
1566 		store_in, IN_MAX, index),				\
1567 	SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in,	\
1568 		store_in, IN_LOW, index),				\
1569 	SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep,	\
1570 		NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1571 	SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO,		\
1572 		show_alarm_beep, store_beep, BEEP_ENABLE,		\
1573 		index + ((index > 14) ? 1 : 0)) }
1574 
1575 #define SENSOR_ATTR_FAN(index) {					\
1576 	SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan,		\
1577 		NULL, FAN_INPUT, index - 1), \
1578 	SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO,		\
1579 		show_fan, store_fan_min, FAN_MIN, index - 1),	\
1580 	SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep,	\
1581 		NULL, ALARM_STATUS, index + 31),			\
1582 	SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO,		\
1583 		show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
1584 
1585 #define SENSOR_ATTR_PWM(index) {					\
1586 	SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm,		\
1587 		store_pwm, PWM_OUTPUT, index - 1),			\
1588 	SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO,		\
1589 		show_pwm, store_pwm, PWM_NONSTOP, index - 1),		\
1590 	SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO,		\
1591 		show_pwm, store_pwm, PWM_START, index - 1),		\
1592 	SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO,	\
1593 		show_pwm, store_pwm, PWM_STOP_TIME, index - 1),	 \
1594 	SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO,	\
1595 		show_pwm, store_pwm, PWM_FREQ, index - 1),	 \
1596 	SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO,		\
1597 		show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1598 	SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO,			\
1599 		show_pwm_mode, NULL, NOT_USED, index - 1),		\
1600 	SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1601 		show_fanin, store_fanin, FANIN_TARGET, index - 1) }
1602 
1603 #define SENSOR_ATTR_DTS(index) {					\
1604 	SENSOR_ATTR_2(temp##index##_type, S_IRUGO ,		\
1605 		show_dts_mode, NULL, NOT_USED, index - 7),	\
1606 	SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts,		\
1607 		NULL, NOT_USED, index - 7),				\
1608 	SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
1609 		store_dts_ext, DTS_CRIT, NOT_USED),			\
1610 	SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR,	\
1611 		show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED),	\
1612 	SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
1613 		store_dts_ext, DTS_WARN, NOT_USED),			\
1614 	SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR,	\
1615 		show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED),	\
1616 	SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO,			\
1617 		show_alarm_beep, NULL, ALARM_STATUS, index + 17),	\
1618 	SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO,		\
1619 		show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
1620 
1621 #define SENSOR_ATTR_TEMP(index) {					\
1622 	SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
1623 		show_temp_mode, store_temp_mode, NOT_USED, index - 1),	\
1624 	SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp,		\
1625 		NULL, TEMP_READ, index - 1),				\
1626 	SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp,	\
1627 		store_temp, TEMP_CRIT, index - 1),			\
1628 	SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR,	\
1629 		show_temp, store_temp, TEMP_CRIT_HYST, index - 1),	\
1630 	SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp,	\
1631 		store_temp, TEMP_WARN, index - 1),			\
1632 	SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR,	\
1633 		show_temp, store_temp, TEMP_WARN_HYST, index - 1),	\
1634 	SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO,			\
1635 		show_alarm_beep, NULL, ALARM_STATUS,			\
1636 		index + (index > 4 ? 11 : 17)),				\
1637 	SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO,		\
1638 		show_alarm_beep, store_beep, BEEP_ENABLE,		\
1639 		index + (index > 4 ? 11 : 17)),				\
1640 	SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO,	\
1641 		show_temp_pwm_enable, store_temp_pwm_enable,		\
1642 		TEMP_PWM_ENABLE, index - 1),				\
1643 	SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1644 		show_temp_pwm_enable, store_temp_pwm_enable,		\
1645 		TEMP_PWM_FAN_MAP, index - 1),				\
1646 	SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO,		\
1647 		show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
1648 	SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO,		\
1649 		show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
1650 	SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO,	\
1651 		show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1652 	SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO,	\
1653 		show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1654 	SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1655 		show_sf4_pwm, store_sf4_pwm, 0, index - 1),		\
1656 	SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1657 		show_sf4_pwm, store_sf4_pwm, 1, index - 1),		\
1658 	SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1659 		show_sf4_pwm, store_sf4_pwm, 2, index - 1),		\
1660 	SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1661 		show_sf4_pwm, store_sf4_pwm, 3, index - 1),		\
1662 	SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1663 		show_sf4_pwm, store_sf4_pwm, 4, index - 1),		\
1664 	SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1665 		show_sf4_pwm, store_sf4_pwm, 5, index - 1),		\
1666 	SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1667 		show_sf4_pwm, store_sf4_pwm, 6, index - 1),		\
1668 	SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1669 		show_sf4_temp, store_sf4_temp, 0, index - 1),		\
1670 	SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1671 		show_sf4_temp, store_sf4_temp, 1, index - 1),		\
1672 	SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1673 		show_sf4_temp, store_sf4_temp, 2, index - 1),		\
1674 	SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1675 		show_sf4_temp, store_sf4_temp, 3, index - 1),		\
1676 	SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1677 		show_sf4_temp, store_sf4_temp, 4, index - 1),		\
1678 	SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1679 		show_sf4_temp, store_sf4_temp, 5, index - 1),		\
1680 	SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1681 		show_sf4_temp, store_sf4_temp, 6, index - 1) }
1682 
1683 
1684 static struct sensor_device_attribute_2 w83795_in[][5] = {
1685 	SENSOR_ATTR_IN(0),
1686 	SENSOR_ATTR_IN(1),
1687 	SENSOR_ATTR_IN(2),
1688 	SENSOR_ATTR_IN(3),
1689 	SENSOR_ATTR_IN(4),
1690 	SENSOR_ATTR_IN(5),
1691 	SENSOR_ATTR_IN(6),
1692 	SENSOR_ATTR_IN(7),
1693 	SENSOR_ATTR_IN(8),
1694 	SENSOR_ATTR_IN(9),
1695 	SENSOR_ATTR_IN(10),
1696 	SENSOR_ATTR_IN(11),
1697 	SENSOR_ATTR_IN(12),
1698 	SENSOR_ATTR_IN(13),
1699 	SENSOR_ATTR_IN(14),
1700 	SENSOR_ATTR_IN(15),
1701 	SENSOR_ATTR_IN(16),
1702 	SENSOR_ATTR_IN(17),
1703 	SENSOR_ATTR_IN(18),
1704 	SENSOR_ATTR_IN(19),
1705 	SENSOR_ATTR_IN(20),
1706 };
1707 
1708 static const struct sensor_device_attribute_2 w83795_fan[][4] = {
1709 	SENSOR_ATTR_FAN(1),
1710 	SENSOR_ATTR_FAN(2),
1711 	SENSOR_ATTR_FAN(3),
1712 	SENSOR_ATTR_FAN(4),
1713 	SENSOR_ATTR_FAN(5),
1714 	SENSOR_ATTR_FAN(6),
1715 	SENSOR_ATTR_FAN(7),
1716 	SENSOR_ATTR_FAN(8),
1717 	SENSOR_ATTR_FAN(9),
1718 	SENSOR_ATTR_FAN(10),
1719 	SENSOR_ATTR_FAN(11),
1720 	SENSOR_ATTR_FAN(12),
1721 	SENSOR_ATTR_FAN(13),
1722 	SENSOR_ATTR_FAN(14),
1723 };
1724 
1725 static const struct sensor_device_attribute_2 w83795_temp[][28] = {
1726 	SENSOR_ATTR_TEMP(1),
1727 	SENSOR_ATTR_TEMP(2),
1728 	SENSOR_ATTR_TEMP(3),
1729 	SENSOR_ATTR_TEMP(4),
1730 	SENSOR_ATTR_TEMP(5),
1731 	SENSOR_ATTR_TEMP(6),
1732 };
1733 
1734 static const struct sensor_device_attribute_2 w83795_dts[][8] = {
1735 	SENSOR_ATTR_DTS(7),
1736 	SENSOR_ATTR_DTS(8),
1737 	SENSOR_ATTR_DTS(9),
1738 	SENSOR_ATTR_DTS(10),
1739 	SENSOR_ATTR_DTS(11),
1740 	SENSOR_ATTR_DTS(12),
1741 	SENSOR_ATTR_DTS(13),
1742 	SENSOR_ATTR_DTS(14),
1743 };
1744 
1745 static const struct sensor_device_attribute_2 w83795_pwm[][8] = {
1746 	SENSOR_ATTR_PWM(1),
1747 	SENSOR_ATTR_PWM(2),
1748 	SENSOR_ATTR_PWM(3),
1749 	SENSOR_ATTR_PWM(4),
1750 	SENSOR_ATTR_PWM(5),
1751 	SENSOR_ATTR_PWM(6),
1752 	SENSOR_ATTR_PWM(7),
1753 	SENSOR_ATTR_PWM(8),
1754 };
1755 
1756 static const struct sensor_device_attribute_2 w83795_tss[6] = {
1757 	SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO,
1758 		      show_temp_src, store_temp_src, NOT_USED, 0),
1759 	SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO,
1760 		      show_temp_src, store_temp_src, NOT_USED, 1),
1761 	SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO,
1762 		      show_temp_src, store_temp_src, NOT_USED, 2),
1763 	SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO,
1764 		      show_temp_src, store_temp_src, NOT_USED, 3),
1765 	SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO,
1766 		      show_temp_src, store_temp_src, NOT_USED, 4),
1767 	SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO,
1768 		      show_temp_src, store_temp_src, NOT_USED, 5),
1769 };
1770 
1771 static const struct sensor_device_attribute_2 sda_single_files[] = {
1772 	SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
1773 		      store_chassis_clear, ALARM_STATUS, 46),
1774 	SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep,
1775 		      store_beep, BEEP_ENABLE, 46),
1776 	SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1777 		      store_beep, BEEP_ENABLE, 47),
1778 #ifdef CONFIG_SENSORS_W83795_FANCTRL
1779 	SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1780 		store_fanin, FANIN_TOL, NOT_USED),
1781 	SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1782 		      store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1783 	SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1784 		      store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1785 	SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1786 		      store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1787 #endif
1788 };
1789 
1790 /*
1791  * Driver interface
1792  */
1793 
1794 static void w83795_init_client(struct i2c_client *client)
1795 {
1796 	struct w83795_data *data = i2c_get_clientdata(client);
1797 	static const u16 clkin[4] = {	/* in kHz */
1798 		14318, 24000, 33333, 48000
1799 	};
1800 	u8 config;
1801 
1802 	if (reset)
1803 		w83795_write(client, W83795_REG_CONFIG, 0x80);
1804 
1805 	/* Start monitoring if needed */
1806 	config = w83795_read(client, W83795_REG_CONFIG);
1807 	if (!(config & W83795_REG_CONFIG_START)) {
1808 		dev_info(&client->dev, "Enabling monitoring operations\n");
1809 		w83795_write(client, W83795_REG_CONFIG,
1810 			     config | W83795_REG_CONFIG_START);
1811 	}
1812 
1813 	data->clkin = clkin[(config >> 3) & 0x3];
1814 	dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
1815 }
1816 
1817 static int w83795_get_device_id(struct i2c_client *client)
1818 {
1819 	int device_id;
1820 
1821 	device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1822 
1823 	/* Special case for rev. A chips; can't be checked first because later
1824 	   revisions emulate this for compatibility */
1825 	if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1826 		int alt_id;
1827 
1828 		alt_id = i2c_smbus_read_byte_data(client,
1829 						  W83795_REG_DEVICEID_A);
1830 		if (alt_id == 0x50)
1831 			device_id = alt_id;
1832 	}
1833 
1834 	return device_id;
1835 }
1836 
1837 /* Return 0 if detection is successful, -ENODEV otherwise */
1838 static int w83795_detect(struct i2c_client *client,
1839 			 struct i2c_board_info *info)
1840 {
1841 	int bank, vendor_id, device_id, expected, i2c_addr, config;
1842 	struct i2c_adapter *adapter = client->adapter;
1843 	unsigned short address = client->addr;
1844 	const char *chip_name;
1845 
1846 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1847 		return -ENODEV;
1848 	bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1849 	if (bank < 0 || (bank & 0x7c)) {
1850 		dev_dbg(&adapter->dev,
1851 			"w83795: Detection failed at addr 0x%02hx, check %s\n",
1852 			address, "bank");
1853 		return -ENODEV;
1854 	}
1855 
1856 	/* Check Nuvoton vendor ID */
1857 	vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1858 	expected = bank & 0x80 ? 0x5c : 0xa3;
1859 	if (vendor_id != expected) {
1860 		dev_dbg(&adapter->dev,
1861 			"w83795: Detection failed at addr 0x%02hx, check %s\n",
1862 			address, "vendor id");
1863 		return -ENODEV;
1864 	}
1865 
1866 	/* Check device ID */
1867 	device_id = w83795_get_device_id(client) |
1868 		    (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1869 	if ((device_id >> 4) != 0x795) {
1870 		dev_dbg(&adapter->dev,
1871 			"w83795: Detection failed at addr 0x%02hx, check %s\n",
1872 			address, "device id\n");
1873 		return -ENODEV;
1874 	}
1875 
1876 	/* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1877 	   should match */
1878 	if ((bank & 0x07) == 0) {
1879 		i2c_addr = i2c_smbus_read_byte_data(client,
1880 						    W83795_REG_I2C_ADDR);
1881 		if ((i2c_addr & 0x7f) != address) {
1882 			dev_dbg(&adapter->dev,
1883 				"w83795: Detection failed at addr 0x%02hx, "
1884 				"check %s\n", address, "i2c addr");
1885 			return -ENODEV;
1886 		}
1887 	}
1888 
1889 	/* Check 795 chip type: 795G or 795ADG
1890 	   Usually we don't write to chips during detection, but here we don't
1891 	   quite have the choice; hopefully it's OK, we are about to return
1892 	   success anyway */
1893 	if ((bank & 0x07) != 0)
1894 		i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1895 					  bank & ~0x07);
1896 	config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1897 	if (config & W83795_REG_CONFIG_CONFIG48)
1898 		chip_name = "w83795adg";
1899 	else
1900 		chip_name = "w83795g";
1901 
1902 	strlcpy(info->type, chip_name, I2C_NAME_SIZE);
1903 	dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1904 		 'A' + (device_id & 0xf), address);
1905 
1906 	return 0;
1907 }
1908 
1909 static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1910 			       const struct device_attribute *))
1911 {
1912 	struct w83795_data *data = dev_get_drvdata(dev);
1913 	int err, i, j;
1914 
1915 	for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
1916 		if (!(data->has_in & (1 << i)))
1917 			continue;
1918 		for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1919 			err = fn(dev, &w83795_in[i][j].dev_attr);
1920 			if (err)
1921 				return err;
1922 		}
1923 	}
1924 
1925 	for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
1926 		if (!(data->has_fan & (1 << i)))
1927 			continue;
1928 		for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1929 			err = fn(dev, &w83795_fan[i][j].dev_attr);
1930 			if (err)
1931 				return err;
1932 		}
1933 	}
1934 
1935 	for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) {
1936 		j = w83795_tss_useful(data, i);
1937 		if (!j)
1938 			continue;
1939 		err = fn(dev, &w83795_tss[i].dev_attr);
1940 		if (err)
1941 			return err;
1942 	}
1943 
1944 	for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1945 		err = fn(dev, &sda_single_files[i].dev_attr);
1946 		if (err)
1947 			return err;
1948 	}
1949 
1950 #ifdef CONFIG_SENSORS_W83795_FANCTRL
1951 	for (i = 0; i < data->has_pwm; i++) {
1952 		for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1953 			err = fn(dev, &w83795_pwm[i][j].dev_attr);
1954 			if (err)
1955 				return err;
1956 		}
1957 	}
1958 #endif
1959 
1960 	for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
1961 		if (!(data->has_temp & (1 << i)))
1962 			continue;
1963 #ifdef CONFIG_SENSORS_W83795_FANCTRL
1964 		for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
1965 #else
1966 		for (j = 0; j < 8; j++) {
1967 #endif
1968 			err = fn(dev, &w83795_temp[i][j].dev_attr);
1969 			if (err)
1970 				return err;
1971 		}
1972 	}
1973 
1974 	if (data->enable_dts) {
1975 		for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
1976 			if (!(data->has_dts & (1 << i)))
1977 				continue;
1978 			for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1979 				err = fn(dev, &w83795_dts[i][j].dev_attr);
1980 				if (err)
1981 					return err;
1982 			}
1983 		}
1984 	}
1985 
1986 	return 0;
1987 }
1988 
1989 /* We need a wrapper that fits in w83795_handle_files */
1990 static int device_remove_file_wrapper(struct device *dev,
1991 				      const struct device_attribute *attr)
1992 {
1993 	device_remove_file(dev, attr);
1994 	return 0;
1995 }
1996 
1997 static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1998 {
1999 	struct w83795_data *data = i2c_get_clientdata(client);
2000 	u8 vid_ctl;
2001 	int i, err_max, err_min;
2002 
2003 	vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
2004 
2005 	/* Return immediately if VRM isn't configured */
2006 	if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
2007 		return;
2008 
2009 	data->has_dyn_in = (vid_ctl >> 3) & 0x07;
2010 	for (i = 0; i < 2; i++) {
2011 		if (!(data->has_dyn_in & (1 << i)))
2012 			continue;
2013 
2014 		/* Voltage limits in dynamic mode, switch to read-only */
2015 		err_max = sysfs_chmod_file(&client->dev.kobj,
2016 					   &w83795_in[i][2].dev_attr.attr,
2017 					   S_IRUGO);
2018 		err_min = sysfs_chmod_file(&client->dev.kobj,
2019 					   &w83795_in[i][3].dev_attr.attr,
2020 					   S_IRUGO);
2021 		if (err_max || err_min)
2022 			dev_warn(&client->dev, "Failed to set in%d limits "
2023 				 "read-only (%d, %d)\n", i, err_max, err_min);
2024 		else
2025 			dev_info(&client->dev, "in%d limits set dynamically "
2026 				 "from VID\n", i);
2027 	}
2028 }
2029 
2030 /* Check pins that can be used for either temperature or voltage monitoring */
2031 static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
2032 				     int temp_chan, int in_chan)
2033 {
2034 	/* config is a 2-bit value */
2035 	switch (config) {
2036 	case 0x2: /* Voltage monitoring */
2037 		data->has_in |= 1 << in_chan;
2038 		break;
2039 	case 0x1: /* Thermal diode */
2040 		if (temp_chan >= 4)
2041 			break;
2042 		data->temp_mode |= 1 << temp_chan;
2043 		/* fall through */
2044 	case 0x3: /* Thermistor */
2045 		data->has_temp |= 1 << temp_chan;
2046 		break;
2047 	}
2048 }
2049 
2050 static int w83795_probe(struct i2c_client *client,
2051 			const struct i2c_device_id *id)
2052 {
2053 	int i;
2054 	u8 tmp;
2055 	struct device *dev = &client->dev;
2056 	struct w83795_data *data;
2057 	int err;
2058 
2059 	data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
2060 	if (!data) {
2061 		err = -ENOMEM;
2062 		goto exit;
2063 	}
2064 
2065 	i2c_set_clientdata(client, data);
2066 	data->chip_type = id->driver_data;
2067 	data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2068 	mutex_init(&data->update_lock);
2069 
2070 	/* Initialize the chip */
2071 	w83795_init_client(client);
2072 
2073 	/* Check which voltages and fans are present */
2074 	data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
2075 		     | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
2076 	data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
2077 		      | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
2078 
2079 	/* Check which analog temperatures and extra voltages are present */
2080 	tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
2081 	if (tmp & 0x20)
2082 		data->enable_dts = 1;
2083 	w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
2084 	w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
2085 	tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
2086 	w83795_apply_temp_config(data, tmp >> 6, 3, 20);
2087 	w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
2088 	w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
2089 	w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
2090 
2091 	/* Check DTS enable status */
2092 	if (data->enable_dts) {
2093 		if (1 & w83795_read(client, W83795_REG_DTSC))
2094 			data->enable_dts |= 2;
2095 		data->has_dts = w83795_read(client, W83795_REG_DTSE);
2096 	}
2097 
2098 	/* Report PECI Tbase values */
2099 	if (data->enable_dts == 1) {
2100 		for (i = 0; i < 8; i++) {
2101 			if (!(data->has_dts & (1 << i)))
2102 				continue;
2103 			tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
2104 			dev_info(&client->dev,
2105 				 "PECI agent %d Tbase temperature: %u\n",
2106 				 i + 1, (unsigned int)tmp & 0x7f);
2107 		}
2108 	}
2109 
2110 	data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
2111 
2112 	/* pwm and smart fan */
2113 	if (data->chip_type == w83795g)
2114 		data->has_pwm = 8;
2115 	else
2116 		data->has_pwm = 2;
2117 
2118 	err = w83795_handle_files(dev, device_create_file);
2119 	if (err)
2120 		goto exit_remove;
2121 
2122 	if (data->chip_type == w83795g)
2123 		w83795_check_dynamic_in_limits(client);
2124 
2125 	data->hwmon_dev = hwmon_device_register(dev);
2126 	if (IS_ERR(data->hwmon_dev)) {
2127 		err = PTR_ERR(data->hwmon_dev);
2128 		goto exit_remove;
2129 	}
2130 
2131 	return 0;
2132 
2133 exit_remove:
2134 	w83795_handle_files(dev, device_remove_file_wrapper);
2135 	kfree(data);
2136 exit:
2137 	return err;
2138 }
2139 
2140 static int w83795_remove(struct i2c_client *client)
2141 {
2142 	struct w83795_data *data = i2c_get_clientdata(client);
2143 
2144 	hwmon_device_unregister(data->hwmon_dev);
2145 	w83795_handle_files(&client->dev, device_remove_file_wrapper);
2146 	kfree(data);
2147 
2148 	return 0;
2149 }
2150 
2151 
2152 static const struct i2c_device_id w83795_id[] = {
2153 	{ "w83795g", w83795g },
2154 	{ "w83795adg", w83795adg },
2155 	{ }
2156 };
2157 MODULE_DEVICE_TABLE(i2c, w83795_id);
2158 
2159 static struct i2c_driver w83795_driver = {
2160 	.driver = {
2161 		   .name = "w83795",
2162 	},
2163 	.probe		= w83795_probe,
2164 	.remove		= w83795_remove,
2165 	.id_table	= w83795_id,
2166 
2167 	.class		= I2C_CLASS_HWMON,
2168 	.detect		= w83795_detect,
2169 	.address_list	= normal_i2c,
2170 };
2171 
2172 static int __init sensors_w83795_init(void)
2173 {
2174 	return i2c_add_driver(&w83795_driver);
2175 }
2176 
2177 static void __exit sensors_w83795_exit(void)
2178 {
2179 	i2c_del_driver(&w83795_driver);
2180 }
2181 
2182 MODULE_AUTHOR("Wei Song, Jean Delvare <khali@linux-fr.org>");
2183 MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
2184 MODULE_LICENSE("GPL");
2185 
2186 module_init(sensors_w83795_init);
2187 module_exit(sensors_w83795_exit);
2188