1 /* 2 * w83795.c - Linux kernel driver for hardware monitoring 3 * Copyright (C) 2008 Nuvoton Technology Corp. 4 * Wei Song 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation - version 2. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 18 * 02110-1301 USA. 19 * 20 * Supports following chips: 21 * 22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA 23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no 24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no 25 */ 26 27 #include <linux/kernel.h> 28 #include <linux/module.h> 29 #include <linux/init.h> 30 #include <linux/slab.h> 31 #include <linux/i2c.h> 32 #include <linux/hwmon.h> 33 #include <linux/hwmon-sysfs.h> 34 #include <linux/err.h> 35 #include <linux/mutex.h> 36 #include <linux/delay.h> 37 38 /* Addresses to scan */ 39 static const unsigned short normal_i2c[] = { 40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END 41 }; 42 43 44 static int reset; 45 module_param(reset, bool, 0); 46 MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); 47 48 49 #define W83795_REG_BANKSEL 0x00 50 #define W83795_REG_VENDORID 0xfd 51 #define W83795_REG_CHIPID 0xfe 52 #define W83795_REG_DEVICEID 0xfb 53 #define W83795_REG_DEVICEID_A 0xff 54 55 #define W83795_REG_I2C_ADDR 0xfc 56 #define W83795_REG_CONFIG 0x01 57 #define W83795_REG_CONFIG_CONFIG48 0x04 58 #define W83795_REG_CONFIG_START 0x01 59 60 /* Multi-Function Pin Ctrl Registers */ 61 #define W83795_REG_VOLT_CTRL1 0x02 62 #define W83795_REG_VOLT_CTRL2 0x03 63 #define W83795_REG_TEMP_CTRL1 0x04 64 #define W83795_REG_TEMP_CTRL2 0x05 65 #define W83795_REG_FANIN_CTRL1 0x06 66 #define W83795_REG_FANIN_CTRL2 0x07 67 #define W83795_REG_VMIGB_CTRL 0x08 68 69 #define TEMP_READ 0 70 #define TEMP_CRIT 1 71 #define TEMP_CRIT_HYST 2 72 #define TEMP_WARN 3 73 #define TEMP_WARN_HYST 4 74 /* only crit and crit_hyst affect real-time alarm status 75 * current crit crit_hyst warn warn_hyst */ 76 static const u16 W83795_REG_TEMP[][5] = { 77 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */ 78 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */ 79 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */ 80 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */ 81 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */ 82 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */ 83 }; 84 85 #define IN_READ 0 86 #define IN_MAX 1 87 #define IN_LOW 2 88 static const u16 W83795_REG_IN[][3] = { 89 /* Current, HL, LL */ 90 {0x10, 0x70, 0x71}, /* VSEN1 */ 91 {0x11, 0x72, 0x73}, /* VSEN2 */ 92 {0x12, 0x74, 0x75}, /* VSEN3 */ 93 {0x13, 0x76, 0x77}, /* VSEN4 */ 94 {0x14, 0x78, 0x79}, /* VSEN5 */ 95 {0x15, 0x7a, 0x7b}, /* VSEN6 */ 96 {0x16, 0x7c, 0x7d}, /* VSEN7 */ 97 {0x17, 0x7e, 0x7f}, /* VSEN8 */ 98 {0x18, 0x80, 0x81}, /* VSEN9 */ 99 {0x19, 0x82, 0x83}, /* VSEN10 */ 100 {0x1A, 0x84, 0x85}, /* VSEN11 */ 101 {0x1B, 0x86, 0x87}, /* VTT */ 102 {0x1C, 0x88, 0x89}, /* 3VDD */ 103 {0x1D, 0x8a, 0x8b}, /* 3VSB */ 104 {0x1E, 0x8c, 0x8d}, /* VBAT */ 105 {0x1F, 0xa6, 0xa7}, /* VSEN12 */ 106 {0x20, 0xaa, 0xab}, /* VSEN13 */ 107 {0x21, 0x96, 0x97}, /* VSEN14 */ 108 {0x22, 0x9a, 0x9b}, /* VSEN15 */ 109 {0x23, 0x9e, 0x9f}, /* VSEN16 */ 110 {0x24, 0xa2, 0xa3}, /* VSEN17 */ 111 }; 112 #define W83795_REG_VRLSB 0x3C 113 114 static const u8 W83795_REG_IN_HL_LSB[] = { 115 0x8e, /* VSEN1-4 */ 116 0x90, /* VSEN5-8 */ 117 0x92, /* VSEN9-11 */ 118 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */ 119 0xa8, /* VSEN12 */ 120 0xac, /* VSEN13 */ 121 0x98, /* VSEN14 */ 122 0x9c, /* VSEN15 */ 123 0xa0, /* VSEN16 */ 124 0xa4, /* VSEN17 */ 125 }; 126 127 #define IN_LSB_REG(index, type) \ 128 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \ 129 : (W83795_REG_IN_HL_LSB[(index)] + 1)) 130 131 #define IN_LSB_SHIFT 0 132 #define IN_LSB_IDX 1 133 static const u8 IN_LSB_SHIFT_IDX[][2] = { 134 /* High/Low LSB shift, LSB No. */ 135 {0x00, 0x00}, /* VSEN1 */ 136 {0x02, 0x00}, /* VSEN2 */ 137 {0x04, 0x00}, /* VSEN3 */ 138 {0x06, 0x00}, /* VSEN4 */ 139 {0x00, 0x01}, /* VSEN5 */ 140 {0x02, 0x01}, /* VSEN6 */ 141 {0x04, 0x01}, /* VSEN7 */ 142 {0x06, 0x01}, /* VSEN8 */ 143 {0x00, 0x02}, /* VSEN9 */ 144 {0x02, 0x02}, /* VSEN10 */ 145 {0x04, 0x02}, /* VSEN11 */ 146 {0x00, 0x03}, /* VTT */ 147 {0x02, 0x03}, /* 3VDD */ 148 {0x04, 0x03}, /* 3VSB */ 149 {0x06, 0x03}, /* VBAT */ 150 {0x06, 0x04}, /* VSEN12 */ 151 {0x06, 0x05}, /* VSEN13 */ 152 {0x06, 0x06}, /* VSEN14 */ 153 {0x06, 0x07}, /* VSEN15 */ 154 {0x06, 0x08}, /* VSEN16 */ 155 {0x06, 0x09}, /* VSEN17 */ 156 }; 157 158 159 #define W83795_REG_FAN(index) (0x2E + (index)) 160 #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index)) 161 #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2) 162 #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \ 163 (((index) & 1) ? 4 : 0) 164 165 #define W83795_REG_VID_CTRL 0x6A 166 167 #define W83795_REG_ALARM(index) (0x41 + (index)) 168 #define W83795_REG_BEEP(index) (0x50 + (index)) 169 170 #define W83795_REG_CLR_CHASSIS 0x4D 171 172 173 #define W83795_REG_FCMS1 0x201 174 #define W83795_REG_FCMS2 0x208 175 #define W83795_REG_TFMR(index) (0x202 + (index)) 176 #define W83795_REG_FOMC 0x20F 177 178 #define W83795_REG_TSS(index) (0x209 + (index)) 179 180 #define PWM_OUTPUT 0 181 #define PWM_FREQ 1 182 #define PWM_START 2 183 #define PWM_NONSTOP 3 184 #define PWM_STOP_TIME 4 185 #define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index)) 186 187 #define W83795_REG_FTSH(index) (0x240 + (index) * 2) 188 #define W83795_REG_FTSL(index) (0x241 + (index) * 2) 189 #define W83795_REG_TFTS 0x250 190 191 #define TEMP_PWM_TTTI 0 192 #define TEMP_PWM_CTFS 1 193 #define TEMP_PWM_HCT 2 194 #define TEMP_PWM_HOT 3 195 #define W83795_REG_TTTI(index) (0x260 + (index)) 196 #define W83795_REG_CTFS(index) (0x268 + (index)) 197 #define W83795_REG_HT(index) (0x270 + (index)) 198 199 #define SF4_TEMP 0 200 #define SF4_PWM 1 201 #define W83795_REG_SF4_TEMP(temp_num, index) \ 202 (0x280 + 0x10 * (temp_num) + (index)) 203 #define W83795_REG_SF4_PWM(temp_num, index) \ 204 (0x288 + 0x10 * (temp_num) + (index)) 205 206 #define W83795_REG_DTSC 0x301 207 #define W83795_REG_DTSE 0x302 208 #define W83795_REG_DTS(index) (0x26 + (index)) 209 #define W83795_REG_PECI_TBASE(index) (0x320 + (index)) 210 211 #define DTS_CRIT 0 212 #define DTS_CRIT_HYST 1 213 #define DTS_WARN 2 214 #define DTS_WARN_HYST 3 215 #define W83795_REG_DTS_EXT(index) (0xB2 + (index)) 216 217 #define SETUP_PWM_DEFAULT 0 218 #define SETUP_PWM_UPTIME 1 219 #define SETUP_PWM_DOWNTIME 2 220 #define W83795_REG_SETUP_PWM(index) (0x20C + (index)) 221 222 static inline u16 in_from_reg(u8 index, u16 val) 223 { 224 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */ 225 if (index >= 12 && index <= 14) 226 return val * 6; 227 else 228 return val * 2; 229 } 230 231 static inline u16 in_to_reg(u8 index, u16 val) 232 { 233 if (index >= 12 && index <= 14) 234 return val / 6; 235 else 236 return val / 2; 237 } 238 239 static inline unsigned long fan_from_reg(u16 val) 240 { 241 if ((val == 0xfff) || (val == 0)) 242 return 0; 243 return 1350000UL / val; 244 } 245 246 static inline u16 fan_to_reg(long rpm) 247 { 248 if (rpm <= 0) 249 return 0x0fff; 250 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); 251 } 252 253 static inline unsigned long time_from_reg(u8 reg) 254 { 255 return reg * 100; 256 } 257 258 static inline u8 time_to_reg(unsigned long val) 259 { 260 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff); 261 } 262 263 static inline long temp_from_reg(s8 reg) 264 { 265 return reg * 1000; 266 } 267 268 static inline s8 temp_to_reg(long val, s8 min, s8 max) 269 { 270 return SENSORS_LIMIT(val / 1000, min, max); 271 } 272 273 static const u16 pwm_freq_cksel0[16] = { 274 1024, 512, 341, 256, 205, 171, 146, 128, 275 85, 64, 32, 16, 8, 4, 2, 1 276 }; 277 278 static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin) 279 { 280 unsigned long base_clock; 281 282 if (reg & 0x80) { 283 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); 284 return base_clock / ((reg & 0x7f) + 1); 285 } else 286 return pwm_freq_cksel0[reg & 0x0f]; 287 } 288 289 static u8 pwm_freq_to_reg(unsigned long val, u16 clkin) 290 { 291 unsigned long base_clock; 292 u8 reg0, reg1; 293 unsigned long best0, best1; 294 295 /* Best fit for cksel = 0 */ 296 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) { 297 if (val > (pwm_freq_cksel0[reg0] + 298 pwm_freq_cksel0[reg0 + 1]) / 2) 299 break; 300 } 301 if (val < 375) /* cksel = 1 can't beat this */ 302 return reg0; 303 best0 = pwm_freq_cksel0[reg0]; 304 305 /* Best fit for cksel = 1 */ 306 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); 307 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128); 308 best1 = base_clock / reg1; 309 reg1 = 0x80 | (reg1 - 1); 310 311 /* Choose the closest one */ 312 if (abs(val - best0) > abs(val - best1)) 313 return reg1; 314 else 315 return reg0; 316 } 317 318 enum chip_types {w83795g, w83795adg}; 319 320 struct w83795_data { 321 struct device *hwmon_dev; 322 struct mutex update_lock; 323 unsigned long last_updated; /* In jiffies */ 324 enum chip_types chip_type; 325 326 u8 bank; 327 328 u32 has_in; /* Enable monitor VIN or not */ 329 u8 has_dyn_in; /* Only in2-0 can have this */ 330 u16 in[21][3]; /* Register value, read/high/low */ 331 u8 in_lsb[10][3]; /* LSB Register value, high/low */ 332 u8 has_gain; /* has gain: in17-20 * 8 */ 333 334 u16 has_fan; /* Enable fan14-1 or not */ 335 u16 fan[14]; /* Register value combine */ 336 u16 fan_min[14]; /* Register value combine */ 337 338 u8 has_temp; /* Enable monitor temp6-1 or not */ 339 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */ 340 u8 temp_read_vrlsb[6]; 341 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */ 342 u8 temp_src[3]; /* Register value */ 343 344 u8 enable_dts; /* Enable PECI and SB-TSI, 345 * bit 0: =1 enable, =0 disable, 346 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */ 347 u8 has_dts; /* Enable monitor DTS temp */ 348 s8 dts[8]; /* Register value */ 349 u8 dts_read_vrlsb[8]; /* Register value */ 350 s8 dts_ext[4]; /* Register value */ 351 352 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2, 353 * no config register, only affected by chip 354 * type */ 355 u8 pwm[8][5]; /* Register value, output, freq, start, 356 * non stop, stop time */ 357 u16 clkin; /* CLKIN frequency in kHz */ 358 u8 pwm_fcms[2]; /* Register value */ 359 u8 pwm_tfmr[6]; /* Register value */ 360 u8 pwm_fomc; /* Register value */ 361 362 u16 target_speed[8]; /* Register value, target speed for speed 363 * cruise */ 364 u8 tol_speed; /* tolerance of target speed */ 365 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */ 366 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */ 367 368 u8 setup_pwm[3]; /* Register value */ 369 370 u8 alarms[6]; /* Register value */ 371 u8 beeps[6]; /* Register value */ 372 373 char valid; 374 char valid_limits; 375 char valid_pwm_config; 376 }; 377 378 /* 379 * Hardware access 380 * We assume that nobdody can change the bank outside the driver. 381 */ 382 383 /* Must be called with data->update_lock held, except during initialization */ 384 static int w83795_set_bank(struct i2c_client *client, u8 bank) 385 { 386 struct w83795_data *data = i2c_get_clientdata(client); 387 int err; 388 389 /* If the same bank is already set, nothing to do */ 390 if ((data->bank & 0x07) == bank) 391 return 0; 392 393 /* Change to new bank, preserve all other bits */ 394 bank |= data->bank & ~0x07; 395 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank); 396 if (err < 0) { 397 dev_err(&client->dev, 398 "Failed to set bank to %d, err %d\n", 399 (int)bank, err); 400 return err; 401 } 402 data->bank = bank; 403 404 return 0; 405 } 406 407 /* Must be called with data->update_lock held, except during initialization */ 408 static u8 w83795_read(struct i2c_client *client, u16 reg) 409 { 410 int err; 411 412 err = w83795_set_bank(client, reg >> 8); 413 if (err < 0) 414 return 0x00; /* Arbitrary */ 415 416 err = i2c_smbus_read_byte_data(client, reg & 0xff); 417 if (err < 0) { 418 dev_err(&client->dev, 419 "Failed to read from register 0x%03x, err %d\n", 420 (int)reg, err); 421 return 0x00; /* Arbitrary */ 422 } 423 return err; 424 } 425 426 /* Must be called with data->update_lock held, except during initialization */ 427 static int w83795_write(struct i2c_client *client, u16 reg, u8 value) 428 { 429 int err; 430 431 err = w83795_set_bank(client, reg >> 8); 432 if (err < 0) 433 return err; 434 435 err = i2c_smbus_write_byte_data(client, reg & 0xff, value); 436 if (err < 0) 437 dev_err(&client->dev, 438 "Failed to write to register 0x%03x, err %d\n", 439 (int)reg, err); 440 return err; 441 } 442 443 static void w83795_update_limits(struct i2c_client *client) 444 { 445 struct w83795_data *data = i2c_get_clientdata(client); 446 int i, limit; 447 448 /* Read the voltage limits */ 449 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 450 if (!(data->has_in & (1 << i))) 451 continue; 452 data->in[i][IN_MAX] = 453 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 454 data->in[i][IN_LOW] = 455 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 456 } 457 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) { 458 if ((i == 2 && data->chip_type == w83795adg) || 459 (i >= 4 && !(data->has_in & (1 << (i + 11))))) 460 continue; 461 data->in_lsb[i][IN_MAX] = 462 w83795_read(client, IN_LSB_REG(i, IN_MAX)); 463 data->in_lsb[i][IN_LOW] = 464 w83795_read(client, IN_LSB_REG(i, IN_LOW)); 465 } 466 467 /* Read the fan limits */ 468 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 469 u8 lsb; 470 471 /* Each register contains LSB for 2 fans, but we want to 472 * read it only once to save time */ 473 if ((i & 1) == 0 && (data->has_fan & (3 << i))) 474 lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i)); 475 476 if (!(data->has_fan & (1 << i))) 477 continue; 478 data->fan_min[i] = 479 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4; 480 data->fan_min[i] |= 481 (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F; 482 } 483 484 /* Read the temperature limits */ 485 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 486 if (!(data->has_temp & (1 << i))) 487 continue; 488 for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++) 489 data->temp[i][limit] = 490 w83795_read(client, W83795_REG_TEMP[i][limit]); 491 } 492 493 /* Read the DTS limits */ 494 if (data->enable_dts) { 495 for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++) 496 data->dts_ext[limit] = 497 w83795_read(client, W83795_REG_DTS_EXT(limit)); 498 } 499 500 /* Read beep settings */ 501 for (i = 0; i < ARRAY_SIZE(data->beeps); i++) 502 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i)); 503 504 data->valid_limits = 1; 505 } 506 507 static struct w83795_data *w83795_update_pwm_config(struct device *dev) 508 { 509 struct i2c_client *client = to_i2c_client(dev); 510 struct w83795_data *data = i2c_get_clientdata(client); 511 int i, tmp; 512 513 mutex_lock(&data->update_lock); 514 515 if (data->valid_pwm_config) 516 goto END; 517 518 /* Read temperature source selection */ 519 for (i = 0; i < ARRAY_SIZE(data->temp_src); i++) 520 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i)); 521 522 /* Read automatic fan speed control settings */ 523 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1); 524 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2); 525 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++) 526 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i)); 527 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC); 528 for (i = 0; i < data->has_pwm; i++) { 529 for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++) 530 data->pwm[i][tmp] = 531 w83795_read(client, W83795_REG_PWM(i, tmp)); 532 } 533 for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) { 534 data->target_speed[i] = 535 w83795_read(client, W83795_REG_FTSH(i)) << 4; 536 data->target_speed[i] |= 537 w83795_read(client, W83795_REG_FTSL(i)) >> 4; 538 } 539 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f; 540 541 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) { 542 data->pwm_temp[i][TEMP_PWM_TTTI] = 543 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f; 544 data->pwm_temp[i][TEMP_PWM_CTFS] = 545 w83795_read(client, W83795_REG_CTFS(i)); 546 tmp = w83795_read(client, W83795_REG_HT(i)); 547 data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4; 548 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f; 549 } 550 551 /* Read SmartFanIV trip points */ 552 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) { 553 for (tmp = 0; tmp < 7; tmp++) { 554 data->sf4_reg[i][SF4_TEMP][tmp] = 555 w83795_read(client, 556 W83795_REG_SF4_TEMP(i, tmp)); 557 data->sf4_reg[i][SF4_PWM][tmp] = 558 w83795_read(client, W83795_REG_SF4_PWM(i, tmp)); 559 } 560 } 561 562 /* Read setup PWM */ 563 for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++) 564 data->setup_pwm[i] = 565 w83795_read(client, W83795_REG_SETUP_PWM(i)); 566 567 data->valid_pwm_config = 1; 568 569 END: 570 mutex_unlock(&data->update_lock); 571 return data; 572 } 573 574 static struct w83795_data *w83795_update_device(struct device *dev) 575 { 576 struct i2c_client *client = to_i2c_client(dev); 577 struct w83795_data *data = i2c_get_clientdata(client); 578 u16 tmp; 579 int i; 580 581 mutex_lock(&data->update_lock); 582 583 if (!data->valid_limits) 584 w83795_update_limits(client); 585 586 if (!(time_after(jiffies, data->last_updated + HZ * 2) 587 || !data->valid)) 588 goto END; 589 590 /* Update the voltages value */ 591 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 592 if (!(data->has_in & (1 << i))) 593 continue; 594 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 595 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6; 596 data->in[i][IN_READ] = tmp; 597 } 598 599 /* in0-2 can have dynamic limits (W83795G only) */ 600 if (data->has_dyn_in) { 601 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX)); 602 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW)); 603 604 for (i = 0; i < 3; i++) { 605 if (!(data->has_dyn_in & (1 << i))) 606 continue; 607 data->in[i][IN_MAX] = 608 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 609 data->in[i][IN_LOW] = 610 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 611 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03; 612 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03; 613 } 614 } 615 616 /* Update fan */ 617 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 618 if (!(data->has_fan & (1 << i))) 619 continue; 620 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 621 data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4; 622 } 623 624 /* Update temperature */ 625 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 626 data->temp[i][TEMP_READ] = 627 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 628 data->temp_read_vrlsb[i] = 629 w83795_read(client, W83795_REG_VRLSB); 630 } 631 632 /* Update dts temperature */ 633 if (data->enable_dts) { 634 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 635 if (!(data->has_dts & (1 << i))) 636 continue; 637 data->dts[i] = 638 w83795_read(client, W83795_REG_DTS(i)); 639 data->dts_read_vrlsb[i] = 640 w83795_read(client, W83795_REG_VRLSB); 641 } 642 } 643 644 /* Update pwm output */ 645 for (i = 0; i < data->has_pwm; i++) { 646 data->pwm[i][PWM_OUTPUT] = 647 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT)); 648 } 649 650 /* update alarm */ 651 for (i = 0; i < ARRAY_SIZE(data->alarms); i++) 652 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 653 654 data->last_updated = jiffies; 655 data->valid = 1; 656 657 END: 658 mutex_unlock(&data->update_lock); 659 return data; 660 } 661 662 /* 663 * Sysfs attributes 664 */ 665 666 #define ALARM_STATUS 0 667 #define BEEP_ENABLE 1 668 static ssize_t 669 show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) 670 { 671 struct w83795_data *data = w83795_update_device(dev); 672 struct sensor_device_attribute_2 *sensor_attr = 673 to_sensor_dev_attr_2(attr); 674 int nr = sensor_attr->nr; 675 int index = sensor_attr->index >> 3; 676 int bit = sensor_attr->index & 0x07; 677 u8 val; 678 679 if (nr == ALARM_STATUS) 680 val = (data->alarms[index] >> bit) & 1; 681 else /* BEEP_ENABLE */ 682 val = (data->beeps[index] >> bit) & 1; 683 684 return sprintf(buf, "%u\n", val); 685 } 686 687 static ssize_t 688 store_beep(struct device *dev, struct device_attribute *attr, 689 const char *buf, size_t count) 690 { 691 struct i2c_client *client = to_i2c_client(dev); 692 struct w83795_data *data = i2c_get_clientdata(client); 693 struct sensor_device_attribute_2 *sensor_attr = 694 to_sensor_dev_attr_2(attr); 695 int index = sensor_attr->index >> 3; 696 int shift = sensor_attr->index & 0x07; 697 u8 beep_bit = 1 << shift; 698 unsigned long val; 699 700 if (strict_strtoul(buf, 10, &val) < 0) 701 return -EINVAL; 702 if (val != 0 && val != 1) 703 return -EINVAL; 704 705 mutex_lock(&data->update_lock); 706 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index)); 707 data->beeps[index] &= ~beep_bit; 708 data->beeps[index] |= val << shift; 709 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]); 710 mutex_unlock(&data->update_lock); 711 712 return count; 713 } 714 715 /* Write any value to clear chassis alarm */ 716 static ssize_t 717 store_chassis_clear(struct device *dev, 718 struct device_attribute *attr, const char *buf, 719 size_t count) 720 { 721 struct i2c_client *client = to_i2c_client(dev); 722 struct w83795_data *data = i2c_get_clientdata(client); 723 u8 val; 724 725 mutex_lock(&data->update_lock); 726 val = w83795_read(client, W83795_REG_CLR_CHASSIS); 727 val |= 0x80; 728 w83795_write(client, W83795_REG_CLR_CHASSIS, val); 729 mutex_unlock(&data->update_lock); 730 return count; 731 } 732 733 #define FAN_INPUT 0 734 #define FAN_MIN 1 735 static ssize_t 736 show_fan(struct device *dev, struct device_attribute *attr, char *buf) 737 { 738 struct sensor_device_attribute_2 *sensor_attr = 739 to_sensor_dev_attr_2(attr); 740 int nr = sensor_attr->nr; 741 int index = sensor_attr->index; 742 struct w83795_data *data = w83795_update_device(dev); 743 u16 val; 744 745 if (nr == FAN_INPUT) 746 val = data->fan[index] & 0x0fff; 747 else 748 val = data->fan_min[index] & 0x0fff; 749 750 return sprintf(buf, "%lu\n", fan_from_reg(val)); 751 } 752 753 static ssize_t 754 store_fan_min(struct device *dev, struct device_attribute *attr, 755 const char *buf, size_t count) 756 { 757 struct sensor_device_attribute_2 *sensor_attr = 758 to_sensor_dev_attr_2(attr); 759 int index = sensor_attr->index; 760 struct i2c_client *client = to_i2c_client(dev); 761 struct w83795_data *data = i2c_get_clientdata(client); 762 unsigned long val; 763 764 if (strict_strtoul(buf, 10, &val)) 765 return -EINVAL; 766 val = fan_to_reg(val); 767 768 mutex_lock(&data->update_lock); 769 data->fan_min[index] = val; 770 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff); 771 val &= 0x0f; 772 if (index & 1) { 773 val <<= 4; 774 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 775 & 0x0f; 776 } else { 777 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 778 & 0xf0; 779 } 780 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff); 781 mutex_unlock(&data->update_lock); 782 783 return count; 784 } 785 786 static ssize_t 787 show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 788 { 789 struct w83795_data *data; 790 struct sensor_device_attribute_2 *sensor_attr = 791 to_sensor_dev_attr_2(attr); 792 int nr = sensor_attr->nr; 793 int index = sensor_attr->index; 794 unsigned int val; 795 796 data = nr == PWM_OUTPUT ? w83795_update_device(dev) 797 : w83795_update_pwm_config(dev); 798 799 switch (nr) { 800 case PWM_STOP_TIME: 801 val = time_from_reg(data->pwm[index][nr]); 802 break; 803 case PWM_FREQ: 804 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin); 805 break; 806 default: 807 val = data->pwm[index][nr]; 808 break; 809 } 810 811 return sprintf(buf, "%u\n", val); 812 } 813 814 static ssize_t 815 store_pwm(struct device *dev, struct device_attribute *attr, 816 const char *buf, size_t count) 817 { 818 struct i2c_client *client = to_i2c_client(dev); 819 struct w83795_data *data = i2c_get_clientdata(client); 820 struct sensor_device_attribute_2 *sensor_attr = 821 to_sensor_dev_attr_2(attr); 822 int nr = sensor_attr->nr; 823 int index = sensor_attr->index; 824 unsigned long val; 825 826 if (strict_strtoul(buf, 10, &val) < 0) 827 return -EINVAL; 828 829 mutex_lock(&data->update_lock); 830 switch (nr) { 831 case PWM_STOP_TIME: 832 val = time_to_reg(val); 833 break; 834 case PWM_FREQ: 835 val = pwm_freq_to_reg(val, data->clkin); 836 break; 837 default: 838 val = SENSORS_LIMIT(val, 0, 0xff); 839 break; 840 } 841 w83795_write(client, W83795_REG_PWM(index, nr), val); 842 data->pwm[index][nr] = val; 843 mutex_unlock(&data->update_lock); 844 return count; 845 } 846 847 static ssize_t 848 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 849 { 850 struct sensor_device_attribute_2 *sensor_attr = 851 to_sensor_dev_attr_2(attr); 852 struct w83795_data *data = w83795_update_pwm_config(dev); 853 int index = sensor_attr->index; 854 u8 tmp; 855 856 if (1 == (data->pwm_fcms[0] & (1 << index))) { 857 tmp = 2; 858 goto out; 859 } 860 for (tmp = 0; tmp < 6; tmp++) { 861 if (data->pwm_tfmr[tmp] & (1 << index)) { 862 tmp = 3; 863 goto out; 864 } 865 } 866 if (data->pwm_fomc & (1 << index)) 867 tmp = 0; 868 else 869 tmp = 1; 870 871 out: 872 return sprintf(buf, "%u\n", tmp); 873 } 874 875 static ssize_t 876 store_pwm_enable(struct device *dev, struct device_attribute *attr, 877 const char *buf, size_t count) 878 { 879 struct i2c_client *client = to_i2c_client(dev); 880 struct w83795_data *data = w83795_update_pwm_config(dev); 881 struct sensor_device_attribute_2 *sensor_attr = 882 to_sensor_dev_attr_2(attr); 883 int index = sensor_attr->index; 884 unsigned long val; 885 int i; 886 887 if (strict_strtoul(buf, 10, &val) < 0) 888 return -EINVAL; 889 if (val > 2) 890 return -EINVAL; 891 892 mutex_lock(&data->update_lock); 893 switch (val) { 894 case 0: 895 case 1: 896 data->pwm_fcms[0] &= ~(1 << index); 897 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 898 for (i = 0; i < 6; i++) { 899 data->pwm_tfmr[i] &= ~(1 << index); 900 w83795_write(client, W83795_REG_TFMR(i), 901 data->pwm_tfmr[i]); 902 } 903 data->pwm_fomc |= 1 << index; 904 data->pwm_fomc ^= val << index; 905 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc); 906 break; 907 case 2: 908 data->pwm_fcms[0] |= (1 << index); 909 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 910 break; 911 } 912 mutex_unlock(&data->update_lock); 913 return count; 914 } 915 916 static ssize_t 917 show_temp_src(struct device *dev, struct device_attribute *attr, char *buf) 918 { 919 struct sensor_device_attribute_2 *sensor_attr = 920 to_sensor_dev_attr_2(attr); 921 struct w83795_data *data = w83795_update_pwm_config(dev); 922 int index = sensor_attr->index; 923 u8 val = index / 2; 924 u8 tmp = data->temp_src[val]; 925 926 if (index & 1) 927 val = 4; 928 else 929 val = 0; 930 tmp >>= val; 931 tmp &= 0x0f; 932 933 return sprintf(buf, "%u\n", tmp); 934 } 935 936 static ssize_t 937 store_temp_src(struct device *dev, struct device_attribute *attr, 938 const char *buf, size_t count) 939 { 940 struct i2c_client *client = to_i2c_client(dev); 941 struct w83795_data *data = w83795_update_pwm_config(dev); 942 struct sensor_device_attribute_2 *sensor_attr = 943 to_sensor_dev_attr_2(attr); 944 int index = sensor_attr->index; 945 unsigned long tmp; 946 u8 val = index / 2; 947 948 if (strict_strtoul(buf, 10, &tmp) < 0) 949 return -EINVAL; 950 tmp = SENSORS_LIMIT(tmp, 0, 15); 951 952 mutex_lock(&data->update_lock); 953 if (index & 1) { 954 tmp <<= 4; 955 data->temp_src[val] &= 0x0f; 956 } else { 957 data->temp_src[val] &= 0xf0; 958 } 959 data->temp_src[val] |= tmp; 960 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]); 961 mutex_unlock(&data->update_lock); 962 963 return count; 964 } 965 966 #define TEMP_PWM_ENABLE 0 967 #define TEMP_PWM_FAN_MAP 1 968 static ssize_t 969 show_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 970 char *buf) 971 { 972 struct w83795_data *data = w83795_update_pwm_config(dev); 973 struct sensor_device_attribute_2 *sensor_attr = 974 to_sensor_dev_attr_2(attr); 975 int nr = sensor_attr->nr; 976 int index = sensor_attr->index; 977 u8 tmp = 0xff; 978 979 switch (nr) { 980 case TEMP_PWM_ENABLE: 981 tmp = (data->pwm_fcms[1] >> index) & 1; 982 if (tmp) 983 tmp = 4; 984 else 985 tmp = 3; 986 break; 987 case TEMP_PWM_FAN_MAP: 988 tmp = data->pwm_tfmr[index]; 989 break; 990 } 991 992 return sprintf(buf, "%u\n", tmp); 993 } 994 995 static ssize_t 996 store_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 997 const char *buf, size_t count) 998 { 999 struct i2c_client *client = to_i2c_client(dev); 1000 struct w83795_data *data = w83795_update_pwm_config(dev); 1001 struct sensor_device_attribute_2 *sensor_attr = 1002 to_sensor_dev_attr_2(attr); 1003 int nr = sensor_attr->nr; 1004 int index = sensor_attr->index; 1005 unsigned long tmp; 1006 1007 if (strict_strtoul(buf, 10, &tmp) < 0) 1008 return -EINVAL; 1009 1010 switch (nr) { 1011 case TEMP_PWM_ENABLE: 1012 if (tmp != 3 && tmp != 4) 1013 return -EINVAL; 1014 tmp -= 3; 1015 mutex_lock(&data->update_lock); 1016 data->pwm_fcms[1] &= ~(1 << index); 1017 data->pwm_fcms[1] |= tmp << index; 1018 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]); 1019 mutex_unlock(&data->update_lock); 1020 break; 1021 case TEMP_PWM_FAN_MAP: 1022 mutex_lock(&data->update_lock); 1023 tmp = SENSORS_LIMIT(tmp, 0, 0xff); 1024 w83795_write(client, W83795_REG_TFMR(index), tmp); 1025 data->pwm_tfmr[index] = tmp; 1026 mutex_unlock(&data->update_lock); 1027 break; 1028 } 1029 return count; 1030 } 1031 1032 #define FANIN_TARGET 0 1033 #define FANIN_TOL 1 1034 static ssize_t 1035 show_fanin(struct device *dev, struct device_attribute *attr, char *buf) 1036 { 1037 struct w83795_data *data = w83795_update_pwm_config(dev); 1038 struct sensor_device_attribute_2 *sensor_attr = 1039 to_sensor_dev_attr_2(attr); 1040 int nr = sensor_attr->nr; 1041 int index = sensor_attr->index; 1042 u16 tmp = 0; 1043 1044 switch (nr) { 1045 case FANIN_TARGET: 1046 tmp = fan_from_reg(data->target_speed[index]); 1047 break; 1048 case FANIN_TOL: 1049 tmp = data->tol_speed; 1050 break; 1051 } 1052 1053 return sprintf(buf, "%u\n", tmp); 1054 } 1055 1056 static ssize_t 1057 store_fanin(struct device *dev, struct device_attribute *attr, 1058 const char *buf, size_t count) 1059 { 1060 struct i2c_client *client = to_i2c_client(dev); 1061 struct w83795_data *data = i2c_get_clientdata(client); 1062 struct sensor_device_attribute_2 *sensor_attr = 1063 to_sensor_dev_attr_2(attr); 1064 int nr = sensor_attr->nr; 1065 int index = sensor_attr->index; 1066 unsigned long val; 1067 1068 if (strict_strtoul(buf, 10, &val) < 0) 1069 return -EINVAL; 1070 1071 mutex_lock(&data->update_lock); 1072 switch (nr) { 1073 case FANIN_TARGET: 1074 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff)); 1075 w83795_write(client, W83795_REG_FTSH(index), val >> 4); 1076 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0); 1077 data->target_speed[index] = val; 1078 break; 1079 case FANIN_TOL: 1080 val = SENSORS_LIMIT(val, 0, 0x3f); 1081 w83795_write(client, W83795_REG_TFTS, val); 1082 data->tol_speed = val; 1083 break; 1084 } 1085 mutex_unlock(&data->update_lock); 1086 1087 return count; 1088 } 1089 1090 1091 static ssize_t 1092 show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1093 { 1094 struct w83795_data *data = w83795_update_pwm_config(dev); 1095 struct sensor_device_attribute_2 *sensor_attr = 1096 to_sensor_dev_attr_2(attr); 1097 int nr = sensor_attr->nr; 1098 int index = sensor_attr->index; 1099 long tmp = temp_from_reg(data->pwm_temp[index][nr]); 1100 1101 return sprintf(buf, "%ld\n", tmp); 1102 } 1103 1104 static ssize_t 1105 store_temp_pwm(struct device *dev, struct device_attribute *attr, 1106 const char *buf, size_t count) 1107 { 1108 struct i2c_client *client = to_i2c_client(dev); 1109 struct w83795_data *data = i2c_get_clientdata(client); 1110 struct sensor_device_attribute_2 *sensor_attr = 1111 to_sensor_dev_attr_2(attr); 1112 int nr = sensor_attr->nr; 1113 int index = sensor_attr->index; 1114 unsigned long val; 1115 u8 tmp; 1116 1117 if (strict_strtoul(buf, 10, &val) < 0) 1118 return -EINVAL; 1119 val /= 1000; 1120 1121 mutex_lock(&data->update_lock); 1122 switch (nr) { 1123 case TEMP_PWM_TTTI: 1124 val = SENSORS_LIMIT(val, 0, 0x7f); 1125 w83795_write(client, W83795_REG_TTTI(index), val); 1126 break; 1127 case TEMP_PWM_CTFS: 1128 val = SENSORS_LIMIT(val, 0, 0x7f); 1129 w83795_write(client, W83795_REG_CTFS(index), val); 1130 break; 1131 case TEMP_PWM_HCT: 1132 val = SENSORS_LIMIT(val, 0, 0x0f); 1133 tmp = w83795_read(client, W83795_REG_HT(index)); 1134 tmp &= 0x0f; 1135 tmp |= (val << 4) & 0xf0; 1136 w83795_write(client, W83795_REG_HT(index), tmp); 1137 break; 1138 case TEMP_PWM_HOT: 1139 val = SENSORS_LIMIT(val, 0, 0x0f); 1140 tmp = w83795_read(client, W83795_REG_HT(index)); 1141 tmp &= 0xf0; 1142 tmp |= val & 0x0f; 1143 w83795_write(client, W83795_REG_HT(index), tmp); 1144 break; 1145 } 1146 data->pwm_temp[index][nr] = val; 1147 mutex_unlock(&data->update_lock); 1148 1149 return count; 1150 } 1151 1152 static ssize_t 1153 show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1154 { 1155 struct w83795_data *data = w83795_update_pwm_config(dev); 1156 struct sensor_device_attribute_2 *sensor_attr = 1157 to_sensor_dev_attr_2(attr); 1158 int nr = sensor_attr->nr; 1159 int index = sensor_attr->index; 1160 1161 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]); 1162 } 1163 1164 static ssize_t 1165 store_sf4_pwm(struct device *dev, struct device_attribute *attr, 1166 const char *buf, size_t count) 1167 { 1168 struct i2c_client *client = to_i2c_client(dev); 1169 struct w83795_data *data = i2c_get_clientdata(client); 1170 struct sensor_device_attribute_2 *sensor_attr = 1171 to_sensor_dev_attr_2(attr); 1172 int nr = sensor_attr->nr; 1173 int index = sensor_attr->index; 1174 unsigned long val; 1175 1176 if (strict_strtoul(buf, 10, &val) < 0) 1177 return -EINVAL; 1178 1179 mutex_lock(&data->update_lock); 1180 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val); 1181 data->sf4_reg[index][SF4_PWM][nr] = val; 1182 mutex_unlock(&data->update_lock); 1183 1184 return count; 1185 } 1186 1187 static ssize_t 1188 show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf) 1189 { 1190 struct w83795_data *data = w83795_update_pwm_config(dev); 1191 struct sensor_device_attribute_2 *sensor_attr = 1192 to_sensor_dev_attr_2(attr); 1193 int nr = sensor_attr->nr; 1194 int index = sensor_attr->index; 1195 1196 return sprintf(buf, "%u\n", 1197 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000); 1198 } 1199 1200 static ssize_t 1201 store_sf4_temp(struct device *dev, struct device_attribute *attr, 1202 const char *buf, size_t count) 1203 { 1204 struct i2c_client *client = to_i2c_client(dev); 1205 struct w83795_data *data = i2c_get_clientdata(client); 1206 struct sensor_device_attribute_2 *sensor_attr = 1207 to_sensor_dev_attr_2(attr); 1208 int nr = sensor_attr->nr; 1209 int index = sensor_attr->index; 1210 unsigned long val; 1211 1212 if (strict_strtoul(buf, 10, &val) < 0) 1213 return -EINVAL; 1214 val /= 1000; 1215 1216 mutex_lock(&data->update_lock); 1217 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val); 1218 data->sf4_reg[index][SF4_TEMP][nr] = val; 1219 mutex_unlock(&data->update_lock); 1220 1221 return count; 1222 } 1223 1224 1225 static ssize_t 1226 show_temp(struct device *dev, struct device_attribute *attr, char *buf) 1227 { 1228 struct sensor_device_attribute_2 *sensor_attr = 1229 to_sensor_dev_attr_2(attr); 1230 int nr = sensor_attr->nr; 1231 int index = sensor_attr->index; 1232 struct w83795_data *data = w83795_update_device(dev); 1233 long temp = temp_from_reg(data->temp[index][nr]); 1234 1235 if (nr == TEMP_READ) 1236 temp += (data->temp_read_vrlsb[index] >> 6) * 250; 1237 return sprintf(buf, "%ld\n", temp); 1238 } 1239 1240 static ssize_t 1241 store_temp(struct device *dev, struct device_attribute *attr, 1242 const char *buf, size_t count) 1243 { 1244 struct sensor_device_attribute_2 *sensor_attr = 1245 to_sensor_dev_attr_2(attr); 1246 int nr = sensor_attr->nr; 1247 int index = sensor_attr->index; 1248 struct i2c_client *client = to_i2c_client(dev); 1249 struct w83795_data *data = i2c_get_clientdata(client); 1250 long tmp; 1251 1252 if (strict_strtol(buf, 10, &tmp) < 0) 1253 return -EINVAL; 1254 1255 mutex_lock(&data->update_lock); 1256 data->temp[index][nr] = temp_to_reg(tmp, -128, 127); 1257 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]); 1258 mutex_unlock(&data->update_lock); 1259 return count; 1260 } 1261 1262 1263 static ssize_t 1264 show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf) 1265 { 1266 struct w83795_data *data = dev_get_drvdata(dev); 1267 int tmp; 1268 1269 if (data->enable_dts & 2) 1270 tmp = 5; 1271 else 1272 tmp = 6; 1273 1274 return sprintf(buf, "%d\n", tmp); 1275 } 1276 1277 static ssize_t 1278 show_dts(struct device *dev, struct device_attribute *attr, char *buf) 1279 { 1280 struct sensor_device_attribute_2 *sensor_attr = 1281 to_sensor_dev_attr_2(attr); 1282 int index = sensor_attr->index; 1283 struct w83795_data *data = w83795_update_device(dev); 1284 long temp = temp_from_reg(data->dts[index]); 1285 1286 temp += (data->dts_read_vrlsb[index] >> 6) * 250; 1287 return sprintf(buf, "%ld\n", temp); 1288 } 1289 1290 static ssize_t 1291 show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf) 1292 { 1293 struct sensor_device_attribute_2 *sensor_attr = 1294 to_sensor_dev_attr_2(attr); 1295 int nr = sensor_attr->nr; 1296 struct w83795_data *data = dev_get_drvdata(dev); 1297 long temp = temp_from_reg(data->dts_ext[nr]); 1298 1299 return sprintf(buf, "%ld\n", temp); 1300 } 1301 1302 static ssize_t 1303 store_dts_ext(struct device *dev, struct device_attribute *attr, 1304 const char *buf, size_t count) 1305 { 1306 struct sensor_device_attribute_2 *sensor_attr = 1307 to_sensor_dev_attr_2(attr); 1308 int nr = sensor_attr->nr; 1309 struct i2c_client *client = to_i2c_client(dev); 1310 struct w83795_data *data = i2c_get_clientdata(client); 1311 long tmp; 1312 1313 if (strict_strtol(buf, 10, &tmp) < 0) 1314 return -EINVAL; 1315 1316 mutex_lock(&data->update_lock); 1317 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127); 1318 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]); 1319 mutex_unlock(&data->update_lock); 1320 return count; 1321 } 1322 1323 1324 static ssize_t 1325 show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) 1326 { 1327 struct w83795_data *data = dev_get_drvdata(dev); 1328 struct sensor_device_attribute_2 *sensor_attr = 1329 to_sensor_dev_attr_2(attr); 1330 int index = sensor_attr->index; 1331 int tmp; 1332 1333 if (data->temp_mode & (1 << index)) 1334 tmp = 3; /* Thermal diode */ 1335 else 1336 tmp = 4; /* Thermistor */ 1337 1338 return sprintf(buf, "%d\n", tmp); 1339 } 1340 1341 /* Only for temp1-4 (temp5-6 can only be thermistor) */ 1342 static ssize_t 1343 store_temp_mode(struct device *dev, struct device_attribute *attr, 1344 const char *buf, size_t count) 1345 { 1346 struct i2c_client *client = to_i2c_client(dev); 1347 struct w83795_data *data = i2c_get_clientdata(client); 1348 struct sensor_device_attribute_2 *sensor_attr = 1349 to_sensor_dev_attr_2(attr); 1350 int index = sensor_attr->index; 1351 int reg_shift; 1352 unsigned long val; 1353 u8 tmp; 1354 1355 if (strict_strtoul(buf, 10, &val) < 0) 1356 return -EINVAL; 1357 if ((val != 4) && (val != 3)) 1358 return -EINVAL; 1359 1360 mutex_lock(&data->update_lock); 1361 if (val == 3) { 1362 /* Thermal diode */ 1363 val = 0x01; 1364 data->temp_mode |= 1 << index; 1365 } else if (val == 4) { 1366 /* Thermistor */ 1367 val = 0x03; 1368 data->temp_mode &= ~(1 << index); 1369 } 1370 1371 reg_shift = 2 * index; 1372 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1373 tmp &= ~(0x03 << reg_shift); 1374 tmp |= val << reg_shift; 1375 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp); 1376 1377 mutex_unlock(&data->update_lock); 1378 return count; 1379 } 1380 1381 1382 /* show/store VIN */ 1383 static ssize_t 1384 show_in(struct device *dev, struct device_attribute *attr, char *buf) 1385 { 1386 struct sensor_device_attribute_2 *sensor_attr = 1387 to_sensor_dev_attr_2(attr); 1388 int nr = sensor_attr->nr; 1389 int index = sensor_attr->index; 1390 struct w83795_data *data = w83795_update_device(dev); 1391 u16 val = data->in[index][nr]; 1392 u8 lsb_idx; 1393 1394 switch (nr) { 1395 case IN_READ: 1396 /* calculate this value again by sensors as sensors3.conf */ 1397 if ((index >= 17) && 1398 !((data->has_gain >> (index - 17)) & 1)) 1399 val *= 8; 1400 break; 1401 case IN_MAX: 1402 case IN_LOW: 1403 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1404 val <<= 2; 1405 val |= (data->in_lsb[lsb_idx][nr] >> 1406 IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03; 1407 if ((index >= 17) && 1408 !((data->has_gain >> (index - 17)) & 1)) 1409 val *= 8; 1410 break; 1411 } 1412 val = in_from_reg(index, val); 1413 1414 return sprintf(buf, "%d\n", val); 1415 } 1416 1417 static ssize_t 1418 store_in(struct device *dev, struct device_attribute *attr, 1419 const char *buf, size_t count) 1420 { 1421 struct sensor_device_attribute_2 *sensor_attr = 1422 to_sensor_dev_attr_2(attr); 1423 int nr = sensor_attr->nr; 1424 int index = sensor_attr->index; 1425 struct i2c_client *client = to_i2c_client(dev); 1426 struct w83795_data *data = i2c_get_clientdata(client); 1427 unsigned long val; 1428 u8 tmp; 1429 u8 lsb_idx; 1430 1431 if (strict_strtoul(buf, 10, &val) < 0) 1432 return -EINVAL; 1433 val = in_to_reg(index, val); 1434 1435 if ((index >= 17) && 1436 !((data->has_gain >> (index - 17)) & 1)) 1437 val /= 8; 1438 val = SENSORS_LIMIT(val, 0, 0x3FF); 1439 mutex_lock(&data->update_lock); 1440 1441 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1442 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr)); 1443 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]); 1444 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]; 1445 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp); 1446 data->in_lsb[lsb_idx][nr] = tmp; 1447 1448 tmp = (val >> 2) & 0xff; 1449 w83795_write(client, W83795_REG_IN[index][nr], tmp); 1450 data->in[index][nr] = tmp; 1451 1452 mutex_unlock(&data->update_lock); 1453 return count; 1454 } 1455 1456 1457 static ssize_t 1458 show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) 1459 { 1460 struct sensor_device_attribute_2 *sensor_attr = 1461 to_sensor_dev_attr_2(attr); 1462 int nr = sensor_attr->nr; 1463 struct w83795_data *data = w83795_update_pwm_config(dev); 1464 u16 val = data->setup_pwm[nr]; 1465 1466 switch (nr) { 1467 case SETUP_PWM_UPTIME: 1468 case SETUP_PWM_DOWNTIME: 1469 val = time_from_reg(val); 1470 break; 1471 } 1472 1473 return sprintf(buf, "%d\n", val); 1474 } 1475 1476 static ssize_t 1477 store_sf_setup(struct device *dev, struct device_attribute *attr, 1478 const char *buf, size_t count) 1479 { 1480 struct sensor_device_attribute_2 *sensor_attr = 1481 to_sensor_dev_attr_2(attr); 1482 int nr = sensor_attr->nr; 1483 struct i2c_client *client = to_i2c_client(dev); 1484 struct w83795_data *data = i2c_get_clientdata(client); 1485 unsigned long val; 1486 1487 if (strict_strtoul(buf, 10, &val) < 0) 1488 return -EINVAL; 1489 1490 switch (nr) { 1491 case SETUP_PWM_DEFAULT: 1492 val = SENSORS_LIMIT(val, 0, 0xff); 1493 break; 1494 case SETUP_PWM_UPTIME: 1495 case SETUP_PWM_DOWNTIME: 1496 val = time_to_reg(val); 1497 if (val == 0) 1498 return -EINVAL; 1499 break; 1500 } 1501 1502 mutex_lock(&data->update_lock); 1503 data->setup_pwm[nr] = val; 1504 w83795_write(client, W83795_REG_SETUP_PWM(nr), val); 1505 mutex_unlock(&data->update_lock); 1506 return count; 1507 } 1508 1509 1510 #define NOT_USED -1 1511 1512 /* Don't change the attribute order, _max and _min are accessed by index 1513 * somewhere else in the code */ 1514 #define SENSOR_ATTR_IN(index) { \ 1515 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ 1516 IN_READ, index), \ 1517 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ 1518 store_in, IN_MAX, index), \ 1519 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ 1520 store_in, IN_LOW, index), \ 1521 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ 1522 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \ 1523 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ 1524 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1525 index + ((index > 14) ? 1 : 0)) } 1526 1527 #define SENSOR_ATTR_FAN(index) { \ 1528 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ 1529 NULL, FAN_INPUT, index - 1), \ 1530 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ 1531 show_fan, store_fan_min, FAN_MIN, index - 1), \ 1532 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ 1533 NULL, ALARM_STATUS, index + 31), \ 1534 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ 1535 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) } 1536 1537 #define SENSOR_ATTR_PWM(index) { \ 1538 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ 1539 store_pwm, PWM_OUTPUT, index - 1), \ 1540 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ 1541 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ 1542 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ 1543 show_pwm, store_pwm, PWM_START, index - 1), \ 1544 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ 1545 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \ 1546 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \ 1547 show_pwm, store_pwm, PWM_FREQ, index - 1), \ 1548 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \ 1549 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \ 1550 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \ 1551 show_fanin, store_fanin, FANIN_TARGET, index - 1) } 1552 1553 #define SENSOR_ATTR_DTS(index) { \ 1554 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \ 1555 show_dts_mode, NULL, NOT_USED, index - 7), \ 1556 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \ 1557 NULL, NOT_USED, index - 7), \ 1558 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \ 1559 store_dts_ext, DTS_CRIT, NOT_USED), \ 1560 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ 1561 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \ 1562 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \ 1563 store_dts_ext, DTS_WARN, NOT_USED), \ 1564 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1565 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \ 1566 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1567 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \ 1568 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1569 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) } 1570 1571 #define SENSOR_ATTR_TEMP(index) { \ 1572 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \ 1573 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ 1574 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ 1575 NULL, TEMP_READ, index - 1), \ 1576 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \ 1577 store_temp, TEMP_CRIT, index - 1), \ 1578 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ 1579 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ 1580 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ 1581 store_temp, TEMP_WARN, index - 1), \ 1582 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1583 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ 1584 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1585 show_alarm_beep, NULL, ALARM_STATUS, \ 1586 index + (index > 4 ? 11 : 17)), \ 1587 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1588 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1589 index + (index > 4 ? 11 : 17)), \ 1590 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \ 1591 show_temp_src, store_temp_src, NOT_USED, index - 1), \ 1592 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ 1593 show_temp_pwm_enable, store_temp_pwm_enable, \ 1594 TEMP_PWM_ENABLE, index - 1), \ 1595 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \ 1596 show_temp_pwm_enable, store_temp_pwm_enable, \ 1597 TEMP_PWM_FAN_MAP, index - 1), \ 1598 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \ 1599 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \ 1600 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \ 1601 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \ 1602 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \ 1603 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \ 1604 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \ 1605 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \ 1606 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ 1607 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \ 1608 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ 1609 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \ 1610 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ 1611 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \ 1612 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ 1613 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \ 1614 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ 1615 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \ 1616 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ 1617 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \ 1618 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ 1619 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \ 1620 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ 1621 show_sf4_temp, store_sf4_temp, 0, index - 1), \ 1622 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ 1623 show_sf4_temp, store_sf4_temp, 1, index - 1), \ 1624 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ 1625 show_sf4_temp, store_sf4_temp, 2, index - 1), \ 1626 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ 1627 show_sf4_temp, store_sf4_temp, 3, index - 1), \ 1628 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ 1629 show_sf4_temp, store_sf4_temp, 4, index - 1), \ 1630 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ 1631 show_sf4_temp, store_sf4_temp, 5, index - 1), \ 1632 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ 1633 show_sf4_temp, store_sf4_temp, 6, index - 1) } 1634 1635 1636 static struct sensor_device_attribute_2 w83795_in[][5] = { 1637 SENSOR_ATTR_IN(0), 1638 SENSOR_ATTR_IN(1), 1639 SENSOR_ATTR_IN(2), 1640 SENSOR_ATTR_IN(3), 1641 SENSOR_ATTR_IN(4), 1642 SENSOR_ATTR_IN(5), 1643 SENSOR_ATTR_IN(6), 1644 SENSOR_ATTR_IN(7), 1645 SENSOR_ATTR_IN(8), 1646 SENSOR_ATTR_IN(9), 1647 SENSOR_ATTR_IN(10), 1648 SENSOR_ATTR_IN(11), 1649 SENSOR_ATTR_IN(12), 1650 SENSOR_ATTR_IN(13), 1651 SENSOR_ATTR_IN(14), 1652 SENSOR_ATTR_IN(15), 1653 SENSOR_ATTR_IN(16), 1654 SENSOR_ATTR_IN(17), 1655 SENSOR_ATTR_IN(18), 1656 SENSOR_ATTR_IN(19), 1657 SENSOR_ATTR_IN(20), 1658 }; 1659 1660 static const struct sensor_device_attribute_2 w83795_fan[][4] = { 1661 SENSOR_ATTR_FAN(1), 1662 SENSOR_ATTR_FAN(2), 1663 SENSOR_ATTR_FAN(3), 1664 SENSOR_ATTR_FAN(4), 1665 SENSOR_ATTR_FAN(5), 1666 SENSOR_ATTR_FAN(6), 1667 SENSOR_ATTR_FAN(7), 1668 SENSOR_ATTR_FAN(8), 1669 SENSOR_ATTR_FAN(9), 1670 SENSOR_ATTR_FAN(10), 1671 SENSOR_ATTR_FAN(11), 1672 SENSOR_ATTR_FAN(12), 1673 SENSOR_ATTR_FAN(13), 1674 SENSOR_ATTR_FAN(14), 1675 }; 1676 1677 static const struct sensor_device_attribute_2 w83795_temp[][29] = { 1678 SENSOR_ATTR_TEMP(1), 1679 SENSOR_ATTR_TEMP(2), 1680 SENSOR_ATTR_TEMP(3), 1681 SENSOR_ATTR_TEMP(4), 1682 SENSOR_ATTR_TEMP(5), 1683 SENSOR_ATTR_TEMP(6), 1684 }; 1685 1686 static const struct sensor_device_attribute_2 w83795_dts[][8] = { 1687 SENSOR_ATTR_DTS(7), 1688 SENSOR_ATTR_DTS(8), 1689 SENSOR_ATTR_DTS(9), 1690 SENSOR_ATTR_DTS(10), 1691 SENSOR_ATTR_DTS(11), 1692 SENSOR_ATTR_DTS(12), 1693 SENSOR_ATTR_DTS(13), 1694 SENSOR_ATTR_DTS(14), 1695 }; 1696 1697 static const struct sensor_device_attribute_2 w83795_pwm[][7] = { 1698 SENSOR_ATTR_PWM(1), 1699 SENSOR_ATTR_PWM(2), 1700 SENSOR_ATTR_PWM(3), 1701 SENSOR_ATTR_PWM(4), 1702 SENSOR_ATTR_PWM(5), 1703 SENSOR_ATTR_PWM(6), 1704 SENSOR_ATTR_PWM(7), 1705 SENSOR_ATTR_PWM(8), 1706 }; 1707 1708 static const struct sensor_device_attribute_2 sda_single_files[] = { 1709 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep, 1710 store_chassis_clear, ALARM_STATUS, 46), 1711 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep, 1712 store_beep, BEEP_ENABLE, 47), 1713 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin, 1714 store_fanin, FANIN_TOL, NOT_USED), 1715 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, 1716 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), 1717 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, 1718 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), 1719 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, 1720 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), 1721 }; 1722 1723 /* 1724 * Driver interface 1725 */ 1726 1727 static void w83795_init_client(struct i2c_client *client) 1728 { 1729 struct w83795_data *data = i2c_get_clientdata(client); 1730 static const u16 clkin[4] = { /* in kHz */ 1731 14318, 24000, 33333, 48000 1732 }; 1733 u8 config; 1734 1735 if (reset) 1736 w83795_write(client, W83795_REG_CONFIG, 0x80); 1737 1738 /* Start monitoring if needed */ 1739 config = w83795_read(client, W83795_REG_CONFIG); 1740 if (!(config & W83795_REG_CONFIG_START)) { 1741 dev_info(&client->dev, "Enabling monitoring operations\n"); 1742 w83795_write(client, W83795_REG_CONFIG, 1743 config | W83795_REG_CONFIG_START); 1744 } 1745 1746 data->clkin = clkin[(config >> 3) & 0x3]; 1747 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin); 1748 } 1749 1750 static int w83795_get_device_id(struct i2c_client *client) 1751 { 1752 int device_id; 1753 1754 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID); 1755 1756 /* Special case for rev. A chips; can't be checked first because later 1757 revisions emulate this for compatibility */ 1758 if (device_id < 0 || (device_id & 0xf0) != 0x50) { 1759 int alt_id; 1760 1761 alt_id = i2c_smbus_read_byte_data(client, 1762 W83795_REG_DEVICEID_A); 1763 if (alt_id == 0x50) 1764 device_id = alt_id; 1765 } 1766 1767 return device_id; 1768 } 1769 1770 /* Return 0 if detection is successful, -ENODEV otherwise */ 1771 static int w83795_detect(struct i2c_client *client, 1772 struct i2c_board_info *info) 1773 { 1774 int bank, vendor_id, device_id, expected, i2c_addr, config; 1775 struct i2c_adapter *adapter = client->adapter; 1776 unsigned short address = client->addr; 1777 const char *chip_name; 1778 1779 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1780 return -ENODEV; 1781 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1782 if (bank < 0 || (bank & 0x7c)) { 1783 dev_dbg(&adapter->dev, 1784 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1785 address, "bank"); 1786 return -ENODEV; 1787 } 1788 1789 /* Check Nuvoton vendor ID */ 1790 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID); 1791 expected = bank & 0x80 ? 0x5c : 0xa3; 1792 if (vendor_id != expected) { 1793 dev_dbg(&adapter->dev, 1794 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1795 address, "vendor id"); 1796 return -ENODEV; 1797 } 1798 1799 /* Check device ID */ 1800 device_id = w83795_get_device_id(client) | 1801 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8); 1802 if ((device_id >> 4) != 0x795) { 1803 dev_dbg(&adapter->dev, 1804 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1805 address, "device id\n"); 1806 return -ENODEV; 1807 } 1808 1809 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR 1810 should match */ 1811 if ((bank & 0x07) == 0) { 1812 i2c_addr = i2c_smbus_read_byte_data(client, 1813 W83795_REG_I2C_ADDR); 1814 if ((i2c_addr & 0x7f) != address) { 1815 dev_dbg(&adapter->dev, 1816 "w83795: Detection failed at addr 0x%02hx, " 1817 "check %s\n", address, "i2c addr"); 1818 return -ENODEV; 1819 } 1820 } 1821 1822 /* Check 795 chip type: 795G or 795ADG 1823 Usually we don't write to chips during detection, but here we don't 1824 quite have the choice; hopefully it's OK, we are about to return 1825 success anyway */ 1826 if ((bank & 0x07) != 0) 1827 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, 1828 bank & ~0x07); 1829 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG); 1830 if (config & W83795_REG_CONFIG_CONFIG48) 1831 chip_name = "w83795adg"; 1832 else 1833 chip_name = "w83795g"; 1834 1835 strlcpy(info->type, chip_name, I2C_NAME_SIZE); 1836 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name, 1837 'A' + (device_id & 0xf), address); 1838 1839 return 0; 1840 } 1841 1842 static int w83795_handle_files(struct device *dev, int (*fn)(struct device *, 1843 const struct device_attribute *)) 1844 { 1845 struct w83795_data *data = dev_get_drvdata(dev); 1846 int err, i, j; 1847 1848 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) { 1849 if (!(data->has_in & (1 << i))) 1850 continue; 1851 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) { 1852 err = fn(dev, &w83795_in[i][j].dev_attr); 1853 if (err) 1854 return err; 1855 } 1856 } 1857 1858 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) { 1859 if (!(data->has_fan & (1 << i))) 1860 continue; 1861 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) { 1862 err = fn(dev, &w83795_fan[i][j].dev_attr); 1863 if (err) 1864 return err; 1865 } 1866 } 1867 1868 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { 1869 err = fn(dev, &sda_single_files[i].dev_attr); 1870 if (err) 1871 return err; 1872 } 1873 1874 for (i = 0; i < data->has_pwm; i++) { 1875 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) { 1876 err = fn(dev, &w83795_pwm[i][j].dev_attr); 1877 if (err) 1878 return err; 1879 } 1880 } 1881 1882 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) { 1883 if (!(data->has_temp & (1 << i))) 1884 continue; 1885 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) { 1886 err = fn(dev, &w83795_temp[i][j].dev_attr); 1887 if (err) 1888 return err; 1889 } 1890 } 1891 1892 if (data->enable_dts) { 1893 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) { 1894 if (!(data->has_dts & (1 << i))) 1895 continue; 1896 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) { 1897 err = fn(dev, &w83795_dts[i][j].dev_attr); 1898 if (err) 1899 return err; 1900 } 1901 } 1902 } 1903 1904 return 0; 1905 } 1906 1907 /* We need a wrapper that fits in w83795_handle_files */ 1908 static int device_remove_file_wrapper(struct device *dev, 1909 const struct device_attribute *attr) 1910 { 1911 device_remove_file(dev, attr); 1912 return 0; 1913 } 1914 1915 static void w83795_check_dynamic_in_limits(struct i2c_client *client) 1916 { 1917 struct w83795_data *data = i2c_get_clientdata(client); 1918 u8 vid_ctl; 1919 int i, err_max, err_min; 1920 1921 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL); 1922 1923 /* Return immediately if VRM isn't configured */ 1924 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07) 1925 return; 1926 1927 data->has_dyn_in = (vid_ctl >> 3) & 0x07; 1928 for (i = 0; i < 2; i++) { 1929 if (!(data->has_dyn_in & (1 << i))) 1930 continue; 1931 1932 /* Voltage limits in dynamic mode, switch to read-only */ 1933 err_max = sysfs_chmod_file(&client->dev.kobj, 1934 &w83795_in[i][2].dev_attr.attr, 1935 S_IRUGO); 1936 err_min = sysfs_chmod_file(&client->dev.kobj, 1937 &w83795_in[i][3].dev_attr.attr, 1938 S_IRUGO); 1939 if (err_max || err_min) 1940 dev_warn(&client->dev, "Failed to set in%d limits " 1941 "read-only (%d, %d)\n", i, err_max, err_min); 1942 else 1943 dev_info(&client->dev, "in%d limits set dynamically " 1944 "from VID\n", i); 1945 } 1946 } 1947 1948 /* Check pins that can be used for either temperature or voltage monitoring */ 1949 static void w83795_apply_temp_config(struct w83795_data *data, u8 config, 1950 int temp_chan, int in_chan) 1951 { 1952 /* config is a 2-bit value */ 1953 switch (config) { 1954 case 0x2: /* Voltage monitoring */ 1955 data->has_in |= 1 << in_chan; 1956 break; 1957 case 0x1: /* Thermal diode */ 1958 if (temp_chan >= 4) 1959 break; 1960 data->temp_mode |= 1 << temp_chan; 1961 /* fall through */ 1962 case 0x3: /* Thermistor */ 1963 data->has_temp |= 1 << temp_chan; 1964 break; 1965 } 1966 } 1967 1968 static int w83795_probe(struct i2c_client *client, 1969 const struct i2c_device_id *id) 1970 { 1971 int i; 1972 u8 tmp; 1973 struct device *dev = &client->dev; 1974 struct w83795_data *data; 1975 int err; 1976 1977 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL); 1978 if (!data) { 1979 err = -ENOMEM; 1980 goto exit; 1981 } 1982 1983 i2c_set_clientdata(client, data); 1984 data->chip_type = id->driver_data; 1985 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1986 mutex_init(&data->update_lock); 1987 1988 /* Initialize the chip */ 1989 w83795_init_client(client); 1990 1991 /* Check which voltages and fans are present */ 1992 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1) 1993 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8); 1994 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1) 1995 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8); 1996 1997 /* Check which analog temperatures and extra voltages are present */ 1998 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 1999 if (tmp & 0x20) 2000 data->enable_dts = 1; 2001 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16); 2002 w83795_apply_temp_config(data, tmp & 0x3, 4, 15); 2003 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 2004 w83795_apply_temp_config(data, tmp >> 6, 3, 20); 2005 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19); 2006 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18); 2007 w83795_apply_temp_config(data, tmp & 0x3, 0, 17); 2008 2009 /* Check DTS enable status */ 2010 if (data->enable_dts) { 2011 if (1 & w83795_read(client, W83795_REG_DTSC)) 2012 data->enable_dts |= 2; 2013 data->has_dts = w83795_read(client, W83795_REG_DTSE); 2014 } 2015 2016 /* Report PECI Tbase values */ 2017 if (data->enable_dts == 1) { 2018 for (i = 0; i < 8; i++) { 2019 if (!(data->has_dts & (1 << i))) 2020 continue; 2021 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i)); 2022 dev_info(&client->dev, 2023 "PECI agent %d Tbase temperature: %u\n", 2024 i + 1, (unsigned int)tmp & 0x7f); 2025 } 2026 } 2027 2028 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f; 2029 2030 /* pwm and smart fan */ 2031 if (data->chip_type == w83795g) 2032 data->has_pwm = 8; 2033 else 2034 data->has_pwm = 2; 2035 2036 err = w83795_handle_files(dev, device_create_file); 2037 if (err) 2038 goto exit_remove; 2039 2040 if (data->chip_type == w83795g) 2041 w83795_check_dynamic_in_limits(client); 2042 2043 data->hwmon_dev = hwmon_device_register(dev); 2044 if (IS_ERR(data->hwmon_dev)) { 2045 err = PTR_ERR(data->hwmon_dev); 2046 goto exit_remove; 2047 } 2048 2049 return 0; 2050 2051 exit_remove: 2052 w83795_handle_files(dev, device_remove_file_wrapper); 2053 kfree(data); 2054 exit: 2055 return err; 2056 } 2057 2058 static int w83795_remove(struct i2c_client *client) 2059 { 2060 struct w83795_data *data = i2c_get_clientdata(client); 2061 2062 hwmon_device_unregister(data->hwmon_dev); 2063 w83795_handle_files(&client->dev, device_remove_file_wrapper); 2064 kfree(data); 2065 2066 return 0; 2067 } 2068 2069 2070 static const struct i2c_device_id w83795_id[] = { 2071 { "w83795g", w83795g }, 2072 { "w83795adg", w83795adg }, 2073 { } 2074 }; 2075 MODULE_DEVICE_TABLE(i2c, w83795_id); 2076 2077 static struct i2c_driver w83795_driver = { 2078 .driver = { 2079 .name = "w83795", 2080 }, 2081 .probe = w83795_probe, 2082 .remove = w83795_remove, 2083 .id_table = w83795_id, 2084 2085 .class = I2C_CLASS_HWMON, 2086 .detect = w83795_detect, 2087 .address_list = normal_i2c, 2088 }; 2089 2090 static int __init sensors_w83795_init(void) 2091 { 2092 return i2c_add_driver(&w83795_driver); 2093 } 2094 2095 static void __exit sensors_w83795_exit(void) 2096 { 2097 i2c_del_driver(&w83795_driver); 2098 } 2099 2100 MODULE_AUTHOR("Wei Song"); 2101 MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver"); 2102 MODULE_LICENSE("GPL"); 2103 2104 module_init(sensors_w83795_init); 2105 module_exit(sensors_w83795_exit); 2106