1 /* 2 * w83795.c - Linux kernel driver for hardware monitoring 3 * Copyright (C) 2008 Nuvoton Technology Corp. 4 * Wei Song 5 * Copyright (C) 2010 Jean Delvare <jdelvare@suse.de> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation - version 2. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 19 * 02110-1301 USA. 20 * 21 * Supports following chips: 22 * 23 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA 24 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no 25 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no 26 */ 27 28 #include <linux/kernel.h> 29 #include <linux/module.h> 30 #include <linux/init.h> 31 #include <linux/slab.h> 32 #include <linux/i2c.h> 33 #include <linux/hwmon.h> 34 #include <linux/hwmon-sysfs.h> 35 #include <linux/err.h> 36 #include <linux/mutex.h> 37 #include <linux/jiffies.h> 38 39 /* Addresses to scan */ 40 static const unsigned short normal_i2c[] = { 41 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END 42 }; 43 44 45 static bool reset; 46 module_param(reset, bool, 0); 47 MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); 48 49 50 #define W83795_REG_BANKSEL 0x00 51 #define W83795_REG_VENDORID 0xfd 52 #define W83795_REG_CHIPID 0xfe 53 #define W83795_REG_DEVICEID 0xfb 54 #define W83795_REG_DEVICEID_A 0xff 55 56 #define W83795_REG_I2C_ADDR 0xfc 57 #define W83795_REG_CONFIG 0x01 58 #define W83795_REG_CONFIG_CONFIG48 0x04 59 #define W83795_REG_CONFIG_START 0x01 60 61 /* Multi-Function Pin Ctrl Registers */ 62 #define W83795_REG_VOLT_CTRL1 0x02 63 #define W83795_REG_VOLT_CTRL2 0x03 64 #define W83795_REG_TEMP_CTRL1 0x04 65 #define W83795_REG_TEMP_CTRL2 0x05 66 #define W83795_REG_FANIN_CTRL1 0x06 67 #define W83795_REG_FANIN_CTRL2 0x07 68 #define W83795_REG_VMIGB_CTRL 0x08 69 70 #define TEMP_READ 0 71 #define TEMP_CRIT 1 72 #define TEMP_CRIT_HYST 2 73 #define TEMP_WARN 3 74 #define TEMP_WARN_HYST 4 75 /* 76 * only crit and crit_hyst affect real-time alarm status 77 * current crit crit_hyst warn warn_hyst 78 */ 79 static const u16 W83795_REG_TEMP[][5] = { 80 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */ 81 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */ 82 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */ 83 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */ 84 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */ 85 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */ 86 }; 87 88 #define IN_READ 0 89 #define IN_MAX 1 90 #define IN_LOW 2 91 static const u16 W83795_REG_IN[][3] = { 92 /* Current, HL, LL */ 93 {0x10, 0x70, 0x71}, /* VSEN1 */ 94 {0x11, 0x72, 0x73}, /* VSEN2 */ 95 {0x12, 0x74, 0x75}, /* VSEN3 */ 96 {0x13, 0x76, 0x77}, /* VSEN4 */ 97 {0x14, 0x78, 0x79}, /* VSEN5 */ 98 {0x15, 0x7a, 0x7b}, /* VSEN6 */ 99 {0x16, 0x7c, 0x7d}, /* VSEN7 */ 100 {0x17, 0x7e, 0x7f}, /* VSEN8 */ 101 {0x18, 0x80, 0x81}, /* VSEN9 */ 102 {0x19, 0x82, 0x83}, /* VSEN10 */ 103 {0x1A, 0x84, 0x85}, /* VSEN11 */ 104 {0x1B, 0x86, 0x87}, /* VTT */ 105 {0x1C, 0x88, 0x89}, /* 3VDD */ 106 {0x1D, 0x8a, 0x8b}, /* 3VSB */ 107 {0x1E, 0x8c, 0x8d}, /* VBAT */ 108 {0x1F, 0xa6, 0xa7}, /* VSEN12 */ 109 {0x20, 0xaa, 0xab}, /* VSEN13 */ 110 {0x21, 0x96, 0x97}, /* VSEN14 */ 111 {0x22, 0x9a, 0x9b}, /* VSEN15 */ 112 {0x23, 0x9e, 0x9f}, /* VSEN16 */ 113 {0x24, 0xa2, 0xa3}, /* VSEN17 */ 114 }; 115 #define W83795_REG_VRLSB 0x3C 116 117 static const u8 W83795_REG_IN_HL_LSB[] = { 118 0x8e, /* VSEN1-4 */ 119 0x90, /* VSEN5-8 */ 120 0x92, /* VSEN9-11 */ 121 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */ 122 0xa8, /* VSEN12 */ 123 0xac, /* VSEN13 */ 124 0x98, /* VSEN14 */ 125 0x9c, /* VSEN15 */ 126 0xa0, /* VSEN16 */ 127 0xa4, /* VSEN17 */ 128 }; 129 130 #define IN_LSB_REG(index, type) \ 131 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \ 132 : (W83795_REG_IN_HL_LSB[(index)] + 1)) 133 134 #define IN_LSB_SHIFT 0 135 #define IN_LSB_IDX 1 136 static const u8 IN_LSB_SHIFT_IDX[][2] = { 137 /* High/Low LSB shift, LSB No. */ 138 {0x00, 0x00}, /* VSEN1 */ 139 {0x02, 0x00}, /* VSEN2 */ 140 {0x04, 0x00}, /* VSEN3 */ 141 {0x06, 0x00}, /* VSEN4 */ 142 {0x00, 0x01}, /* VSEN5 */ 143 {0x02, 0x01}, /* VSEN6 */ 144 {0x04, 0x01}, /* VSEN7 */ 145 {0x06, 0x01}, /* VSEN8 */ 146 {0x00, 0x02}, /* VSEN9 */ 147 {0x02, 0x02}, /* VSEN10 */ 148 {0x04, 0x02}, /* VSEN11 */ 149 {0x00, 0x03}, /* VTT */ 150 {0x02, 0x03}, /* 3VDD */ 151 {0x04, 0x03}, /* 3VSB */ 152 {0x06, 0x03}, /* VBAT */ 153 {0x06, 0x04}, /* VSEN12 */ 154 {0x06, 0x05}, /* VSEN13 */ 155 {0x06, 0x06}, /* VSEN14 */ 156 {0x06, 0x07}, /* VSEN15 */ 157 {0x06, 0x08}, /* VSEN16 */ 158 {0x06, 0x09}, /* VSEN17 */ 159 }; 160 161 162 #define W83795_REG_FAN(index) (0x2E + (index)) 163 #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index)) 164 #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2) 165 #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \ 166 (((index) & 1) ? 4 : 0) 167 168 #define W83795_REG_VID_CTRL 0x6A 169 170 #define W83795_REG_ALARM_CTRL 0x40 171 #define ALARM_CTRL_RTSACS (1 << 7) 172 #define W83795_REG_ALARM(index) (0x41 + (index)) 173 #define W83795_REG_CLR_CHASSIS 0x4D 174 #define W83795_REG_BEEP(index) (0x50 + (index)) 175 176 #define W83795_REG_OVT_CFG 0x58 177 #define OVT_CFG_SEL (1 << 7) 178 179 180 #define W83795_REG_FCMS1 0x201 181 #define W83795_REG_FCMS2 0x208 182 #define W83795_REG_TFMR(index) (0x202 + (index)) 183 #define W83795_REG_FOMC 0x20F 184 185 #define W83795_REG_TSS(index) (0x209 + (index)) 186 187 #define TSS_MAP_RESERVED 0xff 188 static const u8 tss_map[4][6] = { 189 { 0, 1, 2, 3, 4, 5}, 190 { 6, 7, 8, 9, 0, 1}, 191 {10, 11, 12, 13, 2, 3}, 192 { 4, 5, 4, 5, TSS_MAP_RESERVED, TSS_MAP_RESERVED}, 193 }; 194 195 #define PWM_OUTPUT 0 196 #define PWM_FREQ 1 197 #define PWM_START 2 198 #define PWM_NONSTOP 3 199 #define PWM_STOP_TIME 4 200 #define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index)) 201 202 #define W83795_REG_FTSH(index) (0x240 + (index) * 2) 203 #define W83795_REG_FTSL(index) (0x241 + (index) * 2) 204 #define W83795_REG_TFTS 0x250 205 206 #define TEMP_PWM_TTTI 0 207 #define TEMP_PWM_CTFS 1 208 #define TEMP_PWM_HCT 2 209 #define TEMP_PWM_HOT 3 210 #define W83795_REG_TTTI(index) (0x260 + (index)) 211 #define W83795_REG_CTFS(index) (0x268 + (index)) 212 #define W83795_REG_HT(index) (0x270 + (index)) 213 214 #define SF4_TEMP 0 215 #define SF4_PWM 1 216 #define W83795_REG_SF4_TEMP(temp_num, index) \ 217 (0x280 + 0x10 * (temp_num) + (index)) 218 #define W83795_REG_SF4_PWM(temp_num, index) \ 219 (0x288 + 0x10 * (temp_num) + (index)) 220 221 #define W83795_REG_DTSC 0x301 222 #define W83795_REG_DTSE 0x302 223 #define W83795_REG_DTS(index) (0x26 + (index)) 224 #define W83795_REG_PECI_TBASE(index) (0x320 + (index)) 225 226 #define DTS_CRIT 0 227 #define DTS_CRIT_HYST 1 228 #define DTS_WARN 2 229 #define DTS_WARN_HYST 3 230 #define W83795_REG_DTS_EXT(index) (0xB2 + (index)) 231 232 #define SETUP_PWM_DEFAULT 0 233 #define SETUP_PWM_UPTIME 1 234 #define SETUP_PWM_DOWNTIME 2 235 #define W83795_REG_SETUP_PWM(index) (0x20C + (index)) 236 237 static inline u16 in_from_reg(u8 index, u16 val) 238 { 239 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */ 240 if (index >= 12 && index <= 14) 241 return val * 6; 242 else 243 return val * 2; 244 } 245 246 static inline u16 in_to_reg(u8 index, u16 val) 247 { 248 if (index >= 12 && index <= 14) 249 return val / 6; 250 else 251 return val / 2; 252 } 253 254 static inline unsigned long fan_from_reg(u16 val) 255 { 256 if ((val == 0xfff) || (val == 0)) 257 return 0; 258 return 1350000UL / val; 259 } 260 261 static inline u16 fan_to_reg(long rpm) 262 { 263 if (rpm <= 0) 264 return 0x0fff; 265 return clamp_val((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); 266 } 267 268 static inline unsigned long time_from_reg(u8 reg) 269 { 270 return reg * 100; 271 } 272 273 static inline u8 time_to_reg(unsigned long val) 274 { 275 return clamp_val((val + 50) / 100, 0, 0xff); 276 } 277 278 static inline long temp_from_reg(s8 reg) 279 { 280 return reg * 1000; 281 } 282 283 static inline s8 temp_to_reg(long val, s8 min, s8 max) 284 { 285 return clamp_val(val / 1000, min, max); 286 } 287 288 static const u16 pwm_freq_cksel0[16] = { 289 1024, 512, 341, 256, 205, 171, 146, 128, 290 85, 64, 32, 16, 8, 4, 2, 1 291 }; 292 293 static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin) 294 { 295 unsigned long base_clock; 296 297 if (reg & 0x80) { 298 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); 299 return base_clock / ((reg & 0x7f) + 1); 300 } else 301 return pwm_freq_cksel0[reg & 0x0f]; 302 } 303 304 static u8 pwm_freq_to_reg(unsigned long val, u16 clkin) 305 { 306 unsigned long base_clock; 307 u8 reg0, reg1; 308 unsigned long best0, best1; 309 310 /* Best fit for cksel = 0 */ 311 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) { 312 if (val > (pwm_freq_cksel0[reg0] + 313 pwm_freq_cksel0[reg0 + 1]) / 2) 314 break; 315 } 316 if (val < 375) /* cksel = 1 can't beat this */ 317 return reg0; 318 best0 = pwm_freq_cksel0[reg0]; 319 320 /* Best fit for cksel = 1 */ 321 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); 322 reg1 = clamp_val(DIV_ROUND_CLOSEST(base_clock, val), 1, 128); 323 best1 = base_clock / reg1; 324 reg1 = 0x80 | (reg1 - 1); 325 326 /* Choose the closest one */ 327 if (abs(val - best0) > abs(val - best1)) 328 return reg1; 329 else 330 return reg0; 331 } 332 333 enum chip_types {w83795g, w83795adg}; 334 335 struct w83795_data { 336 struct device *hwmon_dev; 337 struct mutex update_lock; 338 unsigned long last_updated; /* In jiffies */ 339 enum chip_types chip_type; 340 341 u8 bank; 342 343 u32 has_in; /* Enable monitor VIN or not */ 344 u8 has_dyn_in; /* Only in2-0 can have this */ 345 u16 in[21][3]; /* Register value, read/high/low */ 346 u8 in_lsb[10][3]; /* LSB Register value, high/low */ 347 u8 has_gain; /* has gain: in17-20 * 8 */ 348 349 u16 has_fan; /* Enable fan14-1 or not */ 350 u16 fan[14]; /* Register value combine */ 351 u16 fan_min[14]; /* Register value combine */ 352 353 u8 has_temp; /* Enable monitor temp6-1 or not */ 354 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */ 355 u8 temp_read_vrlsb[6]; 356 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */ 357 u8 temp_src[3]; /* Register value */ 358 359 u8 enable_dts; /* 360 * Enable PECI and SB-TSI, 361 * bit 0: =1 enable, =0 disable, 362 * bit 1: =1 AMD SB-TSI, =0 Intel PECI 363 */ 364 u8 has_dts; /* Enable monitor DTS temp */ 365 s8 dts[8]; /* Register value */ 366 u8 dts_read_vrlsb[8]; /* Register value */ 367 s8 dts_ext[4]; /* Register value */ 368 369 u8 has_pwm; /* 370 * 795g supports 8 pwm, 795adg only supports 2, 371 * no config register, only affected by chip 372 * type 373 */ 374 u8 pwm[8][5]; /* 375 * Register value, output, freq, start, 376 * non stop, stop time 377 */ 378 u16 clkin; /* CLKIN frequency in kHz */ 379 u8 pwm_fcms[2]; /* Register value */ 380 u8 pwm_tfmr[6]; /* Register value */ 381 u8 pwm_fomc; /* Register value */ 382 383 u16 target_speed[8]; /* 384 * Register value, target speed for speed 385 * cruise 386 */ 387 u8 tol_speed; /* tolerance of target speed */ 388 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */ 389 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */ 390 391 u8 setup_pwm[3]; /* Register value */ 392 393 u8 alarms[6]; /* Register value */ 394 u8 enable_beep; 395 u8 beeps[6]; /* Register value */ 396 397 char valid; 398 char valid_limits; 399 char valid_pwm_config; 400 }; 401 402 /* 403 * Hardware access 404 * We assume that nobdody can change the bank outside the driver. 405 */ 406 407 /* Must be called with data->update_lock held, except during initialization */ 408 static int w83795_set_bank(struct i2c_client *client, u8 bank) 409 { 410 struct w83795_data *data = i2c_get_clientdata(client); 411 int err; 412 413 /* If the same bank is already set, nothing to do */ 414 if ((data->bank & 0x07) == bank) 415 return 0; 416 417 /* Change to new bank, preserve all other bits */ 418 bank |= data->bank & ~0x07; 419 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank); 420 if (err < 0) { 421 dev_err(&client->dev, 422 "Failed to set bank to %d, err %d\n", 423 (int)bank, err); 424 return err; 425 } 426 data->bank = bank; 427 428 return 0; 429 } 430 431 /* Must be called with data->update_lock held, except during initialization */ 432 static u8 w83795_read(struct i2c_client *client, u16 reg) 433 { 434 int err; 435 436 err = w83795_set_bank(client, reg >> 8); 437 if (err < 0) 438 return 0x00; /* Arbitrary */ 439 440 err = i2c_smbus_read_byte_data(client, reg & 0xff); 441 if (err < 0) { 442 dev_err(&client->dev, 443 "Failed to read from register 0x%03x, err %d\n", 444 (int)reg, err); 445 return 0x00; /* Arbitrary */ 446 } 447 return err; 448 } 449 450 /* Must be called with data->update_lock held, except during initialization */ 451 static int w83795_write(struct i2c_client *client, u16 reg, u8 value) 452 { 453 int err; 454 455 err = w83795_set_bank(client, reg >> 8); 456 if (err < 0) 457 return err; 458 459 err = i2c_smbus_write_byte_data(client, reg & 0xff, value); 460 if (err < 0) 461 dev_err(&client->dev, 462 "Failed to write to register 0x%03x, err %d\n", 463 (int)reg, err); 464 return err; 465 } 466 467 static void w83795_update_limits(struct i2c_client *client) 468 { 469 struct w83795_data *data = i2c_get_clientdata(client); 470 int i, limit; 471 u8 lsb; 472 473 /* Read the voltage limits */ 474 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 475 if (!(data->has_in & (1 << i))) 476 continue; 477 data->in[i][IN_MAX] = 478 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 479 data->in[i][IN_LOW] = 480 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 481 } 482 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) { 483 if ((i == 2 && data->chip_type == w83795adg) || 484 (i >= 4 && !(data->has_in & (1 << (i + 11))))) 485 continue; 486 data->in_lsb[i][IN_MAX] = 487 w83795_read(client, IN_LSB_REG(i, IN_MAX)); 488 data->in_lsb[i][IN_LOW] = 489 w83795_read(client, IN_LSB_REG(i, IN_LOW)); 490 } 491 492 /* Read the fan limits */ 493 lsb = 0; /* Silent false gcc warning */ 494 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 495 /* 496 * Each register contains LSB for 2 fans, but we want to 497 * read it only once to save time 498 */ 499 if ((i & 1) == 0 && (data->has_fan & (3 << i))) 500 lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i)); 501 502 if (!(data->has_fan & (1 << i))) 503 continue; 504 data->fan_min[i] = 505 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4; 506 data->fan_min[i] |= 507 (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F; 508 } 509 510 /* Read the temperature limits */ 511 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 512 if (!(data->has_temp & (1 << i))) 513 continue; 514 for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++) 515 data->temp[i][limit] = 516 w83795_read(client, W83795_REG_TEMP[i][limit]); 517 } 518 519 /* Read the DTS limits */ 520 if (data->enable_dts) { 521 for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++) 522 data->dts_ext[limit] = 523 w83795_read(client, W83795_REG_DTS_EXT(limit)); 524 } 525 526 /* Read beep settings */ 527 if (data->enable_beep) { 528 for (i = 0; i < ARRAY_SIZE(data->beeps); i++) 529 data->beeps[i] = 530 w83795_read(client, W83795_REG_BEEP(i)); 531 } 532 533 data->valid_limits = 1; 534 } 535 536 static struct w83795_data *w83795_update_pwm_config(struct device *dev) 537 { 538 struct i2c_client *client = to_i2c_client(dev); 539 struct w83795_data *data = i2c_get_clientdata(client); 540 int i, tmp; 541 542 mutex_lock(&data->update_lock); 543 544 if (data->valid_pwm_config) 545 goto END; 546 547 /* Read temperature source selection */ 548 for (i = 0; i < ARRAY_SIZE(data->temp_src); i++) 549 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i)); 550 551 /* Read automatic fan speed control settings */ 552 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1); 553 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2); 554 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++) 555 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i)); 556 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC); 557 for (i = 0; i < data->has_pwm; i++) { 558 for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++) 559 data->pwm[i][tmp] = 560 w83795_read(client, W83795_REG_PWM(i, tmp)); 561 } 562 for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) { 563 data->target_speed[i] = 564 w83795_read(client, W83795_REG_FTSH(i)) << 4; 565 data->target_speed[i] |= 566 w83795_read(client, W83795_REG_FTSL(i)) >> 4; 567 } 568 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f; 569 570 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) { 571 data->pwm_temp[i][TEMP_PWM_TTTI] = 572 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f; 573 data->pwm_temp[i][TEMP_PWM_CTFS] = 574 w83795_read(client, W83795_REG_CTFS(i)); 575 tmp = w83795_read(client, W83795_REG_HT(i)); 576 data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4; 577 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f; 578 } 579 580 /* Read SmartFanIV trip points */ 581 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) { 582 for (tmp = 0; tmp < 7; tmp++) { 583 data->sf4_reg[i][SF4_TEMP][tmp] = 584 w83795_read(client, 585 W83795_REG_SF4_TEMP(i, tmp)); 586 data->sf4_reg[i][SF4_PWM][tmp] = 587 w83795_read(client, W83795_REG_SF4_PWM(i, tmp)); 588 } 589 } 590 591 /* Read setup PWM */ 592 for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++) 593 data->setup_pwm[i] = 594 w83795_read(client, W83795_REG_SETUP_PWM(i)); 595 596 data->valid_pwm_config = 1; 597 598 END: 599 mutex_unlock(&data->update_lock); 600 return data; 601 } 602 603 static struct w83795_data *w83795_update_device(struct device *dev) 604 { 605 struct i2c_client *client = to_i2c_client(dev); 606 struct w83795_data *data = i2c_get_clientdata(client); 607 u16 tmp; 608 u8 intrusion; 609 int i; 610 611 mutex_lock(&data->update_lock); 612 613 if (!data->valid_limits) 614 w83795_update_limits(client); 615 616 if (!(time_after(jiffies, data->last_updated + HZ * 2) 617 || !data->valid)) 618 goto END; 619 620 /* Update the voltages value */ 621 for (i = 0; i < ARRAY_SIZE(data->in); i++) { 622 if (!(data->has_in & (1 << i))) 623 continue; 624 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; 625 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6; 626 data->in[i][IN_READ] = tmp; 627 } 628 629 /* in0-2 can have dynamic limits (W83795G only) */ 630 if (data->has_dyn_in) { 631 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX)); 632 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW)); 633 634 for (i = 0; i < 3; i++) { 635 if (!(data->has_dyn_in & (1 << i))) 636 continue; 637 data->in[i][IN_MAX] = 638 w83795_read(client, W83795_REG_IN[i][IN_MAX]); 639 data->in[i][IN_LOW] = 640 w83795_read(client, W83795_REG_IN[i][IN_LOW]); 641 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03; 642 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03; 643 } 644 } 645 646 /* Update fan */ 647 for (i = 0; i < ARRAY_SIZE(data->fan); i++) { 648 if (!(data->has_fan & (1 << i))) 649 continue; 650 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; 651 data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4; 652 } 653 654 /* Update temperature */ 655 for (i = 0; i < ARRAY_SIZE(data->temp); i++) { 656 data->temp[i][TEMP_READ] = 657 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); 658 data->temp_read_vrlsb[i] = 659 w83795_read(client, W83795_REG_VRLSB); 660 } 661 662 /* Update dts temperature */ 663 if (data->enable_dts) { 664 for (i = 0; i < ARRAY_SIZE(data->dts); i++) { 665 if (!(data->has_dts & (1 << i))) 666 continue; 667 data->dts[i] = 668 w83795_read(client, W83795_REG_DTS(i)); 669 data->dts_read_vrlsb[i] = 670 w83795_read(client, W83795_REG_VRLSB); 671 } 672 } 673 674 /* Update pwm output */ 675 for (i = 0; i < data->has_pwm; i++) { 676 data->pwm[i][PWM_OUTPUT] = 677 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT)); 678 } 679 680 /* 681 * Update intrusion and alarms 682 * It is important to read intrusion first, because reading from 683 * register SMI STS6 clears the interrupt status temporarily. 684 */ 685 tmp = w83795_read(client, W83795_REG_ALARM_CTRL); 686 /* Switch to interrupt status for intrusion if needed */ 687 if (tmp & ALARM_CTRL_RTSACS) 688 w83795_write(client, W83795_REG_ALARM_CTRL, 689 tmp & ~ALARM_CTRL_RTSACS); 690 intrusion = w83795_read(client, W83795_REG_ALARM(5)) & (1 << 6); 691 /* Switch to real-time alarms */ 692 w83795_write(client, W83795_REG_ALARM_CTRL, tmp | ALARM_CTRL_RTSACS); 693 for (i = 0; i < ARRAY_SIZE(data->alarms); i++) 694 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); 695 data->alarms[5] |= intrusion; 696 /* Restore original configuration if needed */ 697 if (!(tmp & ALARM_CTRL_RTSACS)) 698 w83795_write(client, W83795_REG_ALARM_CTRL, 699 tmp & ~ALARM_CTRL_RTSACS); 700 701 data->last_updated = jiffies; 702 data->valid = 1; 703 704 END: 705 mutex_unlock(&data->update_lock); 706 return data; 707 } 708 709 /* 710 * Sysfs attributes 711 */ 712 713 #define ALARM_STATUS 0 714 #define BEEP_ENABLE 1 715 static ssize_t 716 show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) 717 { 718 struct w83795_data *data = w83795_update_device(dev); 719 struct sensor_device_attribute_2 *sensor_attr = 720 to_sensor_dev_attr_2(attr); 721 int nr = sensor_attr->nr; 722 int index = sensor_attr->index >> 3; 723 int bit = sensor_attr->index & 0x07; 724 u8 val; 725 726 if (nr == ALARM_STATUS) 727 val = (data->alarms[index] >> bit) & 1; 728 else /* BEEP_ENABLE */ 729 val = (data->beeps[index] >> bit) & 1; 730 731 return sprintf(buf, "%u\n", val); 732 } 733 734 static ssize_t 735 store_beep(struct device *dev, struct device_attribute *attr, 736 const char *buf, size_t count) 737 { 738 struct i2c_client *client = to_i2c_client(dev); 739 struct w83795_data *data = i2c_get_clientdata(client); 740 struct sensor_device_attribute_2 *sensor_attr = 741 to_sensor_dev_attr_2(attr); 742 int index = sensor_attr->index >> 3; 743 int shift = sensor_attr->index & 0x07; 744 u8 beep_bit = 1 << shift; 745 unsigned long val; 746 747 if (kstrtoul(buf, 10, &val) < 0) 748 return -EINVAL; 749 if (val != 0 && val != 1) 750 return -EINVAL; 751 752 mutex_lock(&data->update_lock); 753 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index)); 754 data->beeps[index] &= ~beep_bit; 755 data->beeps[index] |= val << shift; 756 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]); 757 mutex_unlock(&data->update_lock); 758 759 return count; 760 } 761 762 /* Write 0 to clear chassis alarm */ 763 static ssize_t 764 store_chassis_clear(struct device *dev, 765 struct device_attribute *attr, const char *buf, 766 size_t count) 767 { 768 struct i2c_client *client = to_i2c_client(dev); 769 struct w83795_data *data = i2c_get_clientdata(client); 770 unsigned long val; 771 772 if (kstrtoul(buf, 10, &val) < 0 || val != 0) 773 return -EINVAL; 774 775 mutex_lock(&data->update_lock); 776 val = w83795_read(client, W83795_REG_CLR_CHASSIS); 777 val |= 0x80; 778 w83795_write(client, W83795_REG_CLR_CHASSIS, val); 779 780 /* Clear status and force cache refresh */ 781 w83795_read(client, W83795_REG_ALARM(5)); 782 data->valid = 0; 783 mutex_unlock(&data->update_lock); 784 return count; 785 } 786 787 #define FAN_INPUT 0 788 #define FAN_MIN 1 789 static ssize_t 790 show_fan(struct device *dev, struct device_attribute *attr, char *buf) 791 { 792 struct sensor_device_attribute_2 *sensor_attr = 793 to_sensor_dev_attr_2(attr); 794 int nr = sensor_attr->nr; 795 int index = sensor_attr->index; 796 struct w83795_data *data = w83795_update_device(dev); 797 u16 val; 798 799 if (nr == FAN_INPUT) 800 val = data->fan[index] & 0x0fff; 801 else 802 val = data->fan_min[index] & 0x0fff; 803 804 return sprintf(buf, "%lu\n", fan_from_reg(val)); 805 } 806 807 static ssize_t 808 store_fan_min(struct device *dev, struct device_attribute *attr, 809 const char *buf, size_t count) 810 { 811 struct sensor_device_attribute_2 *sensor_attr = 812 to_sensor_dev_attr_2(attr); 813 int index = sensor_attr->index; 814 struct i2c_client *client = to_i2c_client(dev); 815 struct w83795_data *data = i2c_get_clientdata(client); 816 unsigned long val; 817 818 if (kstrtoul(buf, 10, &val)) 819 return -EINVAL; 820 val = fan_to_reg(val); 821 822 mutex_lock(&data->update_lock); 823 data->fan_min[index] = val; 824 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff); 825 val &= 0x0f; 826 if (index & 1) { 827 val <<= 4; 828 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 829 & 0x0f; 830 } else { 831 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) 832 & 0xf0; 833 } 834 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff); 835 mutex_unlock(&data->update_lock); 836 837 return count; 838 } 839 840 static ssize_t 841 show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 842 { 843 struct w83795_data *data; 844 struct sensor_device_attribute_2 *sensor_attr = 845 to_sensor_dev_attr_2(attr); 846 int nr = sensor_attr->nr; 847 int index = sensor_attr->index; 848 unsigned int val; 849 850 data = nr == PWM_OUTPUT ? w83795_update_device(dev) 851 : w83795_update_pwm_config(dev); 852 853 switch (nr) { 854 case PWM_STOP_TIME: 855 val = time_from_reg(data->pwm[index][nr]); 856 break; 857 case PWM_FREQ: 858 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin); 859 break; 860 default: 861 val = data->pwm[index][nr]; 862 break; 863 } 864 865 return sprintf(buf, "%u\n", val); 866 } 867 868 static ssize_t 869 store_pwm(struct device *dev, struct device_attribute *attr, 870 const char *buf, size_t count) 871 { 872 struct i2c_client *client = to_i2c_client(dev); 873 struct w83795_data *data = i2c_get_clientdata(client); 874 struct sensor_device_attribute_2 *sensor_attr = 875 to_sensor_dev_attr_2(attr); 876 int nr = sensor_attr->nr; 877 int index = sensor_attr->index; 878 unsigned long val; 879 880 if (kstrtoul(buf, 10, &val) < 0) 881 return -EINVAL; 882 883 mutex_lock(&data->update_lock); 884 switch (nr) { 885 case PWM_STOP_TIME: 886 val = time_to_reg(val); 887 break; 888 case PWM_FREQ: 889 val = pwm_freq_to_reg(val, data->clkin); 890 break; 891 default: 892 val = clamp_val(val, 0, 0xff); 893 break; 894 } 895 w83795_write(client, W83795_REG_PWM(index, nr), val); 896 data->pwm[index][nr] = val; 897 mutex_unlock(&data->update_lock); 898 return count; 899 } 900 901 static ssize_t 902 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 903 { 904 struct sensor_device_attribute_2 *sensor_attr = 905 to_sensor_dev_attr_2(attr); 906 struct w83795_data *data = w83795_update_pwm_config(dev); 907 int index = sensor_attr->index; 908 u8 tmp; 909 910 /* Speed cruise mode */ 911 if (data->pwm_fcms[0] & (1 << index)) { 912 tmp = 2; 913 goto out; 914 } 915 /* Thermal cruise or SmartFan IV mode */ 916 for (tmp = 0; tmp < 6; tmp++) { 917 if (data->pwm_tfmr[tmp] & (1 << index)) { 918 tmp = 3; 919 goto out; 920 } 921 } 922 /* Manual mode */ 923 tmp = 1; 924 925 out: 926 return sprintf(buf, "%u\n", tmp); 927 } 928 929 static ssize_t 930 store_pwm_enable(struct device *dev, struct device_attribute *attr, 931 const char *buf, size_t count) 932 { 933 struct i2c_client *client = to_i2c_client(dev); 934 struct w83795_data *data = w83795_update_pwm_config(dev); 935 struct sensor_device_attribute_2 *sensor_attr = 936 to_sensor_dev_attr_2(attr); 937 int index = sensor_attr->index; 938 unsigned long val; 939 int i; 940 941 if (kstrtoul(buf, 10, &val) < 0) 942 return -EINVAL; 943 if (val < 1 || val > 2) 944 return -EINVAL; 945 946 #ifndef CONFIG_SENSORS_W83795_FANCTRL 947 if (val > 1) { 948 dev_warn(dev, "Automatic fan speed control support disabled\n"); 949 dev_warn(dev, "Build with CONFIG_SENSORS_W83795_FANCTRL=y if you want it\n"); 950 return -EOPNOTSUPP; 951 } 952 #endif 953 954 mutex_lock(&data->update_lock); 955 switch (val) { 956 case 1: 957 /* Clear speed cruise mode bits */ 958 data->pwm_fcms[0] &= ~(1 << index); 959 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 960 /* Clear thermal cruise mode bits */ 961 for (i = 0; i < 6; i++) { 962 data->pwm_tfmr[i] &= ~(1 << index); 963 w83795_write(client, W83795_REG_TFMR(i), 964 data->pwm_tfmr[i]); 965 } 966 break; 967 case 2: 968 data->pwm_fcms[0] |= (1 << index); 969 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); 970 break; 971 } 972 mutex_unlock(&data->update_lock); 973 return count; 974 } 975 976 static ssize_t 977 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf) 978 { 979 struct w83795_data *data = w83795_update_pwm_config(dev); 980 int index = to_sensor_dev_attr_2(attr)->index; 981 unsigned int mode; 982 983 if (data->pwm_fomc & (1 << index)) 984 mode = 0; /* DC */ 985 else 986 mode = 1; /* PWM */ 987 988 return sprintf(buf, "%u\n", mode); 989 } 990 991 /* 992 * Check whether a given temperature source can ever be useful. 993 * Returns the number of selectable temperature channels which are 994 * enabled. 995 */ 996 static int w83795_tss_useful(const struct w83795_data *data, int tsrc) 997 { 998 int useful = 0, i; 999 1000 for (i = 0; i < 4; i++) { 1001 if (tss_map[i][tsrc] == TSS_MAP_RESERVED) 1002 continue; 1003 if (tss_map[i][tsrc] < 6) /* Analog */ 1004 useful += (data->has_temp >> tss_map[i][tsrc]) & 1; 1005 else /* Digital */ 1006 useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1; 1007 } 1008 1009 return useful; 1010 } 1011 1012 static ssize_t 1013 show_temp_src(struct device *dev, struct device_attribute *attr, char *buf) 1014 { 1015 struct sensor_device_attribute_2 *sensor_attr = 1016 to_sensor_dev_attr_2(attr); 1017 struct w83795_data *data = w83795_update_pwm_config(dev); 1018 int index = sensor_attr->index; 1019 u8 tmp = data->temp_src[index / 2]; 1020 1021 if (index & 1) 1022 tmp >>= 4; /* Pick high nibble */ 1023 else 1024 tmp &= 0x0f; /* Pick low nibble */ 1025 1026 /* Look-up the actual temperature channel number */ 1027 if (tmp >= 4 || tss_map[tmp][index] == TSS_MAP_RESERVED) 1028 return -EINVAL; /* Shouldn't happen */ 1029 1030 return sprintf(buf, "%u\n", (unsigned int)tss_map[tmp][index] + 1); 1031 } 1032 1033 static ssize_t 1034 store_temp_src(struct device *dev, struct device_attribute *attr, 1035 const char *buf, size_t count) 1036 { 1037 struct i2c_client *client = to_i2c_client(dev); 1038 struct w83795_data *data = w83795_update_pwm_config(dev); 1039 struct sensor_device_attribute_2 *sensor_attr = 1040 to_sensor_dev_attr_2(attr); 1041 int index = sensor_attr->index; 1042 int tmp; 1043 unsigned long channel; 1044 u8 val = index / 2; 1045 1046 if (kstrtoul(buf, 10, &channel) < 0 || 1047 channel < 1 || channel > 14) 1048 return -EINVAL; 1049 1050 /* Check if request can be fulfilled */ 1051 for (tmp = 0; tmp < 4; tmp++) { 1052 if (tss_map[tmp][index] == channel - 1) 1053 break; 1054 } 1055 if (tmp == 4) /* No match */ 1056 return -EINVAL; 1057 1058 mutex_lock(&data->update_lock); 1059 if (index & 1) { 1060 tmp <<= 4; 1061 data->temp_src[val] &= 0x0f; 1062 } else { 1063 data->temp_src[val] &= 0xf0; 1064 } 1065 data->temp_src[val] |= tmp; 1066 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]); 1067 mutex_unlock(&data->update_lock); 1068 1069 return count; 1070 } 1071 1072 #define TEMP_PWM_ENABLE 0 1073 #define TEMP_PWM_FAN_MAP 1 1074 static ssize_t 1075 show_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 1076 char *buf) 1077 { 1078 struct w83795_data *data = w83795_update_pwm_config(dev); 1079 struct sensor_device_attribute_2 *sensor_attr = 1080 to_sensor_dev_attr_2(attr); 1081 int nr = sensor_attr->nr; 1082 int index = sensor_attr->index; 1083 u8 tmp = 0xff; 1084 1085 switch (nr) { 1086 case TEMP_PWM_ENABLE: 1087 tmp = (data->pwm_fcms[1] >> index) & 1; 1088 if (tmp) 1089 tmp = 4; 1090 else 1091 tmp = 3; 1092 break; 1093 case TEMP_PWM_FAN_MAP: 1094 tmp = data->pwm_tfmr[index]; 1095 break; 1096 } 1097 1098 return sprintf(buf, "%u\n", tmp); 1099 } 1100 1101 static ssize_t 1102 store_temp_pwm_enable(struct device *dev, struct device_attribute *attr, 1103 const char *buf, size_t count) 1104 { 1105 struct i2c_client *client = to_i2c_client(dev); 1106 struct w83795_data *data = w83795_update_pwm_config(dev); 1107 struct sensor_device_attribute_2 *sensor_attr = 1108 to_sensor_dev_attr_2(attr); 1109 int nr = sensor_attr->nr; 1110 int index = sensor_attr->index; 1111 unsigned long tmp; 1112 1113 if (kstrtoul(buf, 10, &tmp) < 0) 1114 return -EINVAL; 1115 1116 switch (nr) { 1117 case TEMP_PWM_ENABLE: 1118 if (tmp != 3 && tmp != 4) 1119 return -EINVAL; 1120 tmp -= 3; 1121 mutex_lock(&data->update_lock); 1122 data->pwm_fcms[1] &= ~(1 << index); 1123 data->pwm_fcms[1] |= tmp << index; 1124 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]); 1125 mutex_unlock(&data->update_lock); 1126 break; 1127 case TEMP_PWM_FAN_MAP: 1128 mutex_lock(&data->update_lock); 1129 tmp = clamp_val(tmp, 0, 0xff); 1130 w83795_write(client, W83795_REG_TFMR(index), tmp); 1131 data->pwm_tfmr[index] = tmp; 1132 mutex_unlock(&data->update_lock); 1133 break; 1134 } 1135 return count; 1136 } 1137 1138 #define FANIN_TARGET 0 1139 #define FANIN_TOL 1 1140 static ssize_t 1141 show_fanin(struct device *dev, struct device_attribute *attr, char *buf) 1142 { 1143 struct w83795_data *data = w83795_update_pwm_config(dev); 1144 struct sensor_device_attribute_2 *sensor_attr = 1145 to_sensor_dev_attr_2(attr); 1146 int nr = sensor_attr->nr; 1147 int index = sensor_attr->index; 1148 u16 tmp = 0; 1149 1150 switch (nr) { 1151 case FANIN_TARGET: 1152 tmp = fan_from_reg(data->target_speed[index]); 1153 break; 1154 case FANIN_TOL: 1155 tmp = data->tol_speed; 1156 break; 1157 } 1158 1159 return sprintf(buf, "%u\n", tmp); 1160 } 1161 1162 static ssize_t 1163 store_fanin(struct device *dev, struct device_attribute *attr, 1164 const char *buf, size_t count) 1165 { 1166 struct i2c_client *client = to_i2c_client(dev); 1167 struct w83795_data *data = i2c_get_clientdata(client); 1168 struct sensor_device_attribute_2 *sensor_attr = 1169 to_sensor_dev_attr_2(attr); 1170 int nr = sensor_attr->nr; 1171 int index = sensor_attr->index; 1172 unsigned long val; 1173 1174 if (kstrtoul(buf, 10, &val) < 0) 1175 return -EINVAL; 1176 1177 mutex_lock(&data->update_lock); 1178 switch (nr) { 1179 case FANIN_TARGET: 1180 val = fan_to_reg(clamp_val(val, 0, 0xfff)); 1181 w83795_write(client, W83795_REG_FTSH(index), val >> 4); 1182 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0); 1183 data->target_speed[index] = val; 1184 break; 1185 case FANIN_TOL: 1186 val = clamp_val(val, 0, 0x3f); 1187 w83795_write(client, W83795_REG_TFTS, val); 1188 data->tol_speed = val; 1189 break; 1190 } 1191 mutex_unlock(&data->update_lock); 1192 1193 return count; 1194 } 1195 1196 1197 static ssize_t 1198 show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1199 { 1200 struct w83795_data *data = w83795_update_pwm_config(dev); 1201 struct sensor_device_attribute_2 *sensor_attr = 1202 to_sensor_dev_attr_2(attr); 1203 int nr = sensor_attr->nr; 1204 int index = sensor_attr->index; 1205 long tmp = temp_from_reg(data->pwm_temp[index][nr]); 1206 1207 return sprintf(buf, "%ld\n", tmp); 1208 } 1209 1210 static ssize_t 1211 store_temp_pwm(struct device *dev, struct device_attribute *attr, 1212 const char *buf, size_t count) 1213 { 1214 struct i2c_client *client = to_i2c_client(dev); 1215 struct w83795_data *data = i2c_get_clientdata(client); 1216 struct sensor_device_attribute_2 *sensor_attr = 1217 to_sensor_dev_attr_2(attr); 1218 int nr = sensor_attr->nr; 1219 int index = sensor_attr->index; 1220 unsigned long val; 1221 u8 tmp; 1222 1223 if (kstrtoul(buf, 10, &val) < 0) 1224 return -EINVAL; 1225 val /= 1000; 1226 1227 mutex_lock(&data->update_lock); 1228 switch (nr) { 1229 case TEMP_PWM_TTTI: 1230 val = clamp_val(val, 0, 0x7f); 1231 w83795_write(client, W83795_REG_TTTI(index), val); 1232 break; 1233 case TEMP_PWM_CTFS: 1234 val = clamp_val(val, 0, 0x7f); 1235 w83795_write(client, W83795_REG_CTFS(index), val); 1236 break; 1237 case TEMP_PWM_HCT: 1238 val = clamp_val(val, 0, 0x0f); 1239 tmp = w83795_read(client, W83795_REG_HT(index)); 1240 tmp &= 0x0f; 1241 tmp |= (val << 4) & 0xf0; 1242 w83795_write(client, W83795_REG_HT(index), tmp); 1243 break; 1244 case TEMP_PWM_HOT: 1245 val = clamp_val(val, 0, 0x0f); 1246 tmp = w83795_read(client, W83795_REG_HT(index)); 1247 tmp &= 0xf0; 1248 tmp |= val & 0x0f; 1249 w83795_write(client, W83795_REG_HT(index), tmp); 1250 break; 1251 } 1252 data->pwm_temp[index][nr] = val; 1253 mutex_unlock(&data->update_lock); 1254 1255 return count; 1256 } 1257 1258 static ssize_t 1259 show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf) 1260 { 1261 struct w83795_data *data = w83795_update_pwm_config(dev); 1262 struct sensor_device_attribute_2 *sensor_attr = 1263 to_sensor_dev_attr_2(attr); 1264 int nr = sensor_attr->nr; 1265 int index = sensor_attr->index; 1266 1267 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]); 1268 } 1269 1270 static ssize_t 1271 store_sf4_pwm(struct device *dev, struct device_attribute *attr, 1272 const char *buf, size_t count) 1273 { 1274 struct i2c_client *client = to_i2c_client(dev); 1275 struct w83795_data *data = i2c_get_clientdata(client); 1276 struct sensor_device_attribute_2 *sensor_attr = 1277 to_sensor_dev_attr_2(attr); 1278 int nr = sensor_attr->nr; 1279 int index = sensor_attr->index; 1280 unsigned long val; 1281 1282 if (kstrtoul(buf, 10, &val) < 0) 1283 return -EINVAL; 1284 1285 mutex_lock(&data->update_lock); 1286 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val); 1287 data->sf4_reg[index][SF4_PWM][nr] = val; 1288 mutex_unlock(&data->update_lock); 1289 1290 return count; 1291 } 1292 1293 static ssize_t 1294 show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf) 1295 { 1296 struct w83795_data *data = w83795_update_pwm_config(dev); 1297 struct sensor_device_attribute_2 *sensor_attr = 1298 to_sensor_dev_attr_2(attr); 1299 int nr = sensor_attr->nr; 1300 int index = sensor_attr->index; 1301 1302 return sprintf(buf, "%u\n", 1303 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000); 1304 } 1305 1306 static ssize_t 1307 store_sf4_temp(struct device *dev, struct device_attribute *attr, 1308 const char *buf, size_t count) 1309 { 1310 struct i2c_client *client = to_i2c_client(dev); 1311 struct w83795_data *data = i2c_get_clientdata(client); 1312 struct sensor_device_attribute_2 *sensor_attr = 1313 to_sensor_dev_attr_2(attr); 1314 int nr = sensor_attr->nr; 1315 int index = sensor_attr->index; 1316 unsigned long val; 1317 1318 if (kstrtoul(buf, 10, &val) < 0) 1319 return -EINVAL; 1320 val /= 1000; 1321 1322 mutex_lock(&data->update_lock); 1323 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val); 1324 data->sf4_reg[index][SF4_TEMP][nr] = val; 1325 mutex_unlock(&data->update_lock); 1326 1327 return count; 1328 } 1329 1330 1331 static ssize_t 1332 show_temp(struct device *dev, struct device_attribute *attr, char *buf) 1333 { 1334 struct sensor_device_attribute_2 *sensor_attr = 1335 to_sensor_dev_attr_2(attr); 1336 int nr = sensor_attr->nr; 1337 int index = sensor_attr->index; 1338 struct w83795_data *data = w83795_update_device(dev); 1339 long temp = temp_from_reg(data->temp[index][nr]); 1340 1341 if (nr == TEMP_READ) 1342 temp += (data->temp_read_vrlsb[index] >> 6) * 250; 1343 return sprintf(buf, "%ld\n", temp); 1344 } 1345 1346 static ssize_t 1347 store_temp(struct device *dev, struct device_attribute *attr, 1348 const char *buf, size_t count) 1349 { 1350 struct sensor_device_attribute_2 *sensor_attr = 1351 to_sensor_dev_attr_2(attr); 1352 int nr = sensor_attr->nr; 1353 int index = sensor_attr->index; 1354 struct i2c_client *client = to_i2c_client(dev); 1355 struct w83795_data *data = i2c_get_clientdata(client); 1356 long tmp; 1357 1358 if (kstrtol(buf, 10, &tmp) < 0) 1359 return -EINVAL; 1360 1361 mutex_lock(&data->update_lock); 1362 data->temp[index][nr] = temp_to_reg(tmp, -128, 127); 1363 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]); 1364 mutex_unlock(&data->update_lock); 1365 return count; 1366 } 1367 1368 1369 static ssize_t 1370 show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf) 1371 { 1372 struct w83795_data *data = dev_get_drvdata(dev); 1373 int tmp; 1374 1375 if (data->enable_dts & 2) 1376 tmp = 5; 1377 else 1378 tmp = 6; 1379 1380 return sprintf(buf, "%d\n", tmp); 1381 } 1382 1383 static ssize_t 1384 show_dts(struct device *dev, struct device_attribute *attr, char *buf) 1385 { 1386 struct sensor_device_attribute_2 *sensor_attr = 1387 to_sensor_dev_attr_2(attr); 1388 int index = sensor_attr->index; 1389 struct w83795_data *data = w83795_update_device(dev); 1390 long temp = temp_from_reg(data->dts[index]); 1391 1392 temp += (data->dts_read_vrlsb[index] >> 6) * 250; 1393 return sprintf(buf, "%ld\n", temp); 1394 } 1395 1396 static ssize_t 1397 show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf) 1398 { 1399 struct sensor_device_attribute_2 *sensor_attr = 1400 to_sensor_dev_attr_2(attr); 1401 int nr = sensor_attr->nr; 1402 struct w83795_data *data = dev_get_drvdata(dev); 1403 long temp = temp_from_reg(data->dts_ext[nr]); 1404 1405 return sprintf(buf, "%ld\n", temp); 1406 } 1407 1408 static ssize_t 1409 store_dts_ext(struct device *dev, struct device_attribute *attr, 1410 const char *buf, size_t count) 1411 { 1412 struct sensor_device_attribute_2 *sensor_attr = 1413 to_sensor_dev_attr_2(attr); 1414 int nr = sensor_attr->nr; 1415 struct i2c_client *client = to_i2c_client(dev); 1416 struct w83795_data *data = i2c_get_clientdata(client); 1417 long tmp; 1418 1419 if (kstrtol(buf, 10, &tmp) < 0) 1420 return -EINVAL; 1421 1422 mutex_lock(&data->update_lock); 1423 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127); 1424 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]); 1425 mutex_unlock(&data->update_lock); 1426 return count; 1427 } 1428 1429 1430 static ssize_t 1431 show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) 1432 { 1433 struct w83795_data *data = dev_get_drvdata(dev); 1434 struct sensor_device_attribute_2 *sensor_attr = 1435 to_sensor_dev_attr_2(attr); 1436 int index = sensor_attr->index; 1437 int tmp; 1438 1439 if (data->temp_mode & (1 << index)) 1440 tmp = 3; /* Thermal diode */ 1441 else 1442 tmp = 4; /* Thermistor */ 1443 1444 return sprintf(buf, "%d\n", tmp); 1445 } 1446 1447 /* Only for temp1-4 (temp5-6 can only be thermistor) */ 1448 static ssize_t 1449 store_temp_mode(struct device *dev, struct device_attribute *attr, 1450 const char *buf, size_t count) 1451 { 1452 struct i2c_client *client = to_i2c_client(dev); 1453 struct w83795_data *data = i2c_get_clientdata(client); 1454 struct sensor_device_attribute_2 *sensor_attr = 1455 to_sensor_dev_attr_2(attr); 1456 int index = sensor_attr->index; 1457 int reg_shift; 1458 unsigned long val; 1459 u8 tmp; 1460 1461 if (kstrtoul(buf, 10, &val) < 0) 1462 return -EINVAL; 1463 if ((val != 4) && (val != 3)) 1464 return -EINVAL; 1465 1466 mutex_lock(&data->update_lock); 1467 if (val == 3) { 1468 /* Thermal diode */ 1469 val = 0x01; 1470 data->temp_mode |= 1 << index; 1471 } else if (val == 4) { 1472 /* Thermistor */ 1473 val = 0x03; 1474 data->temp_mode &= ~(1 << index); 1475 } 1476 1477 reg_shift = 2 * index; 1478 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 1479 tmp &= ~(0x03 << reg_shift); 1480 tmp |= val << reg_shift; 1481 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp); 1482 1483 mutex_unlock(&data->update_lock); 1484 return count; 1485 } 1486 1487 1488 /* show/store VIN */ 1489 static ssize_t 1490 show_in(struct device *dev, struct device_attribute *attr, char *buf) 1491 { 1492 struct sensor_device_attribute_2 *sensor_attr = 1493 to_sensor_dev_attr_2(attr); 1494 int nr = sensor_attr->nr; 1495 int index = sensor_attr->index; 1496 struct w83795_data *data = w83795_update_device(dev); 1497 u16 val = data->in[index][nr]; 1498 u8 lsb_idx; 1499 1500 switch (nr) { 1501 case IN_READ: 1502 /* calculate this value again by sensors as sensors3.conf */ 1503 if ((index >= 17) && 1504 !((data->has_gain >> (index - 17)) & 1)) 1505 val *= 8; 1506 break; 1507 case IN_MAX: 1508 case IN_LOW: 1509 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1510 val <<= 2; 1511 val |= (data->in_lsb[lsb_idx][nr] >> 1512 IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03; 1513 if ((index >= 17) && 1514 !((data->has_gain >> (index - 17)) & 1)) 1515 val *= 8; 1516 break; 1517 } 1518 val = in_from_reg(index, val); 1519 1520 return sprintf(buf, "%d\n", val); 1521 } 1522 1523 static ssize_t 1524 store_in(struct device *dev, struct device_attribute *attr, 1525 const char *buf, size_t count) 1526 { 1527 struct sensor_device_attribute_2 *sensor_attr = 1528 to_sensor_dev_attr_2(attr); 1529 int nr = sensor_attr->nr; 1530 int index = sensor_attr->index; 1531 struct i2c_client *client = to_i2c_client(dev); 1532 struct w83795_data *data = i2c_get_clientdata(client); 1533 unsigned long val; 1534 u8 tmp; 1535 u8 lsb_idx; 1536 1537 if (kstrtoul(buf, 10, &val) < 0) 1538 return -EINVAL; 1539 val = in_to_reg(index, val); 1540 1541 if ((index >= 17) && 1542 !((data->has_gain >> (index - 17)) & 1)) 1543 val /= 8; 1544 val = clamp_val(val, 0, 0x3FF); 1545 mutex_lock(&data->update_lock); 1546 1547 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; 1548 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr)); 1549 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]); 1550 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]; 1551 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp); 1552 data->in_lsb[lsb_idx][nr] = tmp; 1553 1554 tmp = (val >> 2) & 0xff; 1555 w83795_write(client, W83795_REG_IN[index][nr], tmp); 1556 data->in[index][nr] = tmp; 1557 1558 mutex_unlock(&data->update_lock); 1559 return count; 1560 } 1561 1562 1563 #ifdef CONFIG_SENSORS_W83795_FANCTRL 1564 static ssize_t 1565 show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) 1566 { 1567 struct sensor_device_attribute_2 *sensor_attr = 1568 to_sensor_dev_attr_2(attr); 1569 int nr = sensor_attr->nr; 1570 struct w83795_data *data = w83795_update_pwm_config(dev); 1571 u16 val = data->setup_pwm[nr]; 1572 1573 switch (nr) { 1574 case SETUP_PWM_UPTIME: 1575 case SETUP_PWM_DOWNTIME: 1576 val = time_from_reg(val); 1577 break; 1578 } 1579 1580 return sprintf(buf, "%d\n", val); 1581 } 1582 1583 static ssize_t 1584 store_sf_setup(struct device *dev, struct device_attribute *attr, 1585 const char *buf, size_t count) 1586 { 1587 struct sensor_device_attribute_2 *sensor_attr = 1588 to_sensor_dev_attr_2(attr); 1589 int nr = sensor_attr->nr; 1590 struct i2c_client *client = to_i2c_client(dev); 1591 struct w83795_data *data = i2c_get_clientdata(client); 1592 unsigned long val; 1593 1594 if (kstrtoul(buf, 10, &val) < 0) 1595 return -EINVAL; 1596 1597 switch (nr) { 1598 case SETUP_PWM_DEFAULT: 1599 val = clamp_val(val, 0, 0xff); 1600 break; 1601 case SETUP_PWM_UPTIME: 1602 case SETUP_PWM_DOWNTIME: 1603 val = time_to_reg(val); 1604 if (val == 0) 1605 return -EINVAL; 1606 break; 1607 } 1608 1609 mutex_lock(&data->update_lock); 1610 data->setup_pwm[nr] = val; 1611 w83795_write(client, W83795_REG_SETUP_PWM(nr), val); 1612 mutex_unlock(&data->update_lock); 1613 return count; 1614 } 1615 #endif 1616 1617 1618 #define NOT_USED -1 1619 1620 /* 1621 * Don't change the attribute order, _max, _min and _beep are accessed by index 1622 * somewhere else in the code 1623 */ 1624 #define SENSOR_ATTR_IN(index) { \ 1625 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ 1626 IN_READ, index), \ 1627 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ 1628 store_in, IN_MAX, index), \ 1629 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ 1630 store_in, IN_LOW, index), \ 1631 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ 1632 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \ 1633 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ 1634 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1635 index + ((index > 14) ? 1 : 0)) } 1636 1637 /* 1638 * Don't change the attribute order, _beep is accessed by index 1639 * somewhere else in the code 1640 */ 1641 #define SENSOR_ATTR_FAN(index) { \ 1642 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ 1643 NULL, FAN_INPUT, index - 1), \ 1644 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ 1645 show_fan, store_fan_min, FAN_MIN, index - 1), \ 1646 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ 1647 NULL, ALARM_STATUS, index + 31), \ 1648 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ 1649 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) } 1650 1651 #define SENSOR_ATTR_PWM(index) { \ 1652 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ 1653 store_pwm, PWM_OUTPUT, index - 1), \ 1654 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \ 1655 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \ 1656 SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO, \ 1657 show_pwm_mode, NULL, NOT_USED, index - 1), \ 1658 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \ 1659 show_pwm, store_pwm, PWM_FREQ, index - 1), \ 1660 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ 1661 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ 1662 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ 1663 show_pwm, store_pwm, PWM_START, index - 1), \ 1664 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ 1665 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \ 1666 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \ 1667 show_fanin, store_fanin, FANIN_TARGET, index - 1) } 1668 1669 /* 1670 * Don't change the attribute order, _beep is accessed by index 1671 * somewhere else in the code 1672 */ 1673 #define SENSOR_ATTR_DTS(index) { \ 1674 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \ 1675 show_dts_mode, NULL, NOT_USED, index - 7), \ 1676 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \ 1677 NULL, NOT_USED, index - 7), \ 1678 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \ 1679 store_dts_ext, DTS_CRIT, NOT_USED), \ 1680 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ 1681 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \ 1682 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \ 1683 store_dts_ext, DTS_WARN, NOT_USED), \ 1684 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1685 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \ 1686 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1687 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \ 1688 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1689 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) } 1690 1691 /* 1692 * Don't change the attribute order, _beep is accessed by index 1693 * somewhere else in the code 1694 */ 1695 #define SENSOR_ATTR_TEMP(index) { \ 1696 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \ 1697 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ 1698 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ 1699 NULL, TEMP_READ, index - 1), \ 1700 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \ 1701 store_temp, TEMP_CRIT, index - 1), \ 1702 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ 1703 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ 1704 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ 1705 store_temp, TEMP_WARN, index - 1), \ 1706 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ 1707 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ 1708 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ 1709 show_alarm_beep, NULL, ALARM_STATUS, \ 1710 index + (index > 4 ? 11 : 17)), \ 1711 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ 1712 show_alarm_beep, store_beep, BEEP_ENABLE, \ 1713 index + (index > 4 ? 11 : 17)), \ 1714 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ 1715 show_temp_pwm_enable, store_temp_pwm_enable, \ 1716 TEMP_PWM_ENABLE, index - 1), \ 1717 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \ 1718 show_temp_pwm_enable, store_temp_pwm_enable, \ 1719 TEMP_PWM_FAN_MAP, index - 1), \ 1720 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \ 1721 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \ 1722 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \ 1723 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \ 1724 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \ 1725 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \ 1726 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \ 1727 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \ 1728 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ 1729 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \ 1730 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ 1731 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \ 1732 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ 1733 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \ 1734 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ 1735 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \ 1736 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ 1737 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \ 1738 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ 1739 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \ 1740 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ 1741 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \ 1742 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ 1743 show_sf4_temp, store_sf4_temp, 0, index - 1), \ 1744 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ 1745 show_sf4_temp, store_sf4_temp, 1, index - 1), \ 1746 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ 1747 show_sf4_temp, store_sf4_temp, 2, index - 1), \ 1748 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ 1749 show_sf4_temp, store_sf4_temp, 3, index - 1), \ 1750 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ 1751 show_sf4_temp, store_sf4_temp, 4, index - 1), \ 1752 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ 1753 show_sf4_temp, store_sf4_temp, 5, index - 1), \ 1754 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ 1755 show_sf4_temp, store_sf4_temp, 6, index - 1) } 1756 1757 1758 static struct sensor_device_attribute_2 w83795_in[][5] = { 1759 SENSOR_ATTR_IN(0), 1760 SENSOR_ATTR_IN(1), 1761 SENSOR_ATTR_IN(2), 1762 SENSOR_ATTR_IN(3), 1763 SENSOR_ATTR_IN(4), 1764 SENSOR_ATTR_IN(5), 1765 SENSOR_ATTR_IN(6), 1766 SENSOR_ATTR_IN(7), 1767 SENSOR_ATTR_IN(8), 1768 SENSOR_ATTR_IN(9), 1769 SENSOR_ATTR_IN(10), 1770 SENSOR_ATTR_IN(11), 1771 SENSOR_ATTR_IN(12), 1772 SENSOR_ATTR_IN(13), 1773 SENSOR_ATTR_IN(14), 1774 SENSOR_ATTR_IN(15), 1775 SENSOR_ATTR_IN(16), 1776 SENSOR_ATTR_IN(17), 1777 SENSOR_ATTR_IN(18), 1778 SENSOR_ATTR_IN(19), 1779 SENSOR_ATTR_IN(20), 1780 }; 1781 1782 static const struct sensor_device_attribute_2 w83795_fan[][4] = { 1783 SENSOR_ATTR_FAN(1), 1784 SENSOR_ATTR_FAN(2), 1785 SENSOR_ATTR_FAN(3), 1786 SENSOR_ATTR_FAN(4), 1787 SENSOR_ATTR_FAN(5), 1788 SENSOR_ATTR_FAN(6), 1789 SENSOR_ATTR_FAN(7), 1790 SENSOR_ATTR_FAN(8), 1791 SENSOR_ATTR_FAN(9), 1792 SENSOR_ATTR_FAN(10), 1793 SENSOR_ATTR_FAN(11), 1794 SENSOR_ATTR_FAN(12), 1795 SENSOR_ATTR_FAN(13), 1796 SENSOR_ATTR_FAN(14), 1797 }; 1798 1799 static const struct sensor_device_attribute_2 w83795_temp[][28] = { 1800 SENSOR_ATTR_TEMP(1), 1801 SENSOR_ATTR_TEMP(2), 1802 SENSOR_ATTR_TEMP(3), 1803 SENSOR_ATTR_TEMP(4), 1804 SENSOR_ATTR_TEMP(5), 1805 SENSOR_ATTR_TEMP(6), 1806 }; 1807 1808 static const struct sensor_device_attribute_2 w83795_dts[][8] = { 1809 SENSOR_ATTR_DTS(7), 1810 SENSOR_ATTR_DTS(8), 1811 SENSOR_ATTR_DTS(9), 1812 SENSOR_ATTR_DTS(10), 1813 SENSOR_ATTR_DTS(11), 1814 SENSOR_ATTR_DTS(12), 1815 SENSOR_ATTR_DTS(13), 1816 SENSOR_ATTR_DTS(14), 1817 }; 1818 1819 static const struct sensor_device_attribute_2 w83795_pwm[][8] = { 1820 SENSOR_ATTR_PWM(1), 1821 SENSOR_ATTR_PWM(2), 1822 SENSOR_ATTR_PWM(3), 1823 SENSOR_ATTR_PWM(4), 1824 SENSOR_ATTR_PWM(5), 1825 SENSOR_ATTR_PWM(6), 1826 SENSOR_ATTR_PWM(7), 1827 SENSOR_ATTR_PWM(8), 1828 }; 1829 1830 static const struct sensor_device_attribute_2 w83795_tss[6] = { 1831 SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO, 1832 show_temp_src, store_temp_src, NOT_USED, 0), 1833 SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO, 1834 show_temp_src, store_temp_src, NOT_USED, 1), 1835 SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO, 1836 show_temp_src, store_temp_src, NOT_USED, 2), 1837 SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO, 1838 show_temp_src, store_temp_src, NOT_USED, 3), 1839 SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO, 1840 show_temp_src, store_temp_src, NOT_USED, 4), 1841 SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO, 1842 show_temp_src, store_temp_src, NOT_USED, 5), 1843 }; 1844 1845 static const struct sensor_device_attribute_2 sda_single_files[] = { 1846 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep, 1847 store_chassis_clear, ALARM_STATUS, 46), 1848 #ifdef CONFIG_SENSORS_W83795_FANCTRL 1849 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin, 1850 store_fanin, FANIN_TOL, NOT_USED), 1851 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, 1852 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), 1853 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, 1854 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), 1855 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, 1856 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), 1857 #endif 1858 }; 1859 1860 static const struct sensor_device_attribute_2 sda_beep_files[] = { 1861 SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep, 1862 store_beep, BEEP_ENABLE, 46), 1863 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep, 1864 store_beep, BEEP_ENABLE, 47), 1865 }; 1866 1867 /* 1868 * Driver interface 1869 */ 1870 1871 static void w83795_init_client(struct i2c_client *client) 1872 { 1873 struct w83795_data *data = i2c_get_clientdata(client); 1874 static const u16 clkin[4] = { /* in kHz */ 1875 14318, 24000, 33333, 48000 1876 }; 1877 u8 config; 1878 1879 if (reset) 1880 w83795_write(client, W83795_REG_CONFIG, 0x80); 1881 1882 /* Start monitoring if needed */ 1883 config = w83795_read(client, W83795_REG_CONFIG); 1884 if (!(config & W83795_REG_CONFIG_START)) { 1885 dev_info(&client->dev, "Enabling monitoring operations\n"); 1886 w83795_write(client, W83795_REG_CONFIG, 1887 config | W83795_REG_CONFIG_START); 1888 } 1889 1890 data->clkin = clkin[(config >> 3) & 0x3]; 1891 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin); 1892 } 1893 1894 static int w83795_get_device_id(struct i2c_client *client) 1895 { 1896 int device_id; 1897 1898 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID); 1899 1900 /* 1901 * Special case for rev. A chips; can't be checked first because later 1902 * revisions emulate this for compatibility 1903 */ 1904 if (device_id < 0 || (device_id & 0xf0) != 0x50) { 1905 int alt_id; 1906 1907 alt_id = i2c_smbus_read_byte_data(client, 1908 W83795_REG_DEVICEID_A); 1909 if (alt_id == 0x50) 1910 device_id = alt_id; 1911 } 1912 1913 return device_id; 1914 } 1915 1916 /* Return 0 if detection is successful, -ENODEV otherwise */ 1917 static int w83795_detect(struct i2c_client *client, 1918 struct i2c_board_info *info) 1919 { 1920 int bank, vendor_id, device_id, expected, i2c_addr, config; 1921 struct i2c_adapter *adapter = client->adapter; 1922 unsigned short address = client->addr; 1923 const char *chip_name; 1924 1925 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1926 return -ENODEV; 1927 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 1928 if (bank < 0 || (bank & 0x7c)) { 1929 dev_dbg(&adapter->dev, 1930 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1931 address, "bank"); 1932 return -ENODEV; 1933 } 1934 1935 /* Check Nuvoton vendor ID */ 1936 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID); 1937 expected = bank & 0x80 ? 0x5c : 0xa3; 1938 if (vendor_id != expected) { 1939 dev_dbg(&adapter->dev, 1940 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1941 address, "vendor id"); 1942 return -ENODEV; 1943 } 1944 1945 /* Check device ID */ 1946 device_id = w83795_get_device_id(client) | 1947 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8); 1948 if ((device_id >> 4) != 0x795) { 1949 dev_dbg(&adapter->dev, 1950 "w83795: Detection failed at addr 0x%02hx, check %s\n", 1951 address, "device id\n"); 1952 return -ENODEV; 1953 } 1954 1955 /* 1956 * If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR 1957 * should match 1958 */ 1959 if ((bank & 0x07) == 0) { 1960 i2c_addr = i2c_smbus_read_byte_data(client, 1961 W83795_REG_I2C_ADDR); 1962 if ((i2c_addr & 0x7f) != address) { 1963 dev_dbg(&adapter->dev, 1964 "w83795: Detection failed at addr 0x%02hx, " 1965 "check %s\n", address, "i2c addr"); 1966 return -ENODEV; 1967 } 1968 } 1969 1970 /* 1971 * Check 795 chip type: 795G or 795ADG 1972 * Usually we don't write to chips during detection, but here we don't 1973 * quite have the choice; hopefully it's OK, we are about to return 1974 * success anyway 1975 */ 1976 if ((bank & 0x07) != 0) 1977 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, 1978 bank & ~0x07); 1979 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG); 1980 if (config & W83795_REG_CONFIG_CONFIG48) 1981 chip_name = "w83795adg"; 1982 else 1983 chip_name = "w83795g"; 1984 1985 strlcpy(info->type, chip_name, I2C_NAME_SIZE); 1986 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name, 1987 'A' + (device_id & 0xf), address); 1988 1989 return 0; 1990 } 1991 1992 #ifdef CONFIG_SENSORS_W83795_FANCTRL 1993 #define NUM_PWM_ATTRIBUTES ARRAY_SIZE(w83795_pwm[0]) 1994 #define NUM_TEMP_ATTRIBUTES ARRAY_SIZE(w83795_temp[0]) 1995 #else 1996 #define NUM_PWM_ATTRIBUTES 4 1997 #define NUM_TEMP_ATTRIBUTES 8 1998 #endif 1999 2000 static int w83795_handle_files(struct device *dev, int (*fn)(struct device *, 2001 const struct device_attribute *)) 2002 { 2003 struct w83795_data *data = dev_get_drvdata(dev); 2004 int err, i, j; 2005 2006 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) { 2007 if (!(data->has_in & (1 << i))) 2008 continue; 2009 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) { 2010 if (j == 4 && !data->enable_beep) 2011 continue; 2012 err = fn(dev, &w83795_in[i][j].dev_attr); 2013 if (err) 2014 return err; 2015 } 2016 } 2017 2018 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) { 2019 if (!(data->has_fan & (1 << i))) 2020 continue; 2021 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) { 2022 if (j == 3 && !data->enable_beep) 2023 continue; 2024 err = fn(dev, &w83795_fan[i][j].dev_attr); 2025 if (err) 2026 return err; 2027 } 2028 } 2029 2030 for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) { 2031 j = w83795_tss_useful(data, i); 2032 if (!j) 2033 continue; 2034 err = fn(dev, &w83795_tss[i].dev_attr); 2035 if (err) 2036 return err; 2037 } 2038 2039 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { 2040 err = fn(dev, &sda_single_files[i].dev_attr); 2041 if (err) 2042 return err; 2043 } 2044 2045 if (data->enable_beep) { 2046 for (i = 0; i < ARRAY_SIZE(sda_beep_files); i++) { 2047 err = fn(dev, &sda_beep_files[i].dev_attr); 2048 if (err) 2049 return err; 2050 } 2051 } 2052 2053 for (i = 0; i < data->has_pwm; i++) { 2054 for (j = 0; j < NUM_PWM_ATTRIBUTES; j++) { 2055 err = fn(dev, &w83795_pwm[i][j].dev_attr); 2056 if (err) 2057 return err; 2058 } 2059 } 2060 2061 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) { 2062 if (!(data->has_temp & (1 << i))) 2063 continue; 2064 for (j = 0; j < NUM_TEMP_ATTRIBUTES; j++) { 2065 if (j == 7 && !data->enable_beep) 2066 continue; 2067 err = fn(dev, &w83795_temp[i][j].dev_attr); 2068 if (err) 2069 return err; 2070 } 2071 } 2072 2073 if (data->enable_dts) { 2074 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) { 2075 if (!(data->has_dts & (1 << i))) 2076 continue; 2077 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) { 2078 if (j == 7 && !data->enable_beep) 2079 continue; 2080 err = fn(dev, &w83795_dts[i][j].dev_attr); 2081 if (err) 2082 return err; 2083 } 2084 } 2085 } 2086 2087 return 0; 2088 } 2089 2090 /* We need a wrapper that fits in w83795_handle_files */ 2091 static int device_remove_file_wrapper(struct device *dev, 2092 const struct device_attribute *attr) 2093 { 2094 device_remove_file(dev, attr); 2095 return 0; 2096 } 2097 2098 static void w83795_check_dynamic_in_limits(struct i2c_client *client) 2099 { 2100 struct w83795_data *data = i2c_get_clientdata(client); 2101 u8 vid_ctl; 2102 int i, err_max, err_min; 2103 2104 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL); 2105 2106 /* Return immediately if VRM isn't configured */ 2107 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07) 2108 return; 2109 2110 data->has_dyn_in = (vid_ctl >> 3) & 0x07; 2111 for (i = 0; i < 2; i++) { 2112 if (!(data->has_dyn_in & (1 << i))) 2113 continue; 2114 2115 /* Voltage limits in dynamic mode, switch to read-only */ 2116 err_max = sysfs_chmod_file(&client->dev.kobj, 2117 &w83795_in[i][2].dev_attr.attr, 2118 S_IRUGO); 2119 err_min = sysfs_chmod_file(&client->dev.kobj, 2120 &w83795_in[i][3].dev_attr.attr, 2121 S_IRUGO); 2122 if (err_max || err_min) 2123 dev_warn(&client->dev, 2124 "Failed to set in%d limits read-only (%d, %d)\n", 2125 i, err_max, err_min); 2126 else 2127 dev_info(&client->dev, 2128 "in%d limits set dynamically from VID\n", i); 2129 } 2130 } 2131 2132 /* Check pins that can be used for either temperature or voltage monitoring */ 2133 static void w83795_apply_temp_config(struct w83795_data *data, u8 config, 2134 int temp_chan, int in_chan) 2135 { 2136 /* config is a 2-bit value */ 2137 switch (config) { 2138 case 0x2: /* Voltage monitoring */ 2139 data->has_in |= 1 << in_chan; 2140 break; 2141 case 0x1: /* Thermal diode */ 2142 if (temp_chan >= 4) 2143 break; 2144 data->temp_mode |= 1 << temp_chan; 2145 /* fall through */ 2146 case 0x3: /* Thermistor */ 2147 data->has_temp |= 1 << temp_chan; 2148 break; 2149 } 2150 } 2151 2152 static int w83795_probe(struct i2c_client *client, 2153 const struct i2c_device_id *id) 2154 { 2155 int i; 2156 u8 tmp; 2157 struct device *dev = &client->dev; 2158 struct w83795_data *data; 2159 int err; 2160 2161 data = devm_kzalloc(dev, sizeof(struct w83795_data), GFP_KERNEL); 2162 if (!data) 2163 return -ENOMEM; 2164 2165 i2c_set_clientdata(client, data); 2166 data->chip_type = id->driver_data; 2167 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); 2168 mutex_init(&data->update_lock); 2169 2170 /* Initialize the chip */ 2171 w83795_init_client(client); 2172 2173 /* Check which voltages and fans are present */ 2174 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1) 2175 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8); 2176 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1) 2177 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8); 2178 2179 /* Check which analog temperatures and extra voltages are present */ 2180 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); 2181 if (tmp & 0x20) 2182 data->enable_dts = 1; 2183 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16); 2184 w83795_apply_temp_config(data, tmp & 0x3, 4, 15); 2185 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); 2186 w83795_apply_temp_config(data, tmp >> 6, 3, 20); 2187 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19); 2188 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18); 2189 w83795_apply_temp_config(data, tmp & 0x3, 0, 17); 2190 2191 /* Check DTS enable status */ 2192 if (data->enable_dts) { 2193 if (1 & w83795_read(client, W83795_REG_DTSC)) 2194 data->enable_dts |= 2; 2195 data->has_dts = w83795_read(client, W83795_REG_DTSE); 2196 } 2197 2198 /* Report PECI Tbase values */ 2199 if (data->enable_dts == 1) { 2200 for (i = 0; i < 8; i++) { 2201 if (!(data->has_dts & (1 << i))) 2202 continue; 2203 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i)); 2204 dev_info(&client->dev, 2205 "PECI agent %d Tbase temperature: %u\n", 2206 i + 1, (unsigned int)tmp & 0x7f); 2207 } 2208 } 2209 2210 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f; 2211 2212 /* pwm and smart fan */ 2213 if (data->chip_type == w83795g) 2214 data->has_pwm = 8; 2215 else 2216 data->has_pwm = 2; 2217 2218 /* Check if BEEP pin is available */ 2219 if (data->chip_type == w83795g) { 2220 /* The W83795G has a dedicated BEEP pin */ 2221 data->enable_beep = 1; 2222 } else { 2223 /* 2224 * The W83795ADG has a shared pin for OVT# and BEEP, so you 2225 * can't have both 2226 */ 2227 tmp = w83795_read(client, W83795_REG_OVT_CFG); 2228 if ((tmp & OVT_CFG_SEL) == 0) 2229 data->enable_beep = 1; 2230 } 2231 2232 err = w83795_handle_files(dev, device_create_file); 2233 if (err) 2234 goto exit_remove; 2235 2236 if (data->chip_type == w83795g) 2237 w83795_check_dynamic_in_limits(client); 2238 2239 data->hwmon_dev = hwmon_device_register(dev); 2240 if (IS_ERR(data->hwmon_dev)) { 2241 err = PTR_ERR(data->hwmon_dev); 2242 goto exit_remove; 2243 } 2244 2245 return 0; 2246 2247 exit_remove: 2248 w83795_handle_files(dev, device_remove_file_wrapper); 2249 return err; 2250 } 2251 2252 static int w83795_remove(struct i2c_client *client) 2253 { 2254 struct w83795_data *data = i2c_get_clientdata(client); 2255 2256 hwmon_device_unregister(data->hwmon_dev); 2257 w83795_handle_files(&client->dev, device_remove_file_wrapper); 2258 2259 return 0; 2260 } 2261 2262 2263 static const struct i2c_device_id w83795_id[] = { 2264 { "w83795g", w83795g }, 2265 { "w83795adg", w83795adg }, 2266 { } 2267 }; 2268 MODULE_DEVICE_TABLE(i2c, w83795_id); 2269 2270 static struct i2c_driver w83795_driver = { 2271 .driver = { 2272 .name = "w83795", 2273 }, 2274 .probe = w83795_probe, 2275 .remove = w83795_remove, 2276 .id_table = w83795_id, 2277 2278 .class = I2C_CLASS_HWMON, 2279 .detect = w83795_detect, 2280 .address_list = normal_i2c, 2281 }; 2282 2283 module_i2c_driver(w83795_driver); 2284 2285 MODULE_AUTHOR("Wei Song, Jean Delvare <jdelvare@suse.de>"); 2286 MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver"); 2287 MODULE_LICENSE("GPL"); 2288