1 /* 2 * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware 3 * monitoring 4 * Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, 5 * Philip Edelbrock <phil@netroedge.com>, 6 * and Mark Studebaker <mdsxyz123@yahoo.com> 7 * Copyright (c) 2007 - 2008 Jean Delvare <jdelvare@suse.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 */ 23 24 /* 25 * Supports following chips: 26 * 27 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA 28 * as99127f 7 3 0 3 0x31 0x12c3 yes no 29 * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no 30 * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes 31 * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes 32 * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no 33 * 34 */ 35 36 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 37 38 #include <linux/module.h> 39 #include <linux/init.h> 40 #include <linux/slab.h> 41 #include <linux/jiffies.h> 42 #include <linux/i2c.h> 43 #include <linux/hwmon.h> 44 #include <linux/hwmon-vid.h> 45 #include <linux/hwmon-sysfs.h> 46 #include <linux/sysfs.h> 47 #include <linux/err.h> 48 #include <linux/mutex.h> 49 50 #ifdef CONFIG_ISA 51 #include <linux/platform_device.h> 52 #include <linux/ioport.h> 53 #include <linux/io.h> 54 #endif 55 56 #include "lm75.h" 57 58 /* Addresses to scan */ 59 static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 60 0x2e, 0x2f, I2C_CLIENT_END }; 61 62 enum chips { w83781d, w83782d, w83783s, as99127f }; 63 64 /* Insmod parameters */ 65 static unsigned short force_subclients[4]; 66 module_param_array(force_subclients, short, NULL, 0); 67 MODULE_PARM_DESC(force_subclients, 68 "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}"); 69 70 static bool reset; 71 module_param(reset, bool, 0); 72 MODULE_PARM_DESC(reset, "Set to one to reset chip on load"); 73 74 static bool init = 1; 75 module_param(init, bool, 0); 76 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); 77 78 /* Constants specified below */ 79 80 /* Length of ISA address segment */ 81 #define W83781D_EXTENT 8 82 83 /* Where are the ISA address/data registers relative to the base address */ 84 #define W83781D_ADDR_REG_OFFSET 5 85 #define W83781D_DATA_REG_OFFSET 6 86 87 /* The device registers */ 88 /* in nr from 0 to 8 */ 89 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ 90 (0x554 + (((nr) - 7) * 2))) 91 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ 92 (0x555 + (((nr) - 7) * 2))) 93 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ 94 (0x550 + (nr) - 7)) 95 96 /* fan nr from 0 to 2 */ 97 #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr)) 98 #define W83781D_REG_FAN(nr) (0x28 + (nr)) 99 100 #define W83781D_REG_BANK 0x4E 101 #define W83781D_REG_TEMP2_CONFIG 0x152 102 #define W83781D_REG_TEMP3_CONFIG 0x252 103 /* temp nr from 1 to 3 */ 104 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ 105 ((nr == 2) ? (0x0150) : \ 106 (0x27))) 107 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ 108 ((nr == 2) ? (0x153) : \ 109 (0x3A))) 110 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ 111 ((nr == 2) ? (0x155) : \ 112 (0x39))) 113 114 #define W83781D_REG_CONFIG 0x40 115 116 /* Interrupt status (W83781D, AS99127F) */ 117 #define W83781D_REG_ALARM1 0x41 118 #define W83781D_REG_ALARM2 0x42 119 120 /* Real-time status (W83782D, W83783S) */ 121 #define W83782D_REG_ALARM1 0x459 122 #define W83782D_REG_ALARM2 0x45A 123 #define W83782D_REG_ALARM3 0x45B 124 125 #define W83781D_REG_BEEP_CONFIG 0x4D 126 #define W83781D_REG_BEEP_INTS1 0x56 127 #define W83781D_REG_BEEP_INTS2 0x57 128 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ 129 130 #define W83781D_REG_VID_FANDIV 0x47 131 132 #define W83781D_REG_CHIPID 0x49 133 #define W83781D_REG_WCHIPID 0x58 134 #define W83781D_REG_CHIPMAN 0x4F 135 #define W83781D_REG_PIN 0x4B 136 137 /* 782D/783S only */ 138 #define W83781D_REG_VBAT 0x5D 139 140 /* PWM 782D (1-4) and 783S (1-2) only */ 141 static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F }; 142 #define W83781D_REG_PWMCLK12 0x5C 143 #define W83781D_REG_PWMCLK34 0x45C 144 145 #define W83781D_REG_I2C_ADDR 0x48 146 #define W83781D_REG_I2C_SUBADDR 0x4A 147 148 /* 149 * The following are undocumented in the data sheets however we 150 * received the information in an email from Winbond tech support 151 */ 152 /* Sensor selection - not on 781d */ 153 #define W83781D_REG_SCFG1 0x5D 154 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; 155 156 #define W83781D_REG_SCFG2 0x59 157 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; 158 159 #define W83781D_DEFAULT_BETA 3435 160 161 /* Conversions */ 162 #define IN_TO_REG(val) clamp_val(((val) + 8) / 16, 0, 255) 163 #define IN_FROM_REG(val) ((val) * 16) 164 165 static inline u8 166 FAN_TO_REG(long rpm, int div) 167 { 168 if (rpm == 0) 169 return 255; 170 rpm = clamp_val(rpm, 1, 1000000); 171 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); 172 } 173 174 static inline long 175 FAN_FROM_REG(u8 val, int div) 176 { 177 if (val == 0) 178 return -1; 179 if (val == 255) 180 return 0; 181 return 1350000 / (val * div); 182 } 183 184 #define TEMP_TO_REG(val) clamp_val((val) / 1000, -127, 128) 185 #define TEMP_FROM_REG(val) ((val) * 1000) 186 187 #define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \ 188 (~(val)) & 0x7fff : (val) & 0xff7fff) 189 #define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \ 190 (~(val)) & 0x7fff : (val) & 0xff7fff) 191 192 #define DIV_FROM_REG(val) (1 << (val)) 193 194 static inline u8 195 DIV_TO_REG(long val, enum chips type) 196 { 197 int i; 198 val = clamp_val(val, 1, 199 ((type == w83781d || type == as99127f) ? 8 : 128)) >> 1; 200 for (i = 0; i < 7; i++) { 201 if (val == 0) 202 break; 203 val >>= 1; 204 } 205 return i; 206 } 207 208 struct w83781d_data { 209 struct i2c_client *client; 210 struct device *hwmon_dev; 211 struct mutex lock; 212 enum chips type; 213 214 /* For ISA device only */ 215 const char *name; 216 int isa_addr; 217 218 struct mutex update_lock; 219 char valid; /* !=0 if following fields are valid */ 220 unsigned long last_updated; /* In jiffies */ 221 222 struct i2c_client *lm75[2]; /* for secondary I2C addresses */ 223 /* array of 2 pointers to subclients */ 224 225 u8 in[9]; /* Register value - 8 & 9 for 782D only */ 226 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ 227 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ 228 u8 fan[3]; /* Register value */ 229 u8 fan_min[3]; /* Register value */ 230 s8 temp; /* Register value */ 231 s8 temp_max; /* Register value */ 232 s8 temp_max_hyst; /* Register value */ 233 u16 temp_add[2]; /* Register value */ 234 u16 temp_max_add[2]; /* Register value */ 235 u16 temp_max_hyst_add[2]; /* Register value */ 236 u8 fan_div[3]; /* Register encoding, shifted right */ 237 u8 vid; /* Register encoding, combined */ 238 u32 alarms; /* Register encoding, combined */ 239 u32 beep_mask; /* Register encoding, combined */ 240 u8 pwm[4]; /* Register value */ 241 u8 pwm2_enable; /* Boolean */ 242 u16 sens[3]; /* 243 * 782D/783S only. 244 * 1 = pentium diode; 2 = 3904 diode; 245 * 4 = thermistor 246 */ 247 u8 vrm; 248 }; 249 250 static struct w83781d_data *w83781d_data_if_isa(void); 251 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid); 252 253 static int w83781d_read_value(struct w83781d_data *data, u16 reg); 254 static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value); 255 static struct w83781d_data *w83781d_update_device(struct device *dev); 256 static void w83781d_init_device(struct device *dev); 257 258 /* following are the sysfs callback functions */ 259 #define show_in_reg(reg) \ 260 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \ 261 char *buf) \ 262 { \ 263 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 264 struct w83781d_data *data = w83781d_update_device(dev); \ 265 return sprintf(buf, "%ld\n", \ 266 (long)IN_FROM_REG(data->reg[attr->index])); \ 267 } 268 show_in_reg(in); 269 show_in_reg(in_min); 270 show_in_reg(in_max); 271 272 #define store_in_reg(REG, reg) \ 273 static ssize_t store_in_##reg(struct device *dev, struct device_attribute \ 274 *da, const char *buf, size_t count) \ 275 { \ 276 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 277 struct w83781d_data *data = dev_get_drvdata(dev); \ 278 int nr = attr->index; \ 279 unsigned long val; \ 280 int err = kstrtoul(buf, 10, &val); \ 281 if (err) \ 282 return err; \ 283 mutex_lock(&data->update_lock); \ 284 data->in_##reg[nr] = IN_TO_REG(val); \ 285 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \ 286 data->in_##reg[nr]); \ 287 \ 288 mutex_unlock(&data->update_lock); \ 289 return count; \ 290 } 291 store_in_reg(MIN, min); 292 store_in_reg(MAX, max); 293 294 #define sysfs_in_offsets(offset) \ 295 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ 296 show_in, NULL, offset); \ 297 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \ 298 show_in_min, store_in_min, offset); \ 299 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \ 300 show_in_max, store_in_max, offset) 301 302 sysfs_in_offsets(0); 303 sysfs_in_offsets(1); 304 sysfs_in_offsets(2); 305 sysfs_in_offsets(3); 306 sysfs_in_offsets(4); 307 sysfs_in_offsets(5); 308 sysfs_in_offsets(6); 309 sysfs_in_offsets(7); 310 sysfs_in_offsets(8); 311 312 #define show_fan_reg(reg) \ 313 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \ 314 char *buf) \ 315 { \ 316 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 317 struct w83781d_data *data = w83781d_update_device(dev); \ 318 return sprintf(buf, "%ld\n", \ 319 FAN_FROM_REG(data->reg[attr->index], \ 320 DIV_FROM_REG(data->fan_div[attr->index]))); \ 321 } 322 show_fan_reg(fan); 323 show_fan_reg(fan_min); 324 325 static ssize_t 326 store_fan_min(struct device *dev, struct device_attribute *da, 327 const char *buf, size_t count) 328 { 329 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 330 struct w83781d_data *data = dev_get_drvdata(dev); 331 int nr = attr->index; 332 unsigned long val; 333 int err; 334 335 err = kstrtoul(buf, 10, &val); 336 if (err) 337 return err; 338 339 mutex_lock(&data->update_lock); 340 data->fan_min[nr] = 341 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); 342 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), 343 data->fan_min[nr]); 344 345 mutex_unlock(&data->update_lock); 346 return count; 347 } 348 349 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); 350 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, 351 show_fan_min, store_fan_min, 0); 352 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); 353 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, 354 show_fan_min, store_fan_min, 1); 355 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); 356 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, 357 show_fan_min, store_fan_min, 2); 358 359 #define show_temp_reg(reg) \ 360 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \ 361 char *buf) \ 362 { \ 363 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 364 struct w83781d_data *data = w83781d_update_device(dev); \ 365 int nr = attr->index; \ 366 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 367 return sprintf(buf, "%d\n", \ 368 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ 369 } else { /* TEMP1 */ \ 370 return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \ 371 } \ 372 } 373 show_temp_reg(temp); 374 show_temp_reg(temp_max); 375 show_temp_reg(temp_max_hyst); 376 377 #define store_temp_reg(REG, reg) \ 378 static ssize_t store_temp_##reg(struct device *dev, \ 379 struct device_attribute *da, const char *buf, size_t count) \ 380 { \ 381 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 382 struct w83781d_data *data = dev_get_drvdata(dev); \ 383 int nr = attr->index; \ 384 long val; \ 385 int err = kstrtol(buf, 10, &val); \ 386 if (err) \ 387 return err; \ 388 mutex_lock(&data->update_lock); \ 389 \ 390 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 391 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ 392 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ 393 data->temp_##reg##_add[nr-2]); \ 394 } else { /* TEMP1 */ \ 395 data->temp_##reg = TEMP_TO_REG(val); \ 396 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ 397 data->temp_##reg); \ 398 } \ 399 \ 400 mutex_unlock(&data->update_lock); \ 401 return count; \ 402 } 403 store_temp_reg(OVER, max); 404 store_temp_reg(HYST, max_hyst); 405 406 #define sysfs_temp_offsets(offset) \ 407 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \ 408 show_temp, NULL, offset); \ 409 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \ 410 show_temp_max, store_temp_max, offset); \ 411 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \ 412 show_temp_max_hyst, store_temp_max_hyst, offset); 413 414 sysfs_temp_offsets(1); 415 sysfs_temp_offsets(2); 416 sysfs_temp_offsets(3); 417 418 static ssize_t 419 cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf) 420 { 421 struct w83781d_data *data = w83781d_update_device(dev); 422 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); 423 } 424 425 static DEVICE_ATTR_RO(cpu0_vid); 426 427 static ssize_t 428 vrm_show(struct device *dev, struct device_attribute *attr, char *buf) 429 { 430 struct w83781d_data *data = dev_get_drvdata(dev); 431 return sprintf(buf, "%ld\n", (long) data->vrm); 432 } 433 434 static ssize_t 435 vrm_store(struct device *dev, struct device_attribute *attr, const char *buf, 436 size_t count) 437 { 438 struct w83781d_data *data = dev_get_drvdata(dev); 439 unsigned long val; 440 int err; 441 442 err = kstrtoul(buf, 10, &val); 443 if (err) 444 return err; 445 data->vrm = clamp_val(val, 0, 255); 446 447 return count; 448 } 449 450 static DEVICE_ATTR_RW(vrm); 451 452 static ssize_t 453 alarms_show(struct device *dev, struct device_attribute *attr, char *buf) 454 { 455 struct w83781d_data *data = w83781d_update_device(dev); 456 return sprintf(buf, "%u\n", data->alarms); 457 } 458 459 static DEVICE_ATTR_RO(alarms); 460 461 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, 462 char *buf) 463 { 464 struct w83781d_data *data = w83781d_update_device(dev); 465 int bitnr = to_sensor_dev_attr(attr)->index; 466 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); 467 } 468 469 /* The W83781D has a single alarm bit for temp2 and temp3 */ 470 static ssize_t show_temp3_alarm(struct device *dev, 471 struct device_attribute *attr, char *buf) 472 { 473 struct w83781d_data *data = w83781d_update_device(dev); 474 int bitnr = (data->type == w83781d) ? 5 : 13; 475 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); 476 } 477 478 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); 479 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); 480 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); 481 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); 482 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8); 483 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9); 484 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10); 485 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16); 486 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17); 487 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6); 488 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7); 489 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11); 490 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4); 491 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5); 492 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0); 493 494 static ssize_t beep_mask_show(struct device *dev, 495 struct device_attribute *attr, char *buf) 496 { 497 struct w83781d_data *data = w83781d_update_device(dev); 498 return sprintf(buf, "%ld\n", 499 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); 500 } 501 502 static ssize_t 503 beep_mask_store(struct device *dev, struct device_attribute *attr, 504 const char *buf, size_t count) 505 { 506 struct w83781d_data *data = dev_get_drvdata(dev); 507 unsigned long val; 508 int err; 509 510 err = kstrtoul(buf, 10, &val); 511 if (err) 512 return err; 513 514 mutex_lock(&data->update_lock); 515 data->beep_mask &= 0x8000; /* preserve beep enable */ 516 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type); 517 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, 518 data->beep_mask & 0xff); 519 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 520 (data->beep_mask >> 8) & 0xff); 521 if (data->type != w83781d && data->type != as99127f) { 522 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, 523 ((data->beep_mask) >> 16) & 0xff); 524 } 525 mutex_unlock(&data->update_lock); 526 527 return count; 528 } 529 530 static DEVICE_ATTR_RW(beep_mask); 531 532 static ssize_t show_beep(struct device *dev, struct device_attribute *attr, 533 char *buf) 534 { 535 struct w83781d_data *data = w83781d_update_device(dev); 536 int bitnr = to_sensor_dev_attr(attr)->index; 537 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); 538 } 539 540 static ssize_t 541 store_beep(struct device *dev, struct device_attribute *attr, 542 const char *buf, size_t count) 543 { 544 struct w83781d_data *data = dev_get_drvdata(dev); 545 int bitnr = to_sensor_dev_attr(attr)->index; 546 u8 reg; 547 unsigned long bit; 548 int err; 549 550 err = kstrtoul(buf, 10, &bit); 551 if (err) 552 return err; 553 554 if (bit & ~1) 555 return -EINVAL; 556 557 mutex_lock(&data->update_lock); 558 if (bit) 559 data->beep_mask |= (1 << bitnr); 560 else 561 data->beep_mask &= ~(1 << bitnr); 562 563 if (bitnr < 8) { 564 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1); 565 if (bit) 566 reg |= (1 << bitnr); 567 else 568 reg &= ~(1 << bitnr); 569 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg); 570 } else if (bitnr < 16) { 571 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); 572 if (bit) 573 reg |= (1 << (bitnr - 8)); 574 else 575 reg &= ~(1 << (bitnr - 8)); 576 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg); 577 } else { 578 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3); 579 if (bit) 580 reg |= (1 << (bitnr - 16)); 581 else 582 reg &= ~(1 << (bitnr - 16)); 583 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg); 584 } 585 mutex_unlock(&data->update_lock); 586 587 return count; 588 } 589 590 /* The W83781D has a single beep bit for temp2 and temp3 */ 591 static ssize_t show_temp3_beep(struct device *dev, 592 struct device_attribute *attr, char *buf) 593 { 594 struct w83781d_data *data = w83781d_update_device(dev); 595 int bitnr = (data->type == w83781d) ? 5 : 13; 596 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); 597 } 598 599 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, 600 show_beep, store_beep, 0); 601 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR, 602 show_beep, store_beep, 1); 603 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR, 604 show_beep, store_beep, 2); 605 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR, 606 show_beep, store_beep, 3); 607 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR, 608 show_beep, store_beep, 8); 609 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR, 610 show_beep, store_beep, 9); 611 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR, 612 show_beep, store_beep, 10); 613 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR, 614 show_beep, store_beep, 16); 615 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR, 616 show_beep, store_beep, 17); 617 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR, 618 show_beep, store_beep, 6); 619 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR, 620 show_beep, store_beep, 7); 621 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR, 622 show_beep, store_beep, 11); 623 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, 624 show_beep, store_beep, 4); 625 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR, 626 show_beep, store_beep, 5); 627 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, 628 show_temp3_beep, store_beep, 13); 629 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR, 630 show_beep, store_beep, 15); 631 632 static ssize_t 633 show_fan_div(struct device *dev, struct device_attribute *da, char *buf) 634 { 635 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 636 struct w83781d_data *data = w83781d_update_device(dev); 637 return sprintf(buf, "%ld\n", 638 (long) DIV_FROM_REG(data->fan_div[attr->index])); 639 } 640 641 /* 642 * Note: we save and restore the fan minimum here, because its value is 643 * determined in part by the fan divisor. This follows the principle of 644 * least surprise; the user doesn't expect the fan minimum to change just 645 * because the divisor changed. 646 */ 647 static ssize_t 648 store_fan_div(struct device *dev, struct device_attribute *da, 649 const char *buf, size_t count) 650 { 651 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 652 struct w83781d_data *data = dev_get_drvdata(dev); 653 unsigned long min; 654 int nr = attr->index; 655 u8 reg; 656 unsigned long val; 657 int err; 658 659 err = kstrtoul(buf, 10, &val); 660 if (err) 661 return err; 662 663 mutex_lock(&data->update_lock); 664 665 /* Save fan_min */ 666 min = FAN_FROM_REG(data->fan_min[nr], 667 DIV_FROM_REG(data->fan_div[nr])); 668 669 data->fan_div[nr] = DIV_TO_REG(val, data->type); 670 671 reg = (w83781d_read_value(data, nr == 2 ? 672 W83781D_REG_PIN : W83781D_REG_VID_FANDIV) 673 & (nr == 0 ? 0xcf : 0x3f)) 674 | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6)); 675 w83781d_write_value(data, nr == 2 ? 676 W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); 677 678 /* w83781d and as99127f don't have extended divisor bits */ 679 if (data->type != w83781d && data->type != as99127f) { 680 reg = (w83781d_read_value(data, W83781D_REG_VBAT) 681 & ~(1 << (5 + nr))) 682 | ((data->fan_div[nr] & 0x04) << (3 + nr)); 683 w83781d_write_value(data, W83781D_REG_VBAT, reg); 684 } 685 686 /* Restore fan_min */ 687 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 688 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]); 689 690 mutex_unlock(&data->update_lock); 691 return count; 692 } 693 694 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, 695 show_fan_div, store_fan_div, 0); 696 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, 697 show_fan_div, store_fan_div, 1); 698 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, 699 show_fan_div, store_fan_div, 2); 700 701 static ssize_t 702 show_pwm(struct device *dev, struct device_attribute *da, char *buf) 703 { 704 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 705 struct w83781d_data *data = w83781d_update_device(dev); 706 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]); 707 } 708 709 static ssize_t 710 pwm2_enable_show(struct device *dev, struct device_attribute *da, char *buf) 711 { 712 struct w83781d_data *data = w83781d_update_device(dev); 713 return sprintf(buf, "%d\n", (int)data->pwm2_enable); 714 } 715 716 static ssize_t 717 store_pwm(struct device *dev, struct device_attribute *da, const char *buf, 718 size_t count) 719 { 720 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 721 struct w83781d_data *data = dev_get_drvdata(dev); 722 int nr = attr->index; 723 unsigned long val; 724 int err; 725 726 err = kstrtoul(buf, 10, &val); 727 if (err) 728 return err; 729 730 mutex_lock(&data->update_lock); 731 data->pwm[nr] = clamp_val(val, 0, 255); 732 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]); 733 mutex_unlock(&data->update_lock); 734 return count; 735 } 736 737 static ssize_t 738 pwm2_enable_store(struct device *dev, struct device_attribute *da, 739 const char *buf, size_t count) 740 { 741 struct w83781d_data *data = dev_get_drvdata(dev); 742 unsigned long val; 743 u32 reg; 744 int err; 745 746 err = kstrtoul(buf, 10, &val); 747 if (err) 748 return err; 749 750 mutex_lock(&data->update_lock); 751 752 switch (val) { 753 case 0: 754 case 1: 755 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12); 756 w83781d_write_value(data, W83781D_REG_PWMCLK12, 757 (reg & 0xf7) | (val << 3)); 758 759 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); 760 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, 761 (reg & 0xef) | (!val << 4)); 762 763 data->pwm2_enable = val; 764 break; 765 766 default: 767 mutex_unlock(&data->update_lock); 768 return -EINVAL; 769 } 770 771 mutex_unlock(&data->update_lock); 772 return count; 773 } 774 775 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0); 776 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1); 777 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2); 778 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3); 779 /* only PWM2 can be enabled/disabled */ 780 static DEVICE_ATTR_RW(pwm2_enable); 781 782 static ssize_t 783 show_sensor(struct device *dev, struct device_attribute *da, char *buf) 784 { 785 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 786 struct w83781d_data *data = w83781d_update_device(dev); 787 return sprintf(buf, "%d\n", (int)data->sens[attr->index]); 788 } 789 790 static ssize_t 791 store_sensor(struct device *dev, struct device_attribute *da, 792 const char *buf, size_t count) 793 { 794 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 795 struct w83781d_data *data = dev_get_drvdata(dev); 796 int nr = attr->index; 797 unsigned long val; 798 u32 tmp; 799 int err; 800 801 err = kstrtoul(buf, 10, &val); 802 if (err) 803 return err; 804 805 mutex_lock(&data->update_lock); 806 807 switch (val) { 808 case 1: /* PII/Celeron diode */ 809 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 810 w83781d_write_value(data, W83781D_REG_SCFG1, 811 tmp | BIT_SCFG1[nr]); 812 tmp = w83781d_read_value(data, W83781D_REG_SCFG2); 813 w83781d_write_value(data, W83781D_REG_SCFG2, 814 tmp | BIT_SCFG2[nr]); 815 data->sens[nr] = val; 816 break; 817 case 2: /* 3904 */ 818 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 819 w83781d_write_value(data, W83781D_REG_SCFG1, 820 tmp | BIT_SCFG1[nr]); 821 tmp = w83781d_read_value(data, W83781D_REG_SCFG2); 822 w83781d_write_value(data, W83781D_REG_SCFG2, 823 tmp & ~BIT_SCFG2[nr]); 824 data->sens[nr] = val; 825 break; 826 case W83781D_DEFAULT_BETA: 827 dev_warn(dev, 828 "Sensor type %d is deprecated, please use 4 instead\n", 829 W83781D_DEFAULT_BETA); 830 /* fall through */ 831 case 4: /* thermistor */ 832 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 833 w83781d_write_value(data, W83781D_REG_SCFG1, 834 tmp & ~BIT_SCFG1[nr]); 835 data->sens[nr] = val; 836 break; 837 default: 838 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n", 839 (long) val); 840 break; 841 } 842 843 mutex_unlock(&data->update_lock); 844 return count; 845 } 846 847 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, 848 show_sensor, store_sensor, 0); 849 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, 850 show_sensor, store_sensor, 1); 851 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, 852 show_sensor, store_sensor, 2); 853 854 /* 855 * Assumes that adapter is of I2C, not ISA variety. 856 * OTHERWISE DON'T CALL THIS 857 */ 858 static int 859 w83781d_detect_subclients(struct i2c_client *new_client) 860 { 861 int i, val1 = 0, id; 862 int err; 863 int address = new_client->addr; 864 unsigned short sc_addr[2]; 865 struct i2c_adapter *adapter = new_client->adapter; 866 struct w83781d_data *data = i2c_get_clientdata(new_client); 867 enum chips kind = data->type; 868 int num_sc = 1; 869 870 id = i2c_adapter_id(adapter); 871 872 if (force_subclients[0] == id && force_subclients[1] == address) { 873 for (i = 2; i <= 3; i++) { 874 if (force_subclients[i] < 0x48 || 875 force_subclients[i] > 0x4f) { 876 dev_err(&new_client->dev, 877 "Invalid subclient address %d; must be 0x48-0x4f\n", 878 force_subclients[i]); 879 err = -EINVAL; 880 goto ERROR_SC_1; 881 } 882 } 883 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR, 884 (force_subclients[2] & 0x07) | 885 ((force_subclients[3] & 0x07) << 4)); 886 sc_addr[0] = force_subclients[2]; 887 } else { 888 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR); 889 sc_addr[0] = 0x48 + (val1 & 0x07); 890 } 891 892 if (kind != w83783s) { 893 num_sc = 2; 894 if (force_subclients[0] == id && 895 force_subclients[1] == address) { 896 sc_addr[1] = force_subclients[3]; 897 } else { 898 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07); 899 } 900 if (sc_addr[0] == sc_addr[1]) { 901 dev_err(&new_client->dev, 902 "Duplicate addresses 0x%x for subclients.\n", 903 sc_addr[0]); 904 err = -EBUSY; 905 goto ERROR_SC_2; 906 } 907 } 908 909 for (i = 0; i < num_sc; i++) { 910 data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]); 911 if (!data->lm75[i]) { 912 dev_err(&new_client->dev, 913 "Subclient %d registration at address 0x%x failed.\n", 914 i, sc_addr[i]); 915 err = -ENOMEM; 916 if (i == 1) 917 goto ERROR_SC_3; 918 goto ERROR_SC_2; 919 } 920 } 921 922 return 0; 923 924 /* Undo inits in case of errors */ 925 ERROR_SC_3: 926 i2c_unregister_device(data->lm75[0]); 927 ERROR_SC_2: 928 ERROR_SC_1: 929 return err; 930 } 931 932 #define IN_UNIT_ATTRS(X) \ 933 &sensor_dev_attr_in##X##_input.dev_attr.attr, \ 934 &sensor_dev_attr_in##X##_min.dev_attr.attr, \ 935 &sensor_dev_attr_in##X##_max.dev_attr.attr, \ 936 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \ 937 &sensor_dev_attr_in##X##_beep.dev_attr.attr 938 939 #define FAN_UNIT_ATTRS(X) \ 940 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \ 941 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \ 942 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \ 943 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \ 944 &sensor_dev_attr_fan##X##_beep.dev_attr.attr 945 946 #define TEMP_UNIT_ATTRS(X) \ 947 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \ 948 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \ 949 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \ 950 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \ 951 &sensor_dev_attr_temp##X##_beep.dev_attr.attr 952 953 static struct attribute *w83781d_attributes[] = { 954 IN_UNIT_ATTRS(0), 955 IN_UNIT_ATTRS(2), 956 IN_UNIT_ATTRS(3), 957 IN_UNIT_ATTRS(4), 958 IN_UNIT_ATTRS(5), 959 IN_UNIT_ATTRS(6), 960 FAN_UNIT_ATTRS(1), 961 FAN_UNIT_ATTRS(2), 962 FAN_UNIT_ATTRS(3), 963 TEMP_UNIT_ATTRS(1), 964 TEMP_UNIT_ATTRS(2), 965 &dev_attr_cpu0_vid.attr, 966 &dev_attr_vrm.attr, 967 &dev_attr_alarms.attr, 968 &dev_attr_beep_mask.attr, 969 &sensor_dev_attr_beep_enable.dev_attr.attr, 970 NULL 971 }; 972 static const struct attribute_group w83781d_group = { 973 .attrs = w83781d_attributes, 974 }; 975 976 static struct attribute *w83781d_attributes_in1[] = { 977 IN_UNIT_ATTRS(1), 978 NULL 979 }; 980 static const struct attribute_group w83781d_group_in1 = { 981 .attrs = w83781d_attributes_in1, 982 }; 983 984 static struct attribute *w83781d_attributes_in78[] = { 985 IN_UNIT_ATTRS(7), 986 IN_UNIT_ATTRS(8), 987 NULL 988 }; 989 static const struct attribute_group w83781d_group_in78 = { 990 .attrs = w83781d_attributes_in78, 991 }; 992 993 static struct attribute *w83781d_attributes_temp3[] = { 994 TEMP_UNIT_ATTRS(3), 995 NULL 996 }; 997 static const struct attribute_group w83781d_group_temp3 = { 998 .attrs = w83781d_attributes_temp3, 999 }; 1000 1001 static struct attribute *w83781d_attributes_pwm12[] = { 1002 &sensor_dev_attr_pwm1.dev_attr.attr, 1003 &sensor_dev_attr_pwm2.dev_attr.attr, 1004 &dev_attr_pwm2_enable.attr, 1005 NULL 1006 }; 1007 static const struct attribute_group w83781d_group_pwm12 = { 1008 .attrs = w83781d_attributes_pwm12, 1009 }; 1010 1011 static struct attribute *w83781d_attributes_pwm34[] = { 1012 &sensor_dev_attr_pwm3.dev_attr.attr, 1013 &sensor_dev_attr_pwm4.dev_attr.attr, 1014 NULL 1015 }; 1016 static const struct attribute_group w83781d_group_pwm34 = { 1017 .attrs = w83781d_attributes_pwm34, 1018 }; 1019 1020 static struct attribute *w83781d_attributes_other[] = { 1021 &sensor_dev_attr_temp1_type.dev_attr.attr, 1022 &sensor_dev_attr_temp2_type.dev_attr.attr, 1023 &sensor_dev_attr_temp3_type.dev_attr.attr, 1024 NULL 1025 }; 1026 static const struct attribute_group w83781d_group_other = { 1027 .attrs = w83781d_attributes_other, 1028 }; 1029 1030 /* No clean up is done on error, it's up to the caller */ 1031 static int 1032 w83781d_create_files(struct device *dev, int kind, int is_isa) 1033 { 1034 int err; 1035 1036 err = sysfs_create_group(&dev->kobj, &w83781d_group); 1037 if (err) 1038 return err; 1039 1040 if (kind != w83783s) { 1041 err = sysfs_create_group(&dev->kobj, &w83781d_group_in1); 1042 if (err) 1043 return err; 1044 } 1045 if (kind != as99127f && kind != w83781d && kind != w83783s) { 1046 err = sysfs_create_group(&dev->kobj, &w83781d_group_in78); 1047 if (err) 1048 return err; 1049 } 1050 if (kind != w83783s) { 1051 err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3); 1052 if (err) 1053 return err; 1054 1055 if (kind != w83781d) { 1056 err = sysfs_chmod_file(&dev->kobj, 1057 &sensor_dev_attr_temp3_alarm.dev_attr.attr, 1058 S_IRUGO | S_IWUSR); 1059 if (err) 1060 return err; 1061 } 1062 } 1063 1064 if (kind != w83781d && kind != as99127f) { 1065 err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12); 1066 if (err) 1067 return err; 1068 } 1069 if (kind == w83782d && !is_isa) { 1070 err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34); 1071 if (err) 1072 return err; 1073 } 1074 1075 if (kind != as99127f && kind != w83781d) { 1076 err = device_create_file(dev, 1077 &sensor_dev_attr_temp1_type.dev_attr); 1078 if (err) 1079 return err; 1080 err = device_create_file(dev, 1081 &sensor_dev_attr_temp2_type.dev_attr); 1082 if (err) 1083 return err; 1084 if (kind != w83783s) { 1085 err = device_create_file(dev, 1086 &sensor_dev_attr_temp3_type.dev_attr); 1087 if (err) 1088 return err; 1089 } 1090 } 1091 1092 return 0; 1093 } 1094 1095 /* Return 0 if detection is successful, -ENODEV otherwise */ 1096 static int 1097 w83781d_detect(struct i2c_client *client, struct i2c_board_info *info) 1098 { 1099 int val1, val2; 1100 struct w83781d_data *isa = w83781d_data_if_isa(); 1101 struct i2c_adapter *adapter = client->adapter; 1102 int address = client->addr; 1103 const char *client_name; 1104 enum vendor { winbond, asus } vendid; 1105 1106 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1107 return -ENODEV; 1108 1109 /* 1110 * We block updates of the ISA device to minimize the risk of 1111 * concurrent access to the same W83781D chip through different 1112 * interfaces. 1113 */ 1114 if (isa) 1115 mutex_lock(&isa->update_lock); 1116 1117 if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) { 1118 dev_dbg(&adapter->dev, 1119 "Detection of w83781d chip failed at step 3\n"); 1120 goto err_nodev; 1121 } 1122 1123 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK); 1124 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); 1125 /* Check for Winbond or Asus ID if in bank 0 */ 1126 if (!(val1 & 0x07) && 1127 ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) || 1128 ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) { 1129 dev_dbg(&adapter->dev, 1130 "Detection of w83781d chip failed at step 4\n"); 1131 goto err_nodev; 1132 } 1133 /* 1134 * If Winbond SMBus, check address at 0x48. 1135 * Asus doesn't support, except for as99127f rev.2 1136 */ 1137 if ((!(val1 & 0x80) && val2 == 0xa3) || 1138 ((val1 & 0x80) && val2 == 0x5c)) { 1139 if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR) 1140 != address) { 1141 dev_dbg(&adapter->dev, 1142 "Detection of w83781d chip failed at step 5\n"); 1143 goto err_nodev; 1144 } 1145 } 1146 1147 /* Put it now into bank 0 and Vendor ID High Byte */ 1148 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1149 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK) 1150 & 0x78) | 0x80); 1151 1152 /* Get the vendor ID */ 1153 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); 1154 if (val2 == 0x5c) 1155 vendid = winbond; 1156 else if (val2 == 0x12) 1157 vendid = asus; 1158 else { 1159 dev_dbg(&adapter->dev, 1160 "w83781d chip vendor is neither Winbond nor Asus\n"); 1161 goto err_nodev; 1162 } 1163 1164 /* Determine the chip type. */ 1165 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID); 1166 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) 1167 client_name = "w83781d"; 1168 else if (val1 == 0x30 && vendid == winbond) 1169 client_name = "w83782d"; 1170 else if (val1 == 0x40 && vendid == winbond && address == 0x2d) 1171 client_name = "w83783s"; 1172 else if (val1 == 0x31) 1173 client_name = "as99127f"; 1174 else 1175 goto err_nodev; 1176 1177 if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) { 1178 dev_dbg(&adapter->dev, 1179 "Device at 0x%02x appears to be the same as ISA device\n", 1180 address); 1181 goto err_nodev; 1182 } 1183 1184 if (isa) 1185 mutex_unlock(&isa->update_lock); 1186 1187 strlcpy(info->type, client_name, I2C_NAME_SIZE); 1188 1189 return 0; 1190 1191 err_nodev: 1192 if (isa) 1193 mutex_unlock(&isa->update_lock); 1194 return -ENODEV; 1195 } 1196 1197 static void w83781d_remove_files(struct device *dev) 1198 { 1199 sysfs_remove_group(&dev->kobj, &w83781d_group); 1200 sysfs_remove_group(&dev->kobj, &w83781d_group_in1); 1201 sysfs_remove_group(&dev->kobj, &w83781d_group_in78); 1202 sysfs_remove_group(&dev->kobj, &w83781d_group_temp3); 1203 sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12); 1204 sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34); 1205 sysfs_remove_group(&dev->kobj, &w83781d_group_other); 1206 } 1207 1208 static int 1209 w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id) 1210 { 1211 struct device *dev = &client->dev; 1212 struct w83781d_data *data; 1213 int err; 1214 1215 data = devm_kzalloc(dev, sizeof(struct w83781d_data), GFP_KERNEL); 1216 if (!data) 1217 return -ENOMEM; 1218 1219 i2c_set_clientdata(client, data); 1220 mutex_init(&data->lock); 1221 mutex_init(&data->update_lock); 1222 1223 data->type = id->driver_data; 1224 data->client = client; 1225 1226 /* attach secondary i2c lm75-like clients */ 1227 err = w83781d_detect_subclients(client); 1228 if (err) 1229 return err; 1230 1231 /* Initialize the chip */ 1232 w83781d_init_device(dev); 1233 1234 /* Register sysfs hooks */ 1235 err = w83781d_create_files(dev, data->type, 0); 1236 if (err) 1237 goto exit_remove_files; 1238 1239 data->hwmon_dev = hwmon_device_register(dev); 1240 if (IS_ERR(data->hwmon_dev)) { 1241 err = PTR_ERR(data->hwmon_dev); 1242 goto exit_remove_files; 1243 } 1244 1245 return 0; 1246 1247 exit_remove_files: 1248 w83781d_remove_files(dev); 1249 i2c_unregister_device(data->lm75[0]); 1250 i2c_unregister_device(data->lm75[1]); 1251 return err; 1252 } 1253 1254 static int 1255 w83781d_remove(struct i2c_client *client) 1256 { 1257 struct w83781d_data *data = i2c_get_clientdata(client); 1258 struct device *dev = &client->dev; 1259 1260 hwmon_device_unregister(data->hwmon_dev); 1261 w83781d_remove_files(dev); 1262 1263 i2c_unregister_device(data->lm75[0]); 1264 i2c_unregister_device(data->lm75[1]); 1265 1266 return 0; 1267 } 1268 1269 static int 1270 w83781d_read_value_i2c(struct w83781d_data *data, u16 reg) 1271 { 1272 struct i2c_client *client = data->client; 1273 int res, bank; 1274 struct i2c_client *cl; 1275 1276 bank = (reg >> 8) & 0x0f; 1277 if (bank > 2) 1278 /* switch banks */ 1279 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1280 bank); 1281 if (bank == 0 || bank > 2) { 1282 res = i2c_smbus_read_byte_data(client, reg & 0xff); 1283 } else { 1284 /* switch to subclient */ 1285 cl = data->lm75[bank - 1]; 1286 /* convert from ISA to LM75 I2C addresses */ 1287 switch (reg & 0xff) { 1288 case 0x50: /* TEMP */ 1289 res = i2c_smbus_read_word_swapped(cl, 0); 1290 break; 1291 case 0x52: /* CONFIG */ 1292 res = i2c_smbus_read_byte_data(cl, 1); 1293 break; 1294 case 0x53: /* HYST */ 1295 res = i2c_smbus_read_word_swapped(cl, 2); 1296 break; 1297 case 0x55: /* OVER */ 1298 default: 1299 res = i2c_smbus_read_word_swapped(cl, 3); 1300 break; 1301 } 1302 } 1303 if (bank > 2) 1304 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1305 1306 return res; 1307 } 1308 1309 static int 1310 w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value) 1311 { 1312 struct i2c_client *client = data->client; 1313 int bank; 1314 struct i2c_client *cl; 1315 1316 bank = (reg >> 8) & 0x0f; 1317 if (bank > 2) 1318 /* switch banks */ 1319 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1320 bank); 1321 if (bank == 0 || bank > 2) { 1322 i2c_smbus_write_byte_data(client, reg & 0xff, 1323 value & 0xff); 1324 } else { 1325 /* switch to subclient */ 1326 cl = data->lm75[bank - 1]; 1327 /* convert from ISA to LM75 I2C addresses */ 1328 switch (reg & 0xff) { 1329 case 0x52: /* CONFIG */ 1330 i2c_smbus_write_byte_data(cl, 1, value & 0xff); 1331 break; 1332 case 0x53: /* HYST */ 1333 i2c_smbus_write_word_swapped(cl, 2, value); 1334 break; 1335 case 0x55: /* OVER */ 1336 i2c_smbus_write_word_swapped(cl, 3, value); 1337 break; 1338 } 1339 } 1340 if (bank > 2) 1341 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1342 1343 return 0; 1344 } 1345 1346 static void 1347 w83781d_init_device(struct device *dev) 1348 { 1349 struct w83781d_data *data = dev_get_drvdata(dev); 1350 int i, p; 1351 int type = data->type; 1352 u8 tmp; 1353 1354 if (reset && type != as99127f) { /* 1355 * this resets registers we don't have 1356 * documentation for on the as99127f 1357 */ 1358 /* 1359 * Resetting the chip has been the default for a long time, 1360 * but it causes the BIOS initializations (fan clock dividers, 1361 * thermal sensor types...) to be lost, so it is now optional. 1362 * It might even go away if nobody reports it as being useful, 1363 * as I see very little reason why this would be needed at 1364 * all. 1365 */ 1366 dev_info(dev, 1367 "If reset=1 solved a problem you were having, please report!\n"); 1368 1369 /* save these registers */ 1370 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); 1371 p = w83781d_read_value(data, W83781D_REG_PWMCLK12); 1372 /* 1373 * Reset all except Watchdog values and last conversion values 1374 * This sets fan-divs to 2, among others 1375 */ 1376 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80); 1377 /* 1378 * Restore the registers and disable power-on abnormal beep. 1379 * This saves FAN 1/2/3 input/output values set by BIOS. 1380 */ 1381 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); 1382 w83781d_write_value(data, W83781D_REG_PWMCLK12, p); 1383 /* 1384 * Disable master beep-enable (reset turns it on). 1385 * Individual beep_mask should be reset to off but for some 1386 * reason disabling this bit helps some people not get beeped 1387 */ 1388 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0); 1389 } 1390 1391 /* 1392 * Disable power-on abnormal beep, as advised by the datasheet. 1393 * Already done if reset=1. 1394 */ 1395 if (init && !reset && type != as99127f) { 1396 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); 1397 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); 1398 } 1399 1400 data->vrm = vid_which_vrm(); 1401 1402 if ((type != w83781d) && (type != as99127f)) { 1403 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 1404 for (i = 1; i <= 3; i++) { 1405 if (!(tmp & BIT_SCFG1[i - 1])) { 1406 data->sens[i - 1] = 4; 1407 } else { 1408 if (w83781d_read_value 1409 (data, 1410 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) 1411 data->sens[i - 1] = 1; 1412 else 1413 data->sens[i - 1] = 2; 1414 } 1415 if (type == w83783s && i == 2) 1416 break; 1417 } 1418 } 1419 1420 if (init && type != as99127f) { 1421 /* Enable temp2 */ 1422 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG); 1423 if (tmp & 0x01) { 1424 dev_warn(dev, 1425 "Enabling temp2, readings might not make sense\n"); 1426 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG, 1427 tmp & 0xfe); 1428 } 1429 1430 /* Enable temp3 */ 1431 if (type != w83783s) { 1432 tmp = w83781d_read_value(data, 1433 W83781D_REG_TEMP3_CONFIG); 1434 if (tmp & 0x01) { 1435 dev_warn(dev, 1436 "Enabling temp3, readings might not make sense\n"); 1437 w83781d_write_value(data, 1438 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); 1439 } 1440 } 1441 } 1442 1443 /* Start monitoring */ 1444 w83781d_write_value(data, W83781D_REG_CONFIG, 1445 (w83781d_read_value(data, 1446 W83781D_REG_CONFIG) & 0xf7) 1447 | 0x01); 1448 1449 /* A few vars need to be filled upon startup */ 1450 for (i = 0; i < 3; i++) { 1451 data->fan_min[i] = w83781d_read_value(data, 1452 W83781D_REG_FAN_MIN(i)); 1453 } 1454 1455 mutex_init(&data->update_lock); 1456 } 1457 1458 static struct w83781d_data *w83781d_update_device(struct device *dev) 1459 { 1460 struct w83781d_data *data = dev_get_drvdata(dev); 1461 struct i2c_client *client = data->client; 1462 int i; 1463 1464 mutex_lock(&data->update_lock); 1465 1466 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1467 || !data->valid) { 1468 dev_dbg(dev, "Starting device update\n"); 1469 1470 for (i = 0; i <= 8; i++) { 1471 if (data->type == w83783s && i == 1) 1472 continue; /* 783S has no in1 */ 1473 data->in[i] = 1474 w83781d_read_value(data, W83781D_REG_IN(i)); 1475 data->in_min[i] = 1476 w83781d_read_value(data, W83781D_REG_IN_MIN(i)); 1477 data->in_max[i] = 1478 w83781d_read_value(data, W83781D_REG_IN_MAX(i)); 1479 if ((data->type != w83782d) && (i == 6)) 1480 break; 1481 } 1482 for (i = 0; i < 3; i++) { 1483 data->fan[i] = 1484 w83781d_read_value(data, W83781D_REG_FAN(i)); 1485 data->fan_min[i] = 1486 w83781d_read_value(data, W83781D_REG_FAN_MIN(i)); 1487 } 1488 if (data->type != w83781d && data->type != as99127f) { 1489 for (i = 0; i < 4; i++) { 1490 data->pwm[i] = 1491 w83781d_read_value(data, 1492 W83781D_REG_PWM[i]); 1493 /* Only W83782D on SMBus has PWM3 and PWM4 */ 1494 if ((data->type != w83782d || !client) 1495 && i == 1) 1496 break; 1497 } 1498 /* Only PWM2 can be disabled */ 1499 data->pwm2_enable = (w83781d_read_value(data, 1500 W83781D_REG_PWMCLK12) & 0x08) >> 3; 1501 } 1502 1503 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1)); 1504 data->temp_max = 1505 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1)); 1506 data->temp_max_hyst = 1507 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1)); 1508 data->temp_add[0] = 1509 w83781d_read_value(data, W83781D_REG_TEMP(2)); 1510 data->temp_max_add[0] = 1511 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2)); 1512 data->temp_max_hyst_add[0] = 1513 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2)); 1514 if (data->type != w83783s) { 1515 data->temp_add[1] = 1516 w83781d_read_value(data, W83781D_REG_TEMP(3)); 1517 data->temp_max_add[1] = 1518 w83781d_read_value(data, 1519 W83781D_REG_TEMP_OVER(3)); 1520 data->temp_max_hyst_add[1] = 1521 w83781d_read_value(data, 1522 W83781D_REG_TEMP_HYST(3)); 1523 } 1524 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV); 1525 data->vid = i & 0x0f; 1526 data->vid |= (w83781d_read_value(data, 1527 W83781D_REG_CHIPID) & 0x01) << 4; 1528 data->fan_div[0] = (i >> 4) & 0x03; 1529 data->fan_div[1] = (i >> 6) & 0x03; 1530 data->fan_div[2] = (w83781d_read_value(data, 1531 W83781D_REG_PIN) >> 6) & 0x03; 1532 if ((data->type != w83781d) && (data->type != as99127f)) { 1533 i = w83781d_read_value(data, W83781D_REG_VBAT); 1534 data->fan_div[0] |= (i >> 3) & 0x04; 1535 data->fan_div[1] |= (i >> 4) & 0x04; 1536 data->fan_div[2] |= (i >> 5) & 0x04; 1537 } 1538 if (data->type == w83782d) { 1539 data->alarms = w83781d_read_value(data, 1540 W83782D_REG_ALARM1) 1541 | (w83781d_read_value(data, 1542 W83782D_REG_ALARM2) << 8) 1543 | (w83781d_read_value(data, 1544 W83782D_REG_ALARM3) << 16); 1545 } else if (data->type == w83783s) { 1546 data->alarms = w83781d_read_value(data, 1547 W83782D_REG_ALARM1) 1548 | (w83781d_read_value(data, 1549 W83782D_REG_ALARM2) << 8); 1550 } else { 1551 /* 1552 * No real-time status registers, fall back to 1553 * interrupt status registers 1554 */ 1555 data->alarms = w83781d_read_value(data, 1556 W83781D_REG_ALARM1) 1557 | (w83781d_read_value(data, 1558 W83781D_REG_ALARM2) << 8); 1559 } 1560 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); 1561 data->beep_mask = (i << 8) + 1562 w83781d_read_value(data, W83781D_REG_BEEP_INTS1); 1563 if ((data->type != w83781d) && (data->type != as99127f)) { 1564 data->beep_mask |= 1565 w83781d_read_value(data, 1566 W83781D_REG_BEEP_INTS3) << 16; 1567 } 1568 data->last_updated = jiffies; 1569 data->valid = 1; 1570 } 1571 1572 mutex_unlock(&data->update_lock); 1573 1574 return data; 1575 } 1576 1577 static const struct i2c_device_id w83781d_ids[] = { 1578 { "w83781d", w83781d, }, 1579 { "w83782d", w83782d, }, 1580 { "w83783s", w83783s, }, 1581 { "as99127f", as99127f }, 1582 { /* LIST END */ } 1583 }; 1584 MODULE_DEVICE_TABLE(i2c, w83781d_ids); 1585 1586 static struct i2c_driver w83781d_driver = { 1587 .class = I2C_CLASS_HWMON, 1588 .driver = { 1589 .name = "w83781d", 1590 }, 1591 .probe = w83781d_probe, 1592 .remove = w83781d_remove, 1593 .id_table = w83781d_ids, 1594 .detect = w83781d_detect, 1595 .address_list = normal_i2c, 1596 }; 1597 1598 /* 1599 * ISA related code 1600 */ 1601 #ifdef CONFIG_ISA 1602 1603 /* ISA device, if found */ 1604 static struct platform_device *pdev; 1605 1606 static unsigned short isa_address = 0x290; 1607 1608 /* 1609 * I2C devices get this name attribute automatically, but for ISA devices 1610 * we must create it by ourselves. 1611 */ 1612 static ssize_t 1613 name_show(struct device *dev, struct device_attribute *devattr, char *buf) 1614 { 1615 struct w83781d_data *data = dev_get_drvdata(dev); 1616 return sprintf(buf, "%s\n", data->name); 1617 } 1618 static DEVICE_ATTR_RO(name); 1619 1620 static struct w83781d_data *w83781d_data_if_isa(void) 1621 { 1622 return pdev ? platform_get_drvdata(pdev) : NULL; 1623 } 1624 1625 /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */ 1626 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid) 1627 { 1628 struct w83781d_data *isa; 1629 int i; 1630 1631 if (!pdev) /* No ISA chip */ 1632 return 0; 1633 1634 isa = platform_get_drvdata(pdev); 1635 1636 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr) 1637 return 0; /* Address doesn't match */ 1638 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid) 1639 return 0; /* Chip type doesn't match */ 1640 1641 /* 1642 * We compare all the limit registers, the config register and the 1643 * interrupt mask registers 1644 */ 1645 for (i = 0x2b; i <= 0x3d; i++) { 1646 if (w83781d_read_value(isa, i) != 1647 i2c_smbus_read_byte_data(client, i)) 1648 return 0; 1649 } 1650 if (w83781d_read_value(isa, W83781D_REG_CONFIG) != 1651 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG)) 1652 return 0; 1653 for (i = 0x43; i <= 0x46; i++) { 1654 if (w83781d_read_value(isa, i) != 1655 i2c_smbus_read_byte_data(client, i)) 1656 return 0; 1657 } 1658 1659 return 1; 1660 } 1661 1662 static int 1663 w83781d_read_value_isa(struct w83781d_data *data, u16 reg) 1664 { 1665 int word_sized, res; 1666 1667 word_sized = (((reg & 0xff00) == 0x100) 1668 || ((reg & 0xff00) == 0x200)) 1669 && (((reg & 0x00ff) == 0x50) 1670 || ((reg & 0x00ff) == 0x53) 1671 || ((reg & 0x00ff) == 0x55)); 1672 if (reg & 0xff00) { 1673 outb_p(W83781D_REG_BANK, 1674 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1675 outb_p(reg >> 8, 1676 data->isa_addr + W83781D_DATA_REG_OFFSET); 1677 } 1678 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); 1679 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET); 1680 if (word_sized) { 1681 outb_p((reg & 0xff) + 1, 1682 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1683 res = 1684 (res << 8) + inb_p(data->isa_addr + 1685 W83781D_DATA_REG_OFFSET); 1686 } 1687 if (reg & 0xff00) { 1688 outb_p(W83781D_REG_BANK, 1689 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1690 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); 1691 } 1692 return res; 1693 } 1694 1695 static void 1696 w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value) 1697 { 1698 int word_sized; 1699 1700 word_sized = (((reg & 0xff00) == 0x100) 1701 || ((reg & 0xff00) == 0x200)) 1702 && (((reg & 0x00ff) == 0x53) 1703 || ((reg & 0x00ff) == 0x55)); 1704 if (reg & 0xff00) { 1705 outb_p(W83781D_REG_BANK, 1706 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1707 outb_p(reg >> 8, 1708 data->isa_addr + W83781D_DATA_REG_OFFSET); 1709 } 1710 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); 1711 if (word_sized) { 1712 outb_p(value >> 8, 1713 data->isa_addr + W83781D_DATA_REG_OFFSET); 1714 outb_p((reg & 0xff) + 1, 1715 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1716 } 1717 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET); 1718 if (reg & 0xff00) { 1719 outb_p(W83781D_REG_BANK, 1720 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1721 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); 1722 } 1723 } 1724 1725 /* 1726 * The SMBus locks itself, usually, but nothing may access the Winbond between 1727 * bank switches. ISA access must always be locked explicitly! 1728 * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, 1729 * would slow down the W83781D access and should not be necessary. 1730 * There are some ugly typecasts here, but the good news is - they should 1731 * nowhere else be necessary! 1732 */ 1733 static int 1734 w83781d_read_value(struct w83781d_data *data, u16 reg) 1735 { 1736 struct i2c_client *client = data->client; 1737 int res; 1738 1739 mutex_lock(&data->lock); 1740 if (client) 1741 res = w83781d_read_value_i2c(data, reg); 1742 else 1743 res = w83781d_read_value_isa(data, reg); 1744 mutex_unlock(&data->lock); 1745 return res; 1746 } 1747 1748 static int 1749 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) 1750 { 1751 struct i2c_client *client = data->client; 1752 1753 mutex_lock(&data->lock); 1754 if (client) 1755 w83781d_write_value_i2c(data, reg, value); 1756 else 1757 w83781d_write_value_isa(data, reg, value); 1758 mutex_unlock(&data->lock); 1759 return 0; 1760 } 1761 1762 static int 1763 w83781d_isa_probe(struct platform_device *pdev) 1764 { 1765 int err, reg; 1766 struct w83781d_data *data; 1767 struct resource *res; 1768 1769 /* Reserve the ISA region */ 1770 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1771 if (!devm_request_region(&pdev->dev, 1772 res->start + W83781D_ADDR_REG_OFFSET, 2, 1773 "w83781d")) 1774 return -EBUSY; 1775 1776 data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data), 1777 GFP_KERNEL); 1778 if (!data) 1779 return -ENOMEM; 1780 1781 mutex_init(&data->lock); 1782 data->isa_addr = res->start; 1783 platform_set_drvdata(pdev, data); 1784 1785 reg = w83781d_read_value(data, W83781D_REG_WCHIPID); 1786 switch (reg) { 1787 case 0x30: 1788 data->type = w83782d; 1789 data->name = "w83782d"; 1790 break; 1791 default: 1792 data->type = w83781d; 1793 data->name = "w83781d"; 1794 } 1795 1796 /* Initialize the W83781D chip */ 1797 w83781d_init_device(&pdev->dev); 1798 1799 /* Register sysfs hooks */ 1800 err = w83781d_create_files(&pdev->dev, data->type, 1); 1801 if (err) 1802 goto exit_remove_files; 1803 1804 err = device_create_file(&pdev->dev, &dev_attr_name); 1805 if (err) 1806 goto exit_remove_files; 1807 1808 data->hwmon_dev = hwmon_device_register(&pdev->dev); 1809 if (IS_ERR(data->hwmon_dev)) { 1810 err = PTR_ERR(data->hwmon_dev); 1811 goto exit_remove_files; 1812 } 1813 1814 return 0; 1815 1816 exit_remove_files: 1817 w83781d_remove_files(&pdev->dev); 1818 device_remove_file(&pdev->dev, &dev_attr_name); 1819 return err; 1820 } 1821 1822 static int 1823 w83781d_isa_remove(struct platform_device *pdev) 1824 { 1825 struct w83781d_data *data = platform_get_drvdata(pdev); 1826 1827 hwmon_device_unregister(data->hwmon_dev); 1828 w83781d_remove_files(&pdev->dev); 1829 device_remove_file(&pdev->dev, &dev_attr_name); 1830 1831 return 0; 1832 } 1833 1834 static struct platform_driver w83781d_isa_driver = { 1835 .driver = { 1836 .name = "w83781d", 1837 }, 1838 .probe = w83781d_isa_probe, 1839 .remove = w83781d_isa_remove, 1840 }; 1841 1842 /* return 1 if a supported chip is found, 0 otherwise */ 1843 static int __init 1844 w83781d_isa_found(unsigned short address) 1845 { 1846 int val, save, found = 0; 1847 int port; 1848 1849 /* 1850 * Some boards declare base+0 to base+7 as a PNP device, some base+4 1851 * to base+7 and some base+5 to base+6. So we better request each port 1852 * individually for the probing phase. 1853 */ 1854 for (port = address; port < address + W83781D_EXTENT; port++) { 1855 if (!request_region(port, 1, "w83781d")) { 1856 pr_debug("Failed to request port 0x%x\n", port); 1857 goto release; 1858 } 1859 } 1860 1861 #define REALLY_SLOW_IO 1862 /* 1863 * We need the timeouts for at least some W83781D-like 1864 * chips. But only if we read 'undefined' registers. 1865 */ 1866 val = inb_p(address + 1); 1867 if (inb_p(address + 2) != val 1868 || inb_p(address + 3) != val 1869 || inb_p(address + 7) != val) { 1870 pr_debug("Detection failed at step %d\n", 1); 1871 goto release; 1872 } 1873 #undef REALLY_SLOW_IO 1874 1875 /* 1876 * We should be able to change the 7 LSB of the address port. The 1877 * MSB (busy flag) should be clear initially, set after the write. 1878 */ 1879 save = inb_p(address + W83781D_ADDR_REG_OFFSET); 1880 if (save & 0x80) { 1881 pr_debug("Detection failed at step %d\n", 2); 1882 goto release; 1883 } 1884 val = ~save & 0x7f; 1885 outb_p(val, address + W83781D_ADDR_REG_OFFSET); 1886 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) { 1887 outb_p(save, address + W83781D_ADDR_REG_OFFSET); 1888 pr_debug("Detection failed at step %d\n", 3); 1889 goto release; 1890 } 1891 1892 /* We found a device, now see if it could be a W83781D */ 1893 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET); 1894 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1895 if (val & 0x80) { 1896 pr_debug("Detection failed at step %d\n", 4); 1897 goto release; 1898 } 1899 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); 1900 save = inb_p(address + W83781D_DATA_REG_OFFSET); 1901 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET); 1902 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1903 if ((!(save & 0x80) && (val != 0xa3)) 1904 || ((save & 0x80) && (val != 0x5c))) { 1905 pr_debug("Detection failed at step %d\n", 5); 1906 goto release; 1907 } 1908 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET); 1909 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1910 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */ 1911 pr_debug("Detection failed at step %d\n", 6); 1912 goto release; 1913 } 1914 1915 /* The busy flag should be clear again */ 1916 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) { 1917 pr_debug("Detection failed at step %d\n", 7); 1918 goto release; 1919 } 1920 1921 /* Determine the chip type */ 1922 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); 1923 save = inb_p(address + W83781D_DATA_REG_OFFSET); 1924 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET); 1925 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET); 1926 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1927 if ((val & 0xfe) == 0x10 /* W83781D */ 1928 || val == 0x30) /* W83782D */ 1929 found = 1; 1930 1931 if (found) 1932 pr_info("Found a %s chip at %#x\n", 1933 val == 0x30 ? "W83782D" : "W83781D", (int)address); 1934 1935 release: 1936 for (port--; port >= address; port--) 1937 release_region(port, 1); 1938 return found; 1939 } 1940 1941 static int __init 1942 w83781d_isa_device_add(unsigned short address) 1943 { 1944 struct resource res = { 1945 .start = address, 1946 .end = address + W83781D_EXTENT - 1, 1947 .name = "w83781d", 1948 .flags = IORESOURCE_IO, 1949 }; 1950 int err; 1951 1952 pdev = platform_device_alloc("w83781d", address); 1953 if (!pdev) { 1954 err = -ENOMEM; 1955 pr_err("Device allocation failed\n"); 1956 goto exit; 1957 } 1958 1959 err = platform_device_add_resources(pdev, &res, 1); 1960 if (err) { 1961 pr_err("Device resource addition failed (%d)\n", err); 1962 goto exit_device_put; 1963 } 1964 1965 err = platform_device_add(pdev); 1966 if (err) { 1967 pr_err("Device addition failed (%d)\n", err); 1968 goto exit_device_put; 1969 } 1970 1971 return 0; 1972 1973 exit_device_put: 1974 platform_device_put(pdev); 1975 exit: 1976 pdev = NULL; 1977 return err; 1978 } 1979 1980 static int __init 1981 w83781d_isa_register(void) 1982 { 1983 int res; 1984 1985 if (w83781d_isa_found(isa_address)) { 1986 res = platform_driver_register(&w83781d_isa_driver); 1987 if (res) 1988 goto exit; 1989 1990 /* Sets global pdev as a side effect */ 1991 res = w83781d_isa_device_add(isa_address); 1992 if (res) 1993 goto exit_unreg_isa_driver; 1994 } 1995 1996 return 0; 1997 1998 exit_unreg_isa_driver: 1999 platform_driver_unregister(&w83781d_isa_driver); 2000 exit: 2001 return res; 2002 } 2003 2004 static void 2005 w83781d_isa_unregister(void) 2006 { 2007 if (pdev) { 2008 platform_device_unregister(pdev); 2009 platform_driver_unregister(&w83781d_isa_driver); 2010 } 2011 } 2012 #else /* !CONFIG_ISA */ 2013 2014 static struct w83781d_data *w83781d_data_if_isa(void) 2015 { 2016 return NULL; 2017 } 2018 2019 static int 2020 w83781d_alias_detect(struct i2c_client *client, u8 chipid) 2021 { 2022 return 0; 2023 } 2024 2025 static int 2026 w83781d_read_value(struct w83781d_data *data, u16 reg) 2027 { 2028 int res; 2029 2030 mutex_lock(&data->lock); 2031 res = w83781d_read_value_i2c(data, reg); 2032 mutex_unlock(&data->lock); 2033 2034 return res; 2035 } 2036 2037 static int 2038 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) 2039 { 2040 mutex_lock(&data->lock); 2041 w83781d_write_value_i2c(data, reg, value); 2042 mutex_unlock(&data->lock); 2043 2044 return 0; 2045 } 2046 2047 static int __init 2048 w83781d_isa_register(void) 2049 { 2050 return 0; 2051 } 2052 2053 static void 2054 w83781d_isa_unregister(void) 2055 { 2056 } 2057 #endif /* CONFIG_ISA */ 2058 2059 static int __init 2060 sensors_w83781d_init(void) 2061 { 2062 int res; 2063 2064 /* 2065 * We register the ISA device first, so that we can skip the 2066 * registration of an I2C interface to the same device. 2067 */ 2068 res = w83781d_isa_register(); 2069 if (res) 2070 goto exit; 2071 2072 res = i2c_add_driver(&w83781d_driver); 2073 if (res) 2074 goto exit_unreg_isa; 2075 2076 return 0; 2077 2078 exit_unreg_isa: 2079 w83781d_isa_unregister(); 2080 exit: 2081 return res; 2082 } 2083 2084 static void __exit 2085 sensors_w83781d_exit(void) 2086 { 2087 w83781d_isa_unregister(); 2088 i2c_del_driver(&w83781d_driver); 2089 } 2090 2091 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " 2092 "Philip Edelbrock <phil@netroedge.com>, " 2093 "and Mark Studebaker <mdsxyz123@yahoo.com>"); 2094 MODULE_DESCRIPTION("W83781D driver"); 2095 MODULE_LICENSE("GPL"); 2096 2097 module_init(sensors_w83781d_init); 2098 module_exit(sensors_w83781d_exit); 2099