1 /* 2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware 3 monitoring 4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, 5 Philip Edelbrock <phil@netroedge.com>, 6 and Mark Studebaker <mdsxyz123@yahoo.com> 7 Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org> 8 9 This program is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 2 of the License, or 12 (at your option) any later version. 13 14 This program is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; if not, write to the Free Software 21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 */ 23 24 /* 25 Supports following chips: 26 27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA 28 as99127f 7 3 0 3 0x31 0x12c3 yes no 29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no 30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes 31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes 32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no 33 34 */ 35 36 #include <linux/module.h> 37 #include <linux/init.h> 38 #include <linux/slab.h> 39 #include <linux/jiffies.h> 40 #include <linux/i2c.h> 41 #include <linux/hwmon.h> 42 #include <linux/hwmon-vid.h> 43 #include <linux/hwmon-sysfs.h> 44 #include <linux/sysfs.h> 45 #include <linux/err.h> 46 #include <linux/mutex.h> 47 48 #ifdef CONFIG_ISA 49 #include <linux/platform_device.h> 50 #include <linux/ioport.h> 51 #include <linux/io.h> 52 #endif 53 54 #include "lm75.h" 55 56 /* Addresses to scan */ 57 static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 58 0x2e, 0x2f, I2C_CLIENT_END }; 59 60 enum chips { w83781d, w83782d, w83783s, as99127f }; 61 62 /* Insmod parameters */ 63 static unsigned short force_subclients[4]; 64 module_param_array(force_subclients, short, NULL, 0); 65 MODULE_PARM_DESC(force_subclients, "List of subclient addresses: " 66 "{bus, clientaddr, subclientaddr1, subclientaddr2}"); 67 68 static int reset; 69 module_param(reset, bool, 0); 70 MODULE_PARM_DESC(reset, "Set to one to reset chip on load"); 71 72 static int init = 1; 73 module_param(init, bool, 0); 74 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); 75 76 /* Constants specified below */ 77 78 /* Length of ISA address segment */ 79 #define W83781D_EXTENT 8 80 81 /* Where are the ISA address/data registers relative to the base address */ 82 #define W83781D_ADDR_REG_OFFSET 5 83 #define W83781D_DATA_REG_OFFSET 6 84 85 /* The device registers */ 86 /* in nr from 0 to 8 */ 87 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ 88 (0x554 + (((nr) - 7) * 2))) 89 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ 90 (0x555 + (((nr) - 7) * 2))) 91 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ 92 (0x550 + (nr) - 7)) 93 94 /* fan nr from 0 to 2 */ 95 #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr)) 96 #define W83781D_REG_FAN(nr) (0x28 + (nr)) 97 98 #define W83781D_REG_BANK 0x4E 99 #define W83781D_REG_TEMP2_CONFIG 0x152 100 #define W83781D_REG_TEMP3_CONFIG 0x252 101 /* temp nr from 1 to 3 */ 102 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ 103 ((nr == 2) ? (0x0150) : \ 104 (0x27))) 105 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ 106 ((nr == 2) ? (0x153) : \ 107 (0x3A))) 108 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ 109 ((nr == 2) ? (0x155) : \ 110 (0x39))) 111 112 #define W83781D_REG_CONFIG 0x40 113 114 /* Interrupt status (W83781D, AS99127F) */ 115 #define W83781D_REG_ALARM1 0x41 116 #define W83781D_REG_ALARM2 0x42 117 118 /* Real-time status (W83782D, W83783S) */ 119 #define W83782D_REG_ALARM1 0x459 120 #define W83782D_REG_ALARM2 0x45A 121 #define W83782D_REG_ALARM3 0x45B 122 123 #define W83781D_REG_BEEP_CONFIG 0x4D 124 #define W83781D_REG_BEEP_INTS1 0x56 125 #define W83781D_REG_BEEP_INTS2 0x57 126 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ 127 128 #define W83781D_REG_VID_FANDIV 0x47 129 130 #define W83781D_REG_CHIPID 0x49 131 #define W83781D_REG_WCHIPID 0x58 132 #define W83781D_REG_CHIPMAN 0x4F 133 #define W83781D_REG_PIN 0x4B 134 135 /* 782D/783S only */ 136 #define W83781D_REG_VBAT 0x5D 137 138 /* PWM 782D (1-4) and 783S (1-2) only */ 139 static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F }; 140 #define W83781D_REG_PWMCLK12 0x5C 141 #define W83781D_REG_PWMCLK34 0x45C 142 143 #define W83781D_REG_I2C_ADDR 0x48 144 #define W83781D_REG_I2C_SUBADDR 0x4A 145 146 /* The following are undocumented in the data sheets however we 147 received the information in an email from Winbond tech support */ 148 /* Sensor selection - not on 781d */ 149 #define W83781D_REG_SCFG1 0x5D 150 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; 151 152 #define W83781D_REG_SCFG2 0x59 153 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; 154 155 #define W83781D_DEFAULT_BETA 3435 156 157 /* Conversions */ 158 #define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255) 159 #define IN_FROM_REG(val) ((val) * 16) 160 161 static inline u8 162 FAN_TO_REG(long rpm, int div) 163 { 164 if (rpm == 0) 165 return 255; 166 rpm = SENSORS_LIMIT(rpm, 1, 1000000); 167 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); 168 } 169 170 static inline long 171 FAN_FROM_REG(u8 val, int div) 172 { 173 if (val == 0) 174 return -1; 175 if (val == 255) 176 return 0; 177 return 1350000 / (val * div); 178 } 179 180 #define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128) 181 #define TEMP_FROM_REG(val) ((val) * 1000) 182 183 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \ 184 (~(val)) & 0x7fff : (val) & 0xff7fff) 185 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \ 186 (~(val)) & 0x7fff : (val) & 0xff7fff) 187 188 #define DIV_FROM_REG(val) (1 << (val)) 189 190 static inline u8 191 DIV_TO_REG(long val, enum chips type) 192 { 193 int i; 194 val = SENSORS_LIMIT(val, 1, 195 ((type == w83781d 196 || type == as99127f) ? 8 : 128)) >> 1; 197 for (i = 0; i < 7; i++) { 198 if (val == 0) 199 break; 200 val >>= 1; 201 } 202 return i; 203 } 204 205 struct w83781d_data { 206 struct i2c_client *client; 207 struct device *hwmon_dev; 208 struct mutex lock; 209 enum chips type; 210 211 /* For ISA device only */ 212 const char *name; 213 int isa_addr; 214 215 struct mutex update_lock; 216 char valid; /* !=0 if following fields are valid */ 217 unsigned long last_updated; /* In jiffies */ 218 219 struct i2c_client *lm75[2]; /* for secondary I2C addresses */ 220 /* array of 2 pointers to subclients */ 221 222 u8 in[9]; /* Register value - 8 & 9 for 782D only */ 223 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ 224 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ 225 u8 fan[3]; /* Register value */ 226 u8 fan_min[3]; /* Register value */ 227 s8 temp; /* Register value */ 228 s8 temp_max; /* Register value */ 229 s8 temp_max_hyst; /* Register value */ 230 u16 temp_add[2]; /* Register value */ 231 u16 temp_max_add[2]; /* Register value */ 232 u16 temp_max_hyst_add[2]; /* Register value */ 233 u8 fan_div[3]; /* Register encoding, shifted right */ 234 u8 vid; /* Register encoding, combined */ 235 u32 alarms; /* Register encoding, combined */ 236 u32 beep_mask; /* Register encoding, combined */ 237 u8 pwm[4]; /* Register value */ 238 u8 pwm2_enable; /* Boolean */ 239 u16 sens[3]; /* 782D/783S only. 240 1 = pentium diode; 2 = 3904 diode; 241 4 = thermistor */ 242 u8 vrm; 243 }; 244 245 static struct w83781d_data *w83781d_data_if_isa(void); 246 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid); 247 248 static int w83781d_read_value(struct w83781d_data *data, u16 reg); 249 static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value); 250 static struct w83781d_data *w83781d_update_device(struct device *dev); 251 static void w83781d_init_device(struct device *dev); 252 253 /* following are the sysfs callback functions */ 254 #define show_in_reg(reg) \ 255 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ 256 char *buf) \ 257 { \ 258 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 259 struct w83781d_data *data = w83781d_update_device(dev); \ 260 return sprintf(buf, "%ld\n", \ 261 (long)IN_FROM_REG(data->reg[attr->index])); \ 262 } 263 show_in_reg(in); 264 show_in_reg(in_min); 265 show_in_reg(in_max); 266 267 #define store_in_reg(REG, reg) \ 268 static ssize_t store_in_##reg (struct device *dev, struct device_attribute \ 269 *da, const char *buf, size_t count) \ 270 { \ 271 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 272 struct w83781d_data *data = dev_get_drvdata(dev); \ 273 int nr = attr->index; \ 274 u32 val; \ 275 \ 276 val = simple_strtoul(buf, NULL, 10); \ 277 \ 278 mutex_lock(&data->update_lock); \ 279 data->in_##reg[nr] = IN_TO_REG(val); \ 280 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ 281 \ 282 mutex_unlock(&data->update_lock); \ 283 return count; \ 284 } 285 store_in_reg(MIN, min); 286 store_in_reg(MAX, max); 287 288 #define sysfs_in_offsets(offset) \ 289 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ 290 show_in, NULL, offset); \ 291 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \ 292 show_in_min, store_in_min, offset); \ 293 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \ 294 show_in_max, store_in_max, offset) 295 296 sysfs_in_offsets(0); 297 sysfs_in_offsets(1); 298 sysfs_in_offsets(2); 299 sysfs_in_offsets(3); 300 sysfs_in_offsets(4); 301 sysfs_in_offsets(5); 302 sysfs_in_offsets(6); 303 sysfs_in_offsets(7); 304 sysfs_in_offsets(8); 305 306 #define show_fan_reg(reg) \ 307 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ 308 char *buf) \ 309 { \ 310 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 311 struct w83781d_data *data = w83781d_update_device(dev); \ 312 return sprintf(buf,"%ld\n", \ 313 FAN_FROM_REG(data->reg[attr->index], \ 314 DIV_FROM_REG(data->fan_div[attr->index]))); \ 315 } 316 show_fan_reg(fan); 317 show_fan_reg(fan_min); 318 319 static ssize_t 320 store_fan_min(struct device *dev, struct device_attribute *da, 321 const char *buf, size_t count) 322 { 323 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 324 struct w83781d_data *data = dev_get_drvdata(dev); 325 int nr = attr->index; 326 u32 val; 327 328 val = simple_strtoul(buf, NULL, 10); 329 330 mutex_lock(&data->update_lock); 331 data->fan_min[nr] = 332 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); 333 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), 334 data->fan_min[nr]); 335 336 mutex_unlock(&data->update_lock); 337 return count; 338 } 339 340 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); 341 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, 342 show_fan_min, store_fan_min, 0); 343 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); 344 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, 345 show_fan_min, store_fan_min, 1); 346 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); 347 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, 348 show_fan_min, store_fan_min, 2); 349 350 #define show_temp_reg(reg) \ 351 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ 352 char *buf) \ 353 { \ 354 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 355 struct w83781d_data *data = w83781d_update_device(dev); \ 356 int nr = attr->index; \ 357 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 358 return sprintf(buf,"%d\n", \ 359 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ 360 } else { /* TEMP1 */ \ 361 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ 362 } \ 363 } 364 show_temp_reg(temp); 365 show_temp_reg(temp_max); 366 show_temp_reg(temp_max_hyst); 367 368 #define store_temp_reg(REG, reg) \ 369 static ssize_t store_temp_##reg (struct device *dev, \ 370 struct device_attribute *da, const char *buf, size_t count) \ 371 { \ 372 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 373 struct w83781d_data *data = dev_get_drvdata(dev); \ 374 int nr = attr->index; \ 375 long val; \ 376 \ 377 val = simple_strtol(buf, NULL, 10); \ 378 \ 379 mutex_lock(&data->update_lock); \ 380 \ 381 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 382 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ 383 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ 384 data->temp_##reg##_add[nr-2]); \ 385 } else { /* TEMP1 */ \ 386 data->temp_##reg = TEMP_TO_REG(val); \ 387 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ 388 data->temp_##reg); \ 389 } \ 390 \ 391 mutex_unlock(&data->update_lock); \ 392 return count; \ 393 } 394 store_temp_reg(OVER, max); 395 store_temp_reg(HYST, max_hyst); 396 397 #define sysfs_temp_offsets(offset) \ 398 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \ 399 show_temp, NULL, offset); \ 400 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \ 401 show_temp_max, store_temp_max, offset); \ 402 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \ 403 show_temp_max_hyst, store_temp_max_hyst, offset); 404 405 sysfs_temp_offsets(1); 406 sysfs_temp_offsets(2); 407 sysfs_temp_offsets(3); 408 409 static ssize_t 410 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) 411 { 412 struct w83781d_data *data = w83781d_update_device(dev); 413 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); 414 } 415 416 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); 417 418 static ssize_t 419 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) 420 { 421 struct w83781d_data *data = dev_get_drvdata(dev); 422 return sprintf(buf, "%ld\n", (long) data->vrm); 423 } 424 425 static ssize_t 426 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 427 { 428 struct w83781d_data *data = dev_get_drvdata(dev); 429 u32 val; 430 431 val = simple_strtoul(buf, NULL, 10); 432 data->vrm = val; 433 434 return count; 435 } 436 437 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); 438 439 static ssize_t 440 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) 441 { 442 struct w83781d_data *data = w83781d_update_device(dev); 443 return sprintf(buf, "%u\n", data->alarms); 444 } 445 446 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); 447 448 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, 449 char *buf) 450 { 451 struct w83781d_data *data = w83781d_update_device(dev); 452 int bitnr = to_sensor_dev_attr(attr)->index; 453 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); 454 } 455 456 /* The W83781D has a single alarm bit for temp2 and temp3 */ 457 static ssize_t show_temp3_alarm(struct device *dev, 458 struct device_attribute *attr, char *buf) 459 { 460 struct w83781d_data *data = w83781d_update_device(dev); 461 int bitnr = (data->type == w83781d) ? 5 : 13; 462 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); 463 } 464 465 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); 466 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); 467 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); 468 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); 469 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8); 470 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9); 471 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10); 472 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16); 473 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17); 474 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6); 475 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7); 476 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11); 477 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4); 478 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5); 479 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0); 480 481 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf) 482 { 483 struct w83781d_data *data = w83781d_update_device(dev); 484 return sprintf(buf, "%ld\n", 485 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); 486 } 487 488 static ssize_t 489 store_beep_mask(struct device *dev, struct device_attribute *attr, 490 const char *buf, size_t count) 491 { 492 struct w83781d_data *data = dev_get_drvdata(dev); 493 u32 val; 494 495 val = simple_strtoul(buf, NULL, 10); 496 497 mutex_lock(&data->update_lock); 498 data->beep_mask &= 0x8000; /* preserve beep enable */ 499 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type); 500 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, 501 data->beep_mask & 0xff); 502 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 503 (data->beep_mask >> 8) & 0xff); 504 if (data->type != w83781d && data->type != as99127f) { 505 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, 506 ((data->beep_mask) >> 16) & 0xff); 507 } 508 mutex_unlock(&data->update_lock); 509 510 return count; 511 } 512 513 static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR, 514 show_beep_mask, store_beep_mask); 515 516 static ssize_t show_beep(struct device *dev, struct device_attribute *attr, 517 char *buf) 518 { 519 struct w83781d_data *data = w83781d_update_device(dev); 520 int bitnr = to_sensor_dev_attr(attr)->index; 521 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); 522 } 523 524 static ssize_t 525 store_beep(struct device *dev, struct device_attribute *attr, 526 const char *buf, size_t count) 527 { 528 struct w83781d_data *data = dev_get_drvdata(dev); 529 int bitnr = to_sensor_dev_attr(attr)->index; 530 unsigned long bit; 531 u8 reg; 532 533 bit = simple_strtoul(buf, NULL, 10); 534 if (bit & ~1) 535 return -EINVAL; 536 537 mutex_lock(&data->update_lock); 538 if (bit) 539 data->beep_mask |= (1 << bitnr); 540 else 541 data->beep_mask &= ~(1 << bitnr); 542 543 if (bitnr < 8) { 544 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1); 545 if (bit) 546 reg |= (1 << bitnr); 547 else 548 reg &= ~(1 << bitnr); 549 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg); 550 } else if (bitnr < 16) { 551 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); 552 if (bit) 553 reg |= (1 << (bitnr - 8)); 554 else 555 reg &= ~(1 << (bitnr - 8)); 556 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg); 557 } else { 558 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3); 559 if (bit) 560 reg |= (1 << (bitnr - 16)); 561 else 562 reg &= ~(1 << (bitnr - 16)); 563 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg); 564 } 565 mutex_unlock(&data->update_lock); 566 567 return count; 568 } 569 570 /* The W83781D has a single beep bit for temp2 and temp3 */ 571 static ssize_t show_temp3_beep(struct device *dev, 572 struct device_attribute *attr, char *buf) 573 { 574 struct w83781d_data *data = w83781d_update_device(dev); 575 int bitnr = (data->type == w83781d) ? 5 : 13; 576 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); 577 } 578 579 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, 580 show_beep, store_beep, 0); 581 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR, 582 show_beep, store_beep, 1); 583 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR, 584 show_beep, store_beep, 2); 585 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR, 586 show_beep, store_beep, 3); 587 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR, 588 show_beep, store_beep, 8); 589 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR, 590 show_beep, store_beep, 9); 591 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR, 592 show_beep, store_beep, 10); 593 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR, 594 show_beep, store_beep, 16); 595 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR, 596 show_beep, store_beep, 17); 597 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR, 598 show_beep, store_beep, 6); 599 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR, 600 show_beep, store_beep, 7); 601 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR, 602 show_beep, store_beep, 11); 603 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, 604 show_beep, store_beep, 4); 605 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR, 606 show_beep, store_beep, 5); 607 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, 608 show_temp3_beep, store_beep, 13); 609 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR, 610 show_beep, store_beep, 15); 611 612 static ssize_t 613 show_fan_div(struct device *dev, struct device_attribute *da, char *buf) 614 { 615 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 616 struct w83781d_data *data = w83781d_update_device(dev); 617 return sprintf(buf, "%ld\n", 618 (long) DIV_FROM_REG(data->fan_div[attr->index])); 619 } 620 621 /* Note: we save and restore the fan minimum here, because its value is 622 determined in part by the fan divisor. This follows the principle of 623 least surprise; the user doesn't expect the fan minimum to change just 624 because the divisor changed. */ 625 static ssize_t 626 store_fan_div(struct device *dev, struct device_attribute *da, 627 const char *buf, size_t count) 628 { 629 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 630 struct w83781d_data *data = dev_get_drvdata(dev); 631 unsigned long min; 632 int nr = attr->index; 633 u8 reg; 634 unsigned long val = simple_strtoul(buf, NULL, 10); 635 636 mutex_lock(&data->update_lock); 637 638 /* Save fan_min */ 639 min = FAN_FROM_REG(data->fan_min[nr], 640 DIV_FROM_REG(data->fan_div[nr])); 641 642 data->fan_div[nr] = DIV_TO_REG(val, data->type); 643 644 reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) 645 & (nr==0 ? 0xcf : 0x3f)) 646 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); 647 w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); 648 649 /* w83781d and as99127f don't have extended divisor bits */ 650 if (data->type != w83781d && data->type != as99127f) { 651 reg = (w83781d_read_value(data, W83781D_REG_VBAT) 652 & ~(1 << (5 + nr))) 653 | ((data->fan_div[nr] & 0x04) << (3 + nr)); 654 w83781d_write_value(data, W83781D_REG_VBAT, reg); 655 } 656 657 /* Restore fan_min */ 658 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 659 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]); 660 661 mutex_unlock(&data->update_lock); 662 return count; 663 } 664 665 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, 666 show_fan_div, store_fan_div, 0); 667 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, 668 show_fan_div, store_fan_div, 1); 669 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, 670 show_fan_div, store_fan_div, 2); 671 672 static ssize_t 673 show_pwm(struct device *dev, struct device_attribute *da, char *buf) 674 { 675 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 676 struct w83781d_data *data = w83781d_update_device(dev); 677 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]); 678 } 679 680 static ssize_t 681 show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf) 682 { 683 struct w83781d_data *data = w83781d_update_device(dev); 684 return sprintf(buf, "%d\n", (int)data->pwm2_enable); 685 } 686 687 static ssize_t 688 store_pwm(struct device *dev, struct device_attribute *da, const char *buf, 689 size_t count) 690 { 691 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 692 struct w83781d_data *data = dev_get_drvdata(dev); 693 int nr = attr->index; 694 u32 val; 695 696 val = simple_strtoul(buf, NULL, 10); 697 698 mutex_lock(&data->update_lock); 699 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255); 700 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]); 701 mutex_unlock(&data->update_lock); 702 return count; 703 } 704 705 static ssize_t 706 store_pwm2_enable(struct device *dev, struct device_attribute *da, 707 const char *buf, size_t count) 708 { 709 struct w83781d_data *data = dev_get_drvdata(dev); 710 u32 val, reg; 711 712 val = simple_strtoul(buf, NULL, 10); 713 714 mutex_lock(&data->update_lock); 715 716 switch (val) { 717 case 0: 718 case 1: 719 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12); 720 w83781d_write_value(data, W83781D_REG_PWMCLK12, 721 (reg & 0xf7) | (val << 3)); 722 723 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); 724 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, 725 (reg & 0xef) | (!val << 4)); 726 727 data->pwm2_enable = val; 728 break; 729 730 default: 731 mutex_unlock(&data->update_lock); 732 return -EINVAL; 733 } 734 735 mutex_unlock(&data->update_lock); 736 return count; 737 } 738 739 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0); 740 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1); 741 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2); 742 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3); 743 /* only PWM2 can be enabled/disabled */ 744 static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, 745 show_pwm2_enable, store_pwm2_enable); 746 747 static ssize_t 748 show_sensor(struct device *dev, struct device_attribute *da, char *buf) 749 { 750 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 751 struct w83781d_data *data = w83781d_update_device(dev); 752 return sprintf(buf, "%d\n", (int)data->sens[attr->index]); 753 } 754 755 static ssize_t 756 store_sensor(struct device *dev, struct device_attribute *da, 757 const char *buf, size_t count) 758 { 759 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 760 struct w83781d_data *data = dev_get_drvdata(dev); 761 int nr = attr->index; 762 u32 val, tmp; 763 764 val = simple_strtoul(buf, NULL, 10); 765 766 mutex_lock(&data->update_lock); 767 768 switch (val) { 769 case 1: /* PII/Celeron diode */ 770 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 771 w83781d_write_value(data, W83781D_REG_SCFG1, 772 tmp | BIT_SCFG1[nr]); 773 tmp = w83781d_read_value(data, W83781D_REG_SCFG2); 774 w83781d_write_value(data, W83781D_REG_SCFG2, 775 tmp | BIT_SCFG2[nr]); 776 data->sens[nr] = val; 777 break; 778 case 2: /* 3904 */ 779 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 780 w83781d_write_value(data, W83781D_REG_SCFG1, 781 tmp | BIT_SCFG1[nr]); 782 tmp = w83781d_read_value(data, W83781D_REG_SCFG2); 783 w83781d_write_value(data, W83781D_REG_SCFG2, 784 tmp & ~BIT_SCFG2[nr]); 785 data->sens[nr] = val; 786 break; 787 case W83781D_DEFAULT_BETA: 788 dev_warn(dev, "Sensor type %d is deprecated, please use 4 " 789 "instead\n", W83781D_DEFAULT_BETA); 790 /* fall through */ 791 case 4: /* thermistor */ 792 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 793 w83781d_write_value(data, W83781D_REG_SCFG1, 794 tmp & ~BIT_SCFG1[nr]); 795 data->sens[nr] = val; 796 break; 797 default: 798 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n", 799 (long) val); 800 break; 801 } 802 803 mutex_unlock(&data->update_lock); 804 return count; 805 } 806 807 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, 808 show_sensor, store_sensor, 0); 809 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, 810 show_sensor, store_sensor, 1); 811 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, 812 show_sensor, store_sensor, 2); 813 814 /* Assumes that adapter is of I2C, not ISA variety. 815 * OTHERWISE DON'T CALL THIS 816 */ 817 static int 818 w83781d_detect_subclients(struct i2c_client *new_client) 819 { 820 int i, val1 = 0, id; 821 int err; 822 int address = new_client->addr; 823 unsigned short sc_addr[2]; 824 struct i2c_adapter *adapter = new_client->adapter; 825 struct w83781d_data *data = i2c_get_clientdata(new_client); 826 enum chips kind = data->type; 827 828 id = i2c_adapter_id(adapter); 829 830 if (force_subclients[0] == id && force_subclients[1] == address) { 831 for (i = 2; i <= 3; i++) { 832 if (force_subclients[i] < 0x48 || 833 force_subclients[i] > 0x4f) { 834 dev_err(&new_client->dev, "Invalid subclient " 835 "address %d; must be 0x48-0x4f\n", 836 force_subclients[i]); 837 err = -EINVAL; 838 goto ERROR_SC_1; 839 } 840 } 841 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR, 842 (force_subclients[2] & 0x07) | 843 ((force_subclients[3] & 0x07) << 4)); 844 sc_addr[0] = force_subclients[2]; 845 } else { 846 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR); 847 sc_addr[0] = 0x48 + (val1 & 0x07); 848 } 849 850 if (kind != w83783s) { 851 if (force_subclients[0] == id && 852 force_subclients[1] == address) { 853 sc_addr[1] = force_subclients[3]; 854 } else { 855 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07); 856 } 857 if (sc_addr[0] == sc_addr[1]) { 858 dev_err(&new_client->dev, 859 "Duplicate addresses 0x%x for subclients.\n", 860 sc_addr[0]); 861 err = -EBUSY; 862 goto ERROR_SC_2; 863 } 864 } 865 866 for (i = 0; i <= 1; i++) { 867 data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]); 868 if (!data->lm75[i]) { 869 dev_err(&new_client->dev, "Subclient %d " 870 "registration at address 0x%x " 871 "failed.\n", i, sc_addr[i]); 872 err = -ENOMEM; 873 if (i == 1) 874 goto ERROR_SC_3; 875 goto ERROR_SC_2; 876 } 877 if (kind == w83783s) 878 break; 879 } 880 881 return 0; 882 883 /* Undo inits in case of errors */ 884 ERROR_SC_3: 885 i2c_unregister_device(data->lm75[0]); 886 ERROR_SC_2: 887 ERROR_SC_1: 888 return err; 889 } 890 891 #define IN_UNIT_ATTRS(X) \ 892 &sensor_dev_attr_in##X##_input.dev_attr.attr, \ 893 &sensor_dev_attr_in##X##_min.dev_attr.attr, \ 894 &sensor_dev_attr_in##X##_max.dev_attr.attr, \ 895 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \ 896 &sensor_dev_attr_in##X##_beep.dev_attr.attr 897 898 #define FAN_UNIT_ATTRS(X) \ 899 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \ 900 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \ 901 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \ 902 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \ 903 &sensor_dev_attr_fan##X##_beep.dev_attr.attr 904 905 #define TEMP_UNIT_ATTRS(X) \ 906 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \ 907 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \ 908 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \ 909 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \ 910 &sensor_dev_attr_temp##X##_beep.dev_attr.attr 911 912 static struct attribute* w83781d_attributes[] = { 913 IN_UNIT_ATTRS(0), 914 IN_UNIT_ATTRS(2), 915 IN_UNIT_ATTRS(3), 916 IN_UNIT_ATTRS(4), 917 IN_UNIT_ATTRS(5), 918 IN_UNIT_ATTRS(6), 919 FAN_UNIT_ATTRS(1), 920 FAN_UNIT_ATTRS(2), 921 FAN_UNIT_ATTRS(3), 922 TEMP_UNIT_ATTRS(1), 923 TEMP_UNIT_ATTRS(2), 924 &dev_attr_cpu0_vid.attr, 925 &dev_attr_vrm.attr, 926 &dev_attr_alarms.attr, 927 &dev_attr_beep_mask.attr, 928 &sensor_dev_attr_beep_enable.dev_attr.attr, 929 NULL 930 }; 931 static const struct attribute_group w83781d_group = { 932 .attrs = w83781d_attributes, 933 }; 934 935 static struct attribute *w83781d_attributes_opt[] = { 936 IN_UNIT_ATTRS(1), 937 IN_UNIT_ATTRS(7), 938 IN_UNIT_ATTRS(8), 939 TEMP_UNIT_ATTRS(3), 940 &sensor_dev_attr_pwm1.dev_attr.attr, 941 &sensor_dev_attr_pwm2.dev_attr.attr, 942 &sensor_dev_attr_pwm3.dev_attr.attr, 943 &sensor_dev_attr_pwm4.dev_attr.attr, 944 &dev_attr_pwm2_enable.attr, 945 &sensor_dev_attr_temp1_type.dev_attr.attr, 946 &sensor_dev_attr_temp2_type.dev_attr.attr, 947 &sensor_dev_attr_temp3_type.dev_attr.attr, 948 NULL 949 }; 950 static const struct attribute_group w83781d_group_opt = { 951 .attrs = w83781d_attributes_opt, 952 }; 953 954 /* No clean up is done on error, it's up to the caller */ 955 static int 956 w83781d_create_files(struct device *dev, int kind, int is_isa) 957 { 958 int err; 959 960 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group))) 961 return err; 962 963 if (kind != w83783s) { 964 if ((err = device_create_file(dev, 965 &sensor_dev_attr_in1_input.dev_attr)) 966 || (err = device_create_file(dev, 967 &sensor_dev_attr_in1_min.dev_attr)) 968 || (err = device_create_file(dev, 969 &sensor_dev_attr_in1_max.dev_attr)) 970 || (err = device_create_file(dev, 971 &sensor_dev_attr_in1_alarm.dev_attr)) 972 || (err = device_create_file(dev, 973 &sensor_dev_attr_in1_beep.dev_attr))) 974 return err; 975 } 976 if (kind != as99127f && kind != w83781d && kind != w83783s) { 977 if ((err = device_create_file(dev, 978 &sensor_dev_attr_in7_input.dev_attr)) 979 || (err = device_create_file(dev, 980 &sensor_dev_attr_in7_min.dev_attr)) 981 || (err = device_create_file(dev, 982 &sensor_dev_attr_in7_max.dev_attr)) 983 || (err = device_create_file(dev, 984 &sensor_dev_attr_in7_alarm.dev_attr)) 985 || (err = device_create_file(dev, 986 &sensor_dev_attr_in7_beep.dev_attr)) 987 || (err = device_create_file(dev, 988 &sensor_dev_attr_in8_input.dev_attr)) 989 || (err = device_create_file(dev, 990 &sensor_dev_attr_in8_min.dev_attr)) 991 || (err = device_create_file(dev, 992 &sensor_dev_attr_in8_max.dev_attr)) 993 || (err = device_create_file(dev, 994 &sensor_dev_attr_in8_alarm.dev_attr)) 995 || (err = device_create_file(dev, 996 &sensor_dev_attr_in8_beep.dev_attr))) 997 return err; 998 } 999 if (kind != w83783s) { 1000 if ((err = device_create_file(dev, 1001 &sensor_dev_attr_temp3_input.dev_attr)) 1002 || (err = device_create_file(dev, 1003 &sensor_dev_attr_temp3_max.dev_attr)) 1004 || (err = device_create_file(dev, 1005 &sensor_dev_attr_temp3_max_hyst.dev_attr)) 1006 || (err = device_create_file(dev, 1007 &sensor_dev_attr_temp3_alarm.dev_attr)) 1008 || (err = device_create_file(dev, 1009 &sensor_dev_attr_temp3_beep.dev_attr))) 1010 return err; 1011 1012 if (kind != w83781d) { 1013 err = sysfs_chmod_file(&dev->kobj, 1014 &sensor_dev_attr_temp3_alarm.dev_attr.attr, 1015 S_IRUGO | S_IWUSR); 1016 if (err) 1017 return err; 1018 } 1019 } 1020 1021 if (kind != w83781d && kind != as99127f) { 1022 if ((err = device_create_file(dev, 1023 &sensor_dev_attr_pwm1.dev_attr)) 1024 || (err = device_create_file(dev, 1025 &sensor_dev_attr_pwm2.dev_attr)) 1026 || (err = device_create_file(dev, &dev_attr_pwm2_enable))) 1027 return err; 1028 } 1029 if (kind == w83782d && !is_isa) { 1030 if ((err = device_create_file(dev, 1031 &sensor_dev_attr_pwm3.dev_attr)) 1032 || (err = device_create_file(dev, 1033 &sensor_dev_attr_pwm4.dev_attr))) 1034 return err; 1035 } 1036 1037 if (kind != as99127f && kind != w83781d) { 1038 if ((err = device_create_file(dev, 1039 &sensor_dev_attr_temp1_type.dev_attr)) 1040 || (err = device_create_file(dev, 1041 &sensor_dev_attr_temp2_type.dev_attr))) 1042 return err; 1043 if (kind != w83783s) { 1044 if ((err = device_create_file(dev, 1045 &sensor_dev_attr_temp3_type.dev_attr))) 1046 return err; 1047 } 1048 } 1049 1050 return 0; 1051 } 1052 1053 /* Return 0 if detection is successful, -ENODEV otherwise */ 1054 static int 1055 w83781d_detect(struct i2c_client *client, struct i2c_board_info *info) 1056 { 1057 int val1, val2; 1058 struct w83781d_data *isa = w83781d_data_if_isa(); 1059 struct i2c_adapter *adapter = client->adapter; 1060 int address = client->addr; 1061 const char *client_name; 1062 enum vendor { winbond, asus } vendid; 1063 1064 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1065 return -ENODEV; 1066 1067 /* We block updates of the ISA device to minimize the risk of 1068 concurrent access to the same W83781D chip through different 1069 interfaces. */ 1070 if (isa) 1071 mutex_lock(&isa->update_lock); 1072 1073 if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) { 1074 dev_dbg(&adapter->dev, 1075 "Detection of w83781d chip failed at step 3\n"); 1076 goto err_nodev; 1077 } 1078 1079 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK); 1080 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); 1081 /* Check for Winbond or Asus ID if in bank 0 */ 1082 if (!(val1 & 0x07) && 1083 ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) || 1084 ( (val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) { 1085 dev_dbg(&adapter->dev, 1086 "Detection of w83781d chip failed at step 4\n"); 1087 goto err_nodev; 1088 } 1089 /* If Winbond SMBus, check address at 0x48. 1090 Asus doesn't support, except for as99127f rev.2 */ 1091 if ((!(val1 & 0x80) && val2 == 0xa3) || 1092 ( (val1 & 0x80) && val2 == 0x5c)) { 1093 if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR) 1094 != address) { 1095 dev_dbg(&adapter->dev, 1096 "Detection of w83781d chip failed at step 5\n"); 1097 goto err_nodev; 1098 } 1099 } 1100 1101 /* Put it now into bank 0 and Vendor ID High Byte */ 1102 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1103 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK) 1104 & 0x78) | 0x80); 1105 1106 /* Get the vendor ID */ 1107 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); 1108 if (val2 == 0x5c) 1109 vendid = winbond; 1110 else if (val2 == 0x12) 1111 vendid = asus; 1112 else { 1113 dev_dbg(&adapter->dev, 1114 "w83781d chip vendor is neither Winbond nor Asus\n"); 1115 goto err_nodev; 1116 } 1117 1118 /* Determine the chip type. */ 1119 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID); 1120 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) 1121 client_name = "w83781d"; 1122 else if (val1 == 0x30 && vendid == winbond) 1123 client_name = "w83782d"; 1124 else if (val1 == 0x40 && vendid == winbond && address == 0x2d) 1125 client_name = "w83783s"; 1126 else if (val1 == 0x31) 1127 client_name = "as99127f"; 1128 else 1129 goto err_nodev; 1130 1131 if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) { 1132 dev_dbg(&adapter->dev, "Device at 0x%02x appears to " 1133 "be the same as ISA device\n", address); 1134 goto err_nodev; 1135 } 1136 1137 if (isa) 1138 mutex_unlock(&isa->update_lock); 1139 1140 strlcpy(info->type, client_name, I2C_NAME_SIZE); 1141 1142 return 0; 1143 1144 err_nodev: 1145 if (isa) 1146 mutex_unlock(&isa->update_lock); 1147 return -ENODEV; 1148 } 1149 1150 static int 1151 w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id) 1152 { 1153 struct device *dev = &client->dev; 1154 struct w83781d_data *data; 1155 int err; 1156 1157 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL); 1158 if (!data) { 1159 err = -ENOMEM; 1160 goto ERROR1; 1161 } 1162 1163 i2c_set_clientdata(client, data); 1164 mutex_init(&data->lock); 1165 mutex_init(&data->update_lock); 1166 1167 data->type = id->driver_data; 1168 data->client = client; 1169 1170 /* attach secondary i2c lm75-like clients */ 1171 err = w83781d_detect_subclients(client); 1172 if (err) 1173 goto ERROR3; 1174 1175 /* Initialize the chip */ 1176 w83781d_init_device(dev); 1177 1178 /* Register sysfs hooks */ 1179 err = w83781d_create_files(dev, data->type, 0); 1180 if (err) 1181 goto ERROR4; 1182 1183 data->hwmon_dev = hwmon_device_register(dev); 1184 if (IS_ERR(data->hwmon_dev)) { 1185 err = PTR_ERR(data->hwmon_dev); 1186 goto ERROR4; 1187 } 1188 1189 return 0; 1190 1191 ERROR4: 1192 sysfs_remove_group(&dev->kobj, &w83781d_group); 1193 sysfs_remove_group(&dev->kobj, &w83781d_group_opt); 1194 1195 if (data->lm75[0]) 1196 i2c_unregister_device(data->lm75[0]); 1197 if (data->lm75[1]) 1198 i2c_unregister_device(data->lm75[1]); 1199 ERROR3: 1200 kfree(data); 1201 ERROR1: 1202 return err; 1203 } 1204 1205 static int 1206 w83781d_remove(struct i2c_client *client) 1207 { 1208 struct w83781d_data *data = i2c_get_clientdata(client); 1209 struct device *dev = &client->dev; 1210 1211 hwmon_device_unregister(data->hwmon_dev); 1212 1213 sysfs_remove_group(&dev->kobj, &w83781d_group); 1214 sysfs_remove_group(&dev->kobj, &w83781d_group_opt); 1215 1216 if (data->lm75[0]) 1217 i2c_unregister_device(data->lm75[0]); 1218 if (data->lm75[1]) 1219 i2c_unregister_device(data->lm75[1]); 1220 1221 kfree(data); 1222 1223 return 0; 1224 } 1225 1226 static int 1227 w83781d_read_value_i2c(struct w83781d_data *data, u16 reg) 1228 { 1229 struct i2c_client *client = data->client; 1230 int res, bank; 1231 struct i2c_client *cl; 1232 1233 bank = (reg >> 8) & 0x0f; 1234 if (bank > 2) 1235 /* switch banks */ 1236 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1237 bank); 1238 if (bank == 0 || bank > 2) { 1239 res = i2c_smbus_read_byte_data(client, reg & 0xff); 1240 } else { 1241 /* switch to subclient */ 1242 cl = data->lm75[bank - 1]; 1243 /* convert from ISA to LM75 I2C addresses */ 1244 switch (reg & 0xff) { 1245 case 0x50: /* TEMP */ 1246 res = swab16(i2c_smbus_read_word_data(cl, 0)); 1247 break; 1248 case 0x52: /* CONFIG */ 1249 res = i2c_smbus_read_byte_data(cl, 1); 1250 break; 1251 case 0x53: /* HYST */ 1252 res = swab16(i2c_smbus_read_word_data(cl, 2)); 1253 break; 1254 case 0x55: /* OVER */ 1255 default: 1256 res = swab16(i2c_smbus_read_word_data(cl, 3)); 1257 break; 1258 } 1259 } 1260 if (bank > 2) 1261 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1262 1263 return res; 1264 } 1265 1266 static int 1267 w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value) 1268 { 1269 struct i2c_client *client = data->client; 1270 int bank; 1271 struct i2c_client *cl; 1272 1273 bank = (reg >> 8) & 0x0f; 1274 if (bank > 2) 1275 /* switch banks */ 1276 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1277 bank); 1278 if (bank == 0 || bank > 2) { 1279 i2c_smbus_write_byte_data(client, reg & 0xff, 1280 value & 0xff); 1281 } else { 1282 /* switch to subclient */ 1283 cl = data->lm75[bank - 1]; 1284 /* convert from ISA to LM75 I2C addresses */ 1285 switch (reg & 0xff) { 1286 case 0x52: /* CONFIG */ 1287 i2c_smbus_write_byte_data(cl, 1, value & 0xff); 1288 break; 1289 case 0x53: /* HYST */ 1290 i2c_smbus_write_word_data(cl, 2, swab16(value)); 1291 break; 1292 case 0x55: /* OVER */ 1293 i2c_smbus_write_word_data(cl, 3, swab16(value)); 1294 break; 1295 } 1296 } 1297 if (bank > 2) 1298 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1299 1300 return 0; 1301 } 1302 1303 static void 1304 w83781d_init_device(struct device *dev) 1305 { 1306 struct w83781d_data *data = dev_get_drvdata(dev); 1307 int i, p; 1308 int type = data->type; 1309 u8 tmp; 1310 1311 if (reset && type != as99127f) { /* this resets registers we don't have 1312 documentation for on the as99127f */ 1313 /* Resetting the chip has been the default for a long time, 1314 but it causes the BIOS initializations (fan clock dividers, 1315 thermal sensor types...) to be lost, so it is now optional. 1316 It might even go away if nobody reports it as being useful, 1317 as I see very little reason why this would be needed at 1318 all. */ 1319 dev_info(dev, "If reset=1 solved a problem you were " 1320 "having, please report!\n"); 1321 1322 /* save these registers */ 1323 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); 1324 p = w83781d_read_value(data, W83781D_REG_PWMCLK12); 1325 /* Reset all except Watchdog values and last conversion values 1326 This sets fan-divs to 2, among others */ 1327 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80); 1328 /* Restore the registers and disable power-on abnormal beep. 1329 This saves FAN 1/2/3 input/output values set by BIOS. */ 1330 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); 1331 w83781d_write_value(data, W83781D_REG_PWMCLK12, p); 1332 /* Disable master beep-enable (reset turns it on). 1333 Individual beep_mask should be reset to off but for some reason 1334 disabling this bit helps some people not get beeped */ 1335 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0); 1336 } 1337 1338 /* Disable power-on abnormal beep, as advised by the datasheet. 1339 Already done if reset=1. */ 1340 if (init && !reset && type != as99127f) { 1341 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); 1342 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); 1343 } 1344 1345 data->vrm = vid_which_vrm(); 1346 1347 if ((type != w83781d) && (type != as99127f)) { 1348 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 1349 for (i = 1; i <= 3; i++) { 1350 if (!(tmp & BIT_SCFG1[i - 1])) { 1351 data->sens[i - 1] = 4; 1352 } else { 1353 if (w83781d_read_value 1354 (data, 1355 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) 1356 data->sens[i - 1] = 1; 1357 else 1358 data->sens[i - 1] = 2; 1359 } 1360 if (type == w83783s && i == 2) 1361 break; 1362 } 1363 } 1364 1365 if (init && type != as99127f) { 1366 /* Enable temp2 */ 1367 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG); 1368 if (tmp & 0x01) { 1369 dev_warn(dev, "Enabling temp2, readings " 1370 "might not make sense\n"); 1371 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG, 1372 tmp & 0xfe); 1373 } 1374 1375 /* Enable temp3 */ 1376 if (type != w83783s) { 1377 tmp = w83781d_read_value(data, 1378 W83781D_REG_TEMP3_CONFIG); 1379 if (tmp & 0x01) { 1380 dev_warn(dev, "Enabling temp3, " 1381 "readings might not make sense\n"); 1382 w83781d_write_value(data, 1383 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); 1384 } 1385 } 1386 } 1387 1388 /* Start monitoring */ 1389 w83781d_write_value(data, W83781D_REG_CONFIG, 1390 (w83781d_read_value(data, 1391 W83781D_REG_CONFIG) & 0xf7) 1392 | 0x01); 1393 1394 /* A few vars need to be filled upon startup */ 1395 for (i = 0; i < 3; i++) { 1396 data->fan_min[i] = w83781d_read_value(data, 1397 W83781D_REG_FAN_MIN(i)); 1398 } 1399 1400 mutex_init(&data->update_lock); 1401 } 1402 1403 static struct w83781d_data *w83781d_update_device(struct device *dev) 1404 { 1405 struct w83781d_data *data = dev_get_drvdata(dev); 1406 struct i2c_client *client = data->client; 1407 int i; 1408 1409 mutex_lock(&data->update_lock); 1410 1411 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1412 || !data->valid) { 1413 dev_dbg(dev, "Starting device update\n"); 1414 1415 for (i = 0; i <= 8; i++) { 1416 if (data->type == w83783s && i == 1) 1417 continue; /* 783S has no in1 */ 1418 data->in[i] = 1419 w83781d_read_value(data, W83781D_REG_IN(i)); 1420 data->in_min[i] = 1421 w83781d_read_value(data, W83781D_REG_IN_MIN(i)); 1422 data->in_max[i] = 1423 w83781d_read_value(data, W83781D_REG_IN_MAX(i)); 1424 if ((data->type != w83782d) && (i == 6)) 1425 break; 1426 } 1427 for (i = 0; i < 3; i++) { 1428 data->fan[i] = 1429 w83781d_read_value(data, W83781D_REG_FAN(i)); 1430 data->fan_min[i] = 1431 w83781d_read_value(data, W83781D_REG_FAN_MIN(i)); 1432 } 1433 if (data->type != w83781d && data->type != as99127f) { 1434 for (i = 0; i < 4; i++) { 1435 data->pwm[i] = 1436 w83781d_read_value(data, 1437 W83781D_REG_PWM[i]); 1438 /* Only W83782D on SMBus has PWM3 and PWM4 */ 1439 if ((data->type != w83782d || !client) 1440 && i == 1) 1441 break; 1442 } 1443 /* Only PWM2 can be disabled */ 1444 data->pwm2_enable = (w83781d_read_value(data, 1445 W83781D_REG_PWMCLK12) & 0x08) >> 3; 1446 } 1447 1448 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1)); 1449 data->temp_max = 1450 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1)); 1451 data->temp_max_hyst = 1452 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1)); 1453 data->temp_add[0] = 1454 w83781d_read_value(data, W83781D_REG_TEMP(2)); 1455 data->temp_max_add[0] = 1456 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2)); 1457 data->temp_max_hyst_add[0] = 1458 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2)); 1459 if (data->type != w83783s) { 1460 data->temp_add[1] = 1461 w83781d_read_value(data, W83781D_REG_TEMP(3)); 1462 data->temp_max_add[1] = 1463 w83781d_read_value(data, 1464 W83781D_REG_TEMP_OVER(3)); 1465 data->temp_max_hyst_add[1] = 1466 w83781d_read_value(data, 1467 W83781D_REG_TEMP_HYST(3)); 1468 } 1469 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV); 1470 data->vid = i & 0x0f; 1471 data->vid |= (w83781d_read_value(data, 1472 W83781D_REG_CHIPID) & 0x01) << 4; 1473 data->fan_div[0] = (i >> 4) & 0x03; 1474 data->fan_div[1] = (i >> 6) & 0x03; 1475 data->fan_div[2] = (w83781d_read_value(data, 1476 W83781D_REG_PIN) >> 6) & 0x03; 1477 if ((data->type != w83781d) && (data->type != as99127f)) { 1478 i = w83781d_read_value(data, W83781D_REG_VBAT); 1479 data->fan_div[0] |= (i >> 3) & 0x04; 1480 data->fan_div[1] |= (i >> 4) & 0x04; 1481 data->fan_div[2] |= (i >> 5) & 0x04; 1482 } 1483 if (data->type == w83782d) { 1484 data->alarms = w83781d_read_value(data, 1485 W83782D_REG_ALARM1) 1486 | (w83781d_read_value(data, 1487 W83782D_REG_ALARM2) << 8) 1488 | (w83781d_read_value(data, 1489 W83782D_REG_ALARM3) << 16); 1490 } else if (data->type == w83783s) { 1491 data->alarms = w83781d_read_value(data, 1492 W83782D_REG_ALARM1) 1493 | (w83781d_read_value(data, 1494 W83782D_REG_ALARM2) << 8); 1495 } else { 1496 /* No real-time status registers, fall back to 1497 interrupt status registers */ 1498 data->alarms = w83781d_read_value(data, 1499 W83781D_REG_ALARM1) 1500 | (w83781d_read_value(data, 1501 W83781D_REG_ALARM2) << 8); 1502 } 1503 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); 1504 data->beep_mask = (i << 8) + 1505 w83781d_read_value(data, W83781D_REG_BEEP_INTS1); 1506 if ((data->type != w83781d) && (data->type != as99127f)) { 1507 data->beep_mask |= 1508 w83781d_read_value(data, 1509 W83781D_REG_BEEP_INTS3) << 16; 1510 } 1511 data->last_updated = jiffies; 1512 data->valid = 1; 1513 } 1514 1515 mutex_unlock(&data->update_lock); 1516 1517 return data; 1518 } 1519 1520 static const struct i2c_device_id w83781d_ids[] = { 1521 { "w83781d", w83781d, }, 1522 { "w83782d", w83782d, }, 1523 { "w83783s", w83783s, }, 1524 { "as99127f", as99127f }, 1525 { /* LIST END */ } 1526 }; 1527 MODULE_DEVICE_TABLE(i2c, w83781d_ids); 1528 1529 static struct i2c_driver w83781d_driver = { 1530 .class = I2C_CLASS_HWMON, 1531 .driver = { 1532 .name = "w83781d", 1533 }, 1534 .probe = w83781d_probe, 1535 .remove = w83781d_remove, 1536 .id_table = w83781d_ids, 1537 .detect = w83781d_detect, 1538 .address_list = normal_i2c, 1539 }; 1540 1541 /* 1542 * ISA related code 1543 */ 1544 #ifdef CONFIG_ISA 1545 1546 /* ISA device, if found */ 1547 static struct platform_device *pdev; 1548 1549 static unsigned short isa_address = 0x290; 1550 1551 /* I2C devices get this name attribute automatically, but for ISA devices 1552 we must create it by ourselves. */ 1553 static ssize_t 1554 show_name(struct device *dev, struct device_attribute *devattr, char *buf) 1555 { 1556 struct w83781d_data *data = dev_get_drvdata(dev); 1557 return sprintf(buf, "%s\n", data->name); 1558 } 1559 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); 1560 1561 static struct w83781d_data *w83781d_data_if_isa(void) 1562 { 1563 return pdev ? platform_get_drvdata(pdev) : NULL; 1564 } 1565 1566 /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */ 1567 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid) 1568 { 1569 struct w83781d_data *isa; 1570 int i; 1571 1572 if (!pdev) /* No ISA chip */ 1573 return 0; 1574 1575 isa = platform_get_drvdata(pdev); 1576 1577 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr) 1578 return 0; /* Address doesn't match */ 1579 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid) 1580 return 0; /* Chip type doesn't match */ 1581 1582 /* We compare all the limit registers, the config register and the 1583 * interrupt mask registers */ 1584 for (i = 0x2b; i <= 0x3d; i++) { 1585 if (w83781d_read_value(isa, i) != 1586 i2c_smbus_read_byte_data(client, i)) 1587 return 0; 1588 } 1589 if (w83781d_read_value(isa, W83781D_REG_CONFIG) != 1590 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG)) 1591 return 0; 1592 for (i = 0x43; i <= 0x46; i++) { 1593 if (w83781d_read_value(isa, i) != 1594 i2c_smbus_read_byte_data(client, i)) 1595 return 0; 1596 } 1597 1598 return 1; 1599 } 1600 1601 static int 1602 w83781d_read_value_isa(struct w83781d_data *data, u16 reg) 1603 { 1604 int word_sized, res; 1605 1606 word_sized = (((reg & 0xff00) == 0x100) 1607 || ((reg & 0xff00) == 0x200)) 1608 && (((reg & 0x00ff) == 0x50) 1609 || ((reg & 0x00ff) == 0x53) 1610 || ((reg & 0x00ff) == 0x55)); 1611 if (reg & 0xff00) { 1612 outb_p(W83781D_REG_BANK, 1613 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1614 outb_p(reg >> 8, 1615 data->isa_addr + W83781D_DATA_REG_OFFSET); 1616 } 1617 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); 1618 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET); 1619 if (word_sized) { 1620 outb_p((reg & 0xff) + 1, 1621 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1622 res = 1623 (res << 8) + inb_p(data->isa_addr + 1624 W83781D_DATA_REG_OFFSET); 1625 } 1626 if (reg & 0xff00) { 1627 outb_p(W83781D_REG_BANK, 1628 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1629 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); 1630 } 1631 return res; 1632 } 1633 1634 static void 1635 w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value) 1636 { 1637 int word_sized; 1638 1639 word_sized = (((reg & 0xff00) == 0x100) 1640 || ((reg & 0xff00) == 0x200)) 1641 && (((reg & 0x00ff) == 0x53) 1642 || ((reg & 0x00ff) == 0x55)); 1643 if (reg & 0xff00) { 1644 outb_p(W83781D_REG_BANK, 1645 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1646 outb_p(reg >> 8, 1647 data->isa_addr + W83781D_DATA_REG_OFFSET); 1648 } 1649 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); 1650 if (word_sized) { 1651 outb_p(value >> 8, 1652 data->isa_addr + W83781D_DATA_REG_OFFSET); 1653 outb_p((reg & 0xff) + 1, 1654 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1655 } 1656 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET); 1657 if (reg & 0xff00) { 1658 outb_p(W83781D_REG_BANK, 1659 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1660 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); 1661 } 1662 } 1663 1664 /* The SMBus locks itself, usually, but nothing may access the Winbond between 1665 bank switches. ISA access must always be locked explicitly! 1666 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, 1667 would slow down the W83781D access and should not be necessary. 1668 There are some ugly typecasts here, but the good news is - they should 1669 nowhere else be necessary! */ 1670 static int 1671 w83781d_read_value(struct w83781d_data *data, u16 reg) 1672 { 1673 struct i2c_client *client = data->client; 1674 int res; 1675 1676 mutex_lock(&data->lock); 1677 if (client) 1678 res = w83781d_read_value_i2c(data, reg); 1679 else 1680 res = w83781d_read_value_isa(data, reg); 1681 mutex_unlock(&data->lock); 1682 return res; 1683 } 1684 1685 static int 1686 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) 1687 { 1688 struct i2c_client *client = data->client; 1689 1690 mutex_lock(&data->lock); 1691 if (client) 1692 w83781d_write_value_i2c(data, reg, value); 1693 else 1694 w83781d_write_value_isa(data, reg, value); 1695 mutex_unlock(&data->lock); 1696 return 0; 1697 } 1698 1699 static int __devinit 1700 w83781d_isa_probe(struct platform_device *pdev) 1701 { 1702 int err, reg; 1703 struct w83781d_data *data; 1704 struct resource *res; 1705 1706 /* Reserve the ISA region */ 1707 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1708 if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2, 1709 "w83781d")) { 1710 err = -EBUSY; 1711 goto exit; 1712 } 1713 1714 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL); 1715 if (!data) { 1716 err = -ENOMEM; 1717 goto exit_release_region; 1718 } 1719 mutex_init(&data->lock); 1720 data->isa_addr = res->start; 1721 platform_set_drvdata(pdev, data); 1722 1723 reg = w83781d_read_value(data, W83781D_REG_WCHIPID); 1724 switch (reg) { 1725 case 0x30: 1726 data->type = w83782d; 1727 data->name = "w83782d"; 1728 break; 1729 default: 1730 data->type = w83781d; 1731 data->name = "w83781d"; 1732 } 1733 1734 /* Initialize the W83781D chip */ 1735 w83781d_init_device(&pdev->dev); 1736 1737 /* Register sysfs hooks */ 1738 err = w83781d_create_files(&pdev->dev, data->type, 1); 1739 if (err) 1740 goto exit_remove_files; 1741 1742 err = device_create_file(&pdev->dev, &dev_attr_name); 1743 if (err) 1744 goto exit_remove_files; 1745 1746 data->hwmon_dev = hwmon_device_register(&pdev->dev); 1747 if (IS_ERR(data->hwmon_dev)) { 1748 err = PTR_ERR(data->hwmon_dev); 1749 goto exit_remove_files; 1750 } 1751 1752 return 0; 1753 1754 exit_remove_files: 1755 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group); 1756 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt); 1757 device_remove_file(&pdev->dev, &dev_attr_name); 1758 kfree(data); 1759 exit_release_region: 1760 release_region(res->start + W83781D_ADDR_REG_OFFSET, 2); 1761 exit: 1762 return err; 1763 } 1764 1765 static int __devexit 1766 w83781d_isa_remove(struct platform_device *pdev) 1767 { 1768 struct w83781d_data *data = platform_get_drvdata(pdev); 1769 1770 hwmon_device_unregister(data->hwmon_dev); 1771 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group); 1772 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt); 1773 device_remove_file(&pdev->dev, &dev_attr_name); 1774 release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2); 1775 kfree(data); 1776 1777 return 0; 1778 } 1779 1780 static struct platform_driver w83781d_isa_driver = { 1781 .driver = { 1782 .owner = THIS_MODULE, 1783 .name = "w83781d", 1784 }, 1785 .probe = w83781d_isa_probe, 1786 .remove = __devexit_p(w83781d_isa_remove), 1787 }; 1788 1789 /* return 1 if a supported chip is found, 0 otherwise */ 1790 static int __init 1791 w83781d_isa_found(unsigned short address) 1792 { 1793 int val, save, found = 0; 1794 int port; 1795 1796 /* Some boards declare base+0 to base+7 as a PNP device, some base+4 1797 * to base+7 and some base+5 to base+6. So we better request each port 1798 * individually for the probing phase. */ 1799 for (port = address; port < address + W83781D_EXTENT; port++) { 1800 if (!request_region(port, 1, "w83781d")) { 1801 pr_debug("w83781d: Failed to request port 0x%x\n", 1802 port); 1803 goto release; 1804 } 1805 } 1806 1807 #define REALLY_SLOW_IO 1808 /* We need the timeouts for at least some W83781D-like 1809 chips. But only if we read 'undefined' registers. */ 1810 val = inb_p(address + 1); 1811 if (inb_p(address + 2) != val 1812 || inb_p(address + 3) != val 1813 || inb_p(address + 7) != val) { 1814 pr_debug("w83781d: Detection failed at step 1\n"); 1815 goto release; 1816 } 1817 #undef REALLY_SLOW_IO 1818 1819 /* We should be able to change the 7 LSB of the address port. The 1820 MSB (busy flag) should be clear initially, set after the write. */ 1821 save = inb_p(address + W83781D_ADDR_REG_OFFSET); 1822 if (save & 0x80) { 1823 pr_debug("w83781d: Detection failed at step 2\n"); 1824 goto release; 1825 } 1826 val = ~save & 0x7f; 1827 outb_p(val, address + W83781D_ADDR_REG_OFFSET); 1828 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) { 1829 outb_p(save, address + W83781D_ADDR_REG_OFFSET); 1830 pr_debug("w83781d: Detection failed at step 3\n"); 1831 goto release; 1832 } 1833 1834 /* We found a device, now see if it could be a W83781D */ 1835 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET); 1836 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1837 if (val & 0x80) { 1838 pr_debug("w83781d: Detection failed at step 4\n"); 1839 goto release; 1840 } 1841 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); 1842 save = inb_p(address + W83781D_DATA_REG_OFFSET); 1843 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET); 1844 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1845 if ((!(save & 0x80) && (val != 0xa3)) 1846 || ((save & 0x80) && (val != 0x5c))) { 1847 pr_debug("w83781d: Detection failed at step 5\n"); 1848 goto release; 1849 } 1850 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET); 1851 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1852 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */ 1853 pr_debug("w83781d: Detection failed at step 6\n"); 1854 goto release; 1855 } 1856 1857 /* The busy flag should be clear again */ 1858 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) { 1859 pr_debug("w83781d: Detection failed at step 7\n"); 1860 goto release; 1861 } 1862 1863 /* Determine the chip type */ 1864 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); 1865 save = inb_p(address + W83781D_DATA_REG_OFFSET); 1866 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET); 1867 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET); 1868 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1869 if ((val & 0xfe) == 0x10 /* W83781D */ 1870 || val == 0x30) /* W83782D */ 1871 found = 1; 1872 1873 if (found) 1874 pr_info("w83781d: Found a %s chip at %#x\n", 1875 val == 0x30 ? "W83782D" : "W83781D", (int)address); 1876 1877 release: 1878 for (port--; port >= address; port--) 1879 release_region(port, 1); 1880 return found; 1881 } 1882 1883 static int __init 1884 w83781d_isa_device_add(unsigned short address) 1885 { 1886 struct resource res = { 1887 .start = address, 1888 .end = address + W83781D_EXTENT - 1, 1889 .name = "w83781d", 1890 .flags = IORESOURCE_IO, 1891 }; 1892 int err; 1893 1894 pdev = platform_device_alloc("w83781d", address); 1895 if (!pdev) { 1896 err = -ENOMEM; 1897 printk(KERN_ERR "w83781d: Device allocation failed\n"); 1898 goto exit; 1899 } 1900 1901 err = platform_device_add_resources(pdev, &res, 1); 1902 if (err) { 1903 printk(KERN_ERR "w83781d: Device resource addition failed " 1904 "(%d)\n", err); 1905 goto exit_device_put; 1906 } 1907 1908 err = platform_device_add(pdev); 1909 if (err) { 1910 printk(KERN_ERR "w83781d: Device addition failed (%d)\n", 1911 err); 1912 goto exit_device_put; 1913 } 1914 1915 return 0; 1916 1917 exit_device_put: 1918 platform_device_put(pdev); 1919 exit: 1920 pdev = NULL; 1921 return err; 1922 } 1923 1924 static int __init 1925 w83781d_isa_register(void) 1926 { 1927 int res; 1928 1929 if (w83781d_isa_found(isa_address)) { 1930 res = platform_driver_register(&w83781d_isa_driver); 1931 if (res) 1932 goto exit; 1933 1934 /* Sets global pdev as a side effect */ 1935 res = w83781d_isa_device_add(isa_address); 1936 if (res) 1937 goto exit_unreg_isa_driver; 1938 } 1939 1940 return 0; 1941 1942 exit_unreg_isa_driver: 1943 platform_driver_unregister(&w83781d_isa_driver); 1944 exit: 1945 return res; 1946 } 1947 1948 static void 1949 w83781d_isa_unregister(void) 1950 { 1951 if (pdev) { 1952 platform_device_unregister(pdev); 1953 platform_driver_unregister(&w83781d_isa_driver); 1954 } 1955 } 1956 #else /* !CONFIG_ISA */ 1957 1958 static struct w83781d_data *w83781d_data_if_isa(void) 1959 { 1960 return NULL; 1961 } 1962 1963 static int 1964 w83781d_alias_detect(struct i2c_client *client, u8 chipid) 1965 { 1966 return 0; 1967 } 1968 1969 static int 1970 w83781d_read_value(struct w83781d_data *data, u16 reg) 1971 { 1972 int res; 1973 1974 mutex_lock(&data->lock); 1975 res = w83781d_read_value_i2c(data, reg); 1976 mutex_unlock(&data->lock); 1977 1978 return res; 1979 } 1980 1981 static int 1982 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) 1983 { 1984 mutex_lock(&data->lock); 1985 w83781d_write_value_i2c(data, reg, value); 1986 mutex_unlock(&data->lock); 1987 1988 return 0; 1989 } 1990 1991 static int __init 1992 w83781d_isa_register(void) 1993 { 1994 return 0; 1995 } 1996 1997 static void 1998 w83781d_isa_unregister(void) 1999 { 2000 } 2001 #endif /* CONFIG_ISA */ 2002 2003 static int __init 2004 sensors_w83781d_init(void) 2005 { 2006 int res; 2007 2008 /* We register the ISA device first, so that we can skip the 2009 * registration of an I2C interface to the same device. */ 2010 res = w83781d_isa_register(); 2011 if (res) 2012 goto exit; 2013 2014 res = i2c_add_driver(&w83781d_driver); 2015 if (res) 2016 goto exit_unreg_isa; 2017 2018 return 0; 2019 2020 exit_unreg_isa: 2021 w83781d_isa_unregister(); 2022 exit: 2023 return res; 2024 } 2025 2026 static void __exit 2027 sensors_w83781d_exit(void) 2028 { 2029 w83781d_isa_unregister(); 2030 i2c_del_driver(&w83781d_driver); 2031 } 2032 2033 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " 2034 "Philip Edelbrock <phil@netroedge.com>, " 2035 "and Mark Studebaker <mdsxyz123@yahoo.com>"); 2036 MODULE_DESCRIPTION("W83781D driver"); 2037 MODULE_LICENSE("GPL"); 2038 2039 module_init(sensors_w83781d_init); 2040 module_exit(sensors_w83781d_exit); 2041