1 /* 2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware 3 monitoring 4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, 5 Philip Edelbrock <phil@netroedge.com>, 6 and Mark Studebaker <mdsxyz123@yahoo.com> 7 Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org> 8 9 This program is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 2 of the License, or 12 (at your option) any later version. 13 14 This program is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; if not, write to the Free Software 21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 */ 23 24 /* 25 Supports following chips: 26 27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA 28 as99127f 7 3 0 3 0x31 0x12c3 yes no 29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no 30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes 31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes 32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no 33 34 */ 35 36 #include <linux/module.h> 37 #include <linux/init.h> 38 #include <linux/slab.h> 39 #include <linux/jiffies.h> 40 #include <linux/i2c.h> 41 #include <linux/hwmon.h> 42 #include <linux/hwmon-vid.h> 43 #include <linux/hwmon-sysfs.h> 44 #include <linux/sysfs.h> 45 #include <linux/err.h> 46 #include <linux/mutex.h> 47 48 #ifdef CONFIG_ISA 49 #include <linux/platform_device.h> 50 #include <linux/ioport.h> 51 #include <asm/io.h> 52 #endif 53 54 #include "lm75.h" 55 56 /* Addresses to scan */ 57 static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 58 0x2e, 0x2f, I2C_CLIENT_END }; 59 /* Insmod parameters */ 60 I2C_CLIENT_INSMOD_4(w83781d, w83782d, w83783s, as99127f); 61 62 static unsigned short force_subclients[4]; 63 module_param_array(force_subclients, short, NULL, 0); 64 MODULE_PARM_DESC(force_subclients, "List of subclient addresses: " 65 "{bus, clientaddr, subclientaddr1, subclientaddr2}"); 66 67 static int reset; 68 module_param(reset, bool, 0); 69 MODULE_PARM_DESC(reset, "Set to one to reset chip on load"); 70 71 static int init = 1; 72 module_param(init, bool, 0); 73 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); 74 75 /* Constants specified below */ 76 77 /* Length of ISA address segment */ 78 #define W83781D_EXTENT 8 79 80 /* Where are the ISA address/data registers relative to the base address */ 81 #define W83781D_ADDR_REG_OFFSET 5 82 #define W83781D_DATA_REG_OFFSET 6 83 84 /* The device registers */ 85 /* in nr from 0 to 8 */ 86 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ 87 (0x554 + (((nr) - 7) * 2))) 88 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ 89 (0x555 + (((nr) - 7) * 2))) 90 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ 91 (0x550 + (nr) - 7)) 92 93 /* fan nr from 0 to 2 */ 94 #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr)) 95 #define W83781D_REG_FAN(nr) (0x28 + (nr)) 96 97 #define W83781D_REG_BANK 0x4E 98 #define W83781D_REG_TEMP2_CONFIG 0x152 99 #define W83781D_REG_TEMP3_CONFIG 0x252 100 /* temp nr from 1 to 3 */ 101 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ 102 ((nr == 2) ? (0x0150) : \ 103 (0x27))) 104 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ 105 ((nr == 2) ? (0x153) : \ 106 (0x3A))) 107 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ 108 ((nr == 2) ? (0x155) : \ 109 (0x39))) 110 111 #define W83781D_REG_CONFIG 0x40 112 113 /* Interrupt status (W83781D, AS99127F) */ 114 #define W83781D_REG_ALARM1 0x41 115 #define W83781D_REG_ALARM2 0x42 116 117 /* Real-time status (W83782D, W83783S) */ 118 #define W83782D_REG_ALARM1 0x459 119 #define W83782D_REG_ALARM2 0x45A 120 #define W83782D_REG_ALARM3 0x45B 121 122 #define W83781D_REG_BEEP_CONFIG 0x4D 123 #define W83781D_REG_BEEP_INTS1 0x56 124 #define W83781D_REG_BEEP_INTS2 0x57 125 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ 126 127 #define W83781D_REG_VID_FANDIV 0x47 128 129 #define W83781D_REG_CHIPID 0x49 130 #define W83781D_REG_WCHIPID 0x58 131 #define W83781D_REG_CHIPMAN 0x4F 132 #define W83781D_REG_PIN 0x4B 133 134 /* 782D/783S only */ 135 #define W83781D_REG_VBAT 0x5D 136 137 /* PWM 782D (1-4) and 783S (1-2) only */ 138 static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F }; 139 #define W83781D_REG_PWMCLK12 0x5C 140 #define W83781D_REG_PWMCLK34 0x45C 141 142 #define W83781D_REG_I2C_ADDR 0x48 143 #define W83781D_REG_I2C_SUBADDR 0x4A 144 145 /* The following are undocumented in the data sheets however we 146 received the information in an email from Winbond tech support */ 147 /* Sensor selection - not on 781d */ 148 #define W83781D_REG_SCFG1 0x5D 149 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; 150 151 #define W83781D_REG_SCFG2 0x59 152 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; 153 154 #define W83781D_DEFAULT_BETA 3435 155 156 /* Conversions */ 157 #define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255) 158 #define IN_FROM_REG(val) ((val) * 16) 159 160 static inline u8 161 FAN_TO_REG(long rpm, int div) 162 { 163 if (rpm == 0) 164 return 255; 165 rpm = SENSORS_LIMIT(rpm, 1, 1000000); 166 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); 167 } 168 169 static inline long 170 FAN_FROM_REG(u8 val, int div) 171 { 172 if (val == 0) 173 return -1; 174 if (val == 255) 175 return 0; 176 return 1350000 / (val * div); 177 } 178 179 #define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128) 180 #define TEMP_FROM_REG(val) ((val) * 1000) 181 182 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \ 183 (~(val)) & 0x7fff : (val) & 0xff7fff) 184 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \ 185 (~(val)) & 0x7fff : (val) & 0xff7fff) 186 187 #define DIV_FROM_REG(val) (1 << (val)) 188 189 static inline u8 190 DIV_TO_REG(long val, enum chips type) 191 { 192 int i; 193 val = SENSORS_LIMIT(val, 1, 194 ((type == w83781d 195 || type == as99127f) ? 8 : 128)) >> 1; 196 for (i = 0; i < 7; i++) { 197 if (val == 0) 198 break; 199 val >>= 1; 200 } 201 return i; 202 } 203 204 struct w83781d_data { 205 struct i2c_client *client; 206 struct device *hwmon_dev; 207 struct mutex lock; 208 enum chips type; 209 210 /* For ISA device only */ 211 const char *name; 212 int isa_addr; 213 214 struct mutex update_lock; 215 char valid; /* !=0 if following fields are valid */ 216 unsigned long last_updated; /* In jiffies */ 217 218 struct i2c_client *lm75[2]; /* for secondary I2C addresses */ 219 /* array of 2 pointers to subclients */ 220 221 u8 in[9]; /* Register value - 8 & 9 for 782D only */ 222 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ 223 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ 224 u8 fan[3]; /* Register value */ 225 u8 fan_min[3]; /* Register value */ 226 s8 temp; /* Register value */ 227 s8 temp_max; /* Register value */ 228 s8 temp_max_hyst; /* Register value */ 229 u16 temp_add[2]; /* Register value */ 230 u16 temp_max_add[2]; /* Register value */ 231 u16 temp_max_hyst_add[2]; /* Register value */ 232 u8 fan_div[3]; /* Register encoding, shifted right */ 233 u8 vid; /* Register encoding, combined */ 234 u32 alarms; /* Register encoding, combined */ 235 u32 beep_mask; /* Register encoding, combined */ 236 u8 pwm[4]; /* Register value */ 237 u8 pwm2_enable; /* Boolean */ 238 u16 sens[3]; /* 782D/783S only. 239 1 = pentium diode; 2 = 3904 diode; 240 4 = thermistor */ 241 u8 vrm; 242 }; 243 244 static struct w83781d_data *w83781d_data_if_isa(void); 245 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid); 246 247 static int w83781d_read_value(struct w83781d_data *data, u16 reg); 248 static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value); 249 static struct w83781d_data *w83781d_update_device(struct device *dev); 250 static void w83781d_init_device(struct device *dev); 251 252 /* following are the sysfs callback functions */ 253 #define show_in_reg(reg) \ 254 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ 255 char *buf) \ 256 { \ 257 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 258 struct w83781d_data *data = w83781d_update_device(dev); \ 259 return sprintf(buf, "%ld\n", \ 260 (long)IN_FROM_REG(data->reg[attr->index])); \ 261 } 262 show_in_reg(in); 263 show_in_reg(in_min); 264 show_in_reg(in_max); 265 266 #define store_in_reg(REG, reg) \ 267 static ssize_t store_in_##reg (struct device *dev, struct device_attribute \ 268 *da, const char *buf, size_t count) \ 269 { \ 270 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 271 struct w83781d_data *data = dev_get_drvdata(dev); \ 272 int nr = attr->index; \ 273 u32 val; \ 274 \ 275 val = simple_strtoul(buf, NULL, 10); \ 276 \ 277 mutex_lock(&data->update_lock); \ 278 data->in_##reg[nr] = IN_TO_REG(val); \ 279 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ 280 \ 281 mutex_unlock(&data->update_lock); \ 282 return count; \ 283 } 284 store_in_reg(MIN, min); 285 store_in_reg(MAX, max); 286 287 #define sysfs_in_offsets(offset) \ 288 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ 289 show_in, NULL, offset); \ 290 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \ 291 show_in_min, store_in_min, offset); \ 292 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \ 293 show_in_max, store_in_max, offset) 294 295 sysfs_in_offsets(0); 296 sysfs_in_offsets(1); 297 sysfs_in_offsets(2); 298 sysfs_in_offsets(3); 299 sysfs_in_offsets(4); 300 sysfs_in_offsets(5); 301 sysfs_in_offsets(6); 302 sysfs_in_offsets(7); 303 sysfs_in_offsets(8); 304 305 #define show_fan_reg(reg) \ 306 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ 307 char *buf) \ 308 { \ 309 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 310 struct w83781d_data *data = w83781d_update_device(dev); \ 311 return sprintf(buf,"%ld\n", \ 312 FAN_FROM_REG(data->reg[attr->index], \ 313 DIV_FROM_REG(data->fan_div[attr->index]))); \ 314 } 315 show_fan_reg(fan); 316 show_fan_reg(fan_min); 317 318 static ssize_t 319 store_fan_min(struct device *dev, struct device_attribute *da, 320 const char *buf, size_t count) 321 { 322 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 323 struct w83781d_data *data = dev_get_drvdata(dev); 324 int nr = attr->index; 325 u32 val; 326 327 val = simple_strtoul(buf, NULL, 10); 328 329 mutex_lock(&data->update_lock); 330 data->fan_min[nr] = 331 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); 332 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), 333 data->fan_min[nr]); 334 335 mutex_unlock(&data->update_lock); 336 return count; 337 } 338 339 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); 340 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, 341 show_fan_min, store_fan_min, 0); 342 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); 343 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, 344 show_fan_min, store_fan_min, 1); 345 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); 346 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, 347 show_fan_min, store_fan_min, 2); 348 349 #define show_temp_reg(reg) \ 350 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \ 351 char *buf) \ 352 { \ 353 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 354 struct w83781d_data *data = w83781d_update_device(dev); \ 355 int nr = attr->index; \ 356 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 357 return sprintf(buf,"%d\n", \ 358 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ 359 } else { /* TEMP1 */ \ 360 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ 361 } \ 362 } 363 show_temp_reg(temp); 364 show_temp_reg(temp_max); 365 show_temp_reg(temp_max_hyst); 366 367 #define store_temp_reg(REG, reg) \ 368 static ssize_t store_temp_##reg (struct device *dev, \ 369 struct device_attribute *da, const char *buf, size_t count) \ 370 { \ 371 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \ 372 struct w83781d_data *data = dev_get_drvdata(dev); \ 373 int nr = attr->index; \ 374 long val; \ 375 \ 376 val = simple_strtol(buf, NULL, 10); \ 377 \ 378 mutex_lock(&data->update_lock); \ 379 \ 380 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 381 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ 382 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ 383 data->temp_##reg##_add[nr-2]); \ 384 } else { /* TEMP1 */ \ 385 data->temp_##reg = TEMP_TO_REG(val); \ 386 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ 387 data->temp_##reg); \ 388 } \ 389 \ 390 mutex_unlock(&data->update_lock); \ 391 return count; \ 392 } 393 store_temp_reg(OVER, max); 394 store_temp_reg(HYST, max_hyst); 395 396 #define sysfs_temp_offsets(offset) \ 397 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \ 398 show_temp, NULL, offset); \ 399 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \ 400 show_temp_max, store_temp_max, offset); \ 401 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \ 402 show_temp_max_hyst, store_temp_max_hyst, offset); 403 404 sysfs_temp_offsets(1); 405 sysfs_temp_offsets(2); 406 sysfs_temp_offsets(3); 407 408 static ssize_t 409 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) 410 { 411 struct w83781d_data *data = w83781d_update_device(dev); 412 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); 413 } 414 415 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); 416 417 static ssize_t 418 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) 419 { 420 struct w83781d_data *data = dev_get_drvdata(dev); 421 return sprintf(buf, "%ld\n", (long) data->vrm); 422 } 423 424 static ssize_t 425 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 426 { 427 struct w83781d_data *data = dev_get_drvdata(dev); 428 u32 val; 429 430 val = simple_strtoul(buf, NULL, 10); 431 data->vrm = val; 432 433 return count; 434 } 435 436 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); 437 438 static ssize_t 439 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) 440 { 441 struct w83781d_data *data = w83781d_update_device(dev); 442 return sprintf(buf, "%u\n", data->alarms); 443 } 444 445 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); 446 447 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, 448 char *buf) 449 { 450 struct w83781d_data *data = w83781d_update_device(dev); 451 int bitnr = to_sensor_dev_attr(attr)->index; 452 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); 453 } 454 455 /* The W83781D has a single alarm bit for temp2 and temp3 */ 456 static ssize_t show_temp3_alarm(struct device *dev, 457 struct device_attribute *attr, char *buf) 458 { 459 struct w83781d_data *data = w83781d_update_device(dev); 460 int bitnr = (data->type == w83781d) ? 5 : 13; 461 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); 462 } 463 464 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); 465 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); 466 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); 467 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); 468 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8); 469 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9); 470 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10); 471 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16); 472 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17); 473 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6); 474 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7); 475 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11); 476 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4); 477 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5); 478 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0); 479 480 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf) 481 { 482 struct w83781d_data *data = w83781d_update_device(dev); 483 return sprintf(buf, "%ld\n", 484 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); 485 } 486 487 static ssize_t 488 store_beep_mask(struct device *dev, struct device_attribute *attr, 489 const char *buf, size_t count) 490 { 491 struct w83781d_data *data = dev_get_drvdata(dev); 492 u32 val; 493 494 val = simple_strtoul(buf, NULL, 10); 495 496 mutex_lock(&data->update_lock); 497 data->beep_mask &= 0x8000; /* preserve beep enable */ 498 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type); 499 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, 500 data->beep_mask & 0xff); 501 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 502 (data->beep_mask >> 8) & 0xff); 503 if (data->type != w83781d && data->type != as99127f) { 504 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, 505 ((data->beep_mask) >> 16) & 0xff); 506 } 507 mutex_unlock(&data->update_lock); 508 509 return count; 510 } 511 512 static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR, 513 show_beep_mask, store_beep_mask); 514 515 static ssize_t show_beep(struct device *dev, struct device_attribute *attr, 516 char *buf) 517 { 518 struct w83781d_data *data = w83781d_update_device(dev); 519 int bitnr = to_sensor_dev_attr(attr)->index; 520 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); 521 } 522 523 static ssize_t 524 store_beep(struct device *dev, struct device_attribute *attr, 525 const char *buf, size_t count) 526 { 527 struct w83781d_data *data = dev_get_drvdata(dev); 528 int bitnr = to_sensor_dev_attr(attr)->index; 529 unsigned long bit; 530 u8 reg; 531 532 bit = simple_strtoul(buf, NULL, 10); 533 if (bit & ~1) 534 return -EINVAL; 535 536 mutex_lock(&data->update_lock); 537 if (bit) 538 data->beep_mask |= (1 << bitnr); 539 else 540 data->beep_mask &= ~(1 << bitnr); 541 542 if (bitnr < 8) { 543 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1); 544 if (bit) 545 reg |= (1 << bitnr); 546 else 547 reg &= ~(1 << bitnr); 548 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg); 549 } else if (bitnr < 16) { 550 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); 551 if (bit) 552 reg |= (1 << (bitnr - 8)); 553 else 554 reg &= ~(1 << (bitnr - 8)); 555 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg); 556 } else { 557 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3); 558 if (bit) 559 reg |= (1 << (bitnr - 16)); 560 else 561 reg &= ~(1 << (bitnr - 16)); 562 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg); 563 } 564 mutex_unlock(&data->update_lock); 565 566 return count; 567 } 568 569 /* The W83781D has a single beep bit for temp2 and temp3 */ 570 static ssize_t show_temp3_beep(struct device *dev, 571 struct device_attribute *attr, char *buf) 572 { 573 struct w83781d_data *data = w83781d_update_device(dev); 574 int bitnr = (data->type == w83781d) ? 5 : 13; 575 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); 576 } 577 578 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, 579 show_beep, store_beep, 0); 580 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR, 581 show_beep, store_beep, 1); 582 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR, 583 show_beep, store_beep, 2); 584 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR, 585 show_beep, store_beep, 3); 586 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR, 587 show_beep, store_beep, 8); 588 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR, 589 show_beep, store_beep, 9); 590 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR, 591 show_beep, store_beep, 10); 592 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR, 593 show_beep, store_beep, 16); 594 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR, 595 show_beep, store_beep, 17); 596 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR, 597 show_beep, store_beep, 6); 598 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR, 599 show_beep, store_beep, 7); 600 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR, 601 show_beep, store_beep, 11); 602 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, 603 show_beep, store_beep, 4); 604 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR, 605 show_beep, store_beep, 5); 606 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, 607 show_temp3_beep, store_beep, 13); 608 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR, 609 show_beep, store_beep, 15); 610 611 static ssize_t 612 show_fan_div(struct device *dev, struct device_attribute *da, char *buf) 613 { 614 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 615 struct w83781d_data *data = w83781d_update_device(dev); 616 return sprintf(buf, "%ld\n", 617 (long) DIV_FROM_REG(data->fan_div[attr->index])); 618 } 619 620 /* Note: we save and restore the fan minimum here, because its value is 621 determined in part by the fan divisor. This follows the principle of 622 least surprise; the user doesn't expect the fan minimum to change just 623 because the divisor changed. */ 624 static ssize_t 625 store_fan_div(struct device *dev, struct device_attribute *da, 626 const char *buf, size_t count) 627 { 628 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 629 struct w83781d_data *data = dev_get_drvdata(dev); 630 unsigned long min; 631 int nr = attr->index; 632 u8 reg; 633 unsigned long val = simple_strtoul(buf, NULL, 10); 634 635 mutex_lock(&data->update_lock); 636 637 /* Save fan_min */ 638 min = FAN_FROM_REG(data->fan_min[nr], 639 DIV_FROM_REG(data->fan_div[nr])); 640 641 data->fan_div[nr] = DIV_TO_REG(val, data->type); 642 643 reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) 644 & (nr==0 ? 0xcf : 0x3f)) 645 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); 646 w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); 647 648 /* w83781d and as99127f don't have extended divisor bits */ 649 if (data->type != w83781d && data->type != as99127f) { 650 reg = (w83781d_read_value(data, W83781D_REG_VBAT) 651 & ~(1 << (5 + nr))) 652 | ((data->fan_div[nr] & 0x04) << (3 + nr)); 653 w83781d_write_value(data, W83781D_REG_VBAT, reg); 654 } 655 656 /* Restore fan_min */ 657 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 658 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]); 659 660 mutex_unlock(&data->update_lock); 661 return count; 662 } 663 664 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, 665 show_fan_div, store_fan_div, 0); 666 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, 667 show_fan_div, store_fan_div, 1); 668 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, 669 show_fan_div, store_fan_div, 2); 670 671 static ssize_t 672 show_pwm(struct device *dev, struct device_attribute *da, char *buf) 673 { 674 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 675 struct w83781d_data *data = w83781d_update_device(dev); 676 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]); 677 } 678 679 static ssize_t 680 show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf) 681 { 682 struct w83781d_data *data = w83781d_update_device(dev); 683 return sprintf(buf, "%d\n", (int)data->pwm2_enable); 684 } 685 686 static ssize_t 687 store_pwm(struct device *dev, struct device_attribute *da, const char *buf, 688 size_t count) 689 { 690 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 691 struct w83781d_data *data = dev_get_drvdata(dev); 692 int nr = attr->index; 693 u32 val; 694 695 val = simple_strtoul(buf, NULL, 10); 696 697 mutex_lock(&data->update_lock); 698 data->pwm[nr] = SENSORS_LIMIT(val, 0, 255); 699 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]); 700 mutex_unlock(&data->update_lock); 701 return count; 702 } 703 704 static ssize_t 705 store_pwm2_enable(struct device *dev, struct device_attribute *da, 706 const char *buf, size_t count) 707 { 708 struct w83781d_data *data = dev_get_drvdata(dev); 709 u32 val, reg; 710 711 val = simple_strtoul(buf, NULL, 10); 712 713 mutex_lock(&data->update_lock); 714 715 switch (val) { 716 case 0: 717 case 1: 718 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12); 719 w83781d_write_value(data, W83781D_REG_PWMCLK12, 720 (reg & 0xf7) | (val << 3)); 721 722 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); 723 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, 724 (reg & 0xef) | (!val << 4)); 725 726 data->pwm2_enable = val; 727 break; 728 729 default: 730 mutex_unlock(&data->update_lock); 731 return -EINVAL; 732 } 733 734 mutex_unlock(&data->update_lock); 735 return count; 736 } 737 738 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0); 739 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1); 740 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2); 741 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3); 742 /* only PWM2 can be enabled/disabled */ 743 static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, 744 show_pwm2_enable, store_pwm2_enable); 745 746 static ssize_t 747 show_sensor(struct device *dev, struct device_attribute *da, char *buf) 748 { 749 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 750 struct w83781d_data *data = w83781d_update_device(dev); 751 return sprintf(buf, "%d\n", (int)data->sens[attr->index]); 752 } 753 754 static ssize_t 755 store_sensor(struct device *dev, struct device_attribute *da, 756 const char *buf, size_t count) 757 { 758 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 759 struct w83781d_data *data = dev_get_drvdata(dev); 760 int nr = attr->index; 761 u32 val, tmp; 762 763 val = simple_strtoul(buf, NULL, 10); 764 765 mutex_lock(&data->update_lock); 766 767 switch (val) { 768 case 1: /* PII/Celeron diode */ 769 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 770 w83781d_write_value(data, W83781D_REG_SCFG1, 771 tmp | BIT_SCFG1[nr]); 772 tmp = w83781d_read_value(data, W83781D_REG_SCFG2); 773 w83781d_write_value(data, W83781D_REG_SCFG2, 774 tmp | BIT_SCFG2[nr]); 775 data->sens[nr] = val; 776 break; 777 case 2: /* 3904 */ 778 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 779 w83781d_write_value(data, W83781D_REG_SCFG1, 780 tmp | BIT_SCFG1[nr]); 781 tmp = w83781d_read_value(data, W83781D_REG_SCFG2); 782 w83781d_write_value(data, W83781D_REG_SCFG2, 783 tmp & ~BIT_SCFG2[nr]); 784 data->sens[nr] = val; 785 break; 786 case W83781D_DEFAULT_BETA: 787 dev_warn(dev, "Sensor type %d is deprecated, please use 4 " 788 "instead\n", W83781D_DEFAULT_BETA); 789 /* fall through */ 790 case 4: /* thermistor */ 791 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 792 w83781d_write_value(data, W83781D_REG_SCFG1, 793 tmp & ~BIT_SCFG1[nr]); 794 data->sens[nr] = val; 795 break; 796 default: 797 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n", 798 (long) val); 799 break; 800 } 801 802 mutex_unlock(&data->update_lock); 803 return count; 804 } 805 806 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, 807 show_sensor, store_sensor, 0); 808 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, 809 show_sensor, store_sensor, 1); 810 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, 811 show_sensor, store_sensor, 2); 812 813 /* Assumes that adapter is of I2C, not ISA variety. 814 * OTHERWISE DON'T CALL THIS 815 */ 816 static int 817 w83781d_detect_subclients(struct i2c_client *new_client) 818 { 819 int i, val1 = 0, id; 820 int err; 821 int address = new_client->addr; 822 unsigned short sc_addr[2]; 823 struct i2c_adapter *adapter = new_client->adapter; 824 struct w83781d_data *data = i2c_get_clientdata(new_client); 825 enum chips kind = data->type; 826 827 id = i2c_adapter_id(adapter); 828 829 if (force_subclients[0] == id && force_subclients[1] == address) { 830 for (i = 2; i <= 3; i++) { 831 if (force_subclients[i] < 0x48 || 832 force_subclients[i] > 0x4f) { 833 dev_err(&new_client->dev, "Invalid subclient " 834 "address %d; must be 0x48-0x4f\n", 835 force_subclients[i]); 836 err = -EINVAL; 837 goto ERROR_SC_1; 838 } 839 } 840 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR, 841 (force_subclients[2] & 0x07) | 842 ((force_subclients[3] & 0x07) << 4)); 843 sc_addr[0] = force_subclients[2]; 844 } else { 845 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR); 846 sc_addr[0] = 0x48 + (val1 & 0x07); 847 } 848 849 if (kind != w83783s) { 850 if (force_subclients[0] == id && 851 force_subclients[1] == address) { 852 sc_addr[1] = force_subclients[3]; 853 } else { 854 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07); 855 } 856 if (sc_addr[0] == sc_addr[1]) { 857 dev_err(&new_client->dev, 858 "Duplicate addresses 0x%x for subclients.\n", 859 sc_addr[0]); 860 err = -EBUSY; 861 goto ERROR_SC_2; 862 } 863 } 864 865 for (i = 0; i <= 1; i++) { 866 data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]); 867 if (!data->lm75[i]) { 868 dev_err(&new_client->dev, "Subclient %d " 869 "registration at address 0x%x " 870 "failed.\n", i, sc_addr[i]); 871 err = -ENOMEM; 872 if (i == 1) 873 goto ERROR_SC_3; 874 goto ERROR_SC_2; 875 } 876 if (kind == w83783s) 877 break; 878 } 879 880 return 0; 881 882 /* Undo inits in case of errors */ 883 ERROR_SC_3: 884 i2c_unregister_device(data->lm75[0]); 885 ERROR_SC_2: 886 ERROR_SC_1: 887 return err; 888 } 889 890 #define IN_UNIT_ATTRS(X) \ 891 &sensor_dev_attr_in##X##_input.dev_attr.attr, \ 892 &sensor_dev_attr_in##X##_min.dev_attr.attr, \ 893 &sensor_dev_attr_in##X##_max.dev_attr.attr, \ 894 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \ 895 &sensor_dev_attr_in##X##_beep.dev_attr.attr 896 897 #define FAN_UNIT_ATTRS(X) \ 898 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \ 899 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \ 900 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \ 901 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \ 902 &sensor_dev_attr_fan##X##_beep.dev_attr.attr 903 904 #define TEMP_UNIT_ATTRS(X) \ 905 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \ 906 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \ 907 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \ 908 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \ 909 &sensor_dev_attr_temp##X##_beep.dev_attr.attr 910 911 static struct attribute* w83781d_attributes[] = { 912 IN_UNIT_ATTRS(0), 913 IN_UNIT_ATTRS(2), 914 IN_UNIT_ATTRS(3), 915 IN_UNIT_ATTRS(4), 916 IN_UNIT_ATTRS(5), 917 IN_UNIT_ATTRS(6), 918 FAN_UNIT_ATTRS(1), 919 FAN_UNIT_ATTRS(2), 920 FAN_UNIT_ATTRS(3), 921 TEMP_UNIT_ATTRS(1), 922 TEMP_UNIT_ATTRS(2), 923 &dev_attr_cpu0_vid.attr, 924 &dev_attr_vrm.attr, 925 &dev_attr_alarms.attr, 926 &dev_attr_beep_mask.attr, 927 &sensor_dev_attr_beep_enable.dev_attr.attr, 928 NULL 929 }; 930 static const struct attribute_group w83781d_group = { 931 .attrs = w83781d_attributes, 932 }; 933 934 static struct attribute *w83781d_attributes_opt[] = { 935 IN_UNIT_ATTRS(1), 936 IN_UNIT_ATTRS(7), 937 IN_UNIT_ATTRS(8), 938 TEMP_UNIT_ATTRS(3), 939 &sensor_dev_attr_pwm1.dev_attr.attr, 940 &sensor_dev_attr_pwm2.dev_attr.attr, 941 &sensor_dev_attr_pwm3.dev_attr.attr, 942 &sensor_dev_attr_pwm4.dev_attr.attr, 943 &dev_attr_pwm2_enable.attr, 944 &sensor_dev_attr_temp1_type.dev_attr.attr, 945 &sensor_dev_attr_temp2_type.dev_attr.attr, 946 &sensor_dev_attr_temp3_type.dev_attr.attr, 947 NULL 948 }; 949 static const struct attribute_group w83781d_group_opt = { 950 .attrs = w83781d_attributes_opt, 951 }; 952 953 /* No clean up is done on error, it's up to the caller */ 954 static int 955 w83781d_create_files(struct device *dev, int kind, int is_isa) 956 { 957 int err; 958 959 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group))) 960 return err; 961 962 if (kind != w83783s) { 963 if ((err = device_create_file(dev, 964 &sensor_dev_attr_in1_input.dev_attr)) 965 || (err = device_create_file(dev, 966 &sensor_dev_attr_in1_min.dev_attr)) 967 || (err = device_create_file(dev, 968 &sensor_dev_attr_in1_max.dev_attr)) 969 || (err = device_create_file(dev, 970 &sensor_dev_attr_in1_alarm.dev_attr)) 971 || (err = device_create_file(dev, 972 &sensor_dev_attr_in1_beep.dev_attr))) 973 return err; 974 } 975 if (kind != as99127f && kind != w83781d && kind != w83783s) { 976 if ((err = device_create_file(dev, 977 &sensor_dev_attr_in7_input.dev_attr)) 978 || (err = device_create_file(dev, 979 &sensor_dev_attr_in7_min.dev_attr)) 980 || (err = device_create_file(dev, 981 &sensor_dev_attr_in7_max.dev_attr)) 982 || (err = device_create_file(dev, 983 &sensor_dev_attr_in7_alarm.dev_attr)) 984 || (err = device_create_file(dev, 985 &sensor_dev_attr_in7_beep.dev_attr)) 986 || (err = device_create_file(dev, 987 &sensor_dev_attr_in8_input.dev_attr)) 988 || (err = device_create_file(dev, 989 &sensor_dev_attr_in8_min.dev_attr)) 990 || (err = device_create_file(dev, 991 &sensor_dev_attr_in8_max.dev_attr)) 992 || (err = device_create_file(dev, 993 &sensor_dev_attr_in8_alarm.dev_attr)) 994 || (err = device_create_file(dev, 995 &sensor_dev_attr_in8_beep.dev_attr))) 996 return err; 997 } 998 if (kind != w83783s) { 999 if ((err = device_create_file(dev, 1000 &sensor_dev_attr_temp3_input.dev_attr)) 1001 || (err = device_create_file(dev, 1002 &sensor_dev_attr_temp3_max.dev_attr)) 1003 || (err = device_create_file(dev, 1004 &sensor_dev_attr_temp3_max_hyst.dev_attr)) 1005 || (err = device_create_file(dev, 1006 &sensor_dev_attr_temp3_alarm.dev_attr)) 1007 || (err = device_create_file(dev, 1008 &sensor_dev_attr_temp3_beep.dev_attr))) 1009 return err; 1010 1011 if (kind != w83781d) { 1012 err = sysfs_chmod_file(&dev->kobj, 1013 &sensor_dev_attr_temp3_alarm.dev_attr.attr, 1014 S_IRUGO | S_IWUSR); 1015 if (err) 1016 return err; 1017 } 1018 } 1019 1020 if (kind != w83781d && kind != as99127f) { 1021 if ((err = device_create_file(dev, 1022 &sensor_dev_attr_pwm1.dev_attr)) 1023 || (err = device_create_file(dev, 1024 &sensor_dev_attr_pwm2.dev_attr)) 1025 || (err = device_create_file(dev, &dev_attr_pwm2_enable))) 1026 return err; 1027 } 1028 if (kind == w83782d && !is_isa) { 1029 if ((err = device_create_file(dev, 1030 &sensor_dev_attr_pwm3.dev_attr)) 1031 || (err = device_create_file(dev, 1032 &sensor_dev_attr_pwm4.dev_attr))) 1033 return err; 1034 } 1035 1036 if (kind != as99127f && kind != w83781d) { 1037 if ((err = device_create_file(dev, 1038 &sensor_dev_attr_temp1_type.dev_attr)) 1039 || (err = device_create_file(dev, 1040 &sensor_dev_attr_temp2_type.dev_attr))) 1041 return err; 1042 if (kind != w83783s) { 1043 if ((err = device_create_file(dev, 1044 &sensor_dev_attr_temp3_type.dev_attr))) 1045 return err; 1046 } 1047 } 1048 1049 return 0; 1050 } 1051 1052 /* Return 0 if detection is successful, -ENODEV otherwise */ 1053 static int 1054 w83781d_detect(struct i2c_client *client, int kind, 1055 struct i2c_board_info *info) 1056 { 1057 int val1 = 0, val2; 1058 struct w83781d_data *isa = w83781d_data_if_isa(); 1059 struct i2c_adapter *adapter = client->adapter; 1060 int address = client->addr; 1061 const char *client_name = ""; 1062 enum vendor { winbond, asus } vendid; 1063 1064 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 1065 return -ENODEV; 1066 1067 /* We block updates of the ISA device to minimize the risk of 1068 concurrent access to the same W83781D chip through different 1069 interfaces. */ 1070 if (isa) 1071 mutex_lock(&isa->update_lock); 1072 1073 /* The w8378?d may be stuck in some other bank than bank 0. This may 1074 make reading other information impossible. Specify a force=... or 1075 force_*=... parameter, and the Winbond will be reset to the right 1076 bank. */ 1077 if (kind < 0) { 1078 if (i2c_smbus_read_byte_data 1079 (client, W83781D_REG_CONFIG) & 0x80) { 1080 dev_dbg(&adapter->dev, "Detection of w83781d chip " 1081 "failed at step 3\n"); 1082 goto err_nodev; 1083 } 1084 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK); 1085 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); 1086 /* Check for Winbond or Asus ID if in bank 0 */ 1087 if ((!(val1 & 0x07)) && 1088 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)) 1089 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) { 1090 dev_dbg(&adapter->dev, "Detection of w83781d chip " 1091 "failed at step 4\n"); 1092 goto err_nodev; 1093 } 1094 /* If Winbond SMBus, check address at 0x48. 1095 Asus doesn't support, except for as99127f rev.2 */ 1096 if ((!(val1 & 0x80) && (val2 == 0xa3)) || 1097 ((val1 & 0x80) && (val2 == 0x5c))) { 1098 if (i2c_smbus_read_byte_data 1099 (client, W83781D_REG_I2C_ADDR) != address) { 1100 dev_dbg(&adapter->dev, "Detection of w83781d " 1101 "chip failed at step 5\n"); 1102 goto err_nodev; 1103 } 1104 } 1105 } 1106 1107 /* We have either had a force parameter, or we have already detected the 1108 Winbond. Put it now into bank 0 and Vendor ID High Byte */ 1109 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1110 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK) 1111 & 0x78) | 0x80); 1112 1113 /* Determine the chip type. */ 1114 if (kind <= 0) { 1115 /* get vendor ID */ 1116 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN); 1117 if (val2 == 0x5c) 1118 vendid = winbond; 1119 else if (val2 == 0x12) 1120 vendid = asus; 1121 else { 1122 dev_dbg(&adapter->dev, "w83781d chip vendor is " 1123 "neither Winbond nor Asus\n"); 1124 goto err_nodev; 1125 } 1126 1127 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID); 1128 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) 1129 kind = w83781d; 1130 else if (val1 == 0x30 && vendid == winbond) 1131 kind = w83782d; 1132 else if (val1 == 0x40 && vendid == winbond && address == 0x2d) 1133 kind = w83783s; 1134 else if (val1 == 0x31) 1135 kind = as99127f; 1136 else { 1137 if (kind == 0) 1138 dev_warn(&adapter->dev, "Ignoring 'force' " 1139 "parameter for unknown chip at " 1140 "address 0x%02x\n", address); 1141 goto err_nodev; 1142 } 1143 1144 if ((kind == w83781d || kind == w83782d) 1145 && w83781d_alias_detect(client, val1)) { 1146 dev_dbg(&adapter->dev, "Device at 0x%02x appears to " 1147 "be the same as ISA device\n", address); 1148 goto err_nodev; 1149 } 1150 } 1151 1152 if (isa) 1153 mutex_unlock(&isa->update_lock); 1154 1155 if (kind == w83781d) { 1156 client_name = "w83781d"; 1157 } else if (kind == w83782d) { 1158 client_name = "w83782d"; 1159 } else if (kind == w83783s) { 1160 client_name = "w83783s"; 1161 } else if (kind == as99127f) { 1162 client_name = "as99127f"; 1163 } 1164 1165 strlcpy(info->type, client_name, I2C_NAME_SIZE); 1166 1167 return 0; 1168 1169 err_nodev: 1170 if (isa) 1171 mutex_unlock(&isa->update_lock); 1172 return -ENODEV; 1173 } 1174 1175 static int 1176 w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id) 1177 { 1178 struct device *dev = &client->dev; 1179 struct w83781d_data *data; 1180 int err; 1181 1182 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL); 1183 if (!data) { 1184 err = -ENOMEM; 1185 goto ERROR1; 1186 } 1187 1188 i2c_set_clientdata(client, data); 1189 mutex_init(&data->lock); 1190 mutex_init(&data->update_lock); 1191 1192 data->type = id->driver_data; 1193 data->client = client; 1194 1195 /* attach secondary i2c lm75-like clients */ 1196 err = w83781d_detect_subclients(client); 1197 if (err) 1198 goto ERROR3; 1199 1200 /* Initialize the chip */ 1201 w83781d_init_device(dev); 1202 1203 /* Register sysfs hooks */ 1204 err = w83781d_create_files(dev, data->type, 0); 1205 if (err) 1206 goto ERROR4; 1207 1208 data->hwmon_dev = hwmon_device_register(dev); 1209 if (IS_ERR(data->hwmon_dev)) { 1210 err = PTR_ERR(data->hwmon_dev); 1211 goto ERROR4; 1212 } 1213 1214 return 0; 1215 1216 ERROR4: 1217 sysfs_remove_group(&dev->kobj, &w83781d_group); 1218 sysfs_remove_group(&dev->kobj, &w83781d_group_opt); 1219 1220 if (data->lm75[0]) 1221 i2c_unregister_device(data->lm75[0]); 1222 if (data->lm75[1]) 1223 i2c_unregister_device(data->lm75[1]); 1224 ERROR3: 1225 i2c_set_clientdata(client, NULL); 1226 kfree(data); 1227 ERROR1: 1228 return err; 1229 } 1230 1231 static int 1232 w83781d_remove(struct i2c_client *client) 1233 { 1234 struct w83781d_data *data = i2c_get_clientdata(client); 1235 struct device *dev = &client->dev; 1236 1237 hwmon_device_unregister(data->hwmon_dev); 1238 1239 sysfs_remove_group(&dev->kobj, &w83781d_group); 1240 sysfs_remove_group(&dev->kobj, &w83781d_group_opt); 1241 1242 if (data->lm75[0]) 1243 i2c_unregister_device(data->lm75[0]); 1244 if (data->lm75[1]) 1245 i2c_unregister_device(data->lm75[1]); 1246 1247 i2c_set_clientdata(client, NULL); 1248 kfree(data); 1249 1250 return 0; 1251 } 1252 1253 static int 1254 w83781d_read_value_i2c(struct w83781d_data *data, u16 reg) 1255 { 1256 struct i2c_client *client = data->client; 1257 int res, bank; 1258 struct i2c_client *cl; 1259 1260 bank = (reg >> 8) & 0x0f; 1261 if (bank > 2) 1262 /* switch banks */ 1263 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1264 bank); 1265 if (bank == 0 || bank > 2) { 1266 res = i2c_smbus_read_byte_data(client, reg & 0xff); 1267 } else { 1268 /* switch to subclient */ 1269 cl = data->lm75[bank - 1]; 1270 /* convert from ISA to LM75 I2C addresses */ 1271 switch (reg & 0xff) { 1272 case 0x50: /* TEMP */ 1273 res = swab16(i2c_smbus_read_word_data(cl, 0)); 1274 break; 1275 case 0x52: /* CONFIG */ 1276 res = i2c_smbus_read_byte_data(cl, 1); 1277 break; 1278 case 0x53: /* HYST */ 1279 res = swab16(i2c_smbus_read_word_data(cl, 2)); 1280 break; 1281 case 0x55: /* OVER */ 1282 default: 1283 res = swab16(i2c_smbus_read_word_data(cl, 3)); 1284 break; 1285 } 1286 } 1287 if (bank > 2) 1288 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1289 1290 return res; 1291 } 1292 1293 static int 1294 w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value) 1295 { 1296 struct i2c_client *client = data->client; 1297 int bank; 1298 struct i2c_client *cl; 1299 1300 bank = (reg >> 8) & 0x0f; 1301 if (bank > 2) 1302 /* switch banks */ 1303 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1304 bank); 1305 if (bank == 0 || bank > 2) { 1306 i2c_smbus_write_byte_data(client, reg & 0xff, 1307 value & 0xff); 1308 } else { 1309 /* switch to subclient */ 1310 cl = data->lm75[bank - 1]; 1311 /* convert from ISA to LM75 I2C addresses */ 1312 switch (reg & 0xff) { 1313 case 0x52: /* CONFIG */ 1314 i2c_smbus_write_byte_data(cl, 1, value & 0xff); 1315 break; 1316 case 0x53: /* HYST */ 1317 i2c_smbus_write_word_data(cl, 2, swab16(value)); 1318 break; 1319 case 0x55: /* OVER */ 1320 i2c_smbus_write_word_data(cl, 3, swab16(value)); 1321 break; 1322 } 1323 } 1324 if (bank > 2) 1325 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1326 1327 return 0; 1328 } 1329 1330 static void 1331 w83781d_init_device(struct device *dev) 1332 { 1333 struct w83781d_data *data = dev_get_drvdata(dev); 1334 int i, p; 1335 int type = data->type; 1336 u8 tmp; 1337 1338 if (reset && type != as99127f) { /* this resets registers we don't have 1339 documentation for on the as99127f */ 1340 /* Resetting the chip has been the default for a long time, 1341 but it causes the BIOS initializations (fan clock dividers, 1342 thermal sensor types...) to be lost, so it is now optional. 1343 It might even go away if nobody reports it as being useful, 1344 as I see very little reason why this would be needed at 1345 all. */ 1346 dev_info(dev, "If reset=1 solved a problem you were " 1347 "having, please report!\n"); 1348 1349 /* save these registers */ 1350 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); 1351 p = w83781d_read_value(data, W83781D_REG_PWMCLK12); 1352 /* Reset all except Watchdog values and last conversion values 1353 This sets fan-divs to 2, among others */ 1354 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80); 1355 /* Restore the registers and disable power-on abnormal beep. 1356 This saves FAN 1/2/3 input/output values set by BIOS. */ 1357 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); 1358 w83781d_write_value(data, W83781D_REG_PWMCLK12, p); 1359 /* Disable master beep-enable (reset turns it on). 1360 Individual beep_mask should be reset to off but for some reason 1361 disabling this bit helps some people not get beeped */ 1362 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0); 1363 } 1364 1365 /* Disable power-on abnormal beep, as advised by the datasheet. 1366 Already done if reset=1. */ 1367 if (init && !reset && type != as99127f) { 1368 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); 1369 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); 1370 } 1371 1372 data->vrm = vid_which_vrm(); 1373 1374 if ((type != w83781d) && (type != as99127f)) { 1375 tmp = w83781d_read_value(data, W83781D_REG_SCFG1); 1376 for (i = 1; i <= 3; i++) { 1377 if (!(tmp & BIT_SCFG1[i - 1])) { 1378 data->sens[i - 1] = 4; 1379 } else { 1380 if (w83781d_read_value 1381 (data, 1382 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) 1383 data->sens[i - 1] = 1; 1384 else 1385 data->sens[i - 1] = 2; 1386 } 1387 if (type == w83783s && i == 2) 1388 break; 1389 } 1390 } 1391 1392 if (init && type != as99127f) { 1393 /* Enable temp2 */ 1394 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG); 1395 if (tmp & 0x01) { 1396 dev_warn(dev, "Enabling temp2, readings " 1397 "might not make sense\n"); 1398 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG, 1399 tmp & 0xfe); 1400 } 1401 1402 /* Enable temp3 */ 1403 if (type != w83783s) { 1404 tmp = w83781d_read_value(data, 1405 W83781D_REG_TEMP3_CONFIG); 1406 if (tmp & 0x01) { 1407 dev_warn(dev, "Enabling temp3, " 1408 "readings might not make sense\n"); 1409 w83781d_write_value(data, 1410 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); 1411 } 1412 } 1413 } 1414 1415 /* Start monitoring */ 1416 w83781d_write_value(data, W83781D_REG_CONFIG, 1417 (w83781d_read_value(data, 1418 W83781D_REG_CONFIG) & 0xf7) 1419 | 0x01); 1420 1421 /* A few vars need to be filled upon startup */ 1422 for (i = 0; i < 3; i++) { 1423 data->fan_min[i] = w83781d_read_value(data, 1424 W83781D_REG_FAN_MIN(i)); 1425 } 1426 1427 mutex_init(&data->update_lock); 1428 } 1429 1430 static struct w83781d_data *w83781d_update_device(struct device *dev) 1431 { 1432 struct w83781d_data *data = dev_get_drvdata(dev); 1433 struct i2c_client *client = data->client; 1434 int i; 1435 1436 mutex_lock(&data->update_lock); 1437 1438 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1439 || !data->valid) { 1440 dev_dbg(dev, "Starting device update\n"); 1441 1442 for (i = 0; i <= 8; i++) { 1443 if (data->type == w83783s && i == 1) 1444 continue; /* 783S has no in1 */ 1445 data->in[i] = 1446 w83781d_read_value(data, W83781D_REG_IN(i)); 1447 data->in_min[i] = 1448 w83781d_read_value(data, W83781D_REG_IN_MIN(i)); 1449 data->in_max[i] = 1450 w83781d_read_value(data, W83781D_REG_IN_MAX(i)); 1451 if ((data->type != w83782d) && (i == 6)) 1452 break; 1453 } 1454 for (i = 0; i < 3; i++) { 1455 data->fan[i] = 1456 w83781d_read_value(data, W83781D_REG_FAN(i)); 1457 data->fan_min[i] = 1458 w83781d_read_value(data, W83781D_REG_FAN_MIN(i)); 1459 } 1460 if (data->type != w83781d && data->type != as99127f) { 1461 for (i = 0; i < 4; i++) { 1462 data->pwm[i] = 1463 w83781d_read_value(data, 1464 W83781D_REG_PWM[i]); 1465 /* Only W83782D on SMBus has PWM3 and PWM4 */ 1466 if ((data->type != w83782d || !client) 1467 && i == 1) 1468 break; 1469 } 1470 /* Only PWM2 can be disabled */ 1471 data->pwm2_enable = (w83781d_read_value(data, 1472 W83781D_REG_PWMCLK12) & 0x08) >> 3; 1473 } 1474 1475 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1)); 1476 data->temp_max = 1477 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1)); 1478 data->temp_max_hyst = 1479 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1)); 1480 data->temp_add[0] = 1481 w83781d_read_value(data, W83781D_REG_TEMP(2)); 1482 data->temp_max_add[0] = 1483 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2)); 1484 data->temp_max_hyst_add[0] = 1485 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2)); 1486 if (data->type != w83783s) { 1487 data->temp_add[1] = 1488 w83781d_read_value(data, W83781D_REG_TEMP(3)); 1489 data->temp_max_add[1] = 1490 w83781d_read_value(data, 1491 W83781D_REG_TEMP_OVER(3)); 1492 data->temp_max_hyst_add[1] = 1493 w83781d_read_value(data, 1494 W83781D_REG_TEMP_HYST(3)); 1495 } 1496 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV); 1497 data->vid = i & 0x0f; 1498 data->vid |= (w83781d_read_value(data, 1499 W83781D_REG_CHIPID) & 0x01) << 4; 1500 data->fan_div[0] = (i >> 4) & 0x03; 1501 data->fan_div[1] = (i >> 6) & 0x03; 1502 data->fan_div[2] = (w83781d_read_value(data, 1503 W83781D_REG_PIN) >> 6) & 0x03; 1504 if ((data->type != w83781d) && (data->type != as99127f)) { 1505 i = w83781d_read_value(data, W83781D_REG_VBAT); 1506 data->fan_div[0] |= (i >> 3) & 0x04; 1507 data->fan_div[1] |= (i >> 4) & 0x04; 1508 data->fan_div[2] |= (i >> 5) & 0x04; 1509 } 1510 if (data->type == w83782d) { 1511 data->alarms = w83781d_read_value(data, 1512 W83782D_REG_ALARM1) 1513 | (w83781d_read_value(data, 1514 W83782D_REG_ALARM2) << 8) 1515 | (w83781d_read_value(data, 1516 W83782D_REG_ALARM3) << 16); 1517 } else if (data->type == w83783s) { 1518 data->alarms = w83781d_read_value(data, 1519 W83782D_REG_ALARM1) 1520 | (w83781d_read_value(data, 1521 W83782D_REG_ALARM2) << 8); 1522 } else { 1523 /* No real-time status registers, fall back to 1524 interrupt status registers */ 1525 data->alarms = w83781d_read_value(data, 1526 W83781D_REG_ALARM1) 1527 | (w83781d_read_value(data, 1528 W83781D_REG_ALARM2) << 8); 1529 } 1530 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); 1531 data->beep_mask = (i << 8) + 1532 w83781d_read_value(data, W83781D_REG_BEEP_INTS1); 1533 if ((data->type != w83781d) && (data->type != as99127f)) { 1534 data->beep_mask |= 1535 w83781d_read_value(data, 1536 W83781D_REG_BEEP_INTS3) << 16; 1537 } 1538 data->last_updated = jiffies; 1539 data->valid = 1; 1540 } 1541 1542 mutex_unlock(&data->update_lock); 1543 1544 return data; 1545 } 1546 1547 static const struct i2c_device_id w83781d_ids[] = { 1548 { "w83781d", w83781d, }, 1549 { "w83782d", w83782d, }, 1550 { "w83783s", w83783s, }, 1551 { "as99127f", as99127f }, 1552 { /* LIST END */ } 1553 }; 1554 MODULE_DEVICE_TABLE(i2c, w83781d_ids); 1555 1556 static struct i2c_driver w83781d_driver = { 1557 .class = I2C_CLASS_HWMON, 1558 .driver = { 1559 .name = "w83781d", 1560 }, 1561 .probe = w83781d_probe, 1562 .remove = w83781d_remove, 1563 .id_table = w83781d_ids, 1564 .detect = w83781d_detect, 1565 .address_data = &addr_data, 1566 }; 1567 1568 /* 1569 * ISA related code 1570 */ 1571 #ifdef CONFIG_ISA 1572 1573 /* ISA device, if found */ 1574 static struct platform_device *pdev; 1575 1576 static unsigned short isa_address = 0x290; 1577 1578 /* I2C devices get this name attribute automatically, but for ISA devices 1579 we must create it by ourselves. */ 1580 static ssize_t 1581 show_name(struct device *dev, struct device_attribute *devattr, char *buf) 1582 { 1583 struct w83781d_data *data = dev_get_drvdata(dev); 1584 return sprintf(buf, "%s\n", data->name); 1585 } 1586 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); 1587 1588 static struct w83781d_data *w83781d_data_if_isa(void) 1589 { 1590 return pdev ? platform_get_drvdata(pdev) : NULL; 1591 } 1592 1593 /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */ 1594 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid) 1595 { 1596 struct w83781d_data *isa; 1597 int i; 1598 1599 if (!pdev) /* No ISA chip */ 1600 return 0; 1601 1602 isa = platform_get_drvdata(pdev); 1603 1604 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr) 1605 return 0; /* Address doesn't match */ 1606 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid) 1607 return 0; /* Chip type doesn't match */ 1608 1609 /* We compare all the limit registers, the config register and the 1610 * interrupt mask registers */ 1611 for (i = 0x2b; i <= 0x3d; i++) { 1612 if (w83781d_read_value(isa, i) != 1613 i2c_smbus_read_byte_data(client, i)) 1614 return 0; 1615 } 1616 if (w83781d_read_value(isa, W83781D_REG_CONFIG) != 1617 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG)) 1618 return 0; 1619 for (i = 0x43; i <= 0x46; i++) { 1620 if (w83781d_read_value(isa, i) != 1621 i2c_smbus_read_byte_data(client, i)) 1622 return 0; 1623 } 1624 1625 return 1; 1626 } 1627 1628 static int 1629 w83781d_read_value_isa(struct w83781d_data *data, u16 reg) 1630 { 1631 int word_sized, res; 1632 1633 word_sized = (((reg & 0xff00) == 0x100) 1634 || ((reg & 0xff00) == 0x200)) 1635 && (((reg & 0x00ff) == 0x50) 1636 || ((reg & 0x00ff) == 0x53) 1637 || ((reg & 0x00ff) == 0x55)); 1638 if (reg & 0xff00) { 1639 outb_p(W83781D_REG_BANK, 1640 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1641 outb_p(reg >> 8, 1642 data->isa_addr + W83781D_DATA_REG_OFFSET); 1643 } 1644 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); 1645 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET); 1646 if (word_sized) { 1647 outb_p((reg & 0xff) + 1, 1648 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1649 res = 1650 (res << 8) + inb_p(data->isa_addr + 1651 W83781D_DATA_REG_OFFSET); 1652 } 1653 if (reg & 0xff00) { 1654 outb_p(W83781D_REG_BANK, 1655 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1656 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); 1657 } 1658 return res; 1659 } 1660 1661 static void 1662 w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value) 1663 { 1664 int word_sized; 1665 1666 word_sized = (((reg & 0xff00) == 0x100) 1667 || ((reg & 0xff00) == 0x200)) 1668 && (((reg & 0x00ff) == 0x53) 1669 || ((reg & 0x00ff) == 0x55)); 1670 if (reg & 0xff00) { 1671 outb_p(W83781D_REG_BANK, 1672 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1673 outb_p(reg >> 8, 1674 data->isa_addr + W83781D_DATA_REG_OFFSET); 1675 } 1676 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET); 1677 if (word_sized) { 1678 outb_p(value >> 8, 1679 data->isa_addr + W83781D_DATA_REG_OFFSET); 1680 outb_p((reg & 0xff) + 1, 1681 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1682 } 1683 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET); 1684 if (reg & 0xff00) { 1685 outb_p(W83781D_REG_BANK, 1686 data->isa_addr + W83781D_ADDR_REG_OFFSET); 1687 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET); 1688 } 1689 } 1690 1691 /* The SMBus locks itself, usually, but nothing may access the Winbond between 1692 bank switches. ISA access must always be locked explicitly! 1693 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, 1694 would slow down the W83781D access and should not be necessary. 1695 There are some ugly typecasts here, but the good news is - they should 1696 nowhere else be necessary! */ 1697 static int 1698 w83781d_read_value(struct w83781d_data *data, u16 reg) 1699 { 1700 struct i2c_client *client = data->client; 1701 int res; 1702 1703 mutex_lock(&data->lock); 1704 if (client) 1705 res = w83781d_read_value_i2c(data, reg); 1706 else 1707 res = w83781d_read_value_isa(data, reg); 1708 mutex_unlock(&data->lock); 1709 return res; 1710 } 1711 1712 static int 1713 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) 1714 { 1715 struct i2c_client *client = data->client; 1716 1717 mutex_lock(&data->lock); 1718 if (client) 1719 w83781d_write_value_i2c(data, reg, value); 1720 else 1721 w83781d_write_value_isa(data, reg, value); 1722 mutex_unlock(&data->lock); 1723 return 0; 1724 } 1725 1726 static int __devinit 1727 w83781d_isa_probe(struct platform_device *pdev) 1728 { 1729 int err, reg; 1730 struct w83781d_data *data; 1731 struct resource *res; 1732 1733 /* Reserve the ISA region */ 1734 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1735 if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2, 1736 "w83781d")) { 1737 err = -EBUSY; 1738 goto exit; 1739 } 1740 1741 data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL); 1742 if (!data) { 1743 err = -ENOMEM; 1744 goto exit_release_region; 1745 } 1746 mutex_init(&data->lock); 1747 data->isa_addr = res->start; 1748 platform_set_drvdata(pdev, data); 1749 1750 reg = w83781d_read_value(data, W83781D_REG_WCHIPID); 1751 switch (reg) { 1752 case 0x30: 1753 data->type = w83782d; 1754 data->name = "w83782d"; 1755 break; 1756 default: 1757 data->type = w83781d; 1758 data->name = "w83781d"; 1759 } 1760 1761 /* Initialize the W83781D chip */ 1762 w83781d_init_device(&pdev->dev); 1763 1764 /* Register sysfs hooks */ 1765 err = w83781d_create_files(&pdev->dev, data->type, 1); 1766 if (err) 1767 goto exit_remove_files; 1768 1769 err = device_create_file(&pdev->dev, &dev_attr_name); 1770 if (err) 1771 goto exit_remove_files; 1772 1773 data->hwmon_dev = hwmon_device_register(&pdev->dev); 1774 if (IS_ERR(data->hwmon_dev)) { 1775 err = PTR_ERR(data->hwmon_dev); 1776 goto exit_remove_files; 1777 } 1778 1779 return 0; 1780 1781 exit_remove_files: 1782 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group); 1783 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt); 1784 device_remove_file(&pdev->dev, &dev_attr_name); 1785 kfree(data); 1786 exit_release_region: 1787 release_region(res->start + W83781D_ADDR_REG_OFFSET, 2); 1788 exit: 1789 return err; 1790 } 1791 1792 static int __devexit 1793 w83781d_isa_remove(struct platform_device *pdev) 1794 { 1795 struct w83781d_data *data = platform_get_drvdata(pdev); 1796 1797 hwmon_device_unregister(data->hwmon_dev); 1798 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group); 1799 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt); 1800 device_remove_file(&pdev->dev, &dev_attr_name); 1801 release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2); 1802 kfree(data); 1803 1804 return 0; 1805 } 1806 1807 static struct platform_driver w83781d_isa_driver = { 1808 .driver = { 1809 .owner = THIS_MODULE, 1810 .name = "w83781d", 1811 }, 1812 .probe = w83781d_isa_probe, 1813 .remove = __devexit_p(w83781d_isa_remove), 1814 }; 1815 1816 /* return 1 if a supported chip is found, 0 otherwise */ 1817 static int __init 1818 w83781d_isa_found(unsigned short address) 1819 { 1820 int val, save, found = 0; 1821 1822 /* We have to request the region in two parts because some 1823 boards declare base+4 to base+7 as a PNP device */ 1824 if (!request_region(address, 4, "w83781d")) { 1825 pr_debug("w83781d: Failed to request low part of region\n"); 1826 return 0; 1827 } 1828 if (!request_region(address + 4, 4, "w83781d")) { 1829 pr_debug("w83781d: Failed to request high part of region\n"); 1830 release_region(address, 4); 1831 return 0; 1832 } 1833 1834 #define REALLY_SLOW_IO 1835 /* We need the timeouts for at least some W83781D-like 1836 chips. But only if we read 'undefined' registers. */ 1837 val = inb_p(address + 1); 1838 if (inb_p(address + 2) != val 1839 || inb_p(address + 3) != val 1840 || inb_p(address + 7) != val) { 1841 pr_debug("w83781d: Detection failed at step 1\n"); 1842 goto release; 1843 } 1844 #undef REALLY_SLOW_IO 1845 1846 /* We should be able to change the 7 LSB of the address port. The 1847 MSB (busy flag) should be clear initially, set after the write. */ 1848 save = inb_p(address + W83781D_ADDR_REG_OFFSET); 1849 if (save & 0x80) { 1850 pr_debug("w83781d: Detection failed at step 2\n"); 1851 goto release; 1852 } 1853 val = ~save & 0x7f; 1854 outb_p(val, address + W83781D_ADDR_REG_OFFSET); 1855 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) { 1856 outb_p(save, address + W83781D_ADDR_REG_OFFSET); 1857 pr_debug("w83781d: Detection failed at step 3\n"); 1858 goto release; 1859 } 1860 1861 /* We found a device, now see if it could be a W83781D */ 1862 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET); 1863 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1864 if (val & 0x80) { 1865 pr_debug("w83781d: Detection failed at step 4\n"); 1866 goto release; 1867 } 1868 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); 1869 save = inb_p(address + W83781D_DATA_REG_OFFSET); 1870 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET); 1871 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1872 if ((!(save & 0x80) && (val != 0xa3)) 1873 || ((save & 0x80) && (val != 0x5c))) { 1874 pr_debug("w83781d: Detection failed at step 5\n"); 1875 goto release; 1876 } 1877 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET); 1878 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1879 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */ 1880 pr_debug("w83781d: Detection failed at step 6\n"); 1881 goto release; 1882 } 1883 1884 /* The busy flag should be clear again */ 1885 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) { 1886 pr_debug("w83781d: Detection failed at step 7\n"); 1887 goto release; 1888 } 1889 1890 /* Determine the chip type */ 1891 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET); 1892 save = inb_p(address + W83781D_DATA_REG_OFFSET); 1893 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET); 1894 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET); 1895 val = inb_p(address + W83781D_DATA_REG_OFFSET); 1896 if ((val & 0xfe) == 0x10 /* W83781D */ 1897 || val == 0x30) /* W83782D */ 1898 found = 1; 1899 1900 if (found) 1901 pr_info("w83781d: Found a %s chip at %#x\n", 1902 val == 0x30 ? "W83782D" : "W83781D", (int)address); 1903 1904 release: 1905 release_region(address + 4, 4); 1906 release_region(address, 4); 1907 return found; 1908 } 1909 1910 static int __init 1911 w83781d_isa_device_add(unsigned short address) 1912 { 1913 struct resource res = { 1914 .start = address, 1915 .end = address + W83781D_EXTENT - 1, 1916 .name = "w83781d", 1917 .flags = IORESOURCE_IO, 1918 }; 1919 int err; 1920 1921 pdev = platform_device_alloc("w83781d", address); 1922 if (!pdev) { 1923 err = -ENOMEM; 1924 printk(KERN_ERR "w83781d: Device allocation failed\n"); 1925 goto exit; 1926 } 1927 1928 err = platform_device_add_resources(pdev, &res, 1); 1929 if (err) { 1930 printk(KERN_ERR "w83781d: Device resource addition failed " 1931 "(%d)\n", err); 1932 goto exit_device_put; 1933 } 1934 1935 err = platform_device_add(pdev); 1936 if (err) { 1937 printk(KERN_ERR "w83781d: Device addition failed (%d)\n", 1938 err); 1939 goto exit_device_put; 1940 } 1941 1942 return 0; 1943 1944 exit_device_put: 1945 platform_device_put(pdev); 1946 exit: 1947 pdev = NULL; 1948 return err; 1949 } 1950 1951 static int __init 1952 w83781d_isa_register(void) 1953 { 1954 int res; 1955 1956 if (w83781d_isa_found(isa_address)) { 1957 res = platform_driver_register(&w83781d_isa_driver); 1958 if (res) 1959 goto exit; 1960 1961 /* Sets global pdev as a side effect */ 1962 res = w83781d_isa_device_add(isa_address); 1963 if (res) 1964 goto exit_unreg_isa_driver; 1965 } 1966 1967 return 0; 1968 1969 exit_unreg_isa_driver: 1970 platform_driver_unregister(&w83781d_isa_driver); 1971 exit: 1972 return res; 1973 } 1974 1975 static void 1976 w83781d_isa_unregister(void) 1977 { 1978 if (pdev) { 1979 platform_device_unregister(pdev); 1980 platform_driver_unregister(&w83781d_isa_driver); 1981 } 1982 } 1983 #else /* !CONFIG_ISA */ 1984 1985 static struct w83781d_data *w83781d_data_if_isa(void) 1986 { 1987 return NULL; 1988 } 1989 1990 static int 1991 w83781d_alias_detect(struct i2c_client *client, u8 chipid) 1992 { 1993 return 0; 1994 } 1995 1996 static int 1997 w83781d_read_value(struct w83781d_data *data, u16 reg) 1998 { 1999 int res; 2000 2001 mutex_lock(&data->lock); 2002 res = w83781d_read_value_i2c(data, reg); 2003 mutex_unlock(&data->lock); 2004 2005 return res; 2006 } 2007 2008 static int 2009 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) 2010 { 2011 mutex_lock(&data->lock); 2012 w83781d_write_value_i2c(data, reg, value); 2013 mutex_unlock(&data->lock); 2014 2015 return 0; 2016 } 2017 2018 static int __init 2019 w83781d_isa_register(void) 2020 { 2021 return 0; 2022 } 2023 2024 static void 2025 w83781d_isa_unregister(void) 2026 { 2027 } 2028 #endif /* CONFIG_ISA */ 2029 2030 static int __init 2031 sensors_w83781d_init(void) 2032 { 2033 int res; 2034 2035 /* We register the ISA device first, so that we can skip the 2036 * registration of an I2C interface to the same device. */ 2037 res = w83781d_isa_register(); 2038 if (res) 2039 goto exit; 2040 2041 res = i2c_add_driver(&w83781d_driver); 2042 if (res) 2043 goto exit_unreg_isa; 2044 2045 return 0; 2046 2047 exit_unreg_isa: 2048 w83781d_isa_unregister(); 2049 exit: 2050 return res; 2051 } 2052 2053 static void __exit 2054 sensors_w83781d_exit(void) 2055 { 2056 w83781d_isa_unregister(); 2057 i2c_del_driver(&w83781d_driver); 2058 } 2059 2060 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " 2061 "Philip Edelbrock <phil@netroedge.com>, " 2062 "and Mark Studebaker <mdsxyz123@yahoo.com>"); 2063 MODULE_DESCRIPTION("W83781D driver"); 2064 MODULE_LICENSE("GPL"); 2065 2066 module_init(sensors_w83781d_init); 2067 module_exit(sensors_w83781d_exit); 2068