xref: /openbmc/linux/drivers/hwmon/w83781d.c (revision 22246614)
1 /*
2     w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
3                 monitoring
4     Copyright (c) 1998 - 2001  Frodo Looijaard <frodol@dds.nl>,
5                                Philip Edelbrock <phil@netroedge.com>,
6                                and Mark Studebaker <mdsxyz123@yahoo.com>
7     Copyright (c) 2007         Jean Delvare <khali@linux-fr.org>
8 
9     This program is free software; you can redistribute it and/or modify
10     it under the terms of the GNU General Public License as published by
11     the Free Software Foundation; either version 2 of the License, or
12     (at your option) any later version.
13 
14     This program is distributed in the hope that it will be useful,
15     but WITHOUT ANY WARRANTY; without even the implied warranty of
16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17     GNU General Public License for more details.
18 
19     You should have received a copy of the GNU General Public License
20     along with this program; if not, write to the Free Software
21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23 
24 /*
25     Supports following chips:
26 
27     Chip	#vin	#fanin	#pwm	#temp	wchipid	vendid	i2c	ISA
28     as99127f	7	3	0	3	0x31	0x12c3	yes	no
29     as99127f rev.2 (type_name = as99127f)	0x31	0x5ca3	yes	no
30     w83781d	7	3	0	3	0x10-1	0x5ca3	yes	yes
31     w83782d	9	3	2-4	3	0x30	0x5ca3	yes	yes
32     w83783s	5-6	3	2	1-2	0x40	0x5ca3	yes	no
33 
34 */
35 
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/slab.h>
39 #include <linux/jiffies.h>
40 #include <linux/i2c.h>
41 #include <linux/platform_device.h>
42 #include <linux/ioport.h>
43 #include <linux/hwmon.h>
44 #include <linux/hwmon-vid.h>
45 #include <linux/hwmon-sysfs.h>
46 #include <linux/sysfs.h>
47 #include <linux/err.h>
48 #include <linux/mutex.h>
49 #include <asm/io.h>
50 #include "lm75.h"
51 
52 /* ISA device, if found */
53 static struct platform_device *pdev;
54 
55 /* Addresses to scan */
56 static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
57 						0x2e, 0x2f, I2C_CLIENT_END };
58 static unsigned short isa_address = 0x290;
59 
60 /* Insmod parameters */
61 I2C_CLIENT_INSMOD_4(w83781d, w83782d, w83783s, as99127f);
62 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
63 		    "{bus, clientaddr, subclientaddr1, subclientaddr2}");
64 
65 static int reset;
66 module_param(reset, bool, 0);
67 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
68 
69 static int init = 1;
70 module_param(init, bool, 0);
71 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
72 
73 /* Constants specified below */
74 
75 /* Length of ISA address segment */
76 #define W83781D_EXTENT			8
77 
78 /* Where are the ISA address/data registers relative to the base address */
79 #define W83781D_ADDR_REG_OFFSET		5
80 #define W83781D_DATA_REG_OFFSET		6
81 
82 /* The device registers */
83 /* in nr from 0 to 8 */
84 #define W83781D_REG_IN_MAX(nr)		((nr < 7) ? (0x2b + (nr) * 2) : \
85 						    (0x554 + (((nr) - 7) * 2)))
86 #define W83781D_REG_IN_MIN(nr)		((nr < 7) ? (0x2c + (nr) * 2) : \
87 						    (0x555 + (((nr) - 7) * 2)))
88 #define W83781D_REG_IN(nr)		((nr < 7) ? (0x20 + (nr)) : \
89 						    (0x550 + (nr) - 7))
90 
91 /* fan nr from 0 to 2 */
92 #define W83781D_REG_FAN_MIN(nr)		(0x3b + (nr))
93 #define W83781D_REG_FAN(nr)		(0x28 + (nr))
94 
95 #define W83781D_REG_BANK		0x4E
96 #define W83781D_REG_TEMP2_CONFIG	0x152
97 #define W83781D_REG_TEMP3_CONFIG	0x252
98 /* temp nr from 1 to 3 */
99 #define W83781D_REG_TEMP(nr)		((nr == 3) ? (0x0250) : \
100 					((nr == 2) ? (0x0150) : \
101 						     (0x27)))
102 #define W83781D_REG_TEMP_HYST(nr)	((nr == 3) ? (0x253) : \
103 					((nr == 2) ? (0x153) : \
104 						     (0x3A)))
105 #define W83781D_REG_TEMP_OVER(nr)	((nr == 3) ? (0x255) : \
106 					((nr == 2) ? (0x155) : \
107 						     (0x39)))
108 
109 #define W83781D_REG_CONFIG		0x40
110 
111 /* Interrupt status (W83781D, AS99127F) */
112 #define W83781D_REG_ALARM1		0x41
113 #define W83781D_REG_ALARM2		0x42
114 
115 /* Real-time status (W83782D, W83783S) */
116 #define W83782D_REG_ALARM1		0x459
117 #define W83782D_REG_ALARM2		0x45A
118 #define W83782D_REG_ALARM3		0x45B
119 
120 #define W83781D_REG_BEEP_CONFIG		0x4D
121 #define W83781D_REG_BEEP_INTS1		0x56
122 #define W83781D_REG_BEEP_INTS2		0x57
123 #define W83781D_REG_BEEP_INTS3		0x453	/* not on W83781D */
124 
125 #define W83781D_REG_VID_FANDIV		0x47
126 
127 #define W83781D_REG_CHIPID		0x49
128 #define W83781D_REG_WCHIPID		0x58
129 #define W83781D_REG_CHIPMAN		0x4F
130 #define W83781D_REG_PIN			0x4B
131 
132 /* 782D/783S only */
133 #define W83781D_REG_VBAT		0x5D
134 
135 /* PWM 782D (1-4) and 783S (1-2) only */
136 static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
137 #define W83781D_REG_PWMCLK12		0x5C
138 #define W83781D_REG_PWMCLK34		0x45C
139 
140 #define W83781D_REG_I2C_ADDR		0x48
141 #define W83781D_REG_I2C_SUBADDR		0x4A
142 
143 /* The following are undocumented in the data sheets however we
144    received the information in an email from Winbond tech support */
145 /* Sensor selection - not on 781d */
146 #define W83781D_REG_SCFG1		0x5D
147 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
148 
149 #define W83781D_REG_SCFG2		0x59
150 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
151 
152 #define W83781D_DEFAULT_BETA		3435
153 
154 /* Conversions */
155 #define IN_TO_REG(val)			SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
156 #define IN_FROM_REG(val)		((val) * 16)
157 
158 static inline u8
159 FAN_TO_REG(long rpm, int div)
160 {
161 	if (rpm == 0)
162 		return 255;
163 	rpm = SENSORS_LIMIT(rpm, 1, 1000000);
164 	return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
165 }
166 
167 static inline long
168 FAN_FROM_REG(u8 val, int div)
169 {
170 	if (val == 0)
171 		return -1;
172 	if (val == 255)
173 		return 0;
174 	return 1350000 / (val * div);
175 }
176 
177 #define TEMP_TO_REG(val)		SENSORS_LIMIT((val) / 1000, -127, 128)
178 #define TEMP_FROM_REG(val)		((val) * 1000)
179 
180 #define BEEP_MASK_FROM_REG(val,type)	((type) == as99127f ? \
181 					 (val) ^ 0x7fff : (val))
182 #define BEEP_MASK_TO_REG(val,type)	((type) == as99127f ? \
183 					 (~(val)) & 0x7fff : (val) & 0xffffff)
184 
185 #define DIV_FROM_REG(val)		(1 << (val))
186 
187 static inline u8
188 DIV_TO_REG(long val, enum chips type)
189 {
190 	int i;
191 	val = SENSORS_LIMIT(val, 1,
192 			    ((type == w83781d
193 			      || type == as99127f) ? 8 : 128)) >> 1;
194 	for (i = 0; i < 7; i++) {
195 		if (val == 0)
196 			break;
197 		val >>= 1;
198 	}
199 	return i;
200 }
201 
202 /* There are some complications in a module like this. First off, W83781D chips
203    may be both present on the SMBus and the ISA bus, and we have to handle
204    those cases separately at some places. Second, there might be several
205    W83781D chips available (well, actually, that is probably never done; but
206    it is a clean illustration of how to handle a case like that). Finally,
207    a specific chip may be attached to *both* ISA and SMBus, and we would
208    not like to detect it double. Fortunately, in the case of the W83781D at
209    least, a register tells us what SMBus address we are on, so that helps
210    a bit - except if there could be more than one SMBus. Groan. No solution
211    for this yet. */
212 
213 /* For ISA chips, we abuse the i2c_client addr and name fields. We also use
214    the driver field to differentiate between I2C and ISA chips. */
215 struct w83781d_data {
216 	struct i2c_client client;
217 	struct device *hwmon_dev;
218 	struct mutex lock;
219 	enum chips type;
220 
221 	struct mutex update_lock;
222 	char valid;		/* !=0 if following fields are valid */
223 	unsigned long last_updated;	/* In jiffies */
224 
225 	struct i2c_client *lm75[2];	/* for secondary I2C addresses */
226 	/* array of 2 pointers to subclients */
227 
228 	u8 in[9];		/* Register value - 8 & 9 for 782D only */
229 	u8 in_max[9];		/* Register value - 8 & 9 for 782D only */
230 	u8 in_min[9];		/* Register value - 8 & 9 for 782D only */
231 	u8 fan[3];		/* Register value */
232 	u8 fan_min[3];		/* Register value */
233 	s8 temp;		/* Register value */
234 	s8 temp_max;		/* Register value */
235 	s8 temp_max_hyst;	/* Register value */
236 	u16 temp_add[2];	/* Register value */
237 	u16 temp_max_add[2];	/* Register value */
238 	u16 temp_max_hyst_add[2];	/* Register value */
239 	u8 fan_div[3];		/* Register encoding, shifted right */
240 	u8 vid;			/* Register encoding, combined */
241 	u32 alarms;		/* Register encoding, combined */
242 	u32 beep_mask;		/* Register encoding, combined */
243 	u8 beep_enable;		/* Boolean */
244 	u8 pwm[4];		/* Register value */
245 	u8 pwm2_enable;		/* Boolean */
246 	u16 sens[3];		/* 782D/783S only.
247 				   1 = pentium diode; 2 = 3904 diode;
248 				   4 = thermistor */
249 	u8 vrm;
250 };
251 
252 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
253 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
254 static int w83781d_detach_client(struct i2c_client *client);
255 
256 static int __devinit w83781d_isa_probe(struct platform_device *pdev);
257 static int __devexit w83781d_isa_remove(struct platform_device *pdev);
258 
259 static int w83781d_read_value(struct w83781d_data *data, u16 reg);
260 static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
261 static struct w83781d_data *w83781d_update_device(struct device *dev);
262 static void w83781d_init_device(struct device *dev);
263 
264 static struct i2c_driver w83781d_driver = {
265 	.driver = {
266 		.name = "w83781d",
267 	},
268 	.attach_adapter = w83781d_attach_adapter,
269 	.detach_client = w83781d_detach_client,
270 };
271 
272 static struct platform_driver w83781d_isa_driver = {
273 	.driver = {
274 		.owner = THIS_MODULE,
275 		.name = "w83781d",
276 	},
277 	.probe = w83781d_isa_probe,
278 	.remove = w83781d_isa_remove,
279 };
280 
281 
282 /* following are the sysfs callback functions */
283 #define show_in_reg(reg) \
284 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
285 		char *buf) \
286 { \
287 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
288 	struct w83781d_data *data = w83781d_update_device(dev); \
289 	return sprintf(buf, "%ld\n", \
290 		       (long)IN_FROM_REG(data->reg[attr->index])); \
291 }
292 show_in_reg(in);
293 show_in_reg(in_min);
294 show_in_reg(in_max);
295 
296 #define store_in_reg(REG, reg) \
297 static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
298 		*da, const char *buf, size_t count) \
299 { \
300 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
301 	struct w83781d_data *data = dev_get_drvdata(dev); \
302 	int nr = attr->index; \
303 	u32 val; \
304 	 \
305 	val = simple_strtoul(buf, NULL, 10); \
306 	 \
307 	mutex_lock(&data->update_lock); \
308 	data->in_##reg[nr] = IN_TO_REG(val); \
309 	w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
310 	 \
311 	mutex_unlock(&data->update_lock); \
312 	return count; \
313 }
314 store_in_reg(MIN, min);
315 store_in_reg(MAX, max);
316 
317 #define sysfs_in_offsets(offset) \
318 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
319 		show_in, NULL, offset); \
320 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
321 		show_in_min, store_in_min, offset); \
322 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
323 		show_in_max, store_in_max, offset)
324 
325 sysfs_in_offsets(0);
326 sysfs_in_offsets(1);
327 sysfs_in_offsets(2);
328 sysfs_in_offsets(3);
329 sysfs_in_offsets(4);
330 sysfs_in_offsets(5);
331 sysfs_in_offsets(6);
332 sysfs_in_offsets(7);
333 sysfs_in_offsets(8);
334 
335 #define show_fan_reg(reg) \
336 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
337 		char *buf) \
338 { \
339 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
340 	struct w83781d_data *data = w83781d_update_device(dev); \
341 	return sprintf(buf,"%ld\n", \
342 		FAN_FROM_REG(data->reg[attr->index], \
343 			DIV_FROM_REG(data->fan_div[attr->index]))); \
344 }
345 show_fan_reg(fan);
346 show_fan_reg(fan_min);
347 
348 static ssize_t
349 store_fan_min(struct device *dev, struct device_attribute *da,
350 		const char *buf, size_t count)
351 {
352 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
353 	struct w83781d_data *data = dev_get_drvdata(dev);
354 	int nr = attr->index;
355 	u32 val;
356 
357 	val = simple_strtoul(buf, NULL, 10);
358 
359 	mutex_lock(&data->update_lock);
360 	data->fan_min[nr] =
361 	    FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
362 	w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
363 			    data->fan_min[nr]);
364 
365 	mutex_unlock(&data->update_lock);
366 	return count;
367 }
368 
369 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
370 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
371 		show_fan_min, store_fan_min, 0);
372 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
373 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
374 		show_fan_min, store_fan_min, 1);
375 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
376 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
377 		show_fan_min, store_fan_min, 2);
378 
379 #define show_temp_reg(reg) \
380 static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
381 		char *buf) \
382 { \
383 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
384 	struct w83781d_data *data = w83781d_update_device(dev); \
385 	int nr = attr->index; \
386 	if (nr >= 2) {	/* TEMP2 and TEMP3 */ \
387 		return sprintf(buf,"%d\n", \
388 			LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
389 	} else {	/* TEMP1 */ \
390 		return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
391 	} \
392 }
393 show_temp_reg(temp);
394 show_temp_reg(temp_max);
395 show_temp_reg(temp_max_hyst);
396 
397 #define store_temp_reg(REG, reg) \
398 static ssize_t store_temp_##reg (struct device *dev, \
399 		struct device_attribute *da, const char *buf, size_t count) \
400 { \
401 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
402 	struct w83781d_data *data = dev_get_drvdata(dev); \
403 	int nr = attr->index; \
404 	long val; \
405 	 \
406 	val = simple_strtol(buf, NULL, 10); \
407 	 \
408 	mutex_lock(&data->update_lock); \
409 	 \
410 	if (nr >= 2) {	/* TEMP2 and TEMP3 */ \
411 		data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
412 		w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
413 				data->temp_##reg##_add[nr-2]); \
414 	} else {	/* TEMP1 */ \
415 		data->temp_##reg = TEMP_TO_REG(val); \
416 		w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
417 			data->temp_##reg); \
418 	} \
419 	 \
420 	mutex_unlock(&data->update_lock); \
421 	return count; \
422 }
423 store_temp_reg(OVER, max);
424 store_temp_reg(HYST, max_hyst);
425 
426 #define sysfs_temp_offsets(offset) \
427 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
428 		show_temp, NULL, offset); \
429 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
430 		show_temp_max, store_temp_max, offset); \
431 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
432 		show_temp_max_hyst, store_temp_max_hyst, offset);
433 
434 sysfs_temp_offsets(1);
435 sysfs_temp_offsets(2);
436 sysfs_temp_offsets(3);
437 
438 static ssize_t
439 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
440 {
441 	struct w83781d_data *data = w83781d_update_device(dev);
442 	return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
443 }
444 
445 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
446 
447 static ssize_t
448 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
449 {
450 	struct w83781d_data *data = dev_get_drvdata(dev);
451 	return sprintf(buf, "%ld\n", (long) data->vrm);
452 }
453 
454 static ssize_t
455 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
456 {
457 	struct w83781d_data *data = dev_get_drvdata(dev);
458 	u32 val;
459 
460 	val = simple_strtoul(buf, NULL, 10);
461 	data->vrm = val;
462 
463 	return count;
464 }
465 
466 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
467 
468 static ssize_t
469 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
470 {
471 	struct w83781d_data *data = w83781d_update_device(dev);
472 	return sprintf(buf, "%u\n", data->alarms);
473 }
474 
475 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
476 
477 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
478 		char *buf)
479 {
480 	struct w83781d_data *data = w83781d_update_device(dev);
481 	int bitnr = to_sensor_dev_attr(attr)->index;
482 	return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
483 }
484 
485 /* The W83781D has a single alarm bit for temp2 and temp3 */
486 static ssize_t show_temp3_alarm(struct device *dev,
487 		struct device_attribute *attr, char *buf)
488 {
489 	struct w83781d_data *data = w83781d_update_device(dev);
490 	int bitnr = (data->type == w83781d) ? 5 : 13;
491 	return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
492 }
493 
494 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
495 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
496 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
497 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
498 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
499 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
500 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
501 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
502 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
503 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
504 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
505 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
506 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
507 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
508 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
509 
510 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
511 {
512 	struct w83781d_data *data = w83781d_update_device(dev);
513 	return sprintf(buf, "%ld\n",
514 		       (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
515 }
516 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
517 {
518 	struct w83781d_data *data = w83781d_update_device(dev);
519 	return sprintf(buf, "%ld\n", (long)data->beep_enable);
520 }
521 
522 static ssize_t
523 store_beep_mask(struct device *dev, struct device_attribute *attr,
524 		const char *buf, size_t count)
525 {
526 	struct w83781d_data *data = dev_get_drvdata(dev);
527 	u32 val;
528 
529 	val = simple_strtoul(buf, NULL, 10);
530 
531 	mutex_lock(&data->update_lock);
532 	data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
533 	w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
534 			    data->beep_mask & 0xff);
535 	w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
536 			    ((data->beep_mask >> 8) & 0x7f)
537 			    | data->beep_enable << 7);
538 	if (data->type != w83781d && data->type != as99127f) {
539 		w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
540 				    ((data->beep_mask) >> 16) & 0xff);
541 	}
542 	mutex_unlock(&data->update_lock);
543 
544 	return count;
545 }
546 
547 static ssize_t
548 store_beep_enable(struct device *dev, struct device_attribute *attr,
549 		const char *buf, size_t count)
550 {
551 	struct w83781d_data *data = dev_get_drvdata(dev);
552 	u32 val;
553 
554 	val = simple_strtoul(buf, NULL, 10);
555 	if (val != 0 && val != 1)
556 		return -EINVAL;
557 
558 	mutex_lock(&data->update_lock);
559 	data->beep_enable = val;
560 	val = w83781d_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f;
561 	val |= data->beep_enable << 7;
562 	w83781d_write_value(data, W83781D_REG_BEEP_INTS2, val);
563 	mutex_unlock(&data->update_lock);
564 
565 	return count;
566 }
567 
568 static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
569 		show_beep_mask, store_beep_mask);
570 static DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
571 		show_beep_enable, store_beep_enable);
572 
573 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
574 		char *buf)
575 {
576 	struct w83781d_data *data = w83781d_update_device(dev);
577 	int bitnr = to_sensor_dev_attr(attr)->index;
578 	return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
579 }
580 
581 static ssize_t
582 store_beep(struct device *dev, struct device_attribute *attr,
583 		const char *buf, size_t count)
584 {
585 	struct w83781d_data *data = dev_get_drvdata(dev);
586 	int bitnr = to_sensor_dev_attr(attr)->index;
587 	unsigned long bit;
588 	u8 reg;
589 
590 	bit = simple_strtoul(buf, NULL, 10);
591 	if (bit & ~1)
592 		return -EINVAL;
593 
594 	mutex_lock(&data->update_lock);
595 	if (bit)
596 		data->beep_mask |= (1 << bitnr);
597 	else
598 		data->beep_mask &= ~(1 << bitnr);
599 
600 	if (bitnr < 8) {
601 		reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
602 		if (bit)
603 			reg |= (1 << bitnr);
604 		else
605 			reg &= ~(1 << bitnr);
606 		w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
607 	} else if (bitnr < 16) {
608 		reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
609 		if (bit)
610 			reg |= (1 << (bitnr - 8));
611 		else
612 			reg &= ~(1 << (bitnr - 8));
613 		w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
614 	} else {
615 		reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
616 		if (bit)
617 			reg |= (1 << (bitnr - 16));
618 		else
619 			reg &= ~(1 << (bitnr - 16));
620 		w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
621 	}
622 	mutex_unlock(&data->update_lock);
623 
624 	return count;
625 }
626 
627 /* The W83781D has a single beep bit for temp2 and temp3 */
628 static ssize_t show_temp3_beep(struct device *dev,
629 		struct device_attribute *attr, char *buf)
630 {
631 	struct w83781d_data *data = w83781d_update_device(dev);
632 	int bitnr = (data->type == w83781d) ? 5 : 13;
633 	return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
634 }
635 
636 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
637 			show_beep, store_beep, 0);
638 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
639 			show_beep, store_beep, 1);
640 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
641 			show_beep, store_beep, 2);
642 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
643 			show_beep, store_beep, 3);
644 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
645 			show_beep, store_beep, 8);
646 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
647 			show_beep, store_beep, 9);
648 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
649 			show_beep, store_beep, 10);
650 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
651 			show_beep, store_beep, 16);
652 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
653 			show_beep, store_beep, 17);
654 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
655 			show_beep, store_beep, 6);
656 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
657 			show_beep, store_beep, 7);
658 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
659 			show_beep, store_beep, 11);
660 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
661 			show_beep, store_beep, 4);
662 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
663 			show_beep, store_beep, 5);
664 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
665 			show_temp3_beep, store_beep, 13);
666 
667 static ssize_t
668 show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
669 {
670 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
671 	struct w83781d_data *data = w83781d_update_device(dev);
672 	return sprintf(buf, "%ld\n",
673 		       (long) DIV_FROM_REG(data->fan_div[attr->index]));
674 }
675 
676 /* Note: we save and restore the fan minimum here, because its value is
677    determined in part by the fan divisor.  This follows the principle of
678    least surprise; the user doesn't expect the fan minimum to change just
679    because the divisor changed. */
680 static ssize_t
681 store_fan_div(struct device *dev, struct device_attribute *da,
682 		const char *buf, size_t count)
683 {
684 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
685 	struct w83781d_data *data = dev_get_drvdata(dev);
686 	unsigned long min;
687 	int nr = attr->index;
688 	u8 reg;
689 	unsigned long val = simple_strtoul(buf, NULL, 10);
690 
691 	mutex_lock(&data->update_lock);
692 
693 	/* Save fan_min */
694 	min = FAN_FROM_REG(data->fan_min[nr],
695 			   DIV_FROM_REG(data->fan_div[nr]));
696 
697 	data->fan_div[nr] = DIV_TO_REG(val, data->type);
698 
699 	reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
700 	       & (nr==0 ? 0xcf : 0x3f))
701 	    | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
702 	w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
703 
704 	/* w83781d and as99127f don't have extended divisor bits */
705 	if (data->type != w83781d && data->type != as99127f) {
706 		reg = (w83781d_read_value(data, W83781D_REG_VBAT)
707 		       & ~(1 << (5 + nr)))
708 		    | ((data->fan_div[nr] & 0x04) << (3 + nr));
709 		w83781d_write_value(data, W83781D_REG_VBAT, reg);
710 	}
711 
712 	/* Restore fan_min */
713 	data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
714 	w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
715 
716 	mutex_unlock(&data->update_lock);
717 	return count;
718 }
719 
720 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
721 		show_fan_div, store_fan_div, 0);
722 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
723 		show_fan_div, store_fan_div, 1);
724 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
725 		show_fan_div, store_fan_div, 2);
726 
727 static ssize_t
728 show_pwm(struct device *dev, struct device_attribute *da, char *buf)
729 {
730 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
731 	struct w83781d_data *data = w83781d_update_device(dev);
732 	return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
733 }
734 
735 static ssize_t
736 show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
737 {
738 	struct w83781d_data *data = w83781d_update_device(dev);
739 	return sprintf(buf, "%d\n", (int)data->pwm2_enable);
740 }
741 
742 static ssize_t
743 store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
744 		size_t count)
745 {
746 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
747 	struct w83781d_data *data = dev_get_drvdata(dev);
748 	int nr = attr->index;
749 	u32 val;
750 
751 	val = simple_strtoul(buf, NULL, 10);
752 
753 	mutex_lock(&data->update_lock);
754 	data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
755 	w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
756 	mutex_unlock(&data->update_lock);
757 	return count;
758 }
759 
760 static ssize_t
761 store_pwm2_enable(struct device *dev, struct device_attribute *da,
762 		const char *buf, size_t count)
763 {
764 	struct w83781d_data *data = dev_get_drvdata(dev);
765 	u32 val, reg;
766 
767 	val = simple_strtoul(buf, NULL, 10);
768 
769 	mutex_lock(&data->update_lock);
770 
771 	switch (val) {
772 	case 0:
773 	case 1:
774 		reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
775 		w83781d_write_value(data, W83781D_REG_PWMCLK12,
776 				    (reg & 0xf7) | (val << 3));
777 
778 		reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
779 		w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
780 				    (reg & 0xef) | (!val << 4));
781 
782 		data->pwm2_enable = val;
783 		break;
784 
785 	default:
786 		mutex_unlock(&data->update_lock);
787 		return -EINVAL;
788 	}
789 
790 	mutex_unlock(&data->update_lock);
791 	return count;
792 }
793 
794 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
795 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
796 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
797 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
798 /* only PWM2 can be enabled/disabled */
799 static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
800 		show_pwm2_enable, store_pwm2_enable);
801 
802 static ssize_t
803 show_sensor(struct device *dev, struct device_attribute *da, char *buf)
804 {
805 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
806 	struct w83781d_data *data = w83781d_update_device(dev);
807 	return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
808 }
809 
810 static ssize_t
811 store_sensor(struct device *dev, struct device_attribute *da,
812 		const char *buf, size_t count)
813 {
814 	struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
815 	struct w83781d_data *data = dev_get_drvdata(dev);
816 	int nr = attr->index;
817 	u32 val, tmp;
818 
819 	val = simple_strtoul(buf, NULL, 10);
820 
821 	mutex_lock(&data->update_lock);
822 
823 	switch (val) {
824 	case 1:		/* PII/Celeron diode */
825 		tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
826 		w83781d_write_value(data, W83781D_REG_SCFG1,
827 				    tmp | BIT_SCFG1[nr]);
828 		tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
829 		w83781d_write_value(data, W83781D_REG_SCFG2,
830 				    tmp | BIT_SCFG2[nr]);
831 		data->sens[nr] = val;
832 		break;
833 	case 2:		/* 3904 */
834 		tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
835 		w83781d_write_value(data, W83781D_REG_SCFG1,
836 				    tmp | BIT_SCFG1[nr]);
837 		tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
838 		w83781d_write_value(data, W83781D_REG_SCFG2,
839 				    tmp & ~BIT_SCFG2[nr]);
840 		data->sens[nr] = val;
841 		break;
842 	case W83781D_DEFAULT_BETA:
843 		dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
844 			 "instead\n", W83781D_DEFAULT_BETA);
845 		/* fall through */
846 	case 4:		/* thermistor */
847 		tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
848 		w83781d_write_value(data, W83781D_REG_SCFG1,
849 				    tmp & ~BIT_SCFG1[nr]);
850 		data->sens[nr] = val;
851 		break;
852 	default:
853 		dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
854 		       (long) val);
855 		break;
856 	}
857 
858 	mutex_unlock(&data->update_lock);
859 	return count;
860 }
861 
862 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
863 	show_sensor, store_sensor, 0);
864 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
865 	show_sensor, store_sensor, 1);
866 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
867 	show_sensor, store_sensor, 2);
868 
869 /* I2C devices get this name attribute automatically, but for ISA devices
870    we must create it by ourselves. */
871 static ssize_t
872 show_name(struct device *dev, struct device_attribute *devattr, char *buf)
873 {
874 	struct w83781d_data *data = dev_get_drvdata(dev);
875 	return sprintf(buf, "%s\n", data->client.name);
876 }
877 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
878 
879 /* This function is called when:
880      * w83781d_driver is inserted (when this module is loaded), for each
881        available adapter
882      * when a new adapter is inserted (and w83781d_driver is still present) */
883 static int
884 w83781d_attach_adapter(struct i2c_adapter *adapter)
885 {
886 	if (!(adapter->class & I2C_CLASS_HWMON))
887 		return 0;
888 	return i2c_probe(adapter, &addr_data, w83781d_detect);
889 }
890 
891 /* Assumes that adapter is of I2C, not ISA variety.
892  * OTHERWISE DON'T CALL THIS
893  */
894 static int
895 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
896 		struct i2c_client *new_client)
897 {
898 	int i, val1 = 0, id;
899 	int err;
900 	const char *client_name = "";
901 	struct w83781d_data *data = i2c_get_clientdata(new_client);
902 
903 	data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
904 	if (!(data->lm75[0])) {
905 		err = -ENOMEM;
906 		goto ERROR_SC_0;
907 	}
908 
909 	id = i2c_adapter_id(adapter);
910 
911 	if (force_subclients[0] == id && force_subclients[1] == address) {
912 		for (i = 2; i <= 3; i++) {
913 			if (force_subclients[i] < 0x48 ||
914 			    force_subclients[i] > 0x4f) {
915 				dev_err(&new_client->dev, "Invalid subclient "
916 					"address %d; must be 0x48-0x4f\n",
917 					force_subclients[i]);
918 				err = -EINVAL;
919 				goto ERROR_SC_1;
920 			}
921 		}
922 		w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
923 				(force_subclients[2] & 0x07) |
924 				((force_subclients[3] & 0x07) << 4));
925 		data->lm75[0]->addr = force_subclients[2];
926 	} else {
927 		val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
928 		data->lm75[0]->addr = 0x48 + (val1 & 0x07);
929 	}
930 
931 	if (kind != w83783s) {
932 		data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
933 		if (!(data->lm75[1])) {
934 			err = -ENOMEM;
935 			goto ERROR_SC_1;
936 		}
937 
938 		if (force_subclients[0] == id &&
939 		    force_subclients[1] == address) {
940 			data->lm75[1]->addr = force_subclients[3];
941 		} else {
942 			data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
943 		}
944 		if (data->lm75[0]->addr == data->lm75[1]->addr) {
945 			dev_err(&new_client->dev,
946 			       "Duplicate addresses 0x%x for subclients.\n",
947 			       data->lm75[0]->addr);
948 			err = -EBUSY;
949 			goto ERROR_SC_2;
950 		}
951 	}
952 
953 	if (kind == w83781d)
954 		client_name = "w83781d subclient";
955 	else if (kind == w83782d)
956 		client_name = "w83782d subclient";
957 	else if (kind == w83783s)
958 		client_name = "w83783s subclient";
959 	else if (kind == as99127f)
960 		client_name = "as99127f subclient";
961 
962 	for (i = 0; i <= 1; i++) {
963 		/* store all data in w83781d */
964 		i2c_set_clientdata(data->lm75[i], NULL);
965 		data->lm75[i]->adapter = adapter;
966 		data->lm75[i]->driver = &w83781d_driver;
967 		data->lm75[i]->flags = 0;
968 		strlcpy(data->lm75[i]->name, client_name,
969 			I2C_NAME_SIZE);
970 		if ((err = i2c_attach_client(data->lm75[i]))) {
971 			dev_err(&new_client->dev, "Subclient %d "
972 				"registration at address 0x%x "
973 				"failed.\n", i, data->lm75[i]->addr);
974 			if (i == 1)
975 				goto ERROR_SC_3;
976 			goto ERROR_SC_2;
977 		}
978 		if (kind == w83783s)
979 			break;
980 	}
981 
982 	return 0;
983 
984 /* Undo inits in case of errors */
985 ERROR_SC_3:
986 	i2c_detach_client(data->lm75[0]);
987 ERROR_SC_2:
988 	kfree(data->lm75[1]);
989 ERROR_SC_1:
990 	kfree(data->lm75[0]);
991 ERROR_SC_0:
992 	return err;
993 }
994 
995 #define IN_UNIT_ATTRS(X)					\
996 	&sensor_dev_attr_in##X##_input.dev_attr.attr,		\
997 	&sensor_dev_attr_in##X##_min.dev_attr.attr,		\
998 	&sensor_dev_attr_in##X##_max.dev_attr.attr,		\
999 	&sensor_dev_attr_in##X##_alarm.dev_attr.attr,		\
1000 	&sensor_dev_attr_in##X##_beep.dev_attr.attr
1001 
1002 #define FAN_UNIT_ATTRS(X)					\
1003 	&sensor_dev_attr_fan##X##_input.dev_attr.attr,		\
1004 	&sensor_dev_attr_fan##X##_min.dev_attr.attr,		\
1005 	&sensor_dev_attr_fan##X##_div.dev_attr.attr,		\
1006 	&sensor_dev_attr_fan##X##_alarm.dev_attr.attr,		\
1007 	&sensor_dev_attr_fan##X##_beep.dev_attr.attr
1008 
1009 #define TEMP_UNIT_ATTRS(X)					\
1010 	&sensor_dev_attr_temp##X##_input.dev_attr.attr,		\
1011 	&sensor_dev_attr_temp##X##_max.dev_attr.attr,		\
1012 	&sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr,	\
1013 	&sensor_dev_attr_temp##X##_alarm.dev_attr.attr,		\
1014 	&sensor_dev_attr_temp##X##_beep.dev_attr.attr
1015 
1016 static struct attribute* w83781d_attributes[] = {
1017 	IN_UNIT_ATTRS(0),
1018 	IN_UNIT_ATTRS(2),
1019 	IN_UNIT_ATTRS(3),
1020 	IN_UNIT_ATTRS(4),
1021 	IN_UNIT_ATTRS(5),
1022 	IN_UNIT_ATTRS(6),
1023 	FAN_UNIT_ATTRS(1),
1024 	FAN_UNIT_ATTRS(2),
1025 	FAN_UNIT_ATTRS(3),
1026 	TEMP_UNIT_ATTRS(1),
1027 	TEMP_UNIT_ATTRS(2),
1028 	&dev_attr_cpu0_vid.attr,
1029 	&dev_attr_vrm.attr,
1030 	&dev_attr_alarms.attr,
1031 	&dev_attr_beep_mask.attr,
1032 	&dev_attr_beep_enable.attr,
1033 	NULL
1034 };
1035 static const struct attribute_group w83781d_group = {
1036 	.attrs = w83781d_attributes,
1037 };
1038 
1039 static struct attribute *w83781d_attributes_opt[] = {
1040 	IN_UNIT_ATTRS(1),
1041 	IN_UNIT_ATTRS(7),
1042 	IN_UNIT_ATTRS(8),
1043 	TEMP_UNIT_ATTRS(3),
1044 	&sensor_dev_attr_pwm1.dev_attr.attr,
1045 	&sensor_dev_attr_pwm2.dev_attr.attr,
1046 	&sensor_dev_attr_pwm3.dev_attr.attr,
1047 	&sensor_dev_attr_pwm4.dev_attr.attr,
1048 	&dev_attr_pwm2_enable.attr,
1049 	&sensor_dev_attr_temp1_type.dev_attr.attr,
1050 	&sensor_dev_attr_temp2_type.dev_attr.attr,
1051 	&sensor_dev_attr_temp3_type.dev_attr.attr,
1052 	NULL
1053 };
1054 static const struct attribute_group w83781d_group_opt = {
1055 	.attrs = w83781d_attributes_opt,
1056 };
1057 
1058 /* No clean up is done on error, it's up to the caller */
1059 static int
1060 w83781d_create_files(struct device *dev, int kind, int is_isa)
1061 {
1062 	int err;
1063 
1064 	if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
1065 		return err;
1066 
1067 	if (kind != w83783s) {
1068 		if ((err = device_create_file(dev,
1069 				&sensor_dev_attr_in1_input.dev_attr))
1070 		    || (err = device_create_file(dev,
1071 				&sensor_dev_attr_in1_min.dev_attr))
1072 		    || (err = device_create_file(dev,
1073 				&sensor_dev_attr_in1_max.dev_attr))
1074 		    || (err = device_create_file(dev,
1075 				&sensor_dev_attr_in1_alarm.dev_attr))
1076 		    || (err = device_create_file(dev,
1077 				&sensor_dev_attr_in1_beep.dev_attr)))
1078 			return err;
1079 	}
1080 	if (kind != as99127f && kind != w83781d && kind != w83783s) {
1081 		if ((err = device_create_file(dev,
1082 				&sensor_dev_attr_in7_input.dev_attr))
1083 		    || (err = device_create_file(dev,
1084 				&sensor_dev_attr_in7_min.dev_attr))
1085 		    || (err = device_create_file(dev,
1086 				&sensor_dev_attr_in7_max.dev_attr))
1087 		    || (err = device_create_file(dev,
1088 				&sensor_dev_attr_in7_alarm.dev_attr))
1089 		    || (err = device_create_file(dev,
1090 				&sensor_dev_attr_in7_beep.dev_attr))
1091 		    || (err = device_create_file(dev,
1092 				&sensor_dev_attr_in8_input.dev_attr))
1093 		    || (err = device_create_file(dev,
1094 				&sensor_dev_attr_in8_min.dev_attr))
1095 		    || (err = device_create_file(dev,
1096 				&sensor_dev_attr_in8_max.dev_attr))
1097 		    || (err = device_create_file(dev,
1098 				&sensor_dev_attr_in8_alarm.dev_attr))
1099 		    || (err = device_create_file(dev,
1100 				&sensor_dev_attr_in8_beep.dev_attr)))
1101 			return err;
1102 	}
1103 	if (kind != w83783s) {
1104 		if ((err = device_create_file(dev,
1105 				&sensor_dev_attr_temp3_input.dev_attr))
1106 		    || (err = device_create_file(dev,
1107 				&sensor_dev_attr_temp3_max.dev_attr))
1108 		    || (err = device_create_file(dev,
1109 				&sensor_dev_attr_temp3_max_hyst.dev_attr))
1110 		    || (err = device_create_file(dev,
1111 				&sensor_dev_attr_temp3_alarm.dev_attr))
1112 		    || (err = device_create_file(dev,
1113 				&sensor_dev_attr_temp3_beep.dev_attr)))
1114 			return err;
1115 
1116 		if (kind != w83781d) {
1117 			err = sysfs_chmod_file(&dev->kobj,
1118 				&sensor_dev_attr_temp3_alarm.dev_attr.attr,
1119 				S_IRUGO | S_IWUSR);
1120 			if (err)
1121 				return err;
1122 		}
1123 	}
1124 
1125 	if (kind != w83781d && kind != as99127f) {
1126 		if ((err = device_create_file(dev,
1127 				&sensor_dev_attr_pwm1.dev_attr))
1128 		    || (err = device_create_file(dev,
1129 				&sensor_dev_attr_pwm2.dev_attr))
1130 		    || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1131 			return err;
1132 	}
1133 	if (kind == w83782d && !is_isa) {
1134 		if ((err = device_create_file(dev,
1135 				&sensor_dev_attr_pwm3.dev_attr))
1136 		    || (err = device_create_file(dev,
1137 				&sensor_dev_attr_pwm4.dev_attr)))
1138 			return err;
1139 	}
1140 
1141 	if (kind != as99127f && kind != w83781d) {
1142 		if ((err = device_create_file(dev,
1143 				&sensor_dev_attr_temp1_type.dev_attr))
1144 		    || (err = device_create_file(dev,
1145 				&sensor_dev_attr_temp2_type.dev_attr)))
1146 			return err;
1147 		if (kind != w83783s) {
1148 			if ((err = device_create_file(dev,
1149 					&sensor_dev_attr_temp3_type.dev_attr)))
1150 				return err;
1151 		}
1152 	}
1153 
1154 	if (is_isa) {
1155 		err = device_create_file(&pdev->dev, &dev_attr_name);
1156 		if (err)
1157 			return err;
1158 	}
1159 
1160 	return 0;
1161 }
1162 
1163 static int
1164 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1165 {
1166 	int val1 = 0, val2;
1167 	struct i2c_client *client;
1168 	struct device *dev;
1169 	struct w83781d_data *data;
1170 	int err;
1171 	const char *client_name = "";
1172 	enum vendor { winbond, asus } vendid;
1173 
1174 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1175 		err = -EINVAL;
1176 		goto ERROR1;
1177 	}
1178 
1179 	/* OK. For now, we presume we have a valid client. We now create the
1180 	   client structure, even though we cannot fill it completely yet.
1181 	   But it allows us to access w83781d_{read,write}_value. */
1182 
1183 	if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1184 		err = -ENOMEM;
1185 		goto ERROR1;
1186 	}
1187 
1188 	client = &data->client;
1189 	i2c_set_clientdata(client, data);
1190 	client->addr = address;
1191 	mutex_init(&data->lock);
1192 	client->adapter = adapter;
1193 	client->driver = &w83781d_driver;
1194 	dev = &client->dev;
1195 
1196 	/* Now, we do the remaining detection. */
1197 
1198 	/* The w8378?d may be stuck in some other bank than bank 0. This may
1199 	   make reading other information impossible. Specify a force=... or
1200 	   force_*=... parameter, and the Winbond will be reset to the right
1201 	   bank. */
1202 	if (kind < 0) {
1203 		if (w83781d_read_value(data, W83781D_REG_CONFIG) & 0x80) {
1204 			dev_dbg(&adapter->dev, "Detection of w83781d chip "
1205 				"failed at step 3\n");
1206 			err = -ENODEV;
1207 			goto ERROR2;
1208 		}
1209 		val1 = w83781d_read_value(data, W83781D_REG_BANK);
1210 		val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1211 		/* Check for Winbond or Asus ID if in bank 0 */
1212 		if ((!(val1 & 0x07)) &&
1213 		    (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1214 		     || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1215 			dev_dbg(&adapter->dev, "Detection of w83781d chip "
1216 				"failed at step 4\n");
1217 			err = -ENODEV;
1218 			goto ERROR2;
1219 		}
1220 		/* If Winbond SMBus, check address at 0x48.
1221 		   Asus doesn't support, except for as99127f rev.2 */
1222 		if ((!(val1 & 0x80) && (val2 == 0xa3)) ||
1223 		    ((val1 & 0x80) && (val2 == 0x5c))) {
1224 			if (w83781d_read_value
1225 			    (data, W83781D_REG_I2C_ADDR) != address) {
1226 				dev_dbg(&adapter->dev, "Detection of w83781d "
1227 					"chip failed at step 5\n");
1228 				err = -ENODEV;
1229 				goto ERROR2;
1230 			}
1231 		}
1232 	}
1233 
1234 	/* We have either had a force parameter, or we have already detected the
1235 	   Winbond. Put it now into bank 0 and Vendor ID High Byte */
1236 	w83781d_write_value(data, W83781D_REG_BANK,
1237 			    (w83781d_read_value(data, W83781D_REG_BANK)
1238 			     & 0x78) | 0x80);
1239 
1240 	/* Determine the chip type. */
1241 	if (kind <= 0) {
1242 		/* get vendor ID */
1243 		val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1244 		if (val2 == 0x5c)
1245 			vendid = winbond;
1246 		else if (val2 == 0x12)
1247 			vendid = asus;
1248 		else {
1249 			dev_dbg(&adapter->dev, "w83781d chip vendor is "
1250 				"neither Winbond nor Asus\n");
1251 			err = -ENODEV;
1252 			goto ERROR2;
1253 		}
1254 
1255 		val1 = w83781d_read_value(data, W83781D_REG_WCHIPID);
1256 		if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1257 			kind = w83781d;
1258 		else if (val1 == 0x30 && vendid == winbond)
1259 			kind = w83782d;
1260 		else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1261 			kind = w83783s;
1262 		else if (val1 == 0x31)
1263 			kind = as99127f;
1264 		else {
1265 			if (kind == 0)
1266 				dev_warn(&adapter->dev, "Ignoring 'force' "
1267 					 "parameter for unknown chip at "
1268 					 "address 0x%02x\n", address);
1269 			err = -EINVAL;
1270 			goto ERROR2;
1271 		}
1272 	}
1273 
1274 	if (kind == w83781d) {
1275 		client_name = "w83781d";
1276 	} else if (kind == w83782d) {
1277 		client_name = "w83782d";
1278 	} else if (kind == w83783s) {
1279 		client_name = "w83783s";
1280 	} else if (kind == as99127f) {
1281 		client_name = "as99127f";
1282 	}
1283 
1284 	/* Fill in the remaining client fields and put into the global list */
1285 	strlcpy(client->name, client_name, I2C_NAME_SIZE);
1286 	data->type = kind;
1287 
1288 	/* Tell the I2C layer a new client has arrived */
1289 	if ((err = i2c_attach_client(client)))
1290 		goto ERROR2;
1291 
1292 	/* attach secondary i2c lm75-like clients */
1293 	if ((err = w83781d_detect_subclients(adapter, address,
1294 			kind, client)))
1295 		goto ERROR3;
1296 
1297 	/* Initialize the chip */
1298 	w83781d_init_device(dev);
1299 
1300 	/* Register sysfs hooks */
1301 	err = w83781d_create_files(dev, kind, 0);
1302 	if (err)
1303 		goto ERROR4;
1304 
1305 	data->hwmon_dev = hwmon_device_register(dev);
1306 	if (IS_ERR(data->hwmon_dev)) {
1307 		err = PTR_ERR(data->hwmon_dev);
1308 		goto ERROR4;
1309 	}
1310 
1311 	return 0;
1312 
1313 ERROR4:
1314 	sysfs_remove_group(&dev->kobj, &w83781d_group);
1315 	sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1316 
1317 	if (data->lm75[1]) {
1318 		i2c_detach_client(data->lm75[1]);
1319 		kfree(data->lm75[1]);
1320 	}
1321 	if (data->lm75[0]) {
1322 		i2c_detach_client(data->lm75[0]);
1323 		kfree(data->lm75[0]);
1324 	}
1325 ERROR3:
1326 	i2c_detach_client(client);
1327 ERROR2:
1328 	kfree(data);
1329 ERROR1:
1330 	return err;
1331 }
1332 
1333 static int
1334 w83781d_detach_client(struct i2c_client *client)
1335 {
1336 	struct w83781d_data *data = i2c_get_clientdata(client);
1337 	int err;
1338 
1339 	/* main client */
1340 	if (data) {
1341 		hwmon_device_unregister(data->hwmon_dev);
1342 		sysfs_remove_group(&client->dev.kobj, &w83781d_group);
1343 		sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
1344 	}
1345 
1346 	if ((err = i2c_detach_client(client)))
1347 		return err;
1348 
1349 	/* main client */
1350 	if (data)
1351 		kfree(data);
1352 
1353 	/* subclient */
1354 	else
1355 		kfree(client);
1356 
1357 	return 0;
1358 }
1359 
1360 static int __devinit
1361 w83781d_isa_probe(struct platform_device *pdev)
1362 {
1363 	int err, reg;
1364 	struct w83781d_data *data;
1365 	struct resource *res;
1366 	const char *name;
1367 
1368 	/* Reserve the ISA region */
1369 	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1370 	if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2,
1371 			    "w83781d")) {
1372 		err = -EBUSY;
1373 		goto exit;
1374 	}
1375 
1376 	if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1377 		err = -ENOMEM;
1378 		goto exit_release_region;
1379 	}
1380 	mutex_init(&data->lock);
1381 	data->client.addr = res->start;
1382 	i2c_set_clientdata(&data->client, data);
1383 	platform_set_drvdata(pdev, data);
1384 
1385 	reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1386 	switch (reg) {
1387 	case 0x30:
1388 		data->type = w83782d;
1389 		name = "w83782d";
1390 		break;
1391 	default:
1392 		data->type = w83781d;
1393 		name = "w83781d";
1394 	}
1395 	strlcpy(data->client.name, name, I2C_NAME_SIZE);
1396 
1397 	/* Initialize the W83781D chip */
1398 	w83781d_init_device(&pdev->dev);
1399 
1400 	/* Register sysfs hooks */
1401 	err = w83781d_create_files(&pdev->dev, data->type, 1);
1402 	if (err)
1403 		goto exit_remove_files;
1404 
1405 	data->hwmon_dev = hwmon_device_register(&pdev->dev);
1406 	if (IS_ERR(data->hwmon_dev)) {
1407 		err = PTR_ERR(data->hwmon_dev);
1408 		goto exit_remove_files;
1409 	}
1410 
1411 	return 0;
1412 
1413  exit_remove_files:
1414 	sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1415 	sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1416 	device_remove_file(&pdev->dev, &dev_attr_name);
1417 	kfree(data);
1418  exit_release_region:
1419 	release_region(res->start + W83781D_ADDR_REG_OFFSET, 2);
1420  exit:
1421 	return err;
1422 }
1423 
1424 static int __devexit
1425 w83781d_isa_remove(struct platform_device *pdev)
1426 {
1427 	struct w83781d_data *data = platform_get_drvdata(pdev);
1428 
1429 	hwmon_device_unregister(data->hwmon_dev);
1430 	sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1431 	sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1432 	device_remove_file(&pdev->dev, &dev_attr_name);
1433 	release_region(data->client.addr + W83781D_ADDR_REG_OFFSET, 2);
1434 	kfree(data);
1435 
1436 	return 0;
1437 }
1438 
1439 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1440    bank switches. ISA access must always be locked explicitly!
1441    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1442    would slow down the W83781D access and should not be necessary.
1443    There are some ugly typecasts here, but the good news is - they should
1444    nowhere else be necessary! */
1445 static int
1446 w83781d_read_value(struct w83781d_data *data, u16 reg)
1447 {
1448 	struct i2c_client *client = &data->client;
1449 	int res, word_sized, bank;
1450 	struct i2c_client *cl;
1451 
1452 	mutex_lock(&data->lock);
1453 	if (!client->driver) { /* ISA device */
1454 		word_sized = (((reg & 0xff00) == 0x100)
1455 			      || ((reg & 0xff00) == 0x200))
1456 		    && (((reg & 0x00ff) == 0x50)
1457 			|| ((reg & 0x00ff) == 0x53)
1458 			|| ((reg & 0x00ff) == 0x55));
1459 		if (reg & 0xff00) {
1460 			outb_p(W83781D_REG_BANK,
1461 			       client->addr + W83781D_ADDR_REG_OFFSET);
1462 			outb_p(reg >> 8,
1463 			       client->addr + W83781D_DATA_REG_OFFSET);
1464 		}
1465 		outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1466 		res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1467 		if (word_sized) {
1468 			outb_p((reg & 0xff) + 1,
1469 			       client->addr + W83781D_ADDR_REG_OFFSET);
1470 			res =
1471 			    (res << 8) + inb_p(client->addr +
1472 					       W83781D_DATA_REG_OFFSET);
1473 		}
1474 		if (reg & 0xff00) {
1475 			outb_p(W83781D_REG_BANK,
1476 			       client->addr + W83781D_ADDR_REG_OFFSET);
1477 			outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1478 		}
1479 	} else {
1480 		bank = (reg >> 8) & 0x0f;
1481 		if (bank > 2)
1482 			/* switch banks */
1483 			i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1484 						  bank);
1485 		if (bank == 0 || bank > 2) {
1486 			res = i2c_smbus_read_byte_data(client, reg & 0xff);
1487 		} else {
1488 			/* switch to subclient */
1489 			cl = data->lm75[bank - 1];
1490 			/* convert from ISA to LM75 I2C addresses */
1491 			switch (reg & 0xff) {
1492 			case 0x50:	/* TEMP */
1493 				res = swab16(i2c_smbus_read_word_data(cl, 0));
1494 				break;
1495 			case 0x52:	/* CONFIG */
1496 				res = i2c_smbus_read_byte_data(cl, 1);
1497 				break;
1498 			case 0x53:	/* HYST */
1499 				res = swab16(i2c_smbus_read_word_data(cl, 2));
1500 				break;
1501 			case 0x55:	/* OVER */
1502 			default:
1503 				res = swab16(i2c_smbus_read_word_data(cl, 3));
1504 				break;
1505 			}
1506 		}
1507 		if (bank > 2)
1508 			i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1509 	}
1510 	mutex_unlock(&data->lock);
1511 	return res;
1512 }
1513 
1514 static int
1515 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1516 {
1517 	struct i2c_client *client = &data->client;
1518 	int word_sized, bank;
1519 	struct i2c_client *cl;
1520 
1521 	mutex_lock(&data->lock);
1522 	if (!client->driver) { /* ISA device */
1523 		word_sized = (((reg & 0xff00) == 0x100)
1524 			      || ((reg & 0xff00) == 0x200))
1525 		    && (((reg & 0x00ff) == 0x53)
1526 			|| ((reg & 0x00ff) == 0x55));
1527 		if (reg & 0xff00) {
1528 			outb_p(W83781D_REG_BANK,
1529 			       client->addr + W83781D_ADDR_REG_OFFSET);
1530 			outb_p(reg >> 8,
1531 			       client->addr + W83781D_DATA_REG_OFFSET);
1532 		}
1533 		outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1534 		if (word_sized) {
1535 			outb_p(value >> 8,
1536 			       client->addr + W83781D_DATA_REG_OFFSET);
1537 			outb_p((reg & 0xff) + 1,
1538 			       client->addr + W83781D_ADDR_REG_OFFSET);
1539 		}
1540 		outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1541 		if (reg & 0xff00) {
1542 			outb_p(W83781D_REG_BANK,
1543 			       client->addr + W83781D_ADDR_REG_OFFSET);
1544 			outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1545 		}
1546 	} else {
1547 		bank = (reg >> 8) & 0x0f;
1548 		if (bank > 2)
1549 			/* switch banks */
1550 			i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1551 						  bank);
1552 		if (bank == 0 || bank > 2) {
1553 			i2c_smbus_write_byte_data(client, reg & 0xff,
1554 						  value & 0xff);
1555 		} else {
1556 			/* switch to subclient */
1557 			cl = data->lm75[bank - 1];
1558 			/* convert from ISA to LM75 I2C addresses */
1559 			switch (reg & 0xff) {
1560 			case 0x52:	/* CONFIG */
1561 				i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1562 				break;
1563 			case 0x53:	/* HYST */
1564 				i2c_smbus_write_word_data(cl, 2, swab16(value));
1565 				break;
1566 			case 0x55:	/* OVER */
1567 				i2c_smbus_write_word_data(cl, 3, swab16(value));
1568 				break;
1569 			}
1570 		}
1571 		if (bank > 2)
1572 			i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1573 	}
1574 	mutex_unlock(&data->lock);
1575 	return 0;
1576 }
1577 
1578 static void
1579 w83781d_init_device(struct device *dev)
1580 {
1581 	struct w83781d_data *data = dev_get_drvdata(dev);
1582 	int i, p;
1583 	int type = data->type;
1584 	u8 tmp;
1585 
1586 	if (reset && type != as99127f) { /* this resets registers we don't have
1587 					   documentation for on the as99127f */
1588 		/* Resetting the chip has been the default for a long time,
1589 		   but it causes the BIOS initializations (fan clock dividers,
1590 		   thermal sensor types...) to be lost, so it is now optional.
1591 		   It might even go away if nobody reports it as being useful,
1592 		   as I see very little reason why this would be needed at
1593 		   all. */
1594 		dev_info(dev, "If reset=1 solved a problem you were "
1595 			 "having, please report!\n");
1596 
1597 		/* save these registers */
1598 		i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1599 		p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1600 		/* Reset all except Watchdog values and last conversion values
1601 		   This sets fan-divs to 2, among others */
1602 		w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1603 		/* Restore the registers and disable power-on abnormal beep.
1604 		   This saves FAN 1/2/3 input/output values set by BIOS. */
1605 		w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1606 		w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1607 		/* Disable master beep-enable (reset turns it on).
1608 		   Individual beep_mask should be reset to off but for some reason
1609 		   disabling this bit helps some people not get beeped */
1610 		w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1611 	}
1612 
1613 	/* Disable power-on abnormal beep, as advised by the datasheet.
1614 	   Already done if reset=1. */
1615 	if (init && !reset && type != as99127f) {
1616 		i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1617 		w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1618 	}
1619 
1620 	data->vrm = vid_which_vrm();
1621 
1622 	if ((type != w83781d) && (type != as99127f)) {
1623 		tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1624 		for (i = 1; i <= 3; i++) {
1625 			if (!(tmp & BIT_SCFG1[i - 1])) {
1626 				data->sens[i - 1] = 4;
1627 			} else {
1628 				if (w83781d_read_value
1629 				    (data,
1630 				     W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1631 					data->sens[i - 1] = 1;
1632 				else
1633 					data->sens[i - 1] = 2;
1634 			}
1635 			if (type == w83783s && i == 2)
1636 				break;
1637 		}
1638 	}
1639 
1640 	if (init && type != as99127f) {
1641 		/* Enable temp2 */
1642 		tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1643 		if (tmp & 0x01) {
1644 			dev_warn(dev, "Enabling temp2, readings "
1645 				 "might not make sense\n");
1646 			w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1647 				tmp & 0xfe);
1648 		}
1649 
1650 		/* Enable temp3 */
1651 		if (type != w83783s) {
1652 			tmp = w83781d_read_value(data,
1653 				W83781D_REG_TEMP3_CONFIG);
1654 			if (tmp & 0x01) {
1655 				dev_warn(dev, "Enabling temp3, "
1656 					 "readings might not make sense\n");
1657 				w83781d_write_value(data,
1658 					W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1659 			}
1660 		}
1661 	}
1662 
1663 	/* Start monitoring */
1664 	w83781d_write_value(data, W83781D_REG_CONFIG,
1665 			    (w83781d_read_value(data,
1666 						W83781D_REG_CONFIG) & 0xf7)
1667 			    | 0x01);
1668 
1669 	/* A few vars need to be filled upon startup */
1670 	for (i = 0; i < 3; i++) {
1671 		data->fan_min[i] = w83781d_read_value(data,
1672 					W83781D_REG_FAN_MIN(i));
1673 	}
1674 
1675 	mutex_init(&data->update_lock);
1676 }
1677 
1678 static struct w83781d_data *w83781d_update_device(struct device *dev)
1679 {
1680 	struct w83781d_data *data = dev_get_drvdata(dev);
1681 	struct i2c_client *client = &data->client;
1682 	int i;
1683 
1684 	mutex_lock(&data->update_lock);
1685 
1686 	if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1687 	    || !data->valid) {
1688 		dev_dbg(dev, "Starting device update\n");
1689 
1690 		for (i = 0; i <= 8; i++) {
1691 			if (data->type == w83783s && i == 1)
1692 				continue;	/* 783S has no in1 */
1693 			data->in[i] =
1694 			    w83781d_read_value(data, W83781D_REG_IN(i));
1695 			data->in_min[i] =
1696 			    w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1697 			data->in_max[i] =
1698 			    w83781d_read_value(data, W83781D_REG_IN_MAX(i));
1699 			if ((data->type != w83782d) && (i == 6))
1700 				break;
1701 		}
1702 		for (i = 0; i < 3; i++) {
1703 			data->fan[i] =
1704 			    w83781d_read_value(data, W83781D_REG_FAN(i));
1705 			data->fan_min[i] =
1706 			    w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1707 		}
1708 		if (data->type != w83781d && data->type != as99127f) {
1709 			for (i = 0; i < 4; i++) {
1710 				data->pwm[i] =
1711 				    w83781d_read_value(data,
1712 						       W83781D_REG_PWM[i]);
1713 				if ((data->type != w83782d || !client->driver)
1714 				    && i == 1)
1715 					break;
1716 			}
1717 			/* Only PWM2 can be disabled */
1718 			data->pwm2_enable = (w83781d_read_value(data,
1719 					      W83781D_REG_PWMCLK12) & 0x08) >> 3;
1720 		}
1721 
1722 		data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1723 		data->temp_max =
1724 		    w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1725 		data->temp_max_hyst =
1726 		    w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1727 		data->temp_add[0] =
1728 		    w83781d_read_value(data, W83781D_REG_TEMP(2));
1729 		data->temp_max_add[0] =
1730 		    w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1731 		data->temp_max_hyst_add[0] =
1732 		    w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
1733 		if (data->type != w83783s) {
1734 			data->temp_add[1] =
1735 			    w83781d_read_value(data, W83781D_REG_TEMP(3));
1736 			data->temp_max_add[1] =
1737 			    w83781d_read_value(data,
1738 					       W83781D_REG_TEMP_OVER(3));
1739 			data->temp_max_hyst_add[1] =
1740 			    w83781d_read_value(data,
1741 					       W83781D_REG_TEMP_HYST(3));
1742 		}
1743 		i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
1744 		data->vid = i & 0x0f;
1745 		data->vid |= (w83781d_read_value(data,
1746 					W83781D_REG_CHIPID) & 0x01) << 4;
1747 		data->fan_div[0] = (i >> 4) & 0x03;
1748 		data->fan_div[1] = (i >> 6) & 0x03;
1749 		data->fan_div[2] = (w83781d_read_value(data,
1750 					W83781D_REG_PIN) >> 6) & 0x03;
1751 		if ((data->type != w83781d) && (data->type != as99127f)) {
1752 			i = w83781d_read_value(data, W83781D_REG_VBAT);
1753 			data->fan_div[0] |= (i >> 3) & 0x04;
1754 			data->fan_div[1] |= (i >> 4) & 0x04;
1755 			data->fan_div[2] |= (i >> 5) & 0x04;
1756 		}
1757 		if (data->type == w83782d) {
1758 			data->alarms = w83781d_read_value(data,
1759 						W83782D_REG_ALARM1)
1760 				     | (w83781d_read_value(data,
1761 						W83782D_REG_ALARM2) << 8)
1762 				     | (w83781d_read_value(data,
1763 						W83782D_REG_ALARM3) << 16);
1764 		} else if (data->type == w83783s) {
1765 			data->alarms = w83781d_read_value(data,
1766 						W83782D_REG_ALARM1)
1767 				     | (w83781d_read_value(data,
1768 						W83782D_REG_ALARM2) << 8);
1769 		} else {
1770 			/* No real-time status registers, fall back to
1771 			   interrupt status registers */
1772 			data->alarms = w83781d_read_value(data,
1773 						W83781D_REG_ALARM1)
1774 				     | (w83781d_read_value(data,
1775 						W83781D_REG_ALARM2) << 8);
1776 		}
1777 		i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1778 		data->beep_enable = i >> 7;
1779 		data->beep_mask = ((i & 0x7f) << 8) +
1780 		    w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1781 		if ((data->type != w83781d) && (data->type != as99127f)) {
1782 			data->beep_mask |=
1783 			    w83781d_read_value(data,
1784 					       W83781D_REG_BEEP_INTS3) << 16;
1785 		}
1786 		data->last_updated = jiffies;
1787 		data->valid = 1;
1788 	}
1789 
1790 	mutex_unlock(&data->update_lock);
1791 
1792 	return data;
1793 }
1794 
1795 /* return 1 if a supported chip is found, 0 otherwise */
1796 static int __init
1797 w83781d_isa_found(unsigned short address)
1798 {
1799 	int val, save, found = 0;
1800 
1801 	/* We have to request the region in two parts because some
1802 	   boards declare base+4 to base+7 as a PNP device */
1803 	if (!request_region(address, 4, "w83781d")) {
1804 		pr_debug("w83781d: Failed to request low part of region\n");
1805 		return 0;
1806 	}
1807 	if (!request_region(address + 4, 4, "w83781d")) {
1808 		pr_debug("w83781d: Failed to request high part of region\n");
1809 		release_region(address, 4);
1810 		return 0;
1811 	}
1812 
1813 #define REALLY_SLOW_IO
1814 	/* We need the timeouts for at least some W83781D-like
1815 	   chips. But only if we read 'undefined' registers. */
1816 	val = inb_p(address + 1);
1817 	if (inb_p(address + 2) != val
1818 	 || inb_p(address + 3) != val
1819 	 || inb_p(address + 7) != val) {
1820 		pr_debug("w83781d: Detection failed at step 1\n");
1821 		goto release;
1822 	}
1823 #undef REALLY_SLOW_IO
1824 
1825 	/* We should be able to change the 7 LSB of the address port. The
1826 	   MSB (busy flag) should be clear initially, set after the write. */
1827 	save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1828 	if (save & 0x80) {
1829 		pr_debug("w83781d: Detection failed at step 2\n");
1830 		goto release;
1831 	}
1832 	val = ~save & 0x7f;
1833 	outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1834 	if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1835 		outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1836 		pr_debug("w83781d: Detection failed at step 3\n");
1837 		goto release;
1838 	}
1839 
1840 	/* We found a device, now see if it could be a W83781D */
1841 	outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1842 	val = inb_p(address + W83781D_DATA_REG_OFFSET);
1843 	if (val & 0x80) {
1844 		pr_debug("w83781d: Detection failed at step 4\n");
1845 		goto release;
1846 	}
1847 	outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1848 	save = inb_p(address + W83781D_DATA_REG_OFFSET);
1849 	outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1850 	val = inb_p(address + W83781D_DATA_REG_OFFSET);
1851 	if ((!(save & 0x80) && (val != 0xa3))
1852 	 || ((save & 0x80) && (val != 0x5c))) {
1853 		pr_debug("w83781d: Detection failed at step 5\n");
1854 		goto release;
1855 	}
1856 	outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1857 	val = inb_p(address + W83781D_DATA_REG_OFFSET);
1858 	if (val < 0x03 || val > 0x77) {	/* Not a valid I2C address */
1859 		pr_debug("w83781d: Detection failed at step 6\n");
1860 		goto release;
1861 	}
1862 
1863 	/* The busy flag should be clear again */
1864 	if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1865 		pr_debug("w83781d: Detection failed at step 7\n");
1866 		goto release;
1867 	}
1868 
1869 	/* Determine the chip type */
1870 	outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1871 	save = inb_p(address + W83781D_DATA_REG_OFFSET);
1872 	outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1873 	outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1874 	val = inb_p(address + W83781D_DATA_REG_OFFSET);
1875 	if ((val & 0xfe) == 0x10	/* W83781D */
1876 	 || val == 0x30)		/* W83782D */
1877 		found = 1;
1878 
1879 	if (found)
1880 		pr_info("w83781d: Found a %s chip at %#x\n",
1881 			val == 0x30 ? "W83782D" : "W83781D", (int)address);
1882 
1883  release:
1884 	release_region(address + 4, 4);
1885 	release_region(address, 4);
1886 	return found;
1887 }
1888 
1889 static int __init
1890 w83781d_isa_device_add(unsigned short address)
1891 {
1892 	struct resource res = {
1893 		.start	= address,
1894 		.end	= address + W83781D_EXTENT - 1,
1895 		.name	= "w83781d",
1896 		.flags	= IORESOURCE_IO,
1897 	};
1898 	int err;
1899 
1900 	pdev = platform_device_alloc("w83781d", address);
1901 	if (!pdev) {
1902 		err = -ENOMEM;
1903 		printk(KERN_ERR "w83781d: Device allocation failed\n");
1904 		goto exit;
1905 	}
1906 
1907 	err = platform_device_add_resources(pdev, &res, 1);
1908 	if (err) {
1909 		printk(KERN_ERR "w83781d: Device resource addition failed "
1910 		       "(%d)\n", err);
1911 		goto exit_device_put;
1912 	}
1913 
1914 	err = platform_device_add(pdev);
1915 	if (err) {
1916 		printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1917 		       err);
1918 		goto exit_device_put;
1919 	}
1920 
1921 	return 0;
1922 
1923  exit_device_put:
1924 	platform_device_put(pdev);
1925  exit:
1926 	pdev = NULL;
1927 	return err;
1928 }
1929 
1930 static int __init
1931 sensors_w83781d_init(void)
1932 {
1933 	int res;
1934 
1935 	res = i2c_add_driver(&w83781d_driver);
1936 	if (res)
1937 		goto exit;
1938 
1939 	if (w83781d_isa_found(isa_address)) {
1940 		res = platform_driver_register(&w83781d_isa_driver);
1941 		if (res)
1942 			goto exit_unreg_i2c_driver;
1943 
1944 		/* Sets global pdev as a side effect */
1945 		res = w83781d_isa_device_add(isa_address);
1946 		if (res)
1947 			goto exit_unreg_isa_driver;
1948 	}
1949 
1950 	return 0;
1951 
1952  exit_unreg_isa_driver:
1953 	platform_driver_unregister(&w83781d_isa_driver);
1954  exit_unreg_i2c_driver:
1955 	i2c_del_driver(&w83781d_driver);
1956  exit:
1957 	return res;
1958 }
1959 
1960 static void __exit
1961 sensors_w83781d_exit(void)
1962 {
1963 	if (pdev) {
1964 		platform_device_unregister(pdev);
1965 		platform_driver_unregister(&w83781d_isa_driver);
1966 	}
1967 	i2c_del_driver(&w83781d_driver);
1968 }
1969 
1970 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1971 	      "Philip Edelbrock <phil@netroedge.com>, "
1972 	      "and Mark Studebaker <mdsxyz123@yahoo.com>");
1973 MODULE_DESCRIPTION("W83781D driver");
1974 MODULE_LICENSE("GPL");
1975 
1976 module_init(sensors_w83781d_init);
1977 module_exit(sensors_w83781d_exit);
1978