1 /* 2 * w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware 3 * monitoring 4 * Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>, 5 * Philip Edelbrock <phil@netroedge.com>, 6 * and Mark Studebaker <mdsxyz123@yahoo.com> 7 * Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org> 8 * Copyright (c) 2007 - 1012 Jean Delvare <jdelvare@suse.de> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 /* 26 * Supports following chips: 27 * 28 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA 29 * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) 30 * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) 31 * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) 32 * w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) 33 * w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC) 34 * 35 * For other winbond chips, and for i2c support in the above chips, 36 * use w83781d.c. 37 * 38 * Note: automatic ("cruise") fan control for 697, 637 & 627thf not 39 * supported yet. 40 */ 41 42 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 43 44 #include <linux/module.h> 45 #include <linux/init.h> 46 #include <linux/slab.h> 47 #include <linux/jiffies.h> 48 #include <linux/platform_device.h> 49 #include <linux/hwmon.h> 50 #include <linux/hwmon-sysfs.h> 51 #include <linux/hwmon-vid.h> 52 #include <linux/err.h> 53 #include <linux/mutex.h> 54 #include <linux/ioport.h> 55 #include <linux/acpi.h> 56 #include <linux/io.h> 57 #include "lm75.h" 58 59 static struct platform_device *pdev; 60 61 #define DRVNAME "w83627hf" 62 enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf }; 63 64 struct w83627hf_sio_data { 65 enum chips type; 66 int sioaddr; 67 }; 68 69 static u8 force_i2c = 0x1f; 70 module_param(force_i2c, byte, 0); 71 MODULE_PARM_DESC(force_i2c, 72 "Initialize the i2c address of the sensors"); 73 74 static bool init = 1; 75 module_param(init, bool, 0); 76 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); 77 78 static unsigned short force_id; 79 module_param(force_id, ushort, 0); 80 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 81 82 /* modified from kernel/include/traps.c */ 83 #define DEV 0x07 /* Register: Logical device select */ 84 85 /* logical device numbers for superio_select (below) */ 86 #define W83627HF_LD_FDC 0x00 87 #define W83627HF_LD_PRT 0x01 88 #define W83627HF_LD_UART1 0x02 89 #define W83627HF_LD_UART2 0x03 90 #define W83627HF_LD_KBC 0x05 91 #define W83627HF_LD_CIR 0x06 /* w83627hf only */ 92 #define W83627HF_LD_GAME 0x07 93 #define W83627HF_LD_MIDI 0x07 94 #define W83627HF_LD_GPIO1 0x07 95 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */ 96 #define W83627HF_LD_GPIO2 0x08 97 #define W83627HF_LD_GPIO3 0x09 98 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */ 99 #define W83627HF_LD_ACPI 0x0a 100 #define W83627HF_LD_HWM 0x0b 101 102 #define DEVID 0x20 /* Register: Device ID */ 103 104 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */ 105 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */ 106 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */ 107 108 #define W83687THF_VID_EN 0x29 /* w83687thf only */ 109 #define W83687THF_VID_CFG 0xF0 /* w83687thf only */ 110 #define W83687THF_VID_DATA 0xF1 /* w83687thf only */ 111 112 static inline void 113 superio_outb(struct w83627hf_sio_data *sio, int reg, int val) 114 { 115 outb(reg, sio->sioaddr); 116 outb(val, sio->sioaddr + 1); 117 } 118 119 static inline int 120 superio_inb(struct w83627hf_sio_data *sio, int reg) 121 { 122 outb(reg, sio->sioaddr); 123 return inb(sio->sioaddr + 1); 124 } 125 126 static inline void 127 superio_select(struct w83627hf_sio_data *sio, int ld) 128 { 129 outb(DEV, sio->sioaddr); 130 outb(ld, sio->sioaddr + 1); 131 } 132 133 static inline void 134 superio_enter(struct w83627hf_sio_data *sio) 135 { 136 outb(0x87, sio->sioaddr); 137 outb(0x87, sio->sioaddr); 138 } 139 140 static inline void 141 superio_exit(struct w83627hf_sio_data *sio) 142 { 143 outb(0xAA, sio->sioaddr); 144 } 145 146 #define W627_DEVID 0x52 147 #define W627THF_DEVID 0x82 148 #define W697_DEVID 0x60 149 #define W637_DEVID 0x70 150 #define W687THF_DEVID 0x85 151 #define WINB_ACT_REG 0x30 152 #define WINB_BASE_REG 0x60 153 /* Constants specified below */ 154 155 /* Alignment of the base address */ 156 #define WINB_ALIGNMENT ~7 157 158 /* Offset & size of I/O region we are interested in */ 159 #define WINB_REGION_OFFSET 5 160 #define WINB_REGION_SIZE 2 161 162 /* Where are the sensors address/data registers relative to the region offset */ 163 #define W83781D_ADDR_REG_OFFSET 0 164 #define W83781D_DATA_REG_OFFSET 1 165 166 /* The W83781D registers */ 167 /* The W83782D registers for nr=7,8 are in bank 5 */ 168 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ 169 (0x554 + (((nr) - 7) * 2))) 170 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ 171 (0x555 + (((nr) - 7) * 2))) 172 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ 173 (0x550 + (nr) - 7)) 174 175 /* nr:0-2 for fans:1-3 */ 176 #define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr)) 177 #define W83627HF_REG_FAN(nr) (0x28 + (nr)) 178 179 #define W83627HF_REG_TEMP2_CONFIG 0x152 180 #define W83627HF_REG_TEMP3_CONFIG 0x252 181 /* these are zero-based, unlike config constants above */ 182 static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 }; 183 static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 }; 184 static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 }; 185 186 #define W83781D_REG_BANK 0x4E 187 188 #define W83781D_REG_CONFIG 0x40 189 #define W83781D_REG_ALARM1 0x459 190 #define W83781D_REG_ALARM2 0x45A 191 #define W83781D_REG_ALARM3 0x45B 192 193 #define W83781D_REG_BEEP_CONFIG 0x4D 194 #define W83781D_REG_BEEP_INTS1 0x56 195 #define W83781D_REG_BEEP_INTS2 0x57 196 #define W83781D_REG_BEEP_INTS3 0x453 197 198 #define W83781D_REG_VID_FANDIV 0x47 199 200 #define W83781D_REG_CHIPID 0x49 201 #define W83781D_REG_WCHIPID 0x58 202 #define W83781D_REG_CHIPMAN 0x4F 203 #define W83781D_REG_PIN 0x4B 204 205 #define W83781D_REG_VBAT 0x5D 206 207 #define W83627HF_REG_PWM1 0x5A 208 #define W83627HF_REG_PWM2 0x5B 209 210 static const u8 W83627THF_REG_PWM_ENABLE[] = { 211 0x04, /* FAN 1 mode */ 212 0x04, /* FAN 2 mode */ 213 0x12, /* FAN AUX mode */ 214 }; 215 static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 }; 216 217 #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */ 218 #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */ 219 #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */ 220 221 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */ 222 223 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 }; 224 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2, 225 W83627THF_REG_PWM3 }; 226 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \ 227 regpwm_627hf[nr] : regpwm[nr]) 228 229 #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */ 230 231 #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */ 232 #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */ 233 #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */ 234 235 static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1, 236 W83637HF_REG_PWM_FREQ2, 237 W83637HF_REG_PWM_FREQ3 }; 238 239 #define W83627HF_BASE_PWM_FREQ 46870 240 241 #define W83781D_REG_I2C_ADDR 0x48 242 #define W83781D_REG_I2C_SUBADDR 0x4A 243 244 /* Sensor selection */ 245 #define W83781D_REG_SCFG1 0x5D 246 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; 247 #define W83781D_REG_SCFG2 0x59 248 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; 249 #define W83781D_DEFAULT_BETA 3435 250 251 /* 252 * Conversions. Limit checking is only done on the TO_REG 253 * variants. Note that you should be a bit careful with which arguments 254 * these macros are called: arguments may be evaluated more than once. 255 * Fixing this is just not worth it. 256 */ 257 #define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255)) 258 #define IN_FROM_REG(val) ((val) * 16) 259 260 static inline u8 FAN_TO_REG(long rpm, int div) 261 { 262 if (rpm == 0) 263 return 255; 264 rpm = clamp_val(rpm, 1, 1000000); 265 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); 266 } 267 268 #define TEMP_MIN (-128000) 269 #define TEMP_MAX ( 127000) 270 271 /* 272 * TEMP: 0.001C/bit (-128C to +127C) 273 * REG: 1C/bit, two's complement 274 */ 275 static u8 TEMP_TO_REG(long temp) 276 { 277 int ntemp = clamp_val(temp, TEMP_MIN, TEMP_MAX); 278 ntemp += (ntemp < 0 ? -500 : 500); 279 return (u8)(ntemp / 1000); 280 } 281 282 static int TEMP_FROM_REG(u8 reg) 283 { 284 return (s8)reg * 1000; 285 } 286 287 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div))) 288 289 #define PWM_TO_REG(val) (clamp_val((val), 0, 255)) 290 291 static inline unsigned long pwm_freq_from_reg_627hf(u8 reg) 292 { 293 unsigned long freq; 294 freq = W83627HF_BASE_PWM_FREQ >> reg; 295 return freq; 296 } 297 static inline u8 pwm_freq_to_reg_627hf(unsigned long val) 298 { 299 u8 i; 300 /* 301 * Only 5 dividers (1 2 4 8 16) 302 * Search for the nearest available frequency 303 */ 304 for (i = 0; i < 4; i++) { 305 if (val > (((W83627HF_BASE_PWM_FREQ >> i) + 306 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2)) 307 break; 308 } 309 return i; 310 } 311 312 static inline unsigned long pwm_freq_from_reg(u8 reg) 313 { 314 /* Clock bit 8 -> 180 kHz or 24 MHz */ 315 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL; 316 317 reg &= 0x7f; 318 /* This should not happen but anyway... */ 319 if (reg == 0) 320 reg++; 321 return clock / (reg << 8); 322 } 323 static inline u8 pwm_freq_to_reg(unsigned long val) 324 { 325 /* Minimum divider value is 0x01 and maximum is 0x7F */ 326 if (val >= 93750) /* The highest we can do */ 327 return 0x01; 328 if (val >= 720) /* Use 24 MHz clock */ 329 return 24000000UL / (val << 8); 330 if (val < 6) /* The lowest we can do */ 331 return 0xFF; 332 else /* Use 180 kHz clock */ 333 return 0x80 | (180000UL / (val << 8)); 334 } 335 336 #define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff) 337 #define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff) 338 339 #define DIV_FROM_REG(val) (1 << (val)) 340 341 static inline u8 DIV_TO_REG(long val) 342 { 343 int i; 344 val = clamp_val(val, 1, 128) >> 1; 345 for (i = 0; i < 7; i++) { 346 if (val == 0) 347 break; 348 val >>= 1; 349 } 350 return (u8)i; 351 } 352 353 /* 354 * For each registered chip, we need to keep some data in memory. 355 * The structure is dynamically allocated. 356 */ 357 struct w83627hf_data { 358 unsigned short addr; 359 const char *name; 360 struct device *hwmon_dev; 361 struct mutex lock; 362 enum chips type; 363 364 struct mutex update_lock; 365 char valid; /* !=0 if following fields are valid */ 366 unsigned long last_updated; /* In jiffies */ 367 368 u8 in[9]; /* Register value */ 369 u8 in_max[9]; /* Register value */ 370 u8 in_min[9]; /* Register value */ 371 u8 fan[3]; /* Register value */ 372 u8 fan_min[3]; /* Register value */ 373 u16 temp[3]; /* Register value */ 374 u16 temp_max[3]; /* Register value */ 375 u16 temp_max_hyst[3]; /* Register value */ 376 u8 fan_div[3]; /* Register encoding, shifted right */ 377 u8 vid; /* Register encoding, combined */ 378 u32 alarms; /* Register encoding, combined */ 379 u32 beep_mask; /* Register encoding, combined */ 380 u8 pwm[3]; /* Register value */ 381 u8 pwm_enable[3]; /* 1 = manual 382 * 2 = thermal cruise (also called SmartFan I) 383 * 3 = fan speed cruise 384 */ 385 u8 pwm_freq[3]; /* Register value */ 386 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode; 387 * 4 = thermistor 388 */ 389 u8 vrm; 390 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */ 391 392 #ifdef CONFIG_PM 393 /* Remember extra register values over suspend/resume */ 394 u8 scfg1; 395 u8 scfg2; 396 #endif 397 }; 398 399 400 static int w83627hf_probe(struct platform_device *pdev); 401 static int w83627hf_remove(struct platform_device *pdev); 402 403 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg); 404 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value); 405 static void w83627hf_update_fan_div(struct w83627hf_data *data); 406 static struct w83627hf_data *w83627hf_update_device(struct device *dev); 407 static void w83627hf_init_device(struct platform_device *pdev); 408 409 #ifdef CONFIG_PM 410 static int w83627hf_suspend(struct device *dev) 411 { 412 struct w83627hf_data *data = w83627hf_update_device(dev); 413 414 mutex_lock(&data->update_lock); 415 data->scfg1 = w83627hf_read_value(data, W83781D_REG_SCFG1); 416 data->scfg2 = w83627hf_read_value(data, W83781D_REG_SCFG2); 417 mutex_unlock(&data->update_lock); 418 419 return 0; 420 } 421 422 static int w83627hf_resume(struct device *dev) 423 { 424 struct w83627hf_data *data = dev_get_drvdata(dev); 425 int i, num_temps = (data->type == w83697hf) ? 2 : 3; 426 427 /* Restore limits */ 428 mutex_lock(&data->update_lock); 429 for (i = 0; i <= 8; i++) { 430 /* skip missing sensors */ 431 if (((data->type == w83697hf) && (i == 1)) || 432 ((data->type != w83627hf && data->type != w83697hf) 433 && (i == 5 || i == 6))) 434 continue; 435 w83627hf_write_value(data, W83781D_REG_IN_MAX(i), 436 data->in_max[i]); 437 w83627hf_write_value(data, W83781D_REG_IN_MIN(i), 438 data->in_min[i]); 439 } 440 for (i = 0; i <= 2; i++) 441 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(i), 442 data->fan_min[i]); 443 for (i = 0; i < num_temps; i++) { 444 w83627hf_write_value(data, w83627hf_reg_temp_over[i], 445 data->temp_max[i]); 446 w83627hf_write_value(data, w83627hf_reg_temp_hyst[i], 447 data->temp_max_hyst[i]); 448 } 449 450 /* Fixup BIOS bugs */ 451 if (data->type == w83627thf || data->type == w83637hf || 452 data->type == w83687thf) 453 w83627hf_write_value(data, W83627THF_REG_VRM_OVT_CFG, 454 data->vrm_ovt); 455 w83627hf_write_value(data, W83781D_REG_SCFG1, data->scfg1); 456 w83627hf_write_value(data, W83781D_REG_SCFG2, data->scfg2); 457 458 /* Force re-reading all values */ 459 data->valid = 0; 460 mutex_unlock(&data->update_lock); 461 462 return 0; 463 } 464 465 static const struct dev_pm_ops w83627hf_dev_pm_ops = { 466 .suspend = w83627hf_suspend, 467 .resume = w83627hf_resume, 468 }; 469 470 #define W83627HF_DEV_PM_OPS (&w83627hf_dev_pm_ops) 471 #else 472 #define W83627HF_DEV_PM_OPS NULL 473 #endif /* CONFIG_PM */ 474 475 static struct platform_driver w83627hf_driver = { 476 .driver = { 477 .name = DRVNAME, 478 .pm = W83627HF_DEV_PM_OPS, 479 }, 480 .probe = w83627hf_probe, 481 .remove = w83627hf_remove, 482 }; 483 484 static ssize_t 485 show_in_input(struct device *dev, struct device_attribute *devattr, char *buf) 486 { 487 int nr = to_sensor_dev_attr(devattr)->index; 488 struct w83627hf_data *data = w83627hf_update_device(dev); 489 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr])); 490 } 491 static ssize_t 492 show_in_min(struct device *dev, struct device_attribute *devattr, char *buf) 493 { 494 int nr = to_sensor_dev_attr(devattr)->index; 495 struct w83627hf_data *data = w83627hf_update_device(dev); 496 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr])); 497 } 498 static ssize_t 499 show_in_max(struct device *dev, struct device_attribute *devattr, char *buf) 500 { 501 int nr = to_sensor_dev_attr(devattr)->index; 502 struct w83627hf_data *data = w83627hf_update_device(dev); 503 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr])); 504 } 505 static ssize_t 506 store_in_min(struct device *dev, struct device_attribute *devattr, 507 const char *buf, size_t count) 508 { 509 int nr = to_sensor_dev_attr(devattr)->index; 510 struct w83627hf_data *data = dev_get_drvdata(dev); 511 long val; 512 int err; 513 514 err = kstrtol(buf, 10, &val); 515 if (err) 516 return err; 517 518 mutex_lock(&data->update_lock); 519 data->in_min[nr] = IN_TO_REG(val); 520 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]); 521 mutex_unlock(&data->update_lock); 522 return count; 523 } 524 static ssize_t 525 store_in_max(struct device *dev, struct device_attribute *devattr, 526 const char *buf, size_t count) 527 { 528 int nr = to_sensor_dev_attr(devattr)->index; 529 struct w83627hf_data *data = dev_get_drvdata(dev); 530 long val; 531 int err; 532 533 err = kstrtol(buf, 10, &val); 534 if (err) 535 return err; 536 537 mutex_lock(&data->update_lock); 538 data->in_max[nr] = IN_TO_REG(val); 539 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]); 540 mutex_unlock(&data->update_lock); 541 return count; 542 } 543 #define sysfs_vin_decl(offset) \ 544 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ 545 show_in_input, NULL, offset); \ 546 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \ 547 show_in_min, store_in_min, offset); \ 548 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \ 549 show_in_max, store_in_max, offset); 550 551 sysfs_vin_decl(1); 552 sysfs_vin_decl(2); 553 sysfs_vin_decl(3); 554 sysfs_vin_decl(4); 555 sysfs_vin_decl(5); 556 sysfs_vin_decl(6); 557 sysfs_vin_decl(7); 558 sysfs_vin_decl(8); 559 560 /* use a different set of functions for in0 */ 561 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg) 562 { 563 long in0; 564 565 if ((data->vrm_ovt & 0x01) && 566 (w83627thf == data->type || w83637hf == data->type 567 || w83687thf == data->type)) 568 569 /* use VRM9 calculation */ 570 in0 = (long)((reg * 488 + 70000 + 50) / 100); 571 else 572 /* use VRM8 (standard) calculation */ 573 in0 = (long)IN_FROM_REG(reg); 574 575 return sprintf(buf,"%ld\n", in0); 576 } 577 578 static ssize_t in0_input_show(struct device *dev, 579 struct device_attribute *attr, char *buf) 580 { 581 struct w83627hf_data *data = w83627hf_update_device(dev); 582 return show_in_0(data, buf, data->in[0]); 583 } 584 585 static ssize_t in0_min_show(struct device *dev, struct device_attribute *attr, 586 char *buf) 587 { 588 struct w83627hf_data *data = w83627hf_update_device(dev); 589 return show_in_0(data, buf, data->in_min[0]); 590 } 591 592 static ssize_t in0_max_show(struct device *dev, struct device_attribute *attr, 593 char *buf) 594 { 595 struct w83627hf_data *data = w83627hf_update_device(dev); 596 return show_in_0(data, buf, data->in_max[0]); 597 } 598 599 static ssize_t in0_min_store(struct device *dev, 600 struct device_attribute *attr, const char *buf, 601 size_t count) 602 { 603 struct w83627hf_data *data = dev_get_drvdata(dev); 604 unsigned long val; 605 int err; 606 607 err = kstrtoul(buf, 10, &val); 608 if (err) 609 return err; 610 611 mutex_lock(&data->update_lock); 612 613 if ((data->vrm_ovt & 0x01) && 614 (w83627thf == data->type || w83637hf == data->type 615 || w83687thf == data->type)) 616 617 /* use VRM9 calculation */ 618 data->in_min[0] = 619 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255); 620 else 621 /* use VRM8 (standard) calculation */ 622 data->in_min[0] = IN_TO_REG(val); 623 624 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]); 625 mutex_unlock(&data->update_lock); 626 return count; 627 } 628 629 static ssize_t in0_max_store(struct device *dev, 630 struct device_attribute *attr, const char *buf, 631 size_t count) 632 { 633 struct w83627hf_data *data = dev_get_drvdata(dev); 634 unsigned long val; 635 int err; 636 637 err = kstrtoul(buf, 10, &val); 638 if (err) 639 return err; 640 641 mutex_lock(&data->update_lock); 642 643 if ((data->vrm_ovt & 0x01) && 644 (w83627thf == data->type || w83637hf == data->type 645 || w83687thf == data->type)) 646 647 /* use VRM9 calculation */ 648 data->in_max[0] = 649 clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255); 650 else 651 /* use VRM8 (standard) calculation */ 652 data->in_max[0] = IN_TO_REG(val); 653 654 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]); 655 mutex_unlock(&data->update_lock); 656 return count; 657 } 658 659 static DEVICE_ATTR_RO(in0_input); 660 static DEVICE_ATTR_RW(in0_min); 661 static DEVICE_ATTR_RW(in0_max); 662 663 static ssize_t 664 show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf) 665 { 666 int nr = to_sensor_dev_attr(devattr)->index; 667 struct w83627hf_data *data = w83627hf_update_device(dev); 668 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr], 669 (long)DIV_FROM_REG(data->fan_div[nr]))); 670 } 671 static ssize_t 672 show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf) 673 { 674 int nr = to_sensor_dev_attr(devattr)->index; 675 struct w83627hf_data *data = w83627hf_update_device(dev); 676 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr], 677 (long)DIV_FROM_REG(data->fan_div[nr]))); 678 } 679 static ssize_t 680 store_fan_min(struct device *dev, struct device_attribute *devattr, 681 const char *buf, size_t count) 682 { 683 int nr = to_sensor_dev_attr(devattr)->index; 684 struct w83627hf_data *data = dev_get_drvdata(dev); 685 unsigned long val; 686 int err; 687 688 err = kstrtoul(buf, 10, &val); 689 if (err) 690 return err; 691 692 mutex_lock(&data->update_lock); 693 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); 694 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), 695 data->fan_min[nr]); 696 697 mutex_unlock(&data->update_lock); 698 return count; 699 } 700 #define sysfs_fan_decl(offset) \ 701 static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \ 702 show_fan_input, NULL, offset - 1); \ 703 static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \ 704 show_fan_min, store_fan_min, offset - 1); 705 706 sysfs_fan_decl(1); 707 sysfs_fan_decl(2); 708 sysfs_fan_decl(3); 709 710 static ssize_t 711 show_temp(struct device *dev, struct device_attribute *devattr, char *buf) 712 { 713 int nr = to_sensor_dev_attr(devattr)->index; 714 struct w83627hf_data *data = w83627hf_update_device(dev); 715 716 u16 tmp = data->temp[nr]; 717 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) 718 : (long) TEMP_FROM_REG(tmp)); 719 } 720 721 static ssize_t 722 show_temp_max(struct device *dev, struct device_attribute *devattr, 723 char *buf) 724 { 725 int nr = to_sensor_dev_attr(devattr)->index; 726 struct w83627hf_data *data = w83627hf_update_device(dev); 727 728 u16 tmp = data->temp_max[nr]; 729 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) 730 : (long) TEMP_FROM_REG(tmp)); 731 } 732 733 static ssize_t 734 show_temp_max_hyst(struct device *dev, struct device_attribute *devattr, 735 char *buf) 736 { 737 int nr = to_sensor_dev_attr(devattr)->index; 738 struct w83627hf_data *data = w83627hf_update_device(dev); 739 740 u16 tmp = data->temp_max_hyst[nr]; 741 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp) 742 : (long) TEMP_FROM_REG(tmp)); 743 } 744 745 static ssize_t 746 store_temp_max(struct device *dev, struct device_attribute *devattr, 747 const char *buf, size_t count) 748 { 749 int nr = to_sensor_dev_attr(devattr)->index; 750 struct w83627hf_data *data = dev_get_drvdata(dev); 751 u16 tmp; 752 long val; 753 int err; 754 755 err = kstrtol(buf, 10, &val); 756 if (err) 757 return err; 758 759 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val); 760 mutex_lock(&data->update_lock); 761 data->temp_max[nr] = tmp; 762 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp); 763 mutex_unlock(&data->update_lock); 764 return count; 765 } 766 767 static ssize_t 768 store_temp_max_hyst(struct device *dev, struct device_attribute *devattr, 769 const char *buf, size_t count) 770 { 771 int nr = to_sensor_dev_attr(devattr)->index; 772 struct w83627hf_data *data = dev_get_drvdata(dev); 773 u16 tmp; 774 long val; 775 int err; 776 777 err = kstrtol(buf, 10, &val); 778 if (err) 779 return err; 780 781 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val); 782 mutex_lock(&data->update_lock); 783 data->temp_max_hyst[nr] = tmp; 784 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp); 785 mutex_unlock(&data->update_lock); 786 return count; 787 } 788 789 #define sysfs_temp_decl(offset) \ 790 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \ 791 show_temp, NULL, offset - 1); \ 792 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \ 793 show_temp_max, store_temp_max, offset - 1); \ 794 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \ 795 show_temp_max_hyst, store_temp_max_hyst, offset - 1); 796 797 sysfs_temp_decl(1); 798 sysfs_temp_decl(2); 799 sysfs_temp_decl(3); 800 801 static ssize_t 802 cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf) 803 { 804 struct w83627hf_data *data = w83627hf_update_device(dev); 805 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); 806 } 807 static DEVICE_ATTR_RO(cpu0_vid); 808 809 static ssize_t 810 vrm_show(struct device *dev, struct device_attribute *attr, char *buf) 811 { 812 struct w83627hf_data *data = dev_get_drvdata(dev); 813 return sprintf(buf, "%ld\n", (long) data->vrm); 814 } 815 static ssize_t 816 vrm_store(struct device *dev, struct device_attribute *attr, const char *buf, 817 size_t count) 818 { 819 struct w83627hf_data *data = dev_get_drvdata(dev); 820 unsigned long val; 821 int err; 822 823 err = kstrtoul(buf, 10, &val); 824 if (err) 825 return err; 826 827 if (val > 255) 828 return -EINVAL; 829 data->vrm = val; 830 831 return count; 832 } 833 static DEVICE_ATTR_RW(vrm); 834 835 static ssize_t 836 alarms_show(struct device *dev, struct device_attribute *attr, char *buf) 837 { 838 struct w83627hf_data *data = w83627hf_update_device(dev); 839 return sprintf(buf, "%ld\n", (long) data->alarms); 840 } 841 static DEVICE_ATTR_RO(alarms); 842 843 static ssize_t 844 show_alarm(struct device *dev, struct device_attribute *attr, char *buf) 845 { 846 struct w83627hf_data *data = w83627hf_update_device(dev); 847 int bitnr = to_sensor_dev_attr(attr)->index; 848 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); 849 } 850 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); 851 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); 852 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); 853 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); 854 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8); 855 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9); 856 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10); 857 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16); 858 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17); 859 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6); 860 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7); 861 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11); 862 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4); 863 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5); 864 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13); 865 866 static ssize_t 867 beep_mask_show(struct device *dev, struct device_attribute *attr, char *buf) 868 { 869 struct w83627hf_data *data = w83627hf_update_device(dev); 870 return sprintf(buf, "%ld\n", 871 (long)BEEP_MASK_FROM_REG(data->beep_mask)); 872 } 873 874 static ssize_t 875 beep_mask_store(struct device *dev, struct device_attribute *attr, 876 const char *buf, size_t count) 877 { 878 struct w83627hf_data *data = dev_get_drvdata(dev); 879 unsigned long val; 880 int err; 881 882 err = kstrtoul(buf, 10, &val); 883 if (err) 884 return err; 885 886 mutex_lock(&data->update_lock); 887 888 /* preserve beep enable */ 889 data->beep_mask = (data->beep_mask & 0x8000) 890 | BEEP_MASK_TO_REG(val); 891 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, 892 data->beep_mask & 0xff); 893 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, 894 ((data->beep_mask) >> 16) & 0xff); 895 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, 896 (data->beep_mask >> 8) & 0xff); 897 898 mutex_unlock(&data->update_lock); 899 return count; 900 } 901 902 static DEVICE_ATTR_RW(beep_mask); 903 904 static ssize_t 905 show_beep(struct device *dev, struct device_attribute *attr, char *buf) 906 { 907 struct w83627hf_data *data = w83627hf_update_device(dev); 908 int bitnr = to_sensor_dev_attr(attr)->index; 909 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1); 910 } 911 912 static ssize_t 913 store_beep(struct device *dev, struct device_attribute *attr, 914 const char *buf, size_t count) 915 { 916 struct w83627hf_data *data = dev_get_drvdata(dev); 917 int bitnr = to_sensor_dev_attr(attr)->index; 918 u8 reg; 919 unsigned long bit; 920 int err; 921 922 err = kstrtoul(buf, 10, &bit); 923 if (err) 924 return err; 925 926 if (bit & ~1) 927 return -EINVAL; 928 929 mutex_lock(&data->update_lock); 930 if (bit) 931 data->beep_mask |= (1 << bitnr); 932 else 933 data->beep_mask &= ~(1 << bitnr); 934 935 if (bitnr < 8) { 936 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1); 937 if (bit) 938 reg |= (1 << bitnr); 939 else 940 reg &= ~(1 << bitnr); 941 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg); 942 } else if (bitnr < 16) { 943 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2); 944 if (bit) 945 reg |= (1 << (bitnr - 8)); 946 else 947 reg &= ~(1 << (bitnr - 8)); 948 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg); 949 } else { 950 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3); 951 if (bit) 952 reg |= (1 << (bitnr - 16)); 953 else 954 reg &= ~(1 << (bitnr - 16)); 955 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg); 956 } 957 mutex_unlock(&data->update_lock); 958 959 return count; 960 } 961 962 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, 963 show_beep, store_beep, 0); 964 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR, 965 show_beep, store_beep, 1); 966 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR, 967 show_beep, store_beep, 2); 968 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR, 969 show_beep, store_beep, 3); 970 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR, 971 show_beep, store_beep, 8); 972 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR, 973 show_beep, store_beep, 9); 974 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR, 975 show_beep, store_beep, 10); 976 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR, 977 show_beep, store_beep, 16); 978 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR, 979 show_beep, store_beep, 17); 980 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR, 981 show_beep, store_beep, 6); 982 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR, 983 show_beep, store_beep, 7); 984 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR, 985 show_beep, store_beep, 11); 986 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, 987 show_beep, store_beep, 4); 988 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR, 989 show_beep, store_beep, 5); 990 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR, 991 show_beep, store_beep, 13); 992 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR, 993 show_beep, store_beep, 15); 994 995 static ssize_t 996 show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf) 997 { 998 int nr = to_sensor_dev_attr(devattr)->index; 999 struct w83627hf_data *data = w83627hf_update_device(dev); 1000 return sprintf(buf, "%ld\n", 1001 (long) DIV_FROM_REG(data->fan_div[nr])); 1002 } 1003 /* 1004 * Note: we save and restore the fan minimum here, because its value is 1005 * determined in part by the fan divisor. This follows the principle of 1006 * least surprise; the user doesn't expect the fan minimum to change just 1007 * because the divisor changed. 1008 */ 1009 static ssize_t 1010 store_fan_div(struct device *dev, struct device_attribute *devattr, 1011 const char *buf, size_t count) 1012 { 1013 int nr = to_sensor_dev_attr(devattr)->index; 1014 struct w83627hf_data *data = dev_get_drvdata(dev); 1015 unsigned long min; 1016 u8 reg; 1017 unsigned long val; 1018 int err; 1019 1020 err = kstrtoul(buf, 10, &val); 1021 if (err) 1022 return err; 1023 1024 mutex_lock(&data->update_lock); 1025 1026 /* Save fan_min */ 1027 min = FAN_FROM_REG(data->fan_min[nr], 1028 DIV_FROM_REG(data->fan_div[nr])); 1029 1030 data->fan_div[nr] = DIV_TO_REG(val); 1031 1032 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) 1033 & (nr==0 ? 0xcf : 0x3f)) 1034 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); 1035 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); 1036 1037 reg = (w83627hf_read_value(data, W83781D_REG_VBAT) 1038 & ~(1 << (5 + nr))) 1039 | ((data->fan_div[nr] & 0x04) << (3 + nr)); 1040 w83627hf_write_value(data, W83781D_REG_VBAT, reg); 1041 1042 /* Restore fan_min */ 1043 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 1044 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]); 1045 1046 mutex_unlock(&data->update_lock); 1047 return count; 1048 } 1049 1050 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR, 1051 show_fan_div, store_fan_div, 0); 1052 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR, 1053 show_fan_div, store_fan_div, 1); 1054 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR, 1055 show_fan_div, store_fan_div, 2); 1056 1057 static ssize_t 1058 show_pwm(struct device *dev, struct device_attribute *devattr, char *buf) 1059 { 1060 int nr = to_sensor_dev_attr(devattr)->index; 1061 struct w83627hf_data *data = w83627hf_update_device(dev); 1062 return sprintf(buf, "%ld\n", (long) data->pwm[nr]); 1063 } 1064 1065 static ssize_t 1066 store_pwm(struct device *dev, struct device_attribute *devattr, 1067 const char *buf, size_t count) 1068 { 1069 int nr = to_sensor_dev_attr(devattr)->index; 1070 struct w83627hf_data *data = dev_get_drvdata(dev); 1071 unsigned long val; 1072 int err; 1073 1074 err = kstrtoul(buf, 10, &val); 1075 if (err) 1076 return err; 1077 1078 mutex_lock(&data->update_lock); 1079 1080 if (data->type == w83627thf) { 1081 /* bits 0-3 are reserved in 627THF */ 1082 data->pwm[nr] = PWM_TO_REG(val) & 0xf0; 1083 w83627hf_write_value(data, 1084 W836X7HF_REG_PWM(data->type, nr), 1085 data->pwm[nr] | 1086 (w83627hf_read_value(data, 1087 W836X7HF_REG_PWM(data->type, nr)) & 0x0f)); 1088 } else { 1089 data->pwm[nr] = PWM_TO_REG(val); 1090 w83627hf_write_value(data, 1091 W836X7HF_REG_PWM(data->type, nr), 1092 data->pwm[nr]); 1093 } 1094 1095 mutex_unlock(&data->update_lock); 1096 return count; 1097 } 1098 1099 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0); 1100 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1); 1101 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2); 1102 1103 static ssize_t 1104 show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf) 1105 { 1106 int nr = to_sensor_dev_attr(devattr)->index; 1107 struct w83627hf_data *data = w83627hf_update_device(dev); 1108 return sprintf(buf, "%d\n", data->pwm_enable[nr]); 1109 } 1110 1111 static ssize_t 1112 store_pwm_enable(struct device *dev, struct device_attribute *devattr, 1113 const char *buf, size_t count) 1114 { 1115 int nr = to_sensor_dev_attr(devattr)->index; 1116 struct w83627hf_data *data = dev_get_drvdata(dev); 1117 u8 reg; 1118 unsigned long val; 1119 int err; 1120 1121 err = kstrtoul(buf, 10, &val); 1122 if (err) 1123 return err; 1124 1125 if (!val || val > 3) /* modes 1, 2 and 3 are supported */ 1126 return -EINVAL; 1127 mutex_lock(&data->update_lock); 1128 data->pwm_enable[nr] = val; 1129 reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]); 1130 reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]); 1131 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr]; 1132 w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg); 1133 mutex_unlock(&data->update_lock); 1134 return count; 1135 } 1136 1137 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 1138 store_pwm_enable, 0); 1139 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 1140 store_pwm_enable, 1); 1141 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 1142 store_pwm_enable, 2); 1143 1144 static ssize_t 1145 show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf) 1146 { 1147 int nr = to_sensor_dev_attr(devattr)->index; 1148 struct w83627hf_data *data = w83627hf_update_device(dev); 1149 if (data->type == w83627hf) 1150 return sprintf(buf, "%ld\n", 1151 pwm_freq_from_reg_627hf(data->pwm_freq[nr])); 1152 else 1153 return sprintf(buf, "%ld\n", 1154 pwm_freq_from_reg(data->pwm_freq[nr])); 1155 } 1156 1157 static ssize_t 1158 store_pwm_freq(struct device *dev, struct device_attribute *devattr, 1159 const char *buf, size_t count) 1160 { 1161 int nr = to_sensor_dev_attr(devattr)->index; 1162 struct w83627hf_data *data = dev_get_drvdata(dev); 1163 static const u8 mask[]={0xF8, 0x8F}; 1164 unsigned long val; 1165 int err; 1166 1167 err = kstrtoul(buf, 10, &val); 1168 if (err) 1169 return err; 1170 1171 mutex_lock(&data->update_lock); 1172 1173 if (data->type == w83627hf) { 1174 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val); 1175 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ, 1176 (data->pwm_freq[nr] << (nr*4)) | 1177 (w83627hf_read_value(data, 1178 W83627HF_REG_PWM_FREQ) & mask[nr])); 1179 } else { 1180 data->pwm_freq[nr] = pwm_freq_to_reg(val); 1181 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr], 1182 data->pwm_freq[nr]); 1183 } 1184 1185 mutex_unlock(&data->update_lock); 1186 return count; 1187 } 1188 1189 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR, 1190 show_pwm_freq, store_pwm_freq, 0); 1191 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR, 1192 show_pwm_freq, store_pwm_freq, 1); 1193 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR, 1194 show_pwm_freq, store_pwm_freq, 2); 1195 1196 static ssize_t 1197 show_temp_type(struct device *dev, struct device_attribute *devattr, 1198 char *buf) 1199 { 1200 int nr = to_sensor_dev_attr(devattr)->index; 1201 struct w83627hf_data *data = w83627hf_update_device(dev); 1202 return sprintf(buf, "%ld\n", (long) data->sens[nr]); 1203 } 1204 1205 static ssize_t 1206 store_temp_type(struct device *dev, struct device_attribute *devattr, 1207 const char *buf, size_t count) 1208 { 1209 int nr = to_sensor_dev_attr(devattr)->index; 1210 struct w83627hf_data *data = dev_get_drvdata(dev); 1211 unsigned long val; 1212 u32 tmp; 1213 int err; 1214 1215 err = kstrtoul(buf, 10, &val); 1216 if (err) 1217 return err; 1218 1219 mutex_lock(&data->update_lock); 1220 1221 switch (val) { 1222 case 1: /* PII/Celeron diode */ 1223 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); 1224 w83627hf_write_value(data, W83781D_REG_SCFG1, 1225 tmp | BIT_SCFG1[nr]); 1226 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2); 1227 w83627hf_write_value(data, W83781D_REG_SCFG2, 1228 tmp | BIT_SCFG2[nr]); 1229 data->sens[nr] = val; 1230 break; 1231 case 2: /* 3904 */ 1232 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); 1233 w83627hf_write_value(data, W83781D_REG_SCFG1, 1234 tmp | BIT_SCFG1[nr]); 1235 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2); 1236 w83627hf_write_value(data, W83781D_REG_SCFG2, 1237 tmp & ~BIT_SCFG2[nr]); 1238 data->sens[nr] = val; 1239 break; 1240 case W83781D_DEFAULT_BETA: 1241 dev_warn(dev, "Sensor type %d is deprecated, please use 4 " 1242 "instead\n", W83781D_DEFAULT_BETA); 1243 /* fall through */ 1244 case 4: /* thermistor */ 1245 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); 1246 w83627hf_write_value(data, W83781D_REG_SCFG1, 1247 tmp & ~BIT_SCFG1[nr]); 1248 data->sens[nr] = val; 1249 break; 1250 default: 1251 dev_err(dev, 1252 "Invalid sensor type %ld; must be 1, 2, or 4\n", 1253 (long) val); 1254 break; 1255 } 1256 1257 mutex_unlock(&data->update_lock); 1258 return count; 1259 } 1260 1261 #define sysfs_temp_type(offset) \ 1262 static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \ 1263 show_temp_type, store_temp_type, offset - 1); 1264 1265 sysfs_temp_type(1); 1266 sysfs_temp_type(2); 1267 sysfs_temp_type(3); 1268 1269 static ssize_t 1270 name_show(struct device *dev, struct device_attribute *devattr, char *buf) 1271 { 1272 struct w83627hf_data *data = dev_get_drvdata(dev); 1273 1274 return sprintf(buf, "%s\n", data->name); 1275 } 1276 static DEVICE_ATTR_RO(name); 1277 1278 static int __init w83627hf_find(int sioaddr, unsigned short *addr, 1279 struct w83627hf_sio_data *sio_data) 1280 { 1281 int err = -ENODEV; 1282 u16 val; 1283 1284 static __initconst char *const names[] = { 1285 "W83627HF", 1286 "W83627THF", 1287 "W83697HF", 1288 "W83637HF", 1289 "W83687THF", 1290 }; 1291 1292 sio_data->sioaddr = sioaddr; 1293 superio_enter(sio_data); 1294 val = force_id ? force_id : superio_inb(sio_data, DEVID); 1295 switch (val) { 1296 case W627_DEVID: 1297 sio_data->type = w83627hf; 1298 break; 1299 case W627THF_DEVID: 1300 sio_data->type = w83627thf; 1301 break; 1302 case W697_DEVID: 1303 sio_data->type = w83697hf; 1304 break; 1305 case W637_DEVID: 1306 sio_data->type = w83637hf; 1307 break; 1308 case W687THF_DEVID: 1309 sio_data->type = w83687thf; 1310 break; 1311 case 0xff: /* No device at all */ 1312 goto exit; 1313 default: 1314 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val); 1315 goto exit; 1316 } 1317 1318 superio_select(sio_data, W83627HF_LD_HWM); 1319 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) | 1320 superio_inb(sio_data, WINB_BASE_REG + 1); 1321 *addr = val & WINB_ALIGNMENT; 1322 if (*addr == 0) { 1323 pr_warn("Base address not set, skipping\n"); 1324 goto exit; 1325 } 1326 1327 val = superio_inb(sio_data, WINB_ACT_REG); 1328 if (!(val & 0x01)) { 1329 pr_warn("Enabling HWM logical device\n"); 1330 superio_outb(sio_data, WINB_ACT_REG, val | 0x01); 1331 } 1332 1333 err = 0; 1334 pr_info(DRVNAME ": Found %s chip at %#x\n", 1335 names[sio_data->type], *addr); 1336 1337 exit: 1338 superio_exit(sio_data); 1339 return err; 1340 } 1341 1342 #define VIN_UNIT_ATTRS(_X_) \ 1343 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \ 1344 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \ 1345 &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \ 1346 &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \ 1347 &sensor_dev_attr_in##_X_##_beep.dev_attr.attr 1348 1349 #define FAN_UNIT_ATTRS(_X_) \ 1350 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \ 1351 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \ 1352 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \ 1353 &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \ 1354 &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr 1355 1356 #define TEMP_UNIT_ATTRS(_X_) \ 1357 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \ 1358 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \ 1359 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \ 1360 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \ 1361 &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \ 1362 &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr 1363 1364 static struct attribute *w83627hf_attributes[] = { 1365 &dev_attr_in0_input.attr, 1366 &dev_attr_in0_min.attr, 1367 &dev_attr_in0_max.attr, 1368 &sensor_dev_attr_in0_alarm.dev_attr.attr, 1369 &sensor_dev_attr_in0_beep.dev_attr.attr, 1370 VIN_UNIT_ATTRS(2), 1371 VIN_UNIT_ATTRS(3), 1372 VIN_UNIT_ATTRS(4), 1373 VIN_UNIT_ATTRS(7), 1374 VIN_UNIT_ATTRS(8), 1375 1376 FAN_UNIT_ATTRS(1), 1377 FAN_UNIT_ATTRS(2), 1378 1379 TEMP_UNIT_ATTRS(1), 1380 TEMP_UNIT_ATTRS(2), 1381 1382 &dev_attr_alarms.attr, 1383 &sensor_dev_attr_beep_enable.dev_attr.attr, 1384 &dev_attr_beep_mask.attr, 1385 1386 &sensor_dev_attr_pwm1.dev_attr.attr, 1387 &sensor_dev_attr_pwm2.dev_attr.attr, 1388 &dev_attr_name.attr, 1389 NULL 1390 }; 1391 1392 static const struct attribute_group w83627hf_group = { 1393 .attrs = w83627hf_attributes, 1394 }; 1395 1396 static struct attribute *w83627hf_attributes_opt[] = { 1397 VIN_UNIT_ATTRS(1), 1398 VIN_UNIT_ATTRS(5), 1399 VIN_UNIT_ATTRS(6), 1400 1401 FAN_UNIT_ATTRS(3), 1402 TEMP_UNIT_ATTRS(3), 1403 &sensor_dev_attr_pwm3.dev_attr.attr, 1404 1405 &sensor_dev_attr_pwm1_freq.dev_attr.attr, 1406 &sensor_dev_attr_pwm2_freq.dev_attr.attr, 1407 &sensor_dev_attr_pwm3_freq.dev_attr.attr, 1408 1409 &sensor_dev_attr_pwm1_enable.dev_attr.attr, 1410 &sensor_dev_attr_pwm2_enable.dev_attr.attr, 1411 &sensor_dev_attr_pwm3_enable.dev_attr.attr, 1412 1413 NULL 1414 }; 1415 1416 static const struct attribute_group w83627hf_group_opt = { 1417 .attrs = w83627hf_attributes_opt, 1418 }; 1419 1420 static int w83627hf_probe(struct platform_device *pdev) 1421 { 1422 struct device *dev = &pdev->dev; 1423 struct w83627hf_sio_data *sio_data = dev_get_platdata(dev); 1424 struct w83627hf_data *data; 1425 struct resource *res; 1426 int err, i; 1427 1428 static const char *names[] = { 1429 "w83627hf", 1430 "w83627thf", 1431 "w83697hf", 1432 "w83637hf", 1433 "w83687thf", 1434 }; 1435 1436 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1437 if (!devm_request_region(dev, res->start, WINB_REGION_SIZE, DRVNAME)) { 1438 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", 1439 (unsigned long)res->start, 1440 (unsigned long)(res->start + WINB_REGION_SIZE - 1)); 1441 return -EBUSY; 1442 } 1443 1444 data = devm_kzalloc(dev, sizeof(struct w83627hf_data), GFP_KERNEL); 1445 if (!data) 1446 return -ENOMEM; 1447 1448 data->addr = res->start; 1449 data->type = sio_data->type; 1450 data->name = names[sio_data->type]; 1451 mutex_init(&data->lock); 1452 mutex_init(&data->update_lock); 1453 platform_set_drvdata(pdev, data); 1454 1455 /* Initialize the chip */ 1456 w83627hf_init_device(pdev); 1457 1458 /* A few vars need to be filled upon startup */ 1459 for (i = 0; i <= 2; i++) 1460 data->fan_min[i] = w83627hf_read_value( 1461 data, W83627HF_REG_FAN_MIN(i)); 1462 w83627hf_update_fan_div(data); 1463 1464 /* Register common device attributes */ 1465 err = sysfs_create_group(&dev->kobj, &w83627hf_group); 1466 if (err) 1467 return err; 1468 1469 /* Register chip-specific device attributes */ 1470 if (data->type == w83627hf || data->type == w83697hf) 1471 if ((err = device_create_file(dev, 1472 &sensor_dev_attr_in5_input.dev_attr)) 1473 || (err = device_create_file(dev, 1474 &sensor_dev_attr_in5_min.dev_attr)) 1475 || (err = device_create_file(dev, 1476 &sensor_dev_attr_in5_max.dev_attr)) 1477 || (err = device_create_file(dev, 1478 &sensor_dev_attr_in5_alarm.dev_attr)) 1479 || (err = device_create_file(dev, 1480 &sensor_dev_attr_in5_beep.dev_attr)) 1481 || (err = device_create_file(dev, 1482 &sensor_dev_attr_in6_input.dev_attr)) 1483 || (err = device_create_file(dev, 1484 &sensor_dev_attr_in6_min.dev_attr)) 1485 || (err = device_create_file(dev, 1486 &sensor_dev_attr_in6_max.dev_attr)) 1487 || (err = device_create_file(dev, 1488 &sensor_dev_attr_in6_alarm.dev_attr)) 1489 || (err = device_create_file(dev, 1490 &sensor_dev_attr_in6_beep.dev_attr)) 1491 || (err = device_create_file(dev, 1492 &sensor_dev_attr_pwm1_freq.dev_attr)) 1493 || (err = device_create_file(dev, 1494 &sensor_dev_attr_pwm2_freq.dev_attr))) 1495 goto error; 1496 1497 if (data->type != w83697hf) 1498 if ((err = device_create_file(dev, 1499 &sensor_dev_attr_in1_input.dev_attr)) 1500 || (err = device_create_file(dev, 1501 &sensor_dev_attr_in1_min.dev_attr)) 1502 || (err = device_create_file(dev, 1503 &sensor_dev_attr_in1_max.dev_attr)) 1504 || (err = device_create_file(dev, 1505 &sensor_dev_attr_in1_alarm.dev_attr)) 1506 || (err = device_create_file(dev, 1507 &sensor_dev_attr_in1_beep.dev_attr)) 1508 || (err = device_create_file(dev, 1509 &sensor_dev_attr_fan3_input.dev_attr)) 1510 || (err = device_create_file(dev, 1511 &sensor_dev_attr_fan3_min.dev_attr)) 1512 || (err = device_create_file(dev, 1513 &sensor_dev_attr_fan3_div.dev_attr)) 1514 || (err = device_create_file(dev, 1515 &sensor_dev_attr_fan3_alarm.dev_attr)) 1516 || (err = device_create_file(dev, 1517 &sensor_dev_attr_fan3_beep.dev_attr)) 1518 || (err = device_create_file(dev, 1519 &sensor_dev_attr_temp3_input.dev_attr)) 1520 || (err = device_create_file(dev, 1521 &sensor_dev_attr_temp3_max.dev_attr)) 1522 || (err = device_create_file(dev, 1523 &sensor_dev_attr_temp3_max_hyst.dev_attr)) 1524 || (err = device_create_file(dev, 1525 &sensor_dev_attr_temp3_alarm.dev_attr)) 1526 || (err = device_create_file(dev, 1527 &sensor_dev_attr_temp3_beep.dev_attr)) 1528 || (err = device_create_file(dev, 1529 &sensor_dev_attr_temp3_type.dev_attr))) 1530 goto error; 1531 1532 if (data->type != w83697hf && data->vid != 0xff) { 1533 /* Convert VID to voltage based on VRM */ 1534 data->vrm = vid_which_vrm(); 1535 1536 if ((err = device_create_file(dev, &dev_attr_cpu0_vid)) 1537 || (err = device_create_file(dev, &dev_attr_vrm))) 1538 goto error; 1539 } 1540 1541 if (data->type == w83627thf || data->type == w83637hf 1542 || data->type == w83687thf) { 1543 err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr); 1544 if (err) 1545 goto error; 1546 } 1547 1548 if (data->type == w83637hf || data->type == w83687thf) 1549 if ((err = device_create_file(dev, 1550 &sensor_dev_attr_pwm1_freq.dev_attr)) 1551 || (err = device_create_file(dev, 1552 &sensor_dev_attr_pwm2_freq.dev_attr)) 1553 || (err = device_create_file(dev, 1554 &sensor_dev_attr_pwm3_freq.dev_attr))) 1555 goto error; 1556 1557 if (data->type != w83627hf) 1558 if ((err = device_create_file(dev, 1559 &sensor_dev_attr_pwm1_enable.dev_attr)) 1560 || (err = device_create_file(dev, 1561 &sensor_dev_attr_pwm2_enable.dev_attr))) 1562 goto error; 1563 1564 if (data->type == w83627thf || data->type == w83637hf 1565 || data->type == w83687thf) { 1566 err = device_create_file(dev, 1567 &sensor_dev_attr_pwm3_enable.dev_attr); 1568 if (err) 1569 goto error; 1570 } 1571 1572 data->hwmon_dev = hwmon_device_register(dev); 1573 if (IS_ERR(data->hwmon_dev)) { 1574 err = PTR_ERR(data->hwmon_dev); 1575 goto error; 1576 } 1577 1578 return 0; 1579 1580 error: 1581 sysfs_remove_group(&dev->kobj, &w83627hf_group); 1582 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt); 1583 return err; 1584 } 1585 1586 static int w83627hf_remove(struct platform_device *pdev) 1587 { 1588 struct w83627hf_data *data = platform_get_drvdata(pdev); 1589 1590 hwmon_device_unregister(data->hwmon_dev); 1591 1592 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group); 1593 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt); 1594 1595 return 0; 1596 } 1597 1598 1599 /* Registers 0x50-0x5f are banked */ 1600 static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg) 1601 { 1602 if ((reg & 0x00f0) == 0x50) { 1603 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET); 1604 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET); 1605 } 1606 } 1607 1608 /* Not strictly necessary, but play it safe for now */ 1609 static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg) 1610 { 1611 if (reg & 0xff00) { 1612 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET); 1613 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET); 1614 } 1615 } 1616 1617 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg) 1618 { 1619 int res, word_sized; 1620 1621 mutex_lock(&data->lock); 1622 word_sized = (((reg & 0xff00) == 0x100) 1623 || ((reg & 0xff00) == 0x200)) 1624 && (((reg & 0x00ff) == 0x50) 1625 || ((reg & 0x00ff) == 0x53) 1626 || ((reg & 0x00ff) == 0x55)); 1627 w83627hf_set_bank(data, reg); 1628 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET); 1629 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET); 1630 if (word_sized) { 1631 outb_p((reg & 0xff) + 1, 1632 data->addr + W83781D_ADDR_REG_OFFSET); 1633 res = 1634 (res << 8) + inb_p(data->addr + 1635 W83781D_DATA_REG_OFFSET); 1636 } 1637 w83627hf_reset_bank(data, reg); 1638 mutex_unlock(&data->lock); 1639 return res; 1640 } 1641 1642 static int w83627thf_read_gpio5(struct platform_device *pdev) 1643 { 1644 struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev); 1645 int res = 0xff, sel; 1646 1647 superio_enter(sio_data); 1648 superio_select(sio_data, W83627HF_LD_GPIO5); 1649 1650 /* Make sure these GPIO pins are enabled */ 1651 if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) { 1652 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n"); 1653 goto exit; 1654 } 1655 1656 /* 1657 * Make sure the pins are configured for input 1658 * There must be at least five (VRM 9), and possibly 6 (VRM 10) 1659 */ 1660 sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f; 1661 if ((sel & 0x1f) != 0x1f) { 1662 dev_dbg(&pdev->dev, "GPIO5 not configured for VID " 1663 "function\n"); 1664 goto exit; 1665 } 1666 1667 dev_info(&pdev->dev, "Reading VID from GPIO5\n"); 1668 res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel; 1669 1670 exit: 1671 superio_exit(sio_data); 1672 return res; 1673 } 1674 1675 static int w83687thf_read_vid(struct platform_device *pdev) 1676 { 1677 struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev); 1678 int res = 0xff; 1679 1680 superio_enter(sio_data); 1681 superio_select(sio_data, W83627HF_LD_HWM); 1682 1683 /* Make sure these GPIO pins are enabled */ 1684 if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) { 1685 dev_dbg(&pdev->dev, "VID disabled, no VID function\n"); 1686 goto exit; 1687 } 1688 1689 /* Make sure the pins are configured for input */ 1690 if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) { 1691 dev_dbg(&pdev->dev, "VID configured as output, " 1692 "no VID function\n"); 1693 goto exit; 1694 } 1695 1696 res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f; 1697 1698 exit: 1699 superio_exit(sio_data); 1700 return res; 1701 } 1702 1703 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value) 1704 { 1705 int word_sized; 1706 1707 mutex_lock(&data->lock); 1708 word_sized = (((reg & 0xff00) == 0x100) 1709 || ((reg & 0xff00) == 0x200)) 1710 && (((reg & 0x00ff) == 0x53) 1711 || ((reg & 0x00ff) == 0x55)); 1712 w83627hf_set_bank(data, reg); 1713 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET); 1714 if (word_sized) { 1715 outb_p(value >> 8, 1716 data->addr + W83781D_DATA_REG_OFFSET); 1717 outb_p((reg & 0xff) + 1, 1718 data->addr + W83781D_ADDR_REG_OFFSET); 1719 } 1720 outb_p(value & 0xff, 1721 data->addr + W83781D_DATA_REG_OFFSET); 1722 w83627hf_reset_bank(data, reg); 1723 mutex_unlock(&data->lock); 1724 return 0; 1725 } 1726 1727 static void w83627hf_init_device(struct platform_device *pdev) 1728 { 1729 struct w83627hf_data *data = platform_get_drvdata(pdev); 1730 int i; 1731 enum chips type = data->type; 1732 u8 tmp; 1733 1734 /* Minimize conflicts with other winbond i2c-only clients... */ 1735 /* disable i2c subclients... how to disable main i2c client?? */ 1736 /* force i2c address to relatively uncommon address */ 1737 if (type == w83627hf) { 1738 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89); 1739 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c); 1740 } 1741 1742 /* Read VID only once */ 1743 if (type == w83627hf || type == w83637hf) { 1744 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV); 1745 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID); 1746 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4); 1747 } else if (type == w83627thf) { 1748 data->vid = w83627thf_read_gpio5(pdev); 1749 } else if (type == w83687thf) { 1750 data->vid = w83687thf_read_vid(pdev); 1751 } 1752 1753 /* Read VRM & OVT Config only once */ 1754 if (type == w83627thf || type == w83637hf || type == w83687thf) { 1755 data->vrm_ovt = 1756 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG); 1757 } 1758 1759 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); 1760 for (i = 1; i <= 3; i++) { 1761 if (!(tmp & BIT_SCFG1[i - 1])) { 1762 data->sens[i - 1] = 4; 1763 } else { 1764 if (w83627hf_read_value 1765 (data, 1766 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) 1767 data->sens[i - 1] = 1; 1768 else 1769 data->sens[i - 1] = 2; 1770 } 1771 if ((type == w83697hf) && (i == 2)) 1772 break; 1773 } 1774 1775 if(init) { 1776 /* Enable temp2 */ 1777 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG); 1778 if (tmp & 0x01) { 1779 dev_warn(&pdev->dev, "Enabling temp2, readings " 1780 "might not make sense\n"); 1781 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG, 1782 tmp & 0xfe); 1783 } 1784 1785 /* Enable temp3 */ 1786 if (type != w83697hf) { 1787 tmp = w83627hf_read_value(data, 1788 W83627HF_REG_TEMP3_CONFIG); 1789 if (tmp & 0x01) { 1790 dev_warn(&pdev->dev, "Enabling temp3, " 1791 "readings might not make sense\n"); 1792 w83627hf_write_value(data, 1793 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe); 1794 } 1795 } 1796 } 1797 1798 /* Start monitoring */ 1799 w83627hf_write_value(data, W83781D_REG_CONFIG, 1800 (w83627hf_read_value(data, 1801 W83781D_REG_CONFIG) & 0xf7) 1802 | 0x01); 1803 1804 /* Enable VBAT monitoring if needed */ 1805 tmp = w83627hf_read_value(data, W83781D_REG_VBAT); 1806 if (!(tmp & 0x01)) 1807 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01); 1808 } 1809 1810 static void w83627hf_update_fan_div(struct w83627hf_data *data) 1811 { 1812 int reg; 1813 1814 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV); 1815 data->fan_div[0] = (reg >> 4) & 0x03; 1816 data->fan_div[1] = (reg >> 6) & 0x03; 1817 if (data->type != w83697hf) { 1818 data->fan_div[2] = (w83627hf_read_value(data, 1819 W83781D_REG_PIN) >> 6) & 0x03; 1820 } 1821 reg = w83627hf_read_value(data, W83781D_REG_VBAT); 1822 data->fan_div[0] |= (reg >> 3) & 0x04; 1823 data->fan_div[1] |= (reg >> 4) & 0x04; 1824 if (data->type != w83697hf) 1825 data->fan_div[2] |= (reg >> 5) & 0x04; 1826 } 1827 1828 static struct w83627hf_data *w83627hf_update_device(struct device *dev) 1829 { 1830 struct w83627hf_data *data = dev_get_drvdata(dev); 1831 int i, num_temps = (data->type == w83697hf) ? 2 : 3; 1832 int num_pwms = (data->type == w83697hf) ? 2 : 3; 1833 1834 mutex_lock(&data->update_lock); 1835 1836 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1837 || !data->valid) { 1838 for (i = 0; i <= 8; i++) { 1839 /* skip missing sensors */ 1840 if (((data->type == w83697hf) && (i == 1)) || 1841 ((data->type != w83627hf && data->type != w83697hf) 1842 && (i == 5 || i == 6))) 1843 continue; 1844 data->in[i] = 1845 w83627hf_read_value(data, W83781D_REG_IN(i)); 1846 data->in_min[i] = 1847 w83627hf_read_value(data, 1848 W83781D_REG_IN_MIN(i)); 1849 data->in_max[i] = 1850 w83627hf_read_value(data, 1851 W83781D_REG_IN_MAX(i)); 1852 } 1853 for (i = 0; i <= 2; i++) { 1854 data->fan[i] = 1855 w83627hf_read_value(data, W83627HF_REG_FAN(i)); 1856 data->fan_min[i] = 1857 w83627hf_read_value(data, 1858 W83627HF_REG_FAN_MIN(i)); 1859 } 1860 for (i = 0; i <= 2; i++) { 1861 u8 tmp = w83627hf_read_value(data, 1862 W836X7HF_REG_PWM(data->type, i)); 1863 /* bits 0-3 are reserved in 627THF */ 1864 if (data->type == w83627thf) 1865 tmp &= 0xf0; 1866 data->pwm[i] = tmp; 1867 if (i == 1 && 1868 (data->type == w83627hf || data->type == w83697hf)) 1869 break; 1870 } 1871 if (data->type == w83627hf) { 1872 u8 tmp = w83627hf_read_value(data, 1873 W83627HF_REG_PWM_FREQ); 1874 data->pwm_freq[0] = tmp & 0x07; 1875 data->pwm_freq[1] = (tmp >> 4) & 0x07; 1876 } else if (data->type != w83627thf) { 1877 for (i = 1; i <= 3; i++) { 1878 data->pwm_freq[i - 1] = 1879 w83627hf_read_value(data, 1880 W83637HF_REG_PWM_FREQ[i - 1]); 1881 if (i == 2 && (data->type == w83697hf)) 1882 break; 1883 } 1884 } 1885 if (data->type != w83627hf) { 1886 for (i = 0; i < num_pwms; i++) { 1887 u8 tmp = w83627hf_read_value(data, 1888 W83627THF_REG_PWM_ENABLE[i]); 1889 data->pwm_enable[i] = 1890 ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i]) 1891 & 0x03) + 1; 1892 } 1893 } 1894 for (i = 0; i < num_temps; i++) { 1895 data->temp[i] = w83627hf_read_value( 1896 data, w83627hf_reg_temp[i]); 1897 data->temp_max[i] = w83627hf_read_value( 1898 data, w83627hf_reg_temp_over[i]); 1899 data->temp_max_hyst[i] = w83627hf_read_value( 1900 data, w83627hf_reg_temp_hyst[i]); 1901 } 1902 1903 w83627hf_update_fan_div(data); 1904 1905 data->alarms = 1906 w83627hf_read_value(data, W83781D_REG_ALARM1) | 1907 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) | 1908 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16); 1909 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2); 1910 data->beep_mask = (i << 8) | 1911 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) | 1912 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16; 1913 data->last_updated = jiffies; 1914 data->valid = 1; 1915 } 1916 1917 mutex_unlock(&data->update_lock); 1918 1919 return data; 1920 } 1921 1922 static int __init w83627hf_device_add(unsigned short address, 1923 const struct w83627hf_sio_data *sio_data) 1924 { 1925 struct resource res = { 1926 .start = address + WINB_REGION_OFFSET, 1927 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1, 1928 .name = DRVNAME, 1929 .flags = IORESOURCE_IO, 1930 }; 1931 int err; 1932 1933 err = acpi_check_resource_conflict(&res); 1934 if (err) 1935 goto exit; 1936 1937 pdev = platform_device_alloc(DRVNAME, address); 1938 if (!pdev) { 1939 err = -ENOMEM; 1940 pr_err("Device allocation failed\n"); 1941 goto exit; 1942 } 1943 1944 err = platform_device_add_resources(pdev, &res, 1); 1945 if (err) { 1946 pr_err("Device resource addition failed (%d)\n", err); 1947 goto exit_device_put; 1948 } 1949 1950 err = platform_device_add_data(pdev, sio_data, 1951 sizeof(struct w83627hf_sio_data)); 1952 if (err) { 1953 pr_err("Platform data allocation failed\n"); 1954 goto exit_device_put; 1955 } 1956 1957 err = platform_device_add(pdev); 1958 if (err) { 1959 pr_err("Device addition failed (%d)\n", err); 1960 goto exit_device_put; 1961 } 1962 1963 return 0; 1964 1965 exit_device_put: 1966 platform_device_put(pdev); 1967 exit: 1968 return err; 1969 } 1970 1971 static int __init sensors_w83627hf_init(void) 1972 { 1973 int err; 1974 unsigned short address; 1975 struct w83627hf_sio_data sio_data; 1976 1977 if (w83627hf_find(0x2e, &address, &sio_data) 1978 && w83627hf_find(0x4e, &address, &sio_data)) 1979 return -ENODEV; 1980 1981 err = platform_driver_register(&w83627hf_driver); 1982 if (err) 1983 goto exit; 1984 1985 /* Sets global pdev as a side effect */ 1986 err = w83627hf_device_add(address, &sio_data); 1987 if (err) 1988 goto exit_driver; 1989 1990 return 0; 1991 1992 exit_driver: 1993 platform_driver_unregister(&w83627hf_driver); 1994 exit: 1995 return err; 1996 } 1997 1998 static void __exit sensors_w83627hf_exit(void) 1999 { 2000 platform_device_unregister(pdev); 2001 platform_driver_unregister(&w83627hf_driver); 2002 } 2003 2004 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " 2005 "Philip Edelbrock <phil@netroedge.com>, " 2006 "and Mark Studebaker <mdsxyz123@yahoo.com>"); 2007 MODULE_DESCRIPTION("W83627HF driver"); 2008 MODULE_LICENSE("GPL"); 2009 2010 module_init(sensors_w83627hf_init); 2011 module_exit(sensors_w83627hf_exit); 2012