1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /***************************************************************************
3 * Copyright (C) 2010-2012 Hans de Goede <hdegoede@redhat.com> *
4 * *
5 ***************************************************************************/
6
7 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/err.h>
13 #include <linux/io.h>
14 #include <linux/acpi.h>
15 #include <linux/delay.h>
16 #include <linux/fs.h>
17 #include <linux/watchdog.h>
18 #include <linux/uaccess.h>
19 #include <linux/slab.h>
20 #include "sch56xx-common.h"
21
22 /* Insmod parameters */
23 static bool nowayout = WATCHDOG_NOWAYOUT;
24 module_param(nowayout, bool, 0);
25 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
26 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
27
28 #define SIO_SCH56XX_LD_EM 0x0C /* Embedded uController Logical Dev */
29 #define SIO_UNLOCK_KEY 0x55 /* Key to enable Super-I/O */
30 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
31
32 #define SIO_REG_LDSEL 0x07 /* Logical device select */
33 #define SIO_REG_DEVID 0x20 /* Device ID */
34 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
35 #define SIO_REG_ADDR 0x66 /* Logical device address (2 bytes) */
36
37 #define SIO_SCH5627_ID 0xC6 /* Chipset ID */
38 #define SIO_SCH5636_ID 0xC7 /* Chipset ID */
39
40 #define REGION_LENGTH 10
41
42 #define SCH56XX_CMD_READ 0x02
43 #define SCH56XX_CMD_WRITE 0x03
44
45 /* Watchdog registers */
46 #define SCH56XX_REG_WDOG_PRESET 0x58B
47 #define SCH56XX_REG_WDOG_CONTROL 0x58C
48 #define SCH56XX_WDOG_TIME_BASE_SEC 0x01
49 #define SCH56XX_REG_WDOG_OUTPUT_ENABLE 0x58E
50 #define SCH56XX_WDOG_OUTPUT_ENABLE 0x02
51
52 struct sch56xx_watchdog_data {
53 u16 addr;
54 struct mutex *io_lock;
55 struct watchdog_info wdinfo;
56 struct watchdog_device wddev;
57 u8 watchdog_preset;
58 u8 watchdog_control;
59 u8 watchdog_output_enable;
60 };
61
62 static struct platform_device *sch56xx_pdev;
63
64 /* Super I/O functions */
superio_inb(int base,int reg)65 static inline int superio_inb(int base, int reg)
66 {
67 outb(reg, base);
68 return inb(base + 1);
69 }
70
superio_enter(int base)71 static inline int superio_enter(int base)
72 {
73 /* Don't step on other drivers' I/O space by accident */
74 if (!request_muxed_region(base, 2, "sch56xx")) {
75 pr_err("I/O address 0x%04x already in use\n", base);
76 return -EBUSY;
77 }
78
79 outb(SIO_UNLOCK_KEY, base);
80
81 return 0;
82 }
83
superio_select(int base,int ld)84 static inline void superio_select(int base, int ld)
85 {
86 outb(SIO_REG_LDSEL, base);
87 outb(ld, base + 1);
88 }
89
superio_exit(int base)90 static inline void superio_exit(int base)
91 {
92 outb(SIO_LOCK_KEY, base);
93 release_region(base, 2);
94 }
95
sch56xx_send_cmd(u16 addr,u8 cmd,u16 reg,u8 v)96 static int sch56xx_send_cmd(u16 addr, u8 cmd, u16 reg, u8 v)
97 {
98 u8 val;
99 int i;
100 /*
101 * According to SMSC for the commands we use the maximum time for
102 * the EM to respond is 15 ms, but testing shows in practice it
103 * responds within 15-32 reads, so we first busy poll, and if
104 * that fails sleep a bit and try again until we are way past
105 * the 15 ms maximum response time.
106 */
107 const int max_busy_polls = 64;
108 const int max_lazy_polls = 32;
109
110 /* (Optional) Write-Clear the EC to Host Mailbox Register */
111 val = inb(addr + 1);
112 outb(val, addr + 1);
113
114 /* Set Mailbox Address Pointer to first location in Region 1 */
115 outb(0x00, addr + 2);
116 outb(0x80, addr + 3);
117
118 /* Write Request Packet Header */
119 outb(cmd, addr + 4); /* VREG Access Type read:0x02 write:0x03 */
120 outb(0x01, addr + 5); /* # of Entries: 1 Byte (8-bit) */
121 outb(0x04, addr + 2); /* Mailbox AP to first data entry loc. */
122
123 /* Write Value field */
124 if (cmd == SCH56XX_CMD_WRITE)
125 outb(v, addr + 4);
126
127 /* Write Address field */
128 outb(reg & 0xff, addr + 6);
129 outb(reg >> 8, addr + 7);
130
131 /* Execute the Random Access Command */
132 outb(0x01, addr); /* Write 01h to the Host-to-EC register */
133
134 /* EM Interface Polling "Algorithm" */
135 for (i = 0; i < max_busy_polls + max_lazy_polls; i++) {
136 if (i >= max_busy_polls)
137 usleep_range(1000, 2000);
138 /* Read Interrupt source Register */
139 val = inb(addr + 8);
140 /* Write Clear the interrupt source bits */
141 if (val)
142 outb(val, addr + 8);
143 /* Command Completed ? */
144 if (val & 0x01)
145 break;
146 }
147 if (i == max_busy_polls + max_lazy_polls) {
148 pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n",
149 reg, 1);
150 return -EIO;
151 }
152
153 /*
154 * According to SMSC we may need to retry this, but sofar I've always
155 * seen this succeed in 1 try.
156 */
157 for (i = 0; i < max_busy_polls; i++) {
158 /* Read EC-to-Host Register */
159 val = inb(addr + 1);
160 /* Command Completed ? */
161 if (val == 0x01)
162 break;
163
164 if (i == 0)
165 pr_warn("EC reports: 0x%02x reading virtual register 0x%04hx\n",
166 (unsigned int)val, reg);
167 }
168 if (i == max_busy_polls) {
169 pr_err("Max retries exceeded reading virtual register 0x%04hx (%d)\n",
170 reg, 2);
171 return -EIO;
172 }
173
174 /*
175 * According to the SMSC app note we should now do:
176 *
177 * Set Mailbox Address Pointer to first location in Region 1 *
178 * outb(0x00, addr + 2);
179 * outb(0x80, addr + 3);
180 *
181 * But if we do that things don't work, so let's not.
182 */
183
184 /* Read Value field */
185 if (cmd == SCH56XX_CMD_READ)
186 return inb(addr + 4);
187
188 return 0;
189 }
190
sch56xx_read_virtual_reg(u16 addr,u16 reg)191 int sch56xx_read_virtual_reg(u16 addr, u16 reg)
192 {
193 return sch56xx_send_cmd(addr, SCH56XX_CMD_READ, reg, 0);
194 }
195 EXPORT_SYMBOL(sch56xx_read_virtual_reg);
196
sch56xx_write_virtual_reg(u16 addr,u16 reg,u8 val)197 int sch56xx_write_virtual_reg(u16 addr, u16 reg, u8 val)
198 {
199 return sch56xx_send_cmd(addr, SCH56XX_CMD_WRITE, reg, val);
200 }
201 EXPORT_SYMBOL(sch56xx_write_virtual_reg);
202
sch56xx_read_virtual_reg16(u16 addr,u16 reg)203 int sch56xx_read_virtual_reg16(u16 addr, u16 reg)
204 {
205 int lsb, msb;
206
207 /* Read LSB first, this will cause the matching MSB to be latched */
208 lsb = sch56xx_read_virtual_reg(addr, reg);
209 if (lsb < 0)
210 return lsb;
211
212 msb = sch56xx_read_virtual_reg(addr, reg + 1);
213 if (msb < 0)
214 return msb;
215
216 return lsb | (msb << 8);
217 }
218 EXPORT_SYMBOL(sch56xx_read_virtual_reg16);
219
sch56xx_read_virtual_reg12(u16 addr,u16 msb_reg,u16 lsn_reg,int high_nibble)220 int sch56xx_read_virtual_reg12(u16 addr, u16 msb_reg, u16 lsn_reg,
221 int high_nibble)
222 {
223 int msb, lsn;
224
225 /* Read MSB first, this will cause the matching LSN to be latched */
226 msb = sch56xx_read_virtual_reg(addr, msb_reg);
227 if (msb < 0)
228 return msb;
229
230 lsn = sch56xx_read_virtual_reg(addr, lsn_reg);
231 if (lsn < 0)
232 return lsn;
233
234 if (high_nibble)
235 return (msb << 4) | (lsn >> 4);
236 else
237 return (msb << 4) | (lsn & 0x0f);
238 }
239 EXPORT_SYMBOL(sch56xx_read_virtual_reg12);
240
241 /*
242 * Watchdog routines
243 */
244
watchdog_set_timeout(struct watchdog_device * wddev,unsigned int timeout)245 static int watchdog_set_timeout(struct watchdog_device *wddev,
246 unsigned int timeout)
247 {
248 struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
249 unsigned int resolution;
250 u8 control;
251 int ret;
252
253 /* 1 second or 60 second resolution? */
254 if (timeout <= 255)
255 resolution = 1;
256 else
257 resolution = 60;
258
259 if (timeout < resolution || timeout > (resolution * 255))
260 return -EINVAL;
261
262 if (resolution == 1)
263 control = data->watchdog_control | SCH56XX_WDOG_TIME_BASE_SEC;
264 else
265 control = data->watchdog_control & ~SCH56XX_WDOG_TIME_BASE_SEC;
266
267 if (data->watchdog_control != control) {
268 mutex_lock(data->io_lock);
269 ret = sch56xx_write_virtual_reg(data->addr,
270 SCH56XX_REG_WDOG_CONTROL,
271 control);
272 mutex_unlock(data->io_lock);
273 if (ret)
274 return ret;
275
276 data->watchdog_control = control;
277 }
278
279 /*
280 * Remember new timeout value, but do not write as that (re)starts
281 * the watchdog countdown.
282 */
283 data->watchdog_preset = DIV_ROUND_UP(timeout, resolution);
284 wddev->timeout = data->watchdog_preset * resolution;
285
286 return 0;
287 }
288
watchdog_start(struct watchdog_device * wddev)289 static int watchdog_start(struct watchdog_device *wddev)
290 {
291 struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
292 int ret;
293 u8 val;
294
295 /*
296 * The sch56xx's watchdog cannot really be started / stopped
297 * it is always running, but we can avoid the timer expiring
298 * from causing a system reset by clearing the output enable bit.
299 *
300 * The sch56xx's watchdog will set the watchdog event bit, bit 0
301 * of the second interrupt source register (at base-address + 9),
302 * when the timer expires.
303 *
304 * This will only cause a system reset if the 0-1 flank happens when
305 * output enable is true. Setting output enable after the flank will
306 * not cause a reset, nor will the timer expiring a second time.
307 * This means we must clear the watchdog event bit in case it is set.
308 *
309 * The timer may still be running (after a recent watchdog_stop) and
310 * mere milliseconds away from expiring, so the timer must be reset
311 * first!
312 */
313
314 mutex_lock(data->io_lock);
315
316 /* 1. Reset the watchdog countdown counter */
317 ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET,
318 data->watchdog_preset);
319 if (ret)
320 goto leave;
321
322 /* 2. Enable output */
323 val = data->watchdog_output_enable | SCH56XX_WDOG_OUTPUT_ENABLE;
324 ret = sch56xx_write_virtual_reg(data->addr,
325 SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);
326 if (ret)
327 goto leave;
328
329 data->watchdog_output_enable = val;
330
331 /* 3. Clear the watchdog event bit if set */
332 val = inb(data->addr + 9);
333 if (val & 0x01)
334 outb(0x01, data->addr + 9);
335
336 leave:
337 mutex_unlock(data->io_lock);
338 return ret;
339 }
340
watchdog_trigger(struct watchdog_device * wddev)341 static int watchdog_trigger(struct watchdog_device *wddev)
342 {
343 struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
344 int ret;
345
346 /* Reset the watchdog countdown counter */
347 mutex_lock(data->io_lock);
348 ret = sch56xx_write_virtual_reg(data->addr, SCH56XX_REG_WDOG_PRESET,
349 data->watchdog_preset);
350 mutex_unlock(data->io_lock);
351
352 return ret;
353 }
354
watchdog_stop(struct watchdog_device * wddev)355 static int watchdog_stop(struct watchdog_device *wddev)
356 {
357 struct sch56xx_watchdog_data *data = watchdog_get_drvdata(wddev);
358 int ret = 0;
359 u8 val;
360
361 val = data->watchdog_output_enable & ~SCH56XX_WDOG_OUTPUT_ENABLE;
362 mutex_lock(data->io_lock);
363 ret = sch56xx_write_virtual_reg(data->addr,
364 SCH56XX_REG_WDOG_OUTPUT_ENABLE, val);
365 mutex_unlock(data->io_lock);
366 if (ret)
367 return ret;
368
369 data->watchdog_output_enable = val;
370 return 0;
371 }
372
373 static const struct watchdog_ops watchdog_ops = {
374 .owner = THIS_MODULE,
375 .start = watchdog_start,
376 .stop = watchdog_stop,
377 .ping = watchdog_trigger,
378 .set_timeout = watchdog_set_timeout,
379 };
380
sch56xx_watchdog_register(struct device * parent,u16 addr,u32 revision,struct mutex * io_lock,int check_enabled)381 void sch56xx_watchdog_register(struct device *parent, u16 addr, u32 revision,
382 struct mutex *io_lock, int check_enabled)
383 {
384 struct sch56xx_watchdog_data *data;
385 int err, control, output_enable;
386
387 /* Cache the watchdog registers */
388 mutex_lock(io_lock);
389 control =
390 sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_CONTROL);
391 output_enable =
392 sch56xx_read_virtual_reg(addr, SCH56XX_REG_WDOG_OUTPUT_ENABLE);
393 mutex_unlock(io_lock);
394
395 if (control < 0)
396 return;
397 if (output_enable < 0)
398 return;
399 if (check_enabled && !(output_enable & SCH56XX_WDOG_OUTPUT_ENABLE)) {
400 pr_warn("Watchdog not enabled by BIOS, not registering\n");
401 return;
402 }
403
404 data = devm_kzalloc(parent, sizeof(struct sch56xx_watchdog_data), GFP_KERNEL);
405 if (!data)
406 return;
407
408 data->addr = addr;
409 data->io_lock = io_lock;
410
411 strscpy(data->wdinfo.identity, "sch56xx watchdog", sizeof(data->wdinfo.identity));
412 data->wdinfo.firmware_version = revision;
413 data->wdinfo.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT;
414 if (!nowayout)
415 data->wdinfo.options |= WDIOF_MAGICCLOSE;
416
417 data->wddev.info = &data->wdinfo;
418 data->wddev.ops = &watchdog_ops;
419 data->wddev.parent = parent;
420 data->wddev.timeout = 60;
421 data->wddev.min_timeout = 1;
422 data->wddev.max_timeout = 255 * 60;
423 watchdog_set_nowayout(&data->wddev, nowayout);
424 if (output_enable & SCH56XX_WDOG_OUTPUT_ENABLE)
425 set_bit(WDOG_HW_RUNNING, &data->wddev.status);
426
427 /* Since the watchdog uses a downcounter there is no register to read
428 the BIOS set timeout from (if any was set at all) ->
429 Choose a preset which will give us a 1 minute timeout */
430 if (control & SCH56XX_WDOG_TIME_BASE_SEC)
431 data->watchdog_preset = 60; /* seconds */
432 else
433 data->watchdog_preset = 1; /* minute */
434
435 data->watchdog_control = control;
436 data->watchdog_output_enable = output_enable;
437
438 watchdog_set_drvdata(&data->wddev, data);
439 err = devm_watchdog_register_device(parent, &data->wddev);
440 if (err) {
441 pr_err("Registering watchdog chardev: %d\n", err);
442 devm_kfree(parent, data);
443 }
444 }
445 EXPORT_SYMBOL(sch56xx_watchdog_register);
446
447 /*
448 * platform dev find, add and remove functions
449 */
450
sch56xx_find(int sioaddr,const char ** name)451 static int __init sch56xx_find(int sioaddr, const char **name)
452 {
453 u8 devid;
454 unsigned short address;
455 int err;
456
457 err = superio_enter(sioaddr);
458 if (err)
459 return err;
460
461 devid = superio_inb(sioaddr, SIO_REG_DEVID);
462 switch (devid) {
463 case SIO_SCH5627_ID:
464 *name = "sch5627";
465 break;
466 case SIO_SCH5636_ID:
467 *name = "sch5636";
468 break;
469 default:
470 pr_debug("Unsupported device id: 0x%02x\n",
471 (unsigned int)devid);
472 err = -ENODEV;
473 goto exit;
474 }
475
476 superio_select(sioaddr, SIO_SCH56XX_LD_EM);
477
478 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
479 pr_warn("Device not activated\n");
480 err = -ENODEV;
481 goto exit;
482 }
483
484 /*
485 * Warning the order of the low / high byte is the other way around
486 * as on most other superio devices!!
487 */
488 address = superio_inb(sioaddr, SIO_REG_ADDR) |
489 superio_inb(sioaddr, SIO_REG_ADDR + 1) << 8;
490 if (address == 0) {
491 pr_warn("Base address not set\n");
492 err = -ENODEV;
493 goto exit;
494 }
495 err = address;
496
497 exit:
498 superio_exit(sioaddr);
499 return err;
500 }
501
sch56xx_device_add(int address,const char * name)502 static int __init sch56xx_device_add(int address, const char *name)
503 {
504 struct resource res = {
505 .start = address,
506 .end = address + REGION_LENGTH - 1,
507 .name = name,
508 .flags = IORESOURCE_IO,
509 };
510 int err;
511
512 err = acpi_check_resource_conflict(&res);
513 if (err)
514 return err;
515
516 sch56xx_pdev = platform_device_register_simple(name, -1, &res, 1);
517
518 return PTR_ERR_OR_ZERO(sch56xx_pdev);
519 }
520
sch56xx_init(void)521 static int __init sch56xx_init(void)
522 {
523 int address;
524 const char *name = NULL;
525
526 address = sch56xx_find(0x4e, &name);
527 if (address < 0)
528 address = sch56xx_find(0x2e, &name);
529 if (address < 0)
530 return address;
531
532 return sch56xx_device_add(address, name);
533 }
534
sch56xx_exit(void)535 static void __exit sch56xx_exit(void)
536 {
537 platform_device_unregister(sch56xx_pdev);
538 }
539
540 MODULE_DESCRIPTION("SMSC SCH56xx Hardware Monitoring Common Code");
541 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
542 MODULE_LICENSE("GPL");
543
544 module_init(sch56xx_init);
545 module_exit(sch56xx_exit);
546