1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers 4 * 5 * Copyright (C) 2020 Nvidia Technologies Ltd. 6 */ 7 8 #include <linux/err.h> 9 #include <linux/i2c.h> 10 #include <linux/init.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/of_device.h> 14 #include "pmbus.h" 15 16 /* Vendor specific registers. */ 17 #define MP2975_MFR_APS_HYS_R2 0x0d 18 #define MP2975_MFR_SLOPE_TRIM3 0x1d 19 #define MP2975_MFR_VR_MULTI_CONFIG_R1 0x0d 20 #define MP2975_MFR_VR_MULTI_CONFIG_R2 0x1d 21 #define MP2975_MFR_APS_DECAY_ADV 0x56 22 #define MP2975_MFR_DC_LOOP_CTRL 0x59 23 #define MP2975_MFR_OCP_UCP_PHASE_SET 0x65 24 #define MP2975_MFR_VR_CONFIG1 0x68 25 #define MP2975_MFR_READ_CS1_2 0x82 26 #define MP2975_MFR_READ_CS3_4 0x83 27 #define MP2975_MFR_READ_CS5_6 0x84 28 #define MP2975_MFR_READ_CS7_8 0x85 29 #define MP2975_MFR_READ_CS9_10 0x86 30 #define MP2975_MFR_READ_CS11_12 0x87 31 #define MP2975_MFR_READ_IOUT_PK 0x90 32 #define MP2975_MFR_READ_POUT_PK 0x91 33 #define MP2975_MFR_READ_VREF_R1 0xa1 34 #define MP2975_MFR_READ_VREF_R2 0xa3 35 #define MP2975_MFR_OVP_TH_SET 0xe5 36 #define MP2975_MFR_UVP_SET 0xe6 37 38 #define MP2973_MFR_RESO_SET 0xc7 39 40 #define MP2975_VOUT_FORMAT BIT(15) 41 #define MP2975_VID_STEP_SEL_R1 BIT(4) 42 #define MP2975_IMVP9_EN_R1 BIT(13) 43 #define MP2975_VID_STEP_SEL_R2 BIT(3) 44 #define MP2975_IMVP9_EN_R2 BIT(12) 45 #define MP2975_PRT_THRES_DIV_OV_EN BIT(14) 46 #define MP2975_DRMOS_KCS GENMASK(13, 12) 47 #define MP2975_PROT_DEV_OV_OFF 10 48 #define MP2975_PROT_DEV_OV_ON 5 49 #define MP2975_SENSE_AMPL BIT(11) 50 #define MP2975_SENSE_AMPL_UNIT 1 51 #define MP2975_SENSE_AMPL_HALF 2 52 #define MP2975_VIN_UV_LIMIT_UNIT 8 53 54 #define MP2973_VOUT_FORMAT_R1 GENMASK(7, 6) 55 #define MP2973_VOUT_FORMAT_R2 GENMASK(4, 3) 56 #define MP2973_VOUT_FORMAT_DIRECT_R1 BIT(7) 57 #define MP2973_VOUT_FORMAT_LINEAR_R1 BIT(6) 58 #define MP2973_VOUT_FORMAT_DIRECT_R2 BIT(4) 59 #define MP2973_VOUT_FORMAT_LINEAR_R2 BIT(3) 60 61 #define MP2973_MFR_VR_MULTI_CONFIG_R1 0x0d 62 #define MP2973_MFR_VR_MULTI_CONFIG_R2 0x1d 63 #define MP2973_VID_STEP_SEL_R1 BIT(4) 64 #define MP2973_IMVP9_EN_R1 BIT(14) 65 #define MP2973_VID_STEP_SEL_R2 BIT(3) 66 #define MP2973_IMVP9_EN_R2 BIT(13) 67 68 #define MP2973_MFR_OCP_TOTAL_SET 0x5f 69 #define MP2973_OCP_TOTAL_CUR_MASK GENMASK(6, 0) 70 #define MP2973_MFR_OCP_LEVEL_RES BIT(15) 71 72 #define MP2973_MFR_READ_IOUT_PK 0x90 73 #define MP2973_MFR_READ_POUT_PK 0x91 74 75 #define MP2975_MAX_PHASE_RAIL1 8 76 #define MP2975_MAX_PHASE_RAIL2 4 77 78 #define MP2973_MAX_PHASE_RAIL1 14 79 #define MP2973_MAX_PHASE_RAIL2 6 80 81 #define MP2971_MAX_PHASE_RAIL1 8 82 #define MP2971_MAX_PHASE_RAIL2 3 83 84 #define MP2975_PAGE_NUM 2 85 86 #define MP2975_RAIL2_FUNC (PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | \ 87 PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | \ 88 PMBUS_HAVE_POUT | PMBUS_PHASE_VIRTUAL) 89 90 enum chips { 91 mp2971, mp2973, mp2975 92 }; 93 94 static const int mp2975_max_phases[][MP2975_PAGE_NUM] = { 95 [mp2975] = { MP2975_MAX_PHASE_RAIL1, MP2975_MAX_PHASE_RAIL2 }, 96 [mp2973] = { MP2973_MAX_PHASE_RAIL1, MP2973_MAX_PHASE_RAIL2 }, 97 [mp2971] = { MP2971_MAX_PHASE_RAIL1, MP2971_MAX_PHASE_RAIL2 }, 98 }; 99 100 struct mp2975_data { 101 struct pmbus_driver_info info; 102 enum chips chip_id; 103 int vout_scale; 104 int max_phases[MP2975_PAGE_NUM]; 105 int vid_step[MP2975_PAGE_NUM]; 106 int vref[MP2975_PAGE_NUM]; 107 int vref_off[MP2975_PAGE_NUM]; 108 int vout_max[MP2975_PAGE_NUM]; 109 int vout_ov_fixed[MP2975_PAGE_NUM]; 110 int curr_sense_gain[MP2975_PAGE_NUM]; 111 }; 112 113 static const struct i2c_device_id mp2975_id[] = { 114 {"mp2971", mp2971}, 115 {"mp2973", mp2973}, 116 {"mp2975", mp2975}, 117 {} 118 }; 119 120 MODULE_DEVICE_TABLE(i2c, mp2975_id); 121 122 static const struct regulator_desc __maybe_unused mp2975_reg_desc[] = { 123 PMBUS_REGULATOR("vout", 0), 124 PMBUS_REGULATOR("vout", 1), 125 }; 126 127 #define to_mp2975_data(x) container_of(x, struct mp2975_data, info) 128 129 static int 130 mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg, 131 u16 mask) 132 { 133 int ret = pmbus_read_word_data(client, page, phase, reg); 134 135 return (ret > 0) ? ret & mask : ret; 136 } 137 138 static int 139 mp2975_vid2direct(int vrf, int val) 140 { 141 switch (vrf) { 142 case vr12: 143 if (val >= 0x01) 144 return 250 + (val - 1) * 5; 145 break; 146 case vr13: 147 if (val >= 0x01) 148 return 500 + (val - 1) * 10; 149 break; 150 case imvp9: 151 if (val >= 0x01) 152 return 200 + (val - 1) * 10; 153 break; 154 default: 155 return -EINVAL; 156 } 157 return 0; 158 } 159 160 #define MAX_LIN_MANTISSA (1023 * 1000) 161 #define MIN_LIN_MANTISSA (511 * 1000) 162 163 /* Converts a milli-unit DIRECT value to LINEAR11 format */ 164 static u16 mp2975_data2reg_linear11(s64 val) 165 { 166 s16 exponent = 0, mantissa; 167 bool negative = false; 168 169 /* simple case */ 170 if (val == 0) 171 return 0; 172 173 /* Reduce large mantissa until it fits into 10 bit */ 174 while (val >= MAX_LIN_MANTISSA && exponent < 15) { 175 exponent++; 176 val >>= 1; 177 } 178 /* Increase small mantissa to improve precision */ 179 while (val < MIN_LIN_MANTISSA && exponent > -15) { 180 exponent--; 181 val <<= 1; 182 } 183 184 /* Convert mantissa from milli-units to units */ 185 mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff); 186 187 /* restore sign */ 188 if (negative) 189 mantissa = -mantissa; 190 191 /* Convert to 5 bit exponent, 11 bit mantissa */ 192 return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800); 193 } 194 195 static int 196 mp2975_read_phase(struct i2c_client *client, struct mp2975_data *data, 197 int page, int phase, u8 reg) 198 { 199 int ph_curr, ret; 200 201 ret = pmbus_read_word_data(client, page, phase, reg); 202 if (ret < 0) 203 return ret; 204 205 if (!((phase + 1) % MP2975_PAGE_NUM)) 206 ret >>= 8; 207 ret &= 0xff; 208 209 /* 210 * Output value is calculated as: (READ_CSx / 80 – 1.23) / (Kcs * Rcs) 211 * where: 212 * - Kcs is the DrMOS current sense gain of power stage, which is 213 * obtained from the register MP2975_MFR_VR_CONFIG1, bits 13-12 with 214 * the following selection of DrMOS (data->curr_sense_gain[page]): 215 * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. 216 * - Rcs is the internal phase current sense resistor which is constant 217 * value 1kΩ. 218 */ 219 ph_curr = ret * 100 - 9800; 220 221 /* 222 * Current phase sensing, providing by the device is not accurate 223 * for the light load. This because sampling of current occurrence of 224 * bit weight has a big deviation for light load. For handling such 225 * case phase current is represented as the maximum between the value 226 * calculated above and total rail current divided by number phases. 227 */ 228 ret = pmbus_read_word_data(client, page, phase, PMBUS_READ_IOUT); 229 if (ret < 0) 230 return ret; 231 232 return max_t(int, DIV_ROUND_CLOSEST(ret, data->info.phases[page]), 233 DIV_ROUND_CLOSEST(ph_curr, data->curr_sense_gain[page])); 234 } 235 236 static int 237 mp2975_read_phases(struct i2c_client *client, struct mp2975_data *data, 238 int page, int phase) 239 { 240 int ret; 241 242 if (page) { 243 switch (phase) { 244 case 0 ... 1: 245 ret = mp2975_read_phase(client, data, page, phase, 246 MP2975_MFR_READ_CS7_8); 247 break; 248 case 2 ... 3: 249 ret = mp2975_read_phase(client, data, page, phase, 250 MP2975_MFR_READ_CS9_10); 251 break; 252 case 4 ... 5: 253 ret = mp2975_read_phase(client, data, page, phase, 254 MP2975_MFR_READ_CS11_12); 255 break; 256 default: 257 return -ENODATA; 258 } 259 } else { 260 switch (phase) { 261 case 0 ... 1: 262 ret = mp2975_read_phase(client, data, page, phase, 263 MP2975_MFR_READ_CS1_2); 264 break; 265 case 2 ... 3: 266 ret = mp2975_read_phase(client, data, page, phase, 267 MP2975_MFR_READ_CS3_4); 268 break; 269 case 4 ... 5: 270 ret = mp2975_read_phase(client, data, page, phase, 271 MP2975_MFR_READ_CS5_6); 272 break; 273 case 6 ... 7: 274 ret = mp2975_read_phase(client, data, page, phase, 275 MP2975_MFR_READ_CS7_8); 276 break; 277 case 8 ... 9: 278 ret = mp2975_read_phase(client, data, page, phase, 279 MP2975_MFR_READ_CS9_10); 280 break; 281 case 10 ... 11: 282 ret = mp2975_read_phase(client, data, page, phase, 283 MP2975_MFR_READ_CS11_12); 284 break; 285 default: 286 return -ENODATA; 287 } 288 } 289 return ret; 290 } 291 292 static int mp2973_read_word_data(struct i2c_client *client, int page, 293 int phase, int reg) 294 { 295 const struct pmbus_driver_info *info = pmbus_get_driver_info(client); 296 struct mp2975_data *data = to_mp2975_data(info); 297 int ret; 298 299 switch (reg) { 300 case PMBUS_OT_FAULT_LIMIT: 301 ret = mp2975_read_word_helper(client, page, phase, reg, 302 GENMASK(7, 0)); 303 break; 304 case PMBUS_VIN_OV_FAULT_LIMIT: 305 ret = mp2975_read_word_helper(client, page, phase, reg, 306 GENMASK(7, 0)); 307 if (ret < 0) 308 return ret; 309 310 ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT); 311 break; 312 case PMBUS_VOUT_OV_FAULT_LIMIT: 313 /* 314 * MP2971 and mp2973 only supports tracking (ovp1) mode. 315 */ 316 ret = mp2975_read_word_helper(client, page, phase, 317 MP2975_MFR_OVP_TH_SET, 318 GENMASK(2, 0)); 319 if (ret < 0) 320 return ret; 321 322 ret = data->vout_max[page] + 50 * (ret + 1); 323 break; 324 case PMBUS_VOUT_UV_FAULT_LIMIT: 325 ret = mp2975_read_word_helper(client, page, phase, reg, 326 GENMASK(8, 0)); 327 if (ret < 0) 328 return ret; 329 ret = mp2975_vid2direct(info->vrm_version[page], ret); 330 break; 331 case PMBUS_VIRT_READ_POUT_MAX: 332 ret = pmbus_read_word_data(client, page, phase, 333 MP2973_MFR_READ_POUT_PK); 334 break; 335 case PMBUS_VIRT_READ_IOUT_MAX: 336 ret = pmbus_read_word_data(client, page, phase, 337 MP2973_MFR_READ_IOUT_PK); 338 break; 339 case PMBUS_IOUT_OC_FAULT_LIMIT: 340 ret = mp2975_read_word_helper(client, page, phase, 341 MP2973_MFR_OCP_TOTAL_SET, 342 GENMASK(15, 0)); 343 if (ret < 0) 344 return ret; 345 346 if (ret & MP2973_MFR_OCP_LEVEL_RES) 347 ret = 2 * (ret & MP2973_OCP_TOTAL_CUR_MASK); 348 else 349 ret = ret & MP2973_OCP_TOTAL_CUR_MASK; 350 351 ret = mp2975_data2reg_linear11(ret * info->phases[page] * 1000); 352 break; 353 case PMBUS_UT_WARN_LIMIT: 354 case PMBUS_UT_FAULT_LIMIT: 355 case PMBUS_VIN_UV_WARN_LIMIT: 356 case PMBUS_VIN_UV_FAULT_LIMIT: 357 case PMBUS_VOUT_UV_WARN_LIMIT: 358 case PMBUS_VOUT_OV_WARN_LIMIT: 359 case PMBUS_VIN_OV_WARN_LIMIT: 360 case PMBUS_IIN_OC_FAULT_LIMIT: 361 case PMBUS_IOUT_OC_LV_FAULT_LIMIT: 362 case PMBUS_IOUT_OC_WARN_LIMIT: 363 case PMBUS_IOUT_UC_FAULT_LIMIT: 364 case PMBUS_POUT_OP_FAULT_LIMIT: 365 case PMBUS_POUT_OP_WARN_LIMIT: 366 case PMBUS_PIN_OP_WARN_LIMIT: 367 return -ENXIO; 368 default: 369 return -ENODATA; 370 } 371 372 return ret; 373 } 374 375 static int mp2975_read_word_data(struct i2c_client *client, int page, 376 int phase, int reg) 377 { 378 const struct pmbus_driver_info *info = pmbus_get_driver_info(client); 379 struct mp2975_data *data = to_mp2975_data(info); 380 int ret; 381 382 switch (reg) { 383 case PMBUS_STATUS_WORD: 384 /* MP2973 & MP2971 return PGOOD instead of PB_STATUS_POWER_GOOD_N. */ 385 ret = pmbus_read_word_data(client, page, phase, reg); 386 ret ^= PB_STATUS_POWER_GOOD_N; 387 break; 388 case PMBUS_OT_FAULT_LIMIT: 389 ret = mp2975_read_word_helper(client, page, phase, reg, 390 GENMASK(7, 0)); 391 break; 392 case PMBUS_VIN_OV_FAULT_LIMIT: 393 ret = mp2975_read_word_helper(client, page, phase, reg, 394 GENMASK(7, 0)); 395 if (ret < 0) 396 return ret; 397 398 ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT); 399 break; 400 case PMBUS_VOUT_OV_FAULT_LIMIT: 401 /* 402 * Register provides two values for over-voltage protection 403 * threshold for fixed (ovp2) and tracking (ovp1) modes. The 404 * minimum of these two values is provided as over-voltage 405 * fault alarm. 406 */ 407 ret = mp2975_read_word_helper(client, page, phase, 408 MP2975_MFR_OVP_TH_SET, 409 GENMASK(2, 0)); 410 if (ret < 0) 411 return ret; 412 413 ret = min_t(int, data->vout_max[page] + 50 * (ret + 1), 414 data->vout_ov_fixed[page]); 415 break; 416 case PMBUS_VOUT_UV_FAULT_LIMIT: 417 ret = mp2975_read_word_helper(client, page, phase, 418 MP2975_MFR_UVP_SET, 419 GENMASK(2, 0)); 420 if (ret < 0) 421 return ret; 422 423 ret = DIV_ROUND_CLOSEST(data->vref[page] * 10 - 50 * 424 (ret + 1) * data->vout_scale, 10); 425 break; 426 case PMBUS_VIRT_READ_POUT_MAX: 427 ret = mp2975_read_word_helper(client, page, phase, 428 MP2975_MFR_READ_POUT_PK, 429 GENMASK(12, 0)); 430 if (ret < 0) 431 return ret; 432 433 ret = DIV_ROUND_CLOSEST(ret, 4); 434 break; 435 case PMBUS_VIRT_READ_IOUT_MAX: 436 ret = mp2975_read_word_helper(client, page, phase, 437 MP2975_MFR_READ_IOUT_PK, 438 GENMASK(12, 0)); 439 if (ret < 0) 440 return ret; 441 442 ret = DIV_ROUND_CLOSEST(ret, 4); 443 break; 444 case PMBUS_READ_IOUT: 445 ret = mp2975_read_phases(client, data, page, phase); 446 if (ret < 0) 447 return ret; 448 449 break; 450 case PMBUS_UT_WARN_LIMIT: 451 case PMBUS_UT_FAULT_LIMIT: 452 case PMBUS_VIN_UV_WARN_LIMIT: 453 case PMBUS_VIN_UV_FAULT_LIMIT: 454 case PMBUS_VOUT_UV_WARN_LIMIT: 455 case PMBUS_VOUT_OV_WARN_LIMIT: 456 case PMBUS_VIN_OV_WARN_LIMIT: 457 case PMBUS_IIN_OC_FAULT_LIMIT: 458 case PMBUS_IOUT_OC_LV_FAULT_LIMIT: 459 case PMBUS_IIN_OC_WARN_LIMIT: 460 case PMBUS_IOUT_OC_WARN_LIMIT: 461 case PMBUS_IOUT_OC_FAULT_LIMIT: 462 case PMBUS_IOUT_UC_FAULT_LIMIT: 463 case PMBUS_POUT_OP_FAULT_LIMIT: 464 case PMBUS_POUT_OP_WARN_LIMIT: 465 case PMBUS_PIN_OP_WARN_LIMIT: 466 return -ENXIO; 467 default: 468 return -ENODATA; 469 } 470 471 return ret; 472 } 473 474 static int mp2975_identify_multiphase_rail2(struct i2c_client *client, 475 struct mp2975_data *data) 476 { 477 int ret; 478 479 /* 480 * Identify multiphase for rail 2 - could be from 0 to data->max_phases[1]. 481 * In case phase number is zero – only page zero is supported 482 */ 483 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 484 if (ret < 0) 485 return ret; 486 487 ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R2); 488 if (ret < 0) 489 return ret; 490 491 ret &= GENMASK(2, 0); 492 return (ret >= data->max_phases[1]) ? data->max_phases[1] : ret; 493 } 494 495 static void mp2975_set_phase_rail1(struct pmbus_driver_info *info) 496 { 497 int i; 498 499 for (i = 0 ; i < info->phases[0]; i++) 500 info->pfunc[i] = PMBUS_HAVE_IOUT; 501 } 502 503 static void 504 mp2975_set_phase_rail2(struct pmbus_driver_info *info, int num_phases) 505 { 506 int i; 507 508 /* Set phases for rail 2 from upper to lower. */ 509 for (i = 1; i <= num_phases; i++) 510 info->pfunc[MP2975_MAX_PHASE_RAIL1 - i] = PMBUS_HAVE_IOUT; 511 } 512 513 static int 514 mp2975_identify_multiphase(struct i2c_client *client, struct mp2975_data *data, 515 struct pmbus_driver_info *info) 516 { 517 int num_phases2, ret; 518 519 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 520 if (ret < 0) 521 return ret; 522 523 /* Identify multiphase for rail 1 - could be from 1 to data->max_phases[0]. */ 524 ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R1); 525 if (ret <= 0) 526 return ret; 527 528 info->phases[0] = ret & GENMASK(3, 0); 529 530 /* 531 * The device provides a total of $n PWM pins, and can be configured 532 * to different phase count applications for rail 1 and rail 2. 533 * Rail 1 can be set to $n phases, while rail 2 can be set to less than 534 * that. When rail 1’s phase count is configured as 0, rail 535 * 1 operates with 1-phase DCM. When rail 2 phase count is configured 536 * as 0, rail 2 is disabled. 537 */ 538 if (info->phases[0] > data->max_phases[0]) 539 return -EINVAL; 540 541 if (data->chip_id == mp2975) { 542 mp2975_set_phase_rail1(info); 543 num_phases2 = min(data->max_phases[0] - info->phases[0], 544 data->max_phases[1]); 545 if (info->phases[1] && info->phases[1] <= num_phases2) 546 mp2975_set_phase_rail2(info, num_phases2); 547 } 548 549 return 0; 550 } 551 552 static int 553 mp2975_identify_vid(struct i2c_client *client, struct mp2975_data *data, 554 struct pmbus_driver_info *info, u32 reg, int page, 555 u32 imvp_bit, u32 vr_bit) 556 { 557 int ret; 558 559 /* Identify VID mode and step selection. */ 560 ret = i2c_smbus_read_word_data(client, reg); 561 if (ret < 0) 562 return ret; 563 564 if (ret & imvp_bit) { 565 info->vrm_version[page] = imvp9; 566 data->vid_step[page] = MP2975_PROT_DEV_OV_OFF; 567 } else if (ret & vr_bit) { 568 info->vrm_version[page] = vr12; 569 data->vid_step[page] = MP2975_PROT_DEV_OV_ON; 570 } else { 571 info->vrm_version[page] = vr13; 572 data->vid_step[page] = MP2975_PROT_DEV_OV_OFF; 573 } 574 575 return 0; 576 } 577 578 static int 579 mp2975_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data, 580 struct pmbus_driver_info *info) 581 { 582 int ret; 583 584 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 585 if (ret < 0) 586 return ret; 587 588 /* Identify VID mode for rail 1. */ 589 ret = mp2975_identify_vid(client, data, info, 590 MP2975_MFR_VR_MULTI_CONFIG_R1, 0, 591 MP2975_IMVP9_EN_R1, MP2975_VID_STEP_SEL_R1); 592 if (ret < 0) 593 return ret; 594 595 /* Identify VID mode for rail 2, if connected. */ 596 if (info->phases[1]) 597 ret = mp2975_identify_vid(client, data, info, 598 MP2975_MFR_VR_MULTI_CONFIG_R2, 1, 599 MP2975_IMVP9_EN_R2, 600 MP2975_VID_STEP_SEL_R2); 601 602 return ret; 603 } 604 605 static int 606 mp2973_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data, 607 struct pmbus_driver_info *info) 608 { 609 int ret; 610 611 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 612 if (ret < 0) 613 return ret; 614 615 /* Identify VID mode for rail 1. */ 616 ret = mp2975_identify_vid(client, data, info, 617 MP2973_MFR_VR_MULTI_CONFIG_R1, 0, 618 MP2973_IMVP9_EN_R1, MP2973_VID_STEP_SEL_R1); 619 620 if (ret < 0) 621 return ret; 622 623 /* Identify VID mode for rail 2, if connected. */ 624 if (info->phases[1]) 625 ret = mp2975_identify_vid(client, data, info, 626 MP2973_MFR_VR_MULTI_CONFIG_R2, 1, 627 MP2973_IMVP9_EN_R2, 628 MP2973_VID_STEP_SEL_R2); 629 630 return ret; 631 } 632 633 static int 634 mp2975_current_sense_gain_get(struct i2c_client *client, 635 struct mp2975_data *data) 636 { 637 int i, ret; 638 639 /* 640 * Obtain DrMOS current sense gain of power stage from the register 641 * MP2975_MFR_VR_CONFIG1, bits 13-12. The value is selected as below: 642 * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. Other 643 * values are invalid. 644 */ 645 for (i = 0 ; i < data->info.pages; i++) { 646 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i); 647 if (ret < 0) 648 return ret; 649 ret = i2c_smbus_read_word_data(client, 650 MP2975_MFR_VR_CONFIG1); 651 if (ret < 0) 652 return ret; 653 654 switch ((ret & MP2975_DRMOS_KCS) >> 12) { 655 case 0: 656 data->curr_sense_gain[i] = 50; 657 break; 658 case 1: 659 data->curr_sense_gain[i] = 85; 660 break; 661 case 2: 662 data->curr_sense_gain[i] = 97; 663 break; 664 default: 665 data->curr_sense_gain[i] = 100; 666 break; 667 } 668 } 669 670 return 0; 671 } 672 673 static int 674 mp2975_vref_get(struct i2c_client *client, struct mp2975_data *data, 675 struct pmbus_driver_info *info) 676 { 677 int ret; 678 679 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 3); 680 if (ret < 0) 681 return ret; 682 683 /* Get voltage reference value for rail 1. */ 684 ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R1); 685 if (ret < 0) 686 return ret; 687 688 data->vref[0] = ret * data->vid_step[0]; 689 690 /* Get voltage reference value for rail 2, if connected. */ 691 if (data->info.pages == MP2975_PAGE_NUM) { 692 ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R2); 693 if (ret < 0) 694 return ret; 695 696 data->vref[1] = ret * data->vid_step[1]; 697 } 698 return 0; 699 } 700 701 static int 702 mp2975_vref_offset_get(struct i2c_client *client, struct mp2975_data *data, 703 int page) 704 { 705 int ret; 706 707 ret = i2c_smbus_read_word_data(client, MP2975_MFR_OVP_TH_SET); 708 if (ret < 0) 709 return ret; 710 711 switch ((ret & GENMASK(5, 3)) >> 3) { 712 case 1: 713 data->vref_off[page] = 140; 714 break; 715 case 2: 716 data->vref_off[page] = 220; 717 break; 718 case 4: 719 data->vref_off[page] = 400; 720 break; 721 default: 722 return -EINVAL; 723 } 724 return 0; 725 } 726 727 static int 728 mp2975_vout_max_get(struct i2c_client *client, struct mp2975_data *data, 729 struct pmbus_driver_info *info, int page) 730 { 731 int ret; 732 733 /* Get maximum reference voltage of VID-DAC in VID format. */ 734 ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_MAX); 735 if (ret < 0) 736 return ret; 737 738 data->vout_max[page] = mp2975_vid2direct(info->vrm_version[page], ret & 739 GENMASK(8, 0)); 740 return 0; 741 } 742 743 static int 744 mp2975_set_vout_format(struct i2c_client *client, 745 struct mp2975_data *data, int page) 746 { 747 int ret, i; 748 749 /* Enable DIRECT VOUT format 1mV/LSB */ 750 if (data->chip_id == mp2975) { 751 ret = i2c_smbus_read_word_data(client, MP2975_MFR_DC_LOOP_CTRL); 752 if (ret < 0) 753 return ret; 754 if (ret & MP2975_VOUT_FORMAT) { 755 ret &= ~MP2975_VOUT_FORMAT; 756 ret = i2c_smbus_write_word_data(client, MP2975_MFR_DC_LOOP_CTRL, ret); 757 } 758 } else { 759 ret = i2c_smbus_read_word_data(client, MP2973_MFR_RESO_SET); 760 if (ret < 0) 761 return ret; 762 i = ret; 763 764 if (page == 0) { 765 i &= ~MP2973_VOUT_FORMAT_R1; 766 i |= MP2973_VOUT_FORMAT_DIRECT_R1; 767 } else { 768 i &= ~MP2973_VOUT_FORMAT_R2; 769 i |= MP2973_VOUT_FORMAT_DIRECT_R2; 770 } 771 if (i != ret) 772 ret = i2c_smbus_write_word_data(client, MP2973_MFR_RESO_SET, i); 773 } 774 return ret; 775 } 776 777 static int 778 mp2975_vout_ov_scale_get(struct i2c_client *client, struct mp2975_data *data, 779 struct pmbus_driver_info *info) 780 { 781 int thres_dev, sense_ampl, ret; 782 783 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0); 784 if (ret < 0) 785 return ret; 786 787 /* 788 * Get divider for over- and under-voltage protection thresholds 789 * configuration from the Advanced Options of Auto Phase Shedding and 790 * decay register. 791 */ 792 ret = i2c_smbus_read_word_data(client, MP2975_MFR_APS_DECAY_ADV); 793 if (ret < 0) 794 return ret; 795 thres_dev = ret & MP2975_PRT_THRES_DIV_OV_EN ? MP2975_PROT_DEV_OV_ON : 796 MP2975_PROT_DEV_OV_OFF; 797 798 /* Select the gain of remote sense amplifier. */ 799 ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_SCALE_LOOP); 800 if (ret < 0) 801 return ret; 802 sense_ampl = ret & MP2975_SENSE_AMPL ? MP2975_SENSE_AMPL_HALF : 803 MP2975_SENSE_AMPL_UNIT; 804 805 data->vout_scale = sense_ampl * thres_dev; 806 807 return 0; 808 } 809 810 static int 811 mp2975_vout_per_rail_config_get(struct i2c_client *client, 812 struct mp2975_data *data, 813 struct pmbus_driver_info *info) 814 { 815 int i, ret; 816 817 for (i = 0; i < data->info.pages; i++) { 818 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i); 819 if (ret < 0) 820 continue; 821 822 /* Set VOUT format for READ_VOUT command : direct. */ 823 ret = mp2975_set_vout_format(client, data, i); 824 if (ret < 0) 825 return ret; 826 827 /* Obtain maximum voltage values. */ 828 ret = mp2975_vout_max_get(client, data, info, i); 829 if (ret < 0) 830 return ret; 831 832 /* Skip if reading Vref is unsupported */ 833 if (data->chip_id != mp2975) 834 continue; 835 836 /* Obtain voltage reference offsets. */ 837 ret = mp2975_vref_offset_get(client, data, i); 838 if (ret < 0) 839 return ret; 840 841 /* 842 * Set over-voltage fixed value. Thresholds are provided as 843 * fixed value, and tracking value. The minimum of them are 844 * exposed as over-voltage critical threshold. 845 */ 846 data->vout_ov_fixed[i] = data->vref[i] + 847 DIV_ROUND_CLOSEST(data->vref_off[i] * 848 data->vout_scale, 849 10); 850 } 851 852 return 0; 853 } 854 855 static struct pmbus_driver_info mp2975_info = { 856 .pages = 1, 857 .format[PSC_VOLTAGE_IN] = linear, 858 .format[PSC_VOLTAGE_OUT] = direct, 859 .format[PSC_TEMPERATURE] = direct, 860 .format[PSC_CURRENT_IN] = linear, 861 .format[PSC_CURRENT_OUT] = direct, 862 .format[PSC_POWER] = direct, 863 .m[PSC_TEMPERATURE] = 1, 864 .m[PSC_VOLTAGE_OUT] = 1, 865 .R[PSC_VOLTAGE_OUT] = 3, 866 .m[PSC_CURRENT_OUT] = 1, 867 .m[PSC_POWER] = 1, 868 .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | 869 PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | 870 PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | 871 PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | PMBUS_PHASE_VIRTUAL, 872 .read_word_data = mp2975_read_word_data, 873 #if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR) 874 .num_regulators = 1, 875 .reg_desc = mp2975_reg_desc, 876 #endif 877 }; 878 879 static struct pmbus_driver_info mp2973_info = { 880 .pages = 1, 881 .format[PSC_VOLTAGE_IN] = linear, 882 .format[PSC_VOLTAGE_OUT] = direct, 883 .format[PSC_TEMPERATURE] = linear, 884 .format[PSC_CURRENT_IN] = linear, 885 .format[PSC_CURRENT_OUT] = linear, 886 .format[PSC_POWER] = linear, 887 .m[PSC_VOLTAGE_OUT] = 1, 888 .R[PSC_VOLTAGE_OUT] = 3, 889 .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | 890 PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | 891 PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | 892 PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, 893 .read_word_data = mp2973_read_word_data, 894 #if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR) 895 .num_regulators = 1, 896 .reg_desc = mp2975_reg_desc, 897 #endif 898 }; 899 900 static int mp2975_probe(struct i2c_client *client) 901 { 902 struct pmbus_driver_info *info; 903 struct mp2975_data *data; 904 int ret; 905 906 data = devm_kzalloc(&client->dev, sizeof(struct mp2975_data), 907 GFP_KERNEL); 908 if (!data) 909 return -ENOMEM; 910 911 if (client->dev.of_node) 912 data->chip_id = (enum chips)(unsigned long)of_device_get_match_data(&client->dev); 913 else 914 data->chip_id = i2c_match_id(mp2975_id, client)->driver_data; 915 916 memcpy(data->max_phases, mp2975_max_phases[data->chip_id], 917 sizeof(data->max_phases)); 918 919 if (data->chip_id == mp2975) 920 memcpy(&data->info, &mp2975_info, sizeof(*info)); 921 else 922 memcpy(&data->info, &mp2973_info, sizeof(*info)); 923 924 info = &data->info; 925 926 /* Identify multiphase configuration for rail 2. */ 927 ret = mp2975_identify_multiphase_rail2(client, data); 928 if (ret < 0) 929 return ret; 930 931 if (ret) { 932 /* Two rails are connected. */ 933 data->info.pages = MP2975_PAGE_NUM; 934 data->info.phases[1] = ret; 935 data->info.func[1] = MP2975_RAIL2_FUNC; 936 if (IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)) 937 data->info.num_regulators = MP2975_PAGE_NUM; 938 } 939 940 /* Identify multiphase configuration. */ 941 ret = mp2975_identify_multiphase(client, data, info); 942 if (ret) 943 return ret; 944 945 if (data->chip_id == mp2975) { 946 /* Identify VID setting per rail. */ 947 ret = mp2975_identify_rails_vid(client, data, info); 948 if (ret < 0) 949 return ret; 950 951 /* Obtain current sense gain of power stage. */ 952 ret = mp2975_current_sense_gain_get(client, data); 953 if (ret) 954 return ret; 955 956 /* Obtain voltage reference values. */ 957 ret = mp2975_vref_get(client, data, info); 958 if (ret) 959 return ret; 960 961 /* Obtain vout over-voltage scales. */ 962 ret = mp2975_vout_ov_scale_get(client, data, info); 963 if (ret < 0) 964 return ret; 965 } else { 966 /* Identify VID setting per rail. */ 967 ret = mp2973_identify_rails_vid(client, data, info); 968 if (ret < 0) 969 return ret; 970 } 971 972 /* Obtain offsets, maximum and format for vout. */ 973 ret = mp2975_vout_per_rail_config_get(client, data, info); 974 if (ret) 975 return ret; 976 977 return pmbus_do_probe(client, info); 978 } 979 980 static const struct of_device_id __maybe_unused mp2975_of_match[] = { 981 {.compatible = "mps,mp2971", .data = (void *)mp2971}, 982 {.compatible = "mps,mp2973", .data = (void *)mp2973}, 983 {.compatible = "mps,mp2975", .data = (void *)mp2975}, 984 {} 985 }; 986 MODULE_DEVICE_TABLE(of, mp2975_of_match); 987 988 static struct i2c_driver mp2975_driver = { 989 .driver = { 990 .name = "mp2975", 991 .of_match_table = of_match_ptr(mp2975_of_match), 992 }, 993 .probe = mp2975_probe, 994 .id_table = mp2975_id, 995 }; 996 997 module_i2c_driver(mp2975_driver); 998 999 MODULE_AUTHOR("Vadim Pasternak <vadimp@nvidia.com>"); 1000 MODULE_DESCRIPTION("PMBus driver for MPS MP2975 device"); 1001 MODULE_LICENSE("GPL"); 1002 MODULE_IMPORT_NS(PMBUS); 1003