1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * nct6775 - Driver for the hardware monitoring functionality of 4 * Nuvoton NCT677x Super-I/O chips 5 * 6 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net> 7 * 8 * Derived from w83627ehf driver 9 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de> 10 * Copyright (C) 2006 Yuan Mu (Winbond), 11 * Rudolf Marek <r.marek@assembler.cz> 12 * David Hubbard <david.c.hubbard@gmail.com> 13 * Daniel J Blueman <daniel.blueman@gmail.com> 14 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00) 15 * 16 * Shamelessly ripped from the w83627hf driver 17 * Copyright (C) 2003 Mark Studebaker 18 * 19 * Supports the following chips: 20 * 21 * Chip #vin #fan #pwm #temp chip IDs man ID 22 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3 23 * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3 24 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3 25 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3 26 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3 27 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3 28 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3 29 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3 30 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3 31 * nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3 32 * nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3 33 * (0xd451) 34 * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3 35 * (0xd429) 36 * nct6799d 14 7 7 2+6 0xd802 0xc1 0x5ca3 37 * 38 * #temp lists the number of monitored temperature sources (first value) plus 39 * the number of directly connectable temperature sensors (second value). 40 */ 41 42 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 43 44 #include <linux/module.h> 45 #include <linux/init.h> 46 #include <linux/slab.h> 47 #include <linux/jiffies.h> 48 #include <linux/hwmon.h> 49 #include <linux/hwmon-sysfs.h> 50 #include <linux/err.h> 51 #include <linux/mutex.h> 52 #include <linux/bitops.h> 53 #include <linux/nospec.h> 54 #include <linux/regmap.h> 55 #include "lm75.h" 56 #include "nct6775.h" 57 58 #undef DEFAULT_SYMBOL_NAMESPACE 59 #define DEFAULT_SYMBOL_NAMESPACE HWMON_NCT6775 60 61 #define USE_ALTERNATE 62 63 /* used to set data->name = nct6775_device_names[data->sio_kind] */ 64 static const char * const nct6775_device_names[] = { 65 "nct6106", 66 "nct6116", 67 "nct6775", 68 "nct6776", 69 "nct6779", 70 "nct6791", 71 "nct6792", 72 "nct6793", 73 "nct6795", 74 "nct6796", 75 "nct6797", 76 "nct6798", 77 "nct6799", 78 }; 79 80 /* Common and NCT6775 specific data */ 81 82 /* Voltage min/max registers for nr=7..14 are in bank 5 */ 83 84 static const u16 NCT6775_REG_IN_MAX[] = { 85 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a, 86 0x55c, 0x55e, 0x560, 0x562 }; 87 static const u16 NCT6775_REG_IN_MIN[] = { 88 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b, 89 0x55d, 0x55f, 0x561, 0x563 }; 90 static const u16 NCT6775_REG_IN[] = { 91 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552 92 }; 93 94 #define NCT6775_REG_VBAT 0x5D 95 #define NCT6775_REG_DIODE 0x5E 96 #define NCT6775_DIODE_MASK 0x02 97 98 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B }; 99 100 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */ 101 102 static const s8 NCT6775_ALARM_BITS[] = { 103 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 104 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 105 -1, /* unused */ 106 6, 7, 11, -1, -1, /* fan1..fan5 */ 107 -1, -1, -1, /* unused */ 108 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 109 12, -1 }; /* intrusion0, intrusion1 */ 110 111 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e }; 112 113 /* 114 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures, 115 * 30..31 intrusion 116 */ 117 static const s8 NCT6775_BEEP_BITS[] = { 118 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */ 119 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 120 21, /* global beep enable */ 121 6, 7, 11, 28, -1, /* fan1..fan5 */ 122 -1, -1, -1, /* unused */ 123 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 124 12, -1 }; /* intrusion0, intrusion1 */ 125 126 /* DC or PWM output fan configuration */ 127 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 }; 128 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 }; 129 130 /* Advanced Fan control, some values are common for all fans */ 131 132 static const u16 NCT6775_REG_TARGET[] = { 133 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 }; 134 static const u16 NCT6775_REG_FAN_MODE[] = { 135 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 }; 136 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = { 137 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 }; 138 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = { 139 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 }; 140 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 141 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 }; 142 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 143 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 }; 144 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a }; 145 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b }; 146 147 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 148 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 }; 149 static const u16 NCT6775_REG_PWM[] = { 150 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 }; 151 static const u16 NCT6775_REG_PWM_READ[] = { 152 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 }; 153 154 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 }; 155 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d }; 156 static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = { 157 0x641, 0x642, 0x643, 0x644 }; 158 static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { }; 159 160 static const u16 NCT6775_REG_TEMP[] = { 161 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d }; 162 163 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 }; 164 165 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 166 0, 0x152, 0x252, 0x628, 0x629, 0x62A }; 167 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 168 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D }; 169 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 170 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C }; 171 172 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 173 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 }; 174 175 static const u16 NCT6775_REG_TEMP_SEL[] = { 176 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 }; 177 178 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = { 179 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 }; 180 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = { 181 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a }; 182 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = { 183 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b }; 184 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = { 185 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c }; 186 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = { 187 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d }; 188 189 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 }; 190 191 static const u16 NCT6775_REG_AUTO_TEMP[] = { 192 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 }; 193 static const u16 NCT6775_REG_AUTO_PWM[] = { 194 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 }; 195 196 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p)) 197 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p)) 198 199 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 }; 200 201 static const u16 NCT6775_REG_CRITICAL_TEMP[] = { 202 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 }; 203 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = { 204 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 }; 205 206 static const char *const nct6775_temp_label[] = { 207 "", 208 "SYSTIN", 209 "CPUTIN", 210 "AUXTIN", 211 "AMD SB-TSI", 212 "PECI Agent 0", 213 "PECI Agent 1", 214 "PECI Agent 2", 215 "PECI Agent 3", 216 "PECI Agent 4", 217 "PECI Agent 5", 218 "PECI Agent 6", 219 "PECI Agent 7", 220 "PCH_CHIP_CPU_MAX_TEMP", 221 "PCH_CHIP_TEMP", 222 "PCH_CPU_TEMP", 223 "PCH_MCH_TEMP", 224 "PCH_DIM0_TEMP", 225 "PCH_DIM1_TEMP", 226 "PCH_DIM2_TEMP", 227 "PCH_DIM3_TEMP" 228 }; 229 230 #define NCT6775_TEMP_MASK 0x001ffffe 231 #define NCT6775_VIRT_TEMP_MASK 0x00000000 232 233 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = { 234 [13] = 0x661, 235 [14] = 0x662, 236 [15] = 0x664, 237 }; 238 239 static const u16 NCT6775_REG_TEMP_CRIT[32] = { 240 [4] = 0xa00, 241 [5] = 0xa01, 242 [6] = 0xa02, 243 [7] = 0xa03, 244 [8] = 0xa04, 245 [9] = 0xa05, 246 [10] = 0xa06, 247 [11] = 0xa07 248 }; 249 250 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 }; 251 252 /* NCT6776 specific data */ 253 254 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */ 255 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME 256 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME 257 258 static const s8 NCT6776_ALARM_BITS[] = { 259 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 260 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 261 -1, /* unused */ 262 6, 7, 11, 10, 23, /* fan1..fan5 */ 263 -1, -1, -1, /* unused */ 264 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 265 12, 9 }; /* intrusion0, intrusion1 */ 266 267 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 }; 268 269 static const s8 NCT6776_BEEP_BITS[] = { 270 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */ 271 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 272 24, /* global beep enable */ 273 25, 26, 27, 28, 29, /* fan1..fan5 */ 274 -1, -1, -1, /* unused */ 275 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ 276 30, 31 }; /* intrusion0, intrusion1 */ 277 278 static const u16 NCT6776_REG_TOLERANCE_H[] = { 279 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c }; 280 281 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 }; 282 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 }; 283 284 static const u16 NCT6776_REG_FAN_MIN[] = { 285 0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c }; 286 static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = { 287 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 }; 288 289 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = { 290 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e }; 291 292 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 293 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A }; 294 295 static const char *const nct6776_temp_label[] = { 296 "", 297 "SYSTIN", 298 "CPUTIN", 299 "AUXTIN", 300 "SMBUSMASTER 0", 301 "SMBUSMASTER 1", 302 "SMBUSMASTER 2", 303 "SMBUSMASTER 3", 304 "SMBUSMASTER 4", 305 "SMBUSMASTER 5", 306 "SMBUSMASTER 6", 307 "SMBUSMASTER 7", 308 "PECI Agent 0", 309 "PECI Agent 1", 310 "PCH_CHIP_CPU_MAX_TEMP", 311 "PCH_CHIP_TEMP", 312 "PCH_CPU_TEMP", 313 "PCH_MCH_TEMP", 314 "PCH_DIM0_TEMP", 315 "PCH_DIM1_TEMP", 316 "PCH_DIM2_TEMP", 317 "PCH_DIM3_TEMP", 318 "BYTE_TEMP" 319 }; 320 321 #define NCT6776_TEMP_MASK 0x007ffffe 322 #define NCT6776_VIRT_TEMP_MASK 0x00000000 323 324 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = { 325 [14] = 0x401, 326 [15] = 0x402, 327 [16] = 0x404, 328 }; 329 330 static const u16 NCT6776_REG_TEMP_CRIT[32] = { 331 [11] = 0x709, 332 [12] = 0x70a, 333 }; 334 335 static const u16 NCT6776_REG_TSI_TEMP[] = { 336 0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 }; 337 338 /* NCT6779 specific data */ 339 340 static const u16 NCT6779_REG_IN[] = { 341 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487, 342 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e }; 343 344 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = { 345 0x459, 0x45A, 0x45B, 0x568 }; 346 347 static const s8 NCT6779_ALARM_BITS[] = { 348 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 349 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */ 350 -1, /* unused */ 351 6, 7, 11, 10, 23, /* fan1..fan5 */ 352 -1, -1, -1, /* unused */ 353 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 354 12, 9 }; /* intrusion0, intrusion1 */ 355 356 static const s8 NCT6779_BEEP_BITS[] = { 357 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */ 358 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */ 359 24, /* global beep enable */ 360 25, 26, 27, 28, 29, /* fan1..fan5 */ 361 -1, -1, -1, /* unused */ 362 16, 17, -1, -1, -1, -1, /* temp1..temp6 */ 363 30, 31 }; /* intrusion0, intrusion1 */ 364 365 static const u16 NCT6779_REG_FAN[] = { 366 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce }; 367 static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = { 368 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f }; 369 370 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = { 371 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 }; 372 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01 373 static const u16 NCT6779_REG_CRITICAL_PWM[] = { 374 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 }; 375 376 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 }; 377 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b }; 378 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 379 0x18, 0x152 }; 380 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 381 0x3a, 0x153 }; 382 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 383 0x39, 0x155 }; 384 385 static const u16 NCT6779_REG_TEMP_OFFSET[] = { 386 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c, 0x44d, 0x449 }; 387 388 static const char *const nct6779_temp_label[] = { 389 "", 390 "SYSTIN", 391 "CPUTIN", 392 "AUXTIN0", 393 "AUXTIN1", 394 "AUXTIN2", 395 "AUXTIN3", 396 "", 397 "SMBUSMASTER 0", 398 "SMBUSMASTER 1", 399 "SMBUSMASTER 2", 400 "SMBUSMASTER 3", 401 "SMBUSMASTER 4", 402 "SMBUSMASTER 5", 403 "SMBUSMASTER 6", 404 "SMBUSMASTER 7", 405 "PECI Agent 0", 406 "PECI Agent 1", 407 "PCH_CHIP_CPU_MAX_TEMP", 408 "PCH_CHIP_TEMP", 409 "PCH_CPU_TEMP", 410 "PCH_MCH_TEMP", 411 "PCH_DIM0_TEMP", 412 "PCH_DIM1_TEMP", 413 "PCH_DIM2_TEMP", 414 "PCH_DIM3_TEMP", 415 "BYTE_TEMP", 416 "", 417 "", 418 "", 419 "", 420 "Virtual_TEMP" 421 }; 422 423 #define NCT6779_TEMP_MASK 0x07ffff7e 424 #define NCT6779_VIRT_TEMP_MASK 0x00000000 425 #define NCT6791_TEMP_MASK 0x87ffff7e 426 #define NCT6791_VIRT_TEMP_MASK 0x80000000 427 428 static const u16 NCT6779_REG_TEMP_ALTERNATE[32] 429 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0, 430 0, 0, 0, 0, 0, 0, 0, 0, 431 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407, 432 0x408, 0 }; 433 434 static const u16 NCT6779_REG_TEMP_CRIT[32] = { 435 [15] = 0x709, 436 [16] = 0x70a, 437 }; 438 439 /* NCT6791 specific data */ 440 441 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 }; 442 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a }; 443 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b }; 444 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c }; 445 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d }; 446 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e }; 447 448 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = { 449 0x459, 0x45A, 0x45B, 0x568, 0x45D }; 450 451 static const s8 NCT6791_ALARM_BITS[] = { 452 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 453 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */ 454 -1, /* unused */ 455 6, 7, 11, 10, 23, 33, /* fan1..fan6 */ 456 -1, -1, /* unused */ 457 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 458 12, 9 }; /* intrusion0, intrusion1 */ 459 460 /* NCT6792/NCT6793 specific data */ 461 462 static const u16 NCT6792_REG_TEMP_MON[] = { 463 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d }; 464 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = { 465 0xb2, 0xb3, 0xb4, 0xb5, 0xbf }; 466 467 static const char *const nct6792_temp_label[] = { 468 "", 469 "SYSTIN", 470 "CPUTIN", 471 "AUXTIN0", 472 "AUXTIN1", 473 "AUXTIN2", 474 "AUXTIN3", 475 "", 476 "SMBUSMASTER 0", 477 "SMBUSMASTER 1", 478 "SMBUSMASTER 2", 479 "SMBUSMASTER 3", 480 "SMBUSMASTER 4", 481 "SMBUSMASTER 5", 482 "SMBUSMASTER 6", 483 "SMBUSMASTER 7", 484 "PECI Agent 0", 485 "PECI Agent 1", 486 "PCH_CHIP_CPU_MAX_TEMP", 487 "PCH_CHIP_TEMP", 488 "PCH_CPU_TEMP", 489 "PCH_MCH_TEMP", 490 "PCH_DIM0_TEMP", 491 "PCH_DIM1_TEMP", 492 "PCH_DIM2_TEMP", 493 "PCH_DIM3_TEMP", 494 "BYTE_TEMP", 495 "PECI Agent 0 Calibration", 496 "PECI Agent 1 Calibration", 497 "", 498 "", 499 "Virtual_TEMP" 500 }; 501 502 #define NCT6792_TEMP_MASK 0x9fffff7e 503 #define NCT6792_VIRT_TEMP_MASK 0x80000000 504 505 static const char *const nct6793_temp_label[] = { 506 "", 507 "SYSTIN", 508 "CPUTIN", 509 "AUXTIN0", 510 "AUXTIN1", 511 "AUXTIN2", 512 "AUXTIN3", 513 "", 514 "SMBUSMASTER 0", 515 "SMBUSMASTER 1", 516 "", 517 "", 518 "", 519 "", 520 "", 521 "", 522 "PECI Agent 0", 523 "PECI Agent 1", 524 "PCH_CHIP_CPU_MAX_TEMP", 525 "PCH_CHIP_TEMP", 526 "PCH_CPU_TEMP", 527 "PCH_MCH_TEMP", 528 "Agent0 Dimm0 ", 529 "Agent0 Dimm1", 530 "Agent1 Dimm0", 531 "Agent1 Dimm1", 532 "BYTE_TEMP0", 533 "BYTE_TEMP1", 534 "PECI Agent 0 Calibration", 535 "PECI Agent 1 Calibration", 536 "", 537 "Virtual_TEMP" 538 }; 539 540 #define NCT6793_TEMP_MASK 0xbfff037e 541 #define NCT6793_VIRT_TEMP_MASK 0x80000000 542 543 static const char *const nct6795_temp_label[] = { 544 "", 545 "SYSTIN", 546 "CPUTIN", 547 "AUXTIN0", 548 "AUXTIN1", 549 "AUXTIN2", 550 "AUXTIN3", 551 "", 552 "SMBUSMASTER 0", 553 "SMBUSMASTER 1", 554 "SMBUSMASTER 2", 555 "SMBUSMASTER 3", 556 "SMBUSMASTER 4", 557 "SMBUSMASTER 5", 558 "SMBUSMASTER 6", 559 "SMBUSMASTER 7", 560 "PECI Agent 0", 561 "PECI Agent 1", 562 "PCH_CHIP_CPU_MAX_TEMP", 563 "PCH_CHIP_TEMP", 564 "PCH_CPU_TEMP", 565 "PCH_MCH_TEMP", 566 "Agent0 Dimm0", 567 "Agent0 Dimm1", 568 "Agent1 Dimm0", 569 "Agent1 Dimm1", 570 "BYTE_TEMP0", 571 "BYTE_TEMP1", 572 "PECI Agent 0 Calibration", 573 "PECI Agent 1 Calibration", 574 "", 575 "Virtual_TEMP" 576 }; 577 578 #define NCT6795_TEMP_MASK 0xbfffff7e 579 #define NCT6795_VIRT_TEMP_MASK 0x80000000 580 581 static const char *const nct6796_temp_label[] = { 582 "", 583 "SYSTIN", 584 "CPUTIN", 585 "AUXTIN0", 586 "AUXTIN1", 587 "AUXTIN2", 588 "AUXTIN3", 589 "AUXTIN4", 590 "SMBUSMASTER 0", 591 "SMBUSMASTER 1", 592 "Virtual_TEMP", 593 "Virtual_TEMP", 594 "", 595 "", 596 "", 597 "", 598 "PECI Agent 0", 599 "PECI Agent 1", 600 "PCH_CHIP_CPU_MAX_TEMP", 601 "PCH_CHIP_TEMP", 602 "PCH_CPU_TEMP", 603 "PCH_MCH_TEMP", 604 "Agent0 Dimm0", 605 "Agent0 Dimm1", 606 "Agent1 Dimm0", 607 "Agent1 Dimm1", 608 "BYTE_TEMP0", 609 "BYTE_TEMP1", 610 "PECI Agent 0 Calibration", 611 "PECI Agent 1 Calibration", 612 "", 613 "Virtual_TEMP" 614 }; 615 616 #define NCT6796_TEMP_MASK 0xbfff0ffe 617 #define NCT6796_VIRT_TEMP_MASK 0x80000c00 618 619 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b }; 620 621 static const char *const nct6798_temp_label[] = { 622 "", 623 "SYSTIN", 624 "CPUTIN", 625 "AUXTIN0", 626 "AUXTIN1", 627 "AUXTIN2", 628 "AUXTIN3", 629 "AUXTIN4", 630 "SMBUSMASTER 0", 631 "SMBUSMASTER 1", 632 "Virtual_TEMP", 633 "Virtual_TEMP", 634 "", 635 "", 636 "", 637 "", 638 "PECI Agent 0", 639 "PECI Agent 1", 640 "PCH_CHIP_CPU_MAX_TEMP", 641 "PCH_CHIP_TEMP", 642 "PCH_CPU_TEMP", 643 "PCH_MCH_TEMP", 644 "Agent0 Dimm0", 645 "Agent0 Dimm1", 646 "Agent1 Dimm0", 647 "Agent1 Dimm1", 648 "BYTE_TEMP0", 649 "BYTE_TEMP1", 650 "PECI Agent 0 Calibration", /* undocumented */ 651 "PECI Agent 1 Calibration", /* undocumented */ 652 "", 653 "Virtual_TEMP" 654 }; 655 656 #define NCT6798_TEMP_MASK 0xbfff0ffe 657 #define NCT6798_VIRT_TEMP_MASK 0x80000c00 658 659 static const char *const nct6799_temp_label[] = { 660 "", 661 "SYSTIN", 662 "CPUTIN", 663 "AUXTIN0", 664 "AUXTIN1", 665 "AUXTIN2", 666 "AUXTIN3", 667 "AUXTIN4", 668 "SMBUSMASTER 0", 669 "SMBUSMASTER 1", 670 "Virtual_TEMP", 671 "Virtual_TEMP", 672 "", 673 "AUXTIN5", 674 "", 675 "", 676 "PECI Agent 0", 677 "PECI Agent 1", 678 "PCH_CHIP_CPU_MAX_TEMP", 679 "PCH_CHIP_TEMP", 680 "PCH_CPU_TEMP", 681 "PCH_MCH_TEMP", 682 "Agent0 Dimm0", 683 "Agent0 Dimm1", 684 "Agent1 Dimm0", 685 "Agent1 Dimm1", 686 "BYTE_TEMP0", 687 "BYTE_TEMP1", 688 "PECI Agent 0 Calibration", /* undocumented */ 689 "PECI Agent 1 Calibration", /* undocumented */ 690 "", 691 "Virtual_TEMP" 692 }; 693 694 #define NCT6799_TEMP_MASK 0xbfff2ffe 695 #define NCT6799_VIRT_TEMP_MASK 0x80000c00 696 697 /* NCT6102D/NCT6106D specific data */ 698 699 #define NCT6106_REG_VBAT 0x318 700 #define NCT6106_REG_DIODE 0x319 701 #define NCT6106_DIODE_MASK 0x01 702 703 static const u16 NCT6106_REG_IN_MAX[] = { 704 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 }; 705 static const u16 NCT6106_REG_IN_MIN[] = { 706 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 }; 707 static const u16 NCT6106_REG_IN[] = { 708 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 }; 709 710 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 }; 711 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a }; 712 static const u16 NCT6106_REG_TEMP_HYST[] = { 713 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 }; 714 static const u16 NCT6106_REG_TEMP_OVER[] = { 715 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 }; 716 static const u16 NCT6106_REG_TEMP_CRIT_L[] = { 717 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 }; 718 static const u16 NCT6106_REG_TEMP_CRIT_H[] = { 719 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 }; 720 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 }; 721 static const u16 NCT6106_REG_TEMP_CONFIG[] = { 722 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc }; 723 724 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 }; 725 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 }; 726 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 }; 727 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 }; 728 729 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 }; 730 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 }; 731 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c }; 732 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 }; 733 static const u16 NCT6106_REG_TEMP_SOURCE[] = { 734 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 }; 735 736 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a }; 737 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = { 738 0x11b, 0x12b, 0x13b }; 739 740 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c }; 741 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10 742 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d }; 743 744 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 }; 745 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 }; 746 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 }; 747 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 }; 748 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 }; 749 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 }; 750 751 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 }; 752 753 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 }; 754 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 }; 755 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a }; 756 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b }; 757 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c }; 758 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d }; 759 760 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 }; 761 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 }; 762 763 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = { 764 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d }; 765 766 static const s8 NCT6106_ALARM_BITS[] = { 767 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 768 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 769 -1, /* unused */ 770 32, 33, 34, -1, -1, /* fan1..fan5 */ 771 -1, -1, -1, /* unused */ 772 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ 773 48, -1 /* intrusion0, intrusion1 */ 774 }; 775 776 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = { 777 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 }; 778 779 static const s8 NCT6106_BEEP_BITS[] = { 780 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 781 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */ 782 32, /* global beep enable */ 783 24, 25, 26, 27, 28, /* fan1..fan5 */ 784 -1, -1, -1, /* unused */ 785 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ 786 34, -1 /* intrusion0, intrusion1 */ 787 }; 788 789 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = { 790 [14] = 0x51, 791 [15] = 0x52, 792 [16] = 0x54, 793 }; 794 795 static const u16 NCT6106_REG_TEMP_CRIT[32] = { 796 [11] = 0x204, 797 [12] = 0x205, 798 }; 799 800 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 }; 801 802 /* NCT6112D/NCT6114D/NCT6116D specific data */ 803 804 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 }; 805 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 }; 806 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 }; 807 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 }; 808 809 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 }; 810 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 }; 811 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 }; 812 static const u16 NCT6116_REG_TEMP_SOURCE[] = { 813 0xb0, 0xb1, 0xb2 }; 814 815 static const u16 NCT6116_REG_CRITICAL_TEMP[] = { 816 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa }; 817 static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = { 818 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab }; 819 820 static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = { 821 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac }; 822 static const u16 NCT6116_REG_CRITICAL_PWM[] = { 823 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad }; 824 825 static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = { 826 0x114, 0x124, 0x134, 0x194, 0x1a4 }; 827 static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = { 828 0x115, 0x125, 0x135, 0x195, 0x1a5 }; 829 static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = { 830 0x116, 0x126, 0x136, 0x196, 0x1a6 }; 831 static const u16 NCT6116_REG_FAN_START_OUTPUT[] = { 832 0x117, 0x127, 0x137, 0x197, 0x1a7 }; 833 static const u16 NCT6116_REG_FAN_STOP_TIME[] = { 834 0x118, 0x128, 0x138, 0x198, 0x1a8 }; 835 static const u16 NCT6116_REG_TOLERANCE_H[] = { 836 0x112, 0x122, 0x132, 0x192, 0x1a2 }; 837 838 static const u16 NCT6116_REG_TARGET[] = { 839 0x111, 0x121, 0x131, 0x191, 0x1a1 }; 840 841 static const u16 NCT6116_REG_AUTO_TEMP[] = { 842 0x160, 0x170, 0x180, 0x1d0, 0x1e0 }; 843 static const u16 NCT6116_REG_AUTO_PWM[] = { 844 0x164, 0x174, 0x184, 0x1d4, 0x1e4 }; 845 846 static const s8 NCT6116_ALARM_BITS[] = { 847 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 848 9, -1, -1, -1, -1, -1, -1, /* in8..in9 */ 849 -1, /* unused */ 850 32, 33, 34, 35, 36, /* fan1..fan5 */ 851 -1, -1, -1, /* unused */ 852 16, 17, 18, -1, -1, -1, /* temp1..temp6 */ 853 48, -1 /* intrusion0, intrusion1 */ 854 }; 855 856 static const s8 NCT6116_BEEP_BITS[] = { 857 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 858 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */ 859 32, /* global beep enable */ 860 24, 25, 26, 27, 28, /* fan1..fan5 */ 861 -1, -1, -1, /* unused */ 862 16, 17, 18, -1, -1, -1, /* temp1..temp6 */ 863 34, -1 /* intrusion0, intrusion1 */ 864 }; 865 866 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b }; 867 868 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode) 869 { 870 if (mode == 0 && pwm == 255) 871 return off; 872 return mode + 1; 873 } 874 875 static int pwm_enable_to_reg(enum pwm_enable mode) 876 { 877 if (mode == off) 878 return 0; 879 return mode - 1; 880 } 881 882 /* 883 * Conversions 884 */ 885 886 /* 1 is DC mode, output in ms */ 887 static unsigned int step_time_from_reg(u8 reg, u8 mode) 888 { 889 return mode ? 400 * reg : 100 * reg; 890 } 891 892 static u8 step_time_to_reg(unsigned int msec, u8 mode) 893 { 894 return clamp_val((mode ? (msec + 200) / 400 : 895 (msec + 50) / 100), 1, 255); 896 } 897 898 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg) 899 { 900 if (reg == 0 || reg == 255) 901 return 0; 902 return 1350000U / (reg << divreg); 903 } 904 905 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg) 906 { 907 if ((reg & 0xff1f) == 0xff1f) 908 return 0; 909 910 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3); 911 912 if (reg == 0) 913 return 0; 914 915 return 1350000U / reg; 916 } 917 918 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg) 919 { 920 if (reg == 0 || reg == 0xffff) 921 return 0; 922 923 /* 924 * Even though the registers are 16 bit wide, the fan divisor 925 * still applies. 926 */ 927 return 1350000U / (reg << divreg); 928 } 929 930 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg) 931 { 932 return reg; 933 } 934 935 static u16 fan_to_reg(u32 fan, unsigned int divreg) 936 { 937 if (!fan) 938 return 0; 939 940 return (1350000U / fan) >> divreg; 941 } 942 943 static inline unsigned int 944 div_from_reg(u8 reg) 945 { 946 return BIT(reg); 947 } 948 949 /* 950 * Some of the voltage inputs have internal scaling, the tables below 951 * contain 8 (the ADC LSB in mV) * scaling factor * 100 952 */ 953 static const u16 scale_in[15] = { 954 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800, 955 800, 800 956 }; 957 958 /* 959 * NCT6798 scaling: 960 * CPUVC, IN1, AVSB, 3VCC, IN0, IN8, IN4, 3VSB, VBAT, VTT, IN5, IN6, IN2, 961 * IN3, IN7 962 * Additional scales to be added later: IN9 (800), VHIF (1600) 963 */ 964 static const u16 scale_in_6798[15] = { 965 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 1600, 1600, 1600, 800, 966 800, 800 967 }; 968 969 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scales) 970 { 971 return DIV_ROUND_CLOSEST(reg * scales[nr], 100); 972 } 973 974 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scales) 975 { 976 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scales[nr]), 0, 255); 977 } 978 979 /* TSI temperatures are in 8.3 format */ 980 static inline unsigned int tsi_temp_from_reg(unsigned int reg) 981 { 982 return (reg >> 5) * 125; 983 } 984 985 /* 986 * Data structures and manipulation thereof 987 */ 988 989 struct sensor_device_template { 990 struct device_attribute dev_attr; 991 union { 992 struct { 993 u8 nr; 994 u8 index; 995 } s; 996 int index; 997 } u; 998 bool s2; /* true if both index and nr are used */ 999 }; 1000 1001 struct sensor_device_attr_u { 1002 union { 1003 struct sensor_device_attribute a1; 1004 struct sensor_device_attribute_2 a2; 1005 } u; 1006 char name[32]; 1007 }; 1008 1009 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \ 1010 .attr = {.name = _template, .mode = _mode }, \ 1011 .show = _show, \ 1012 .store = _store, \ 1013 } 1014 1015 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \ 1016 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 1017 .u.index = _index, \ 1018 .s2 = false } 1019 1020 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 1021 _nr, _index) \ 1022 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 1023 .u.s.index = _index, \ 1024 .u.s.nr = _nr, \ 1025 .s2 = true } 1026 1027 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \ 1028 static struct sensor_device_template sensor_dev_template_##_name \ 1029 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \ 1030 _index) 1031 1032 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \ 1033 _nr, _index) \ 1034 static struct sensor_device_template sensor_dev_template_##_name \ 1035 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 1036 _nr, _index) 1037 1038 struct sensor_template_group { 1039 struct sensor_device_template **templates; 1040 umode_t (*is_visible)(struct kobject *, struct attribute *, int); 1041 int base; 1042 }; 1043 1044 static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data, 1045 const struct sensor_template_group *tg, int repeat) 1046 { 1047 struct attribute_group *group; 1048 struct sensor_device_attr_u *su; 1049 struct sensor_device_attribute *a; 1050 struct sensor_device_attribute_2 *a2; 1051 struct attribute **attrs; 1052 struct sensor_device_template **t; 1053 int i, count; 1054 1055 if (repeat <= 0) 1056 return -EINVAL; 1057 1058 t = tg->templates; 1059 for (count = 0; *t; t++, count++) 1060 ; 1061 1062 if (count == 0) 1063 return -EINVAL; 1064 1065 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL); 1066 if (group == NULL) 1067 return -ENOMEM; 1068 1069 attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs), 1070 GFP_KERNEL); 1071 if (attrs == NULL) 1072 return -ENOMEM; 1073 1074 su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)), 1075 GFP_KERNEL); 1076 if (su == NULL) 1077 return -ENOMEM; 1078 1079 group->attrs = attrs; 1080 group->is_visible = tg->is_visible; 1081 1082 for (i = 0; i < repeat; i++) { 1083 t = tg->templates; 1084 while (*t != NULL) { 1085 snprintf(su->name, sizeof(su->name), 1086 (*t)->dev_attr.attr.name, tg->base + i); 1087 if ((*t)->s2) { 1088 a2 = &su->u.a2; 1089 sysfs_attr_init(&a2->dev_attr.attr); 1090 a2->dev_attr.attr.name = su->name; 1091 a2->nr = (*t)->u.s.nr + i; 1092 a2->index = (*t)->u.s.index; 1093 a2->dev_attr.attr.mode = 1094 (*t)->dev_attr.attr.mode; 1095 a2->dev_attr.show = (*t)->dev_attr.show; 1096 a2->dev_attr.store = (*t)->dev_attr.store; 1097 *attrs = &a2->dev_attr.attr; 1098 } else { 1099 a = &su->u.a1; 1100 sysfs_attr_init(&a->dev_attr.attr); 1101 a->dev_attr.attr.name = su->name; 1102 a->index = (*t)->u.index + i; 1103 a->dev_attr.attr.mode = 1104 (*t)->dev_attr.attr.mode; 1105 a->dev_attr.show = (*t)->dev_attr.show; 1106 a->dev_attr.store = (*t)->dev_attr.store; 1107 *attrs = &a->dev_attr.attr; 1108 } 1109 attrs++; 1110 su++; 1111 t++; 1112 } 1113 } 1114 1115 return nct6775_add_attr_group(data, group); 1116 } 1117 1118 bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg) 1119 { 1120 switch (data->kind) { 1121 case nct6106: 1122 return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1123 (reg >= 0x59 && reg < 0x69 && (reg & 1)) || 1124 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || 1125 reg == 0x111 || reg == 0x121 || reg == 0x131; 1126 case nct6116: 1127 return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1128 reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b || 1129 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 || 1130 reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 || 1131 reg == 0x191 || reg == 0x1a1; 1132 case nct6775: 1133 return (((reg & 0xff00) == 0x100 || 1134 (reg & 0xff00) == 0x200) && 1135 ((reg & 0x00ff) == 0x50 || 1136 (reg & 0x00ff) == 0x53 || 1137 (reg & 0x00ff) == 0x55)) || 1138 (reg & 0xfff0) == 0x630 || 1139 reg == 0x640 || reg == 0x642 || 1140 reg == 0x662 || reg == 0x669 || 1141 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1142 reg == 0x73 || reg == 0x75 || reg == 0x77; 1143 case nct6776: 1144 return (((reg & 0xff00) == 0x100 || 1145 (reg & 0xff00) == 0x200) && 1146 ((reg & 0x00ff) == 0x50 || 1147 (reg & 0x00ff) == 0x53 || 1148 (reg & 0x00ff) == 0x55)) || 1149 (reg & 0xfff0) == 0x630 || 1150 reg == 0x402 || 1151 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1152 reg == 0x640 || reg == 0x642 || 1153 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1154 reg == 0x73 || reg == 0x75 || reg == 0x77; 1155 case nct6779: 1156 case nct6791: 1157 case nct6792: 1158 case nct6793: 1159 case nct6795: 1160 case nct6796: 1161 case nct6797: 1162 case nct6798: 1163 case nct6799: 1164 return reg == 0x150 || reg == 0x153 || reg == 0x155 || 1165 (reg & 0xfff0) == 0x4c0 || 1166 reg == 0x402 || 1167 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1168 reg == 0x63a || reg == 0x63c || reg == 0x63e || 1169 reg == 0x640 || reg == 0x642 || reg == 0x64a || 1170 reg == 0x64c || 1171 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 || 1172 reg == 0x7b || reg == 0x7d; 1173 } 1174 return false; 1175 } 1176 EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized); 1177 1178 /* We left-align 8-bit temperature values to make the code simpler */ 1179 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val) 1180 { 1181 int err; 1182 1183 err = nct6775_read_value(data, reg, val); 1184 if (err) 1185 return err; 1186 1187 if (!nct6775_reg_is_word_sized(data, reg)) 1188 *val <<= 8; 1189 1190 return 0; 1191 } 1192 1193 /* This function assumes that the caller holds data->update_lock */ 1194 static int nct6775_write_fan_div(struct nct6775_data *data, int nr) 1195 { 1196 u16 reg; 1197 int err; 1198 u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2; 1199 unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */ 1200 1201 err = nct6775_read_value(data, fandiv_reg, ®); 1202 if (err) 1203 return err; 1204 reg &= 0x70 >> oddshift; 1205 reg |= (data->fan_div[nr] & 0x7) << oddshift; 1206 return nct6775_write_value(data, fandiv_reg, reg); 1207 } 1208 1209 static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr) 1210 { 1211 if (data->kind == nct6775) 1212 return nct6775_write_fan_div(data, nr); 1213 return 0; 1214 } 1215 1216 static int nct6775_update_fan_div(struct nct6775_data *data) 1217 { 1218 int err; 1219 u16 i; 1220 1221 err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i); 1222 if (err) 1223 return err; 1224 data->fan_div[0] = i & 0x7; 1225 data->fan_div[1] = (i & 0x70) >> 4; 1226 err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i); 1227 if (err) 1228 return err; 1229 data->fan_div[2] = i & 0x7; 1230 if (data->has_fan & BIT(3)) 1231 data->fan_div[3] = (i & 0x70) >> 4; 1232 1233 return 0; 1234 } 1235 1236 static int nct6775_update_fan_div_common(struct nct6775_data *data) 1237 { 1238 if (data->kind == nct6775) 1239 return nct6775_update_fan_div(data); 1240 return 0; 1241 } 1242 1243 static int nct6775_init_fan_div(struct nct6775_data *data) 1244 { 1245 int i, err; 1246 1247 err = nct6775_update_fan_div_common(data); 1248 if (err) 1249 return err; 1250 1251 /* 1252 * For all fans, start with highest divider value if the divider 1253 * register is not initialized. This ensures that we get a 1254 * reading from the fan count register, even if it is not optimal. 1255 * We'll compute a better divider later on. 1256 */ 1257 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) { 1258 if (!(data->has_fan & BIT(i))) 1259 continue; 1260 if (data->fan_div[i] == 0) { 1261 data->fan_div[i] = 7; 1262 err = nct6775_write_fan_div_common(data, i); 1263 if (err) 1264 return err; 1265 } 1266 } 1267 1268 return 0; 1269 } 1270 1271 static int nct6775_init_fan_common(struct device *dev, 1272 struct nct6775_data *data) 1273 { 1274 int i, err; 1275 u16 reg; 1276 1277 if (data->has_fan_div) { 1278 err = nct6775_init_fan_div(data); 1279 if (err) 1280 return err; 1281 } 1282 1283 /* 1284 * If fan_min is not set (0), set it to 0xff to disable it. This 1285 * prevents the unnecessary warning when fanX_min is reported as 0. 1286 */ 1287 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) { 1288 if (data->has_fan_min & BIT(i)) { 1289 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®); 1290 if (err) 1291 return err; 1292 if (!reg) { 1293 err = nct6775_write_value(data, data->REG_FAN_MIN[i], 1294 data->has_fan_div ? 0xff : 0xff1f); 1295 if (err) 1296 return err; 1297 } 1298 } 1299 } 1300 1301 return 0; 1302 } 1303 1304 static int nct6775_select_fan_div(struct device *dev, 1305 struct nct6775_data *data, int nr, u16 reg) 1306 { 1307 int err; 1308 u8 fan_div = data->fan_div[nr]; 1309 u16 fan_min; 1310 1311 if (!data->has_fan_div) 1312 return 0; 1313 1314 /* 1315 * If we failed to measure the fan speed, or the reported value is not 1316 * in the optimal range, and the clock divider can be modified, 1317 * let's try that for next time. 1318 */ 1319 if (reg == 0x00 && fan_div < 0x07) 1320 fan_div++; 1321 else if (reg != 0x00 && reg < 0x30 && fan_div > 0) 1322 fan_div--; 1323 1324 if (fan_div != data->fan_div[nr]) { 1325 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n", 1326 nr + 1, div_from_reg(data->fan_div[nr]), 1327 div_from_reg(fan_div)); 1328 1329 /* Preserve min limit if possible */ 1330 if (data->has_fan_min & BIT(nr)) { 1331 fan_min = data->fan_min[nr]; 1332 if (fan_div > data->fan_div[nr]) { 1333 if (fan_min != 255 && fan_min > 1) 1334 fan_min >>= 1; 1335 } else { 1336 if (fan_min != 255) { 1337 fan_min <<= 1; 1338 if (fan_min > 254) 1339 fan_min = 254; 1340 } 1341 } 1342 if (fan_min != data->fan_min[nr]) { 1343 data->fan_min[nr] = fan_min; 1344 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min); 1345 if (err) 1346 return err; 1347 } 1348 } 1349 data->fan_div[nr] = fan_div; 1350 err = nct6775_write_fan_div_common(data, nr); 1351 if (err) 1352 return err; 1353 } 1354 1355 return 0; 1356 } 1357 1358 static int nct6775_update_pwm(struct device *dev) 1359 { 1360 struct nct6775_data *data = dev_get_drvdata(dev); 1361 int i, j, err; 1362 u16 fanmodecfg, reg; 1363 bool duty_is_dc; 1364 1365 for (i = 0; i < data->pwm_num; i++) { 1366 if (!(data->has_pwm & BIT(i))) 1367 continue; 1368 1369 err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®); 1370 if (err) 1371 return err; 1372 duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]); 1373 data->pwm_mode[i] = !duty_is_dc; 1374 1375 err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg); 1376 if (err) 1377 return err; 1378 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) { 1379 if (data->REG_PWM[j] && data->REG_PWM[j][i]) { 1380 err = nct6775_read_value(data, data->REG_PWM[j][i], ®); 1381 if (err) 1382 return err; 1383 data->pwm[j][i] = reg; 1384 } 1385 } 1386 1387 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i], 1388 (fanmodecfg >> 4) & 7); 1389 1390 if (!data->temp_tolerance[0][i] || 1391 data->pwm_enable[i] != speed_cruise) 1392 data->temp_tolerance[0][i] = fanmodecfg & 0x0f; 1393 if (!data->target_speed_tolerance[i] || 1394 data->pwm_enable[i] == speed_cruise) { 1395 u8 t = fanmodecfg & 0x0f; 1396 1397 if (data->REG_TOLERANCE_H) { 1398 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1399 if (err) 1400 return err; 1401 t |= (reg & 0x70) >> 1; 1402 } 1403 data->target_speed_tolerance[i] = t; 1404 } 1405 1406 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®); 1407 if (err) 1408 return err; 1409 data->temp_tolerance[1][i] = reg; 1410 1411 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®); 1412 if (err) 1413 return err; 1414 data->pwm_temp_sel[i] = reg & 0x1f; 1415 /* If fan can stop, report floor as 0 */ 1416 if (reg & 0x80) 1417 data->pwm[2][i] = 0; 1418 1419 if (!data->REG_WEIGHT_TEMP_SEL[i]) 1420 continue; 1421 1422 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®); 1423 if (err) 1424 return err; 1425 data->pwm_weight_temp_sel[i] = reg & 0x1f; 1426 /* If weight is disabled, report weight source as 0 */ 1427 if (!(reg & 0x80)) 1428 data->pwm_weight_temp_sel[i] = 0; 1429 1430 /* Weight temp data */ 1431 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) { 1432 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®); 1433 if (err) 1434 return err; 1435 data->weight_temp[j][i] = reg; 1436 } 1437 } 1438 1439 return 0; 1440 } 1441 1442 static int nct6775_update_pwm_limits(struct device *dev) 1443 { 1444 struct nct6775_data *data = dev_get_drvdata(dev); 1445 int i, j, err; 1446 u16 reg, reg_t; 1447 1448 for (i = 0; i < data->pwm_num; i++) { 1449 if (!(data->has_pwm & BIT(i))) 1450 continue; 1451 1452 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) { 1453 err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®); 1454 if (err) 1455 return err; 1456 data->fan_time[j][i] = reg; 1457 } 1458 1459 err = nct6775_read_value(data, data->REG_TARGET[i], ®_t); 1460 if (err) 1461 return err; 1462 1463 /* Update only in matching mode or if never updated */ 1464 if (!data->target_temp[i] || 1465 data->pwm_enable[i] == thermal_cruise) 1466 data->target_temp[i] = reg_t & data->target_temp_mask; 1467 if (!data->target_speed[i] || 1468 data->pwm_enable[i] == speed_cruise) { 1469 if (data->REG_TOLERANCE_H) { 1470 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1471 if (err) 1472 return err; 1473 reg_t |= (reg & 0x0f) << 8; 1474 } 1475 data->target_speed[i] = reg_t; 1476 } 1477 1478 for (j = 0; j < data->auto_pwm_num; j++) { 1479 err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®); 1480 if (err) 1481 return err; 1482 data->auto_pwm[i][j] = reg; 1483 1484 err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®); 1485 if (err) 1486 return err; 1487 data->auto_temp[i][j] = reg; 1488 } 1489 1490 /* critical auto_pwm temperature data */ 1491 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®); 1492 if (err) 1493 return err; 1494 data->auto_temp[i][data->auto_pwm_num] = reg; 1495 1496 switch (data->kind) { 1497 case nct6775: 1498 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®); 1499 if (err) 1500 return err; 1501 data->auto_pwm[i][data->auto_pwm_num] = 1502 (reg & 0x02) ? 0xff : 0x00; 1503 break; 1504 case nct6776: 1505 data->auto_pwm[i][data->auto_pwm_num] = 0xff; 1506 break; 1507 case nct6106: 1508 case nct6116: 1509 case nct6779: 1510 case nct6791: 1511 case nct6792: 1512 case nct6793: 1513 case nct6795: 1514 case nct6796: 1515 case nct6797: 1516 case nct6798: 1517 case nct6799: 1518 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®); 1519 if (err) 1520 return err; 1521 if (reg & data->CRITICAL_PWM_ENABLE_MASK) { 1522 err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®); 1523 if (err) 1524 return err; 1525 } else { 1526 reg = 0xff; 1527 } 1528 data->auto_pwm[i][data->auto_pwm_num] = reg; 1529 break; 1530 } 1531 } 1532 1533 return 0; 1534 } 1535 1536 struct nct6775_data *nct6775_update_device(struct device *dev) 1537 { 1538 struct nct6775_data *data = dev_get_drvdata(dev); 1539 int i, j, err = 0; 1540 u16 reg; 1541 1542 mutex_lock(&data->update_lock); 1543 1544 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1545 || !data->valid) { 1546 /* Fan clock dividers */ 1547 err = nct6775_update_fan_div_common(data); 1548 if (err) 1549 goto out; 1550 1551 /* Measured voltages and limits */ 1552 for (i = 0; i < data->in_num; i++) { 1553 if (!(data->have_in & BIT(i))) 1554 continue; 1555 1556 err = nct6775_read_value(data, data->REG_VIN[i], ®); 1557 if (err) 1558 goto out; 1559 data->in[i][0] = reg; 1560 1561 err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®); 1562 if (err) 1563 goto out; 1564 data->in[i][1] = reg; 1565 1566 err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®); 1567 if (err) 1568 goto out; 1569 data->in[i][2] = reg; 1570 } 1571 1572 /* Measured fan speeds and limits */ 1573 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) { 1574 if (!(data->has_fan & BIT(i))) 1575 continue; 1576 1577 err = nct6775_read_value(data, data->REG_FAN[i], ®); 1578 if (err) 1579 goto out; 1580 data->rpm[i] = data->fan_from_reg(reg, 1581 data->fan_div[i]); 1582 1583 if (data->has_fan_min & BIT(i)) { 1584 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®); 1585 if (err) 1586 goto out; 1587 data->fan_min[i] = reg; 1588 } 1589 1590 if (data->REG_FAN_PULSES[i]) { 1591 err = nct6775_read_value(data, data->REG_FAN_PULSES[i], ®); 1592 if (err) 1593 goto out; 1594 data->fan_pulses[i] = (reg >> data->FAN_PULSE_SHIFT[i]) & 0x03; 1595 } 1596 1597 err = nct6775_select_fan_div(dev, data, i, reg); 1598 if (err) 1599 goto out; 1600 } 1601 1602 err = nct6775_update_pwm(dev); 1603 if (err) 1604 goto out; 1605 1606 err = nct6775_update_pwm_limits(dev); 1607 if (err) 1608 goto out; 1609 1610 /* Measured temperatures and limits */ 1611 for (i = 0; i < NUM_TEMP; i++) { 1612 if (!(data->have_temp & BIT(i))) 1613 continue; 1614 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) { 1615 if (data->reg_temp[j][i]) { 1616 err = nct6775_read_temp(data, data->reg_temp[j][i], ®); 1617 if (err) 1618 goto out; 1619 data->temp[j][i] = reg; 1620 } 1621 } 1622 if (i >= NUM_TEMP_FIXED || 1623 !(data->have_temp_fixed & BIT(i))) 1624 continue; 1625 err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®); 1626 if (err) 1627 goto out; 1628 data->temp_offset[i] = reg; 1629 } 1630 1631 for (i = 0; i < NUM_TSI_TEMP; i++) { 1632 if (!(data->have_tsi_temp & BIT(i))) 1633 continue; 1634 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®); 1635 if (err) 1636 goto out; 1637 data->tsi_temp[i] = reg; 1638 } 1639 1640 data->alarms = 0; 1641 for (i = 0; i < NUM_REG_ALARM; i++) { 1642 u16 alarm; 1643 1644 if (!data->REG_ALARM[i]) 1645 continue; 1646 err = nct6775_read_value(data, data->REG_ALARM[i], &alarm); 1647 if (err) 1648 goto out; 1649 data->alarms |= ((u64)alarm) << (i << 3); 1650 } 1651 1652 data->beeps = 0; 1653 for (i = 0; i < NUM_REG_BEEP; i++) { 1654 u16 beep; 1655 1656 if (!data->REG_BEEP[i]) 1657 continue; 1658 err = nct6775_read_value(data, data->REG_BEEP[i], &beep); 1659 if (err) 1660 goto out; 1661 data->beeps |= ((u64)beep) << (i << 3); 1662 } 1663 1664 data->last_updated = jiffies; 1665 data->valid = true; 1666 } 1667 out: 1668 mutex_unlock(&data->update_lock); 1669 return err ? ERR_PTR(err) : data; 1670 } 1671 EXPORT_SYMBOL_GPL(nct6775_update_device); 1672 1673 /* 1674 * Sysfs callback functions 1675 */ 1676 static ssize_t 1677 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf) 1678 { 1679 struct nct6775_data *data = nct6775_update_device(dev); 1680 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1681 int index = sattr->index; 1682 int nr = sattr->nr; 1683 1684 if (IS_ERR(data)) 1685 return PTR_ERR(data); 1686 1687 return sprintf(buf, "%ld\n", 1688 in_from_reg(data->in[nr][index], nr, data->scale_in)); 1689 } 1690 1691 static ssize_t 1692 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf, 1693 size_t count) 1694 { 1695 struct nct6775_data *data = dev_get_drvdata(dev); 1696 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1697 int index = sattr->index; 1698 int nr = sattr->nr; 1699 unsigned long val; 1700 int err; 1701 1702 err = kstrtoul(buf, 10, &val); 1703 if (err < 0) 1704 return err; 1705 mutex_lock(&data->update_lock); 1706 data->in[nr][index] = in_to_reg(val, nr, data->scale_in); 1707 err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]); 1708 mutex_unlock(&data->update_lock); 1709 return err ? : count; 1710 } 1711 1712 ssize_t 1713 nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1714 { 1715 struct nct6775_data *data = nct6775_update_device(dev); 1716 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1717 int nr; 1718 1719 if (IS_ERR(data)) 1720 return PTR_ERR(data); 1721 1722 nr = data->ALARM_BITS[sattr->index]; 1723 return sprintf(buf, "%u\n", 1724 (unsigned int)((data->alarms >> nr) & 0x01)); 1725 } 1726 EXPORT_SYMBOL_GPL(nct6775_show_alarm); 1727 1728 static int find_temp_source(struct nct6775_data *data, int index, int count) 1729 { 1730 int source = data->temp_src[index]; 1731 int nr, err; 1732 1733 for (nr = 0; nr < count; nr++) { 1734 u16 src; 1735 1736 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src); 1737 if (err) 1738 return err; 1739 if ((src & 0x1f) == source) 1740 return nr; 1741 } 1742 return -ENODEV; 1743 } 1744 1745 static ssize_t 1746 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1747 { 1748 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1749 struct nct6775_data *data = nct6775_update_device(dev); 1750 unsigned int alarm = 0; 1751 int nr; 1752 1753 if (IS_ERR(data)) 1754 return PTR_ERR(data); 1755 1756 /* 1757 * For temperatures, there is no fixed mapping from registers to alarm 1758 * bits. Alarm bits are determined by the temperature source mapping. 1759 */ 1760 nr = find_temp_source(data, sattr->index, data->num_temp_alarms); 1761 if (nr >= 0) { 1762 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE]; 1763 1764 alarm = (data->alarms >> bit) & 0x01; 1765 } 1766 return sprintf(buf, "%u\n", alarm); 1767 } 1768 1769 ssize_t 1770 nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf) 1771 { 1772 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1773 struct nct6775_data *data = nct6775_update_device(dev); 1774 int nr; 1775 1776 if (IS_ERR(data)) 1777 return PTR_ERR(data); 1778 1779 nr = data->BEEP_BITS[sattr->index]; 1780 1781 return sprintf(buf, "%u\n", 1782 (unsigned int)((data->beeps >> nr) & 0x01)); 1783 } 1784 EXPORT_SYMBOL_GPL(nct6775_show_beep); 1785 1786 ssize_t 1787 nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 1788 { 1789 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1790 struct nct6775_data *data = dev_get_drvdata(dev); 1791 int nr = data->BEEP_BITS[sattr->index]; 1792 int regindex = nr >> 3; 1793 unsigned long val; 1794 int err; 1795 1796 err = kstrtoul(buf, 10, &val); 1797 if (err < 0) 1798 return err; 1799 if (val > 1) 1800 return -EINVAL; 1801 1802 mutex_lock(&data->update_lock); 1803 if (val) 1804 data->beeps |= (1ULL << nr); 1805 else 1806 data->beeps &= ~(1ULL << nr); 1807 err = nct6775_write_value(data, data->REG_BEEP[regindex], 1808 (data->beeps >> (regindex << 3)) & 0xff); 1809 mutex_unlock(&data->update_lock); 1810 return err ? : count; 1811 } 1812 EXPORT_SYMBOL_GPL(nct6775_store_beep); 1813 1814 static ssize_t 1815 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf) 1816 { 1817 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1818 struct nct6775_data *data = nct6775_update_device(dev); 1819 unsigned int beep = 0; 1820 int nr; 1821 1822 if (IS_ERR(data)) 1823 return PTR_ERR(data); 1824 1825 /* 1826 * For temperatures, there is no fixed mapping from registers to beep 1827 * enable bits. Beep enable bits are determined by the temperature 1828 * source mapping. 1829 */ 1830 nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1831 if (nr >= 0) { 1832 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1833 1834 beep = (data->beeps >> bit) & 0x01; 1835 } 1836 return sprintf(buf, "%u\n", beep); 1837 } 1838 1839 static ssize_t 1840 store_temp_beep(struct device *dev, struct device_attribute *attr, 1841 const char *buf, size_t count) 1842 { 1843 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1844 struct nct6775_data *data = dev_get_drvdata(dev); 1845 int nr, bit, regindex; 1846 unsigned long val; 1847 int err; 1848 1849 err = kstrtoul(buf, 10, &val); 1850 if (err < 0) 1851 return err; 1852 if (val > 1) 1853 return -EINVAL; 1854 1855 nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1856 if (nr < 0) 1857 return nr; 1858 1859 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1860 regindex = bit >> 3; 1861 1862 mutex_lock(&data->update_lock); 1863 if (val) 1864 data->beeps |= (1ULL << bit); 1865 else 1866 data->beeps &= ~(1ULL << bit); 1867 err = nct6775_write_value(data, data->REG_BEEP[regindex], 1868 (data->beeps >> (regindex << 3)) & 0xff); 1869 mutex_unlock(&data->update_lock); 1870 1871 return err ? : count; 1872 } 1873 1874 static umode_t nct6775_in_is_visible(struct kobject *kobj, 1875 struct attribute *attr, int index) 1876 { 1877 struct device *dev = kobj_to_dev(kobj); 1878 struct nct6775_data *data = dev_get_drvdata(dev); 1879 int in = index / 5; /* voltage index */ 1880 1881 if (!(data->have_in & BIT(in))) 1882 return 0; 1883 1884 return nct6775_attr_mode(data, attr); 1885 } 1886 1887 SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0); 1888 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0); 1889 SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0); 1890 SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1); 1891 SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2); 1892 1893 /* 1894 * nct6775_in_is_visible uses the index into the following array 1895 * to determine if attributes should be created or not. 1896 * Any change in order or content must be matched. 1897 */ 1898 static struct sensor_device_template *nct6775_attributes_in_template[] = { 1899 &sensor_dev_template_in_input, 1900 &sensor_dev_template_in_alarm, 1901 &sensor_dev_template_in_beep, 1902 &sensor_dev_template_in_min, 1903 &sensor_dev_template_in_max, 1904 NULL 1905 }; 1906 1907 static const struct sensor_template_group nct6775_in_template_group = { 1908 .templates = nct6775_attributes_in_template, 1909 .is_visible = nct6775_in_is_visible, 1910 }; 1911 1912 static ssize_t 1913 show_fan(struct device *dev, struct device_attribute *attr, char *buf) 1914 { 1915 struct nct6775_data *data = nct6775_update_device(dev); 1916 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1917 int nr = sattr->index; 1918 1919 if (IS_ERR(data)) 1920 return PTR_ERR(data); 1921 1922 return sprintf(buf, "%d\n", data->rpm[nr]); 1923 } 1924 1925 static ssize_t 1926 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf) 1927 { 1928 struct nct6775_data *data = nct6775_update_device(dev); 1929 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1930 int nr = sattr->index; 1931 1932 if (IS_ERR(data)) 1933 return PTR_ERR(data); 1934 1935 return sprintf(buf, "%d\n", 1936 data->fan_from_reg_min(data->fan_min[nr], 1937 data->fan_div[nr])); 1938 } 1939 1940 static ssize_t 1941 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf) 1942 { 1943 struct nct6775_data *data = nct6775_update_device(dev); 1944 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1945 int nr = sattr->index; 1946 1947 if (IS_ERR(data)) 1948 return PTR_ERR(data); 1949 1950 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr])); 1951 } 1952 1953 static ssize_t 1954 store_fan_min(struct device *dev, struct device_attribute *attr, 1955 const char *buf, size_t count) 1956 { 1957 struct nct6775_data *data = dev_get_drvdata(dev); 1958 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1959 int nr = sattr->index; 1960 unsigned long val; 1961 unsigned int reg; 1962 u8 new_div; 1963 int err; 1964 1965 err = kstrtoul(buf, 10, &val); 1966 if (err < 0) 1967 return err; 1968 1969 mutex_lock(&data->update_lock); 1970 if (!data->has_fan_div) { 1971 /* NCT6776F or NCT6779D; we know this is a 13 bit register */ 1972 if (!val) { 1973 val = 0xff1f; 1974 } else { 1975 if (val > 1350000U) 1976 val = 135000U; 1977 val = 1350000U / val; 1978 val = (val & 0x1f) | ((val << 3) & 0xff00); 1979 } 1980 data->fan_min[nr] = val; 1981 goto write_min; /* Leave fan divider alone */ 1982 } 1983 if (!val) { 1984 /* No min limit, alarm disabled */ 1985 data->fan_min[nr] = 255; 1986 new_div = data->fan_div[nr]; /* No change */ 1987 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1); 1988 goto write_div; 1989 } 1990 reg = 1350000U / val; 1991 if (reg >= 128 * 255) { 1992 /* 1993 * Speed below this value cannot possibly be represented, 1994 * even with the highest divider (128) 1995 */ 1996 data->fan_min[nr] = 254; 1997 new_div = 7; /* 128 == BIT(7) */ 1998 dev_warn(dev, 1999 "fan%u low limit %lu below minimum %u, set to minimum\n", 2000 nr + 1, val, data->fan_from_reg_min(254, 7)); 2001 } else if (!reg) { 2002 /* 2003 * Speed above this value cannot possibly be represented, 2004 * even with the lowest divider (1) 2005 */ 2006 data->fan_min[nr] = 1; 2007 new_div = 0; /* 1 == BIT(0) */ 2008 dev_warn(dev, 2009 "fan%u low limit %lu above maximum %u, set to maximum\n", 2010 nr + 1, val, data->fan_from_reg_min(1, 0)); 2011 } else { 2012 /* 2013 * Automatically pick the best divider, i.e. the one such 2014 * that the min limit will correspond to a register value 2015 * in the 96..192 range 2016 */ 2017 new_div = 0; 2018 while (reg > 192 && new_div < 7) { 2019 reg >>= 1; 2020 new_div++; 2021 } 2022 data->fan_min[nr] = reg; 2023 } 2024 2025 write_div: 2026 /* 2027 * Write both the fan clock divider (if it changed) and the new 2028 * fan min (unconditionally) 2029 */ 2030 if (new_div != data->fan_div[nr]) { 2031 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n", 2032 nr + 1, div_from_reg(data->fan_div[nr]), 2033 div_from_reg(new_div)); 2034 data->fan_div[nr] = new_div; 2035 err = nct6775_write_fan_div_common(data, nr); 2036 if (err) 2037 goto write_min; 2038 /* Give the chip time to sample a new speed value */ 2039 data->last_updated = jiffies; 2040 } 2041 2042 write_min: 2043 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]); 2044 mutex_unlock(&data->update_lock); 2045 2046 return err ? : count; 2047 } 2048 2049 static ssize_t 2050 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf) 2051 { 2052 struct nct6775_data *data = nct6775_update_device(dev); 2053 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2054 int p; 2055 2056 if (IS_ERR(data)) 2057 return PTR_ERR(data); 2058 2059 p = data->fan_pulses[sattr->index]; 2060 return sprintf(buf, "%d\n", p ? : 4); 2061 } 2062 2063 static ssize_t 2064 store_fan_pulses(struct device *dev, struct device_attribute *attr, 2065 const char *buf, size_t count) 2066 { 2067 struct nct6775_data *data = dev_get_drvdata(dev); 2068 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2069 int nr = sattr->index; 2070 unsigned long val; 2071 int err; 2072 u16 reg; 2073 2074 err = kstrtoul(buf, 10, &val); 2075 if (err < 0) 2076 return err; 2077 2078 if (val > 4) 2079 return -EINVAL; 2080 2081 mutex_lock(&data->update_lock); 2082 data->fan_pulses[nr] = val & 3; 2083 err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®); 2084 if (err) 2085 goto out; 2086 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]); 2087 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr]; 2088 err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg); 2089 out: 2090 mutex_unlock(&data->update_lock); 2091 2092 return err ? : count; 2093 } 2094 2095 static umode_t nct6775_fan_is_visible(struct kobject *kobj, 2096 struct attribute *attr, int index) 2097 { 2098 struct device *dev = kobj_to_dev(kobj); 2099 struct nct6775_data *data = dev_get_drvdata(dev); 2100 int fan = index / 6; /* fan index */ 2101 int nr = index % 6; /* attribute index */ 2102 2103 if (!(data->has_fan & BIT(fan))) 2104 return 0; 2105 2106 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1) 2107 return 0; 2108 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1) 2109 return 0; 2110 if (nr == 3 && !data->REG_FAN_PULSES[fan]) 2111 return 0; 2112 if (nr == 4 && !(data->has_fan_min & BIT(fan))) 2113 return 0; 2114 if (nr == 5 && data->kind != nct6775) 2115 return 0; 2116 2117 return nct6775_attr_mode(data, attr); 2118 } 2119 2120 SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0); 2121 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE); 2122 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep, 2123 nct6775_store_beep, FAN_ALARM_BASE); 2124 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0); 2125 SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0); 2126 SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0); 2127 2128 /* 2129 * nct6775_fan_is_visible uses the index into the following array 2130 * to determine if attributes should be created or not. 2131 * Any change in order or content must be matched. 2132 */ 2133 static struct sensor_device_template *nct6775_attributes_fan_template[] = { 2134 &sensor_dev_template_fan_input, 2135 &sensor_dev_template_fan_alarm, /* 1 */ 2136 &sensor_dev_template_fan_beep, /* 2 */ 2137 &sensor_dev_template_fan_pulses, 2138 &sensor_dev_template_fan_min, /* 4 */ 2139 &sensor_dev_template_fan_div, /* 5 */ 2140 NULL 2141 }; 2142 2143 static const struct sensor_template_group nct6775_fan_template_group = { 2144 .templates = nct6775_attributes_fan_template, 2145 .is_visible = nct6775_fan_is_visible, 2146 .base = 1, 2147 }; 2148 2149 static ssize_t 2150 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2151 { 2152 struct nct6775_data *data = nct6775_update_device(dev); 2153 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2154 int nr = sattr->index; 2155 2156 if (IS_ERR(data)) 2157 return PTR_ERR(data); 2158 2159 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]); 2160 } 2161 2162 static ssize_t 2163 show_temp(struct device *dev, struct device_attribute *attr, char *buf) 2164 { 2165 struct nct6775_data *data = nct6775_update_device(dev); 2166 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2167 int nr = sattr->nr; 2168 int index = sattr->index; 2169 2170 if (IS_ERR(data)) 2171 return PTR_ERR(data); 2172 2173 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr])); 2174 } 2175 2176 static ssize_t 2177 store_temp(struct device *dev, struct device_attribute *attr, const char *buf, 2178 size_t count) 2179 { 2180 struct nct6775_data *data = dev_get_drvdata(dev); 2181 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2182 int nr = sattr->nr; 2183 int index = sattr->index; 2184 int err; 2185 long val; 2186 2187 err = kstrtol(buf, 10, &val); 2188 if (err < 0) 2189 return err; 2190 2191 mutex_lock(&data->update_lock); 2192 data->temp[index][nr] = LM75_TEMP_TO_REG(val); 2193 err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]); 2194 mutex_unlock(&data->update_lock); 2195 return err ? : count; 2196 } 2197 2198 static ssize_t 2199 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf) 2200 { 2201 struct nct6775_data *data = nct6775_update_device(dev); 2202 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2203 2204 if (IS_ERR(data)) 2205 return PTR_ERR(data); 2206 2207 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000); 2208 } 2209 2210 static ssize_t 2211 store_temp_offset(struct device *dev, struct device_attribute *attr, 2212 const char *buf, size_t count) 2213 { 2214 struct nct6775_data *data = dev_get_drvdata(dev); 2215 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2216 int nr = sattr->index; 2217 long val; 2218 int err; 2219 2220 err = kstrtol(buf, 10, &val); 2221 if (err < 0) 2222 return err; 2223 2224 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127); 2225 2226 mutex_lock(&data->update_lock); 2227 data->temp_offset[nr] = val; 2228 err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val); 2229 mutex_unlock(&data->update_lock); 2230 2231 return err ? : count; 2232 } 2233 2234 static ssize_t 2235 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf) 2236 { 2237 struct nct6775_data *data = nct6775_update_device(dev); 2238 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2239 int nr = sattr->index; 2240 2241 if (IS_ERR(data)) 2242 return PTR_ERR(data); 2243 2244 return sprintf(buf, "%d\n", (int)data->temp_type[nr]); 2245 } 2246 2247 static ssize_t 2248 store_temp_type(struct device *dev, struct device_attribute *attr, 2249 const char *buf, size_t count) 2250 { 2251 struct nct6775_data *data = nct6775_update_device(dev); 2252 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2253 int nr = sattr->index; 2254 unsigned long val; 2255 int err; 2256 u8 vbit, dbit; 2257 u16 vbat, diode; 2258 2259 if (IS_ERR(data)) 2260 return PTR_ERR(data); 2261 2262 err = kstrtoul(buf, 10, &val); 2263 if (err < 0) 2264 return err; 2265 2266 if (val != 1 && val != 3 && val != 4) 2267 return -EINVAL; 2268 2269 mutex_lock(&data->update_lock); 2270 2271 data->temp_type[nr] = val; 2272 vbit = 0x02 << nr; 2273 dbit = data->DIODE_MASK << nr; 2274 2275 err = nct6775_read_value(data, data->REG_VBAT, &vbat); 2276 if (err) 2277 goto out; 2278 vbat &= ~vbit; 2279 2280 err = nct6775_read_value(data, data->REG_DIODE, &diode); 2281 if (err) 2282 goto out; 2283 diode &= ~dbit; 2284 2285 switch (val) { 2286 case 1: /* CPU diode (diode, current mode) */ 2287 vbat |= vbit; 2288 diode |= dbit; 2289 break; 2290 case 3: /* diode, voltage mode */ 2291 vbat |= dbit; 2292 break; 2293 case 4: /* thermistor */ 2294 break; 2295 } 2296 err = nct6775_write_value(data, data->REG_VBAT, vbat); 2297 if (err) 2298 goto out; 2299 err = nct6775_write_value(data, data->REG_DIODE, diode); 2300 out: 2301 mutex_unlock(&data->update_lock); 2302 return err ? : count; 2303 } 2304 2305 static umode_t nct6775_temp_is_visible(struct kobject *kobj, 2306 struct attribute *attr, int index) 2307 { 2308 struct device *dev = kobj_to_dev(kobj); 2309 struct nct6775_data *data = dev_get_drvdata(dev); 2310 int temp = index / 10; /* temp index */ 2311 int nr = index % 10; /* attribute index */ 2312 2313 if (!(data->have_temp & BIT(temp))) 2314 return 0; 2315 2316 if (nr == 1 && !data->temp_label) 2317 return 0; 2318 2319 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0) 2320 return 0; /* alarm */ 2321 2322 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0) 2323 return 0; /* beep */ 2324 2325 if (nr == 4 && !data->reg_temp[1][temp]) /* max */ 2326 return 0; 2327 2328 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */ 2329 return 0; 2330 2331 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */ 2332 return 0; 2333 2334 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */ 2335 return 0; 2336 2337 /* offset and type only apply to fixed sensors */ 2338 if (nr > 7 && !(data->have_temp_fixed & BIT(temp))) 2339 return 0; 2340 2341 return nct6775_attr_mode(data, attr); 2342 } 2343 2344 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0); 2345 SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0); 2346 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1); 2347 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2); 2348 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3); 2349 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4); 2350 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0); 2351 SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0); 2352 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0); 2353 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0); 2354 2355 /* 2356 * nct6775_temp_is_visible uses the index into the following array 2357 * to determine if attributes should be created or not. 2358 * Any change in order or content must be matched. 2359 */ 2360 static struct sensor_device_template *nct6775_attributes_temp_template[] = { 2361 &sensor_dev_template_temp_input, 2362 &sensor_dev_template_temp_label, 2363 &sensor_dev_template_temp_alarm, /* 2 */ 2364 &sensor_dev_template_temp_beep, /* 3 */ 2365 &sensor_dev_template_temp_max, /* 4 */ 2366 &sensor_dev_template_temp_max_hyst, /* 5 */ 2367 &sensor_dev_template_temp_crit, /* 6 */ 2368 &sensor_dev_template_temp_lcrit, /* 7 */ 2369 &sensor_dev_template_temp_offset, /* 8 */ 2370 &sensor_dev_template_temp_type, /* 9 */ 2371 NULL 2372 }; 2373 2374 static const struct sensor_template_group nct6775_temp_template_group = { 2375 .templates = nct6775_attributes_temp_template, 2376 .is_visible = nct6775_temp_is_visible, 2377 .base = 1, 2378 }; 2379 2380 static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf) 2381 { 2382 struct nct6775_data *data = nct6775_update_device(dev); 2383 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2384 2385 if (IS_ERR(data)) 2386 return PTR_ERR(data); 2387 2388 return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index])); 2389 } 2390 2391 static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2392 { 2393 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2394 2395 return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index); 2396 } 2397 2398 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0); 2399 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0); 2400 2401 static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr, 2402 int index) 2403 { 2404 struct device *dev = kobj_to_dev(kobj); 2405 struct nct6775_data *data = dev_get_drvdata(dev); 2406 int temp = index / 2; 2407 2408 return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0; 2409 } 2410 2411 /* 2412 * The index calculation in nct6775_tsi_temp_is_visible() must be kept in 2413 * sync with the size of this array. 2414 */ 2415 static struct sensor_device_template *nct6775_tsi_temp_template[] = { 2416 &sensor_dev_template_tsi_temp_input, 2417 &sensor_dev_template_tsi_temp_label, 2418 NULL 2419 }; 2420 2421 static ssize_t 2422 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf) 2423 { 2424 struct nct6775_data *data = nct6775_update_device(dev); 2425 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2426 2427 if (IS_ERR(data)) 2428 return PTR_ERR(data); 2429 2430 return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]); 2431 } 2432 2433 static ssize_t 2434 store_pwm_mode(struct device *dev, struct device_attribute *attr, 2435 const char *buf, size_t count) 2436 { 2437 struct nct6775_data *data = dev_get_drvdata(dev); 2438 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2439 int nr = sattr->index; 2440 unsigned long val; 2441 int err; 2442 u16 reg; 2443 2444 err = kstrtoul(buf, 10, &val); 2445 if (err < 0) 2446 return err; 2447 2448 if (val > 1) 2449 return -EINVAL; 2450 2451 /* Setting DC mode (0) is not supported for all chips/channels */ 2452 if (data->REG_PWM_MODE[nr] == 0) { 2453 if (!val) 2454 return -EINVAL; 2455 return count; 2456 } 2457 2458 mutex_lock(&data->update_lock); 2459 data->pwm_mode[nr] = val; 2460 err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®); 2461 if (err) 2462 goto out; 2463 reg &= ~data->PWM_MODE_MASK[nr]; 2464 if (!val) 2465 reg |= data->PWM_MODE_MASK[nr]; 2466 err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg); 2467 out: 2468 mutex_unlock(&data->update_lock); 2469 return err ? : count; 2470 } 2471 2472 static ssize_t 2473 show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 2474 { 2475 struct nct6775_data *data = nct6775_update_device(dev); 2476 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2477 int nr = sattr->nr; 2478 int index = sattr->index; 2479 int err; 2480 u16 pwm; 2481 2482 if (IS_ERR(data)) 2483 return PTR_ERR(data); 2484 2485 /* 2486 * For automatic fan control modes, show current pwm readings. 2487 * Otherwise, show the configured value. 2488 */ 2489 if (index == 0 && data->pwm_enable[nr] > manual) { 2490 err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm); 2491 if (err) 2492 return err; 2493 } else { 2494 pwm = data->pwm[index][nr]; 2495 } 2496 2497 return sprintf(buf, "%d\n", pwm); 2498 } 2499 2500 static ssize_t 2501 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf, 2502 size_t count) 2503 { 2504 struct nct6775_data *data = dev_get_drvdata(dev); 2505 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2506 int nr = sattr->nr; 2507 int index = sattr->index; 2508 unsigned long val; 2509 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 }; 2510 int maxval[7] 2511 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 }; 2512 int err; 2513 u16 reg; 2514 2515 err = kstrtoul(buf, 10, &val); 2516 if (err < 0) 2517 return err; 2518 val = clamp_val(val, minval[index], maxval[index]); 2519 2520 mutex_lock(&data->update_lock); 2521 data->pwm[index][nr] = val; 2522 err = nct6775_write_value(data, data->REG_PWM[index][nr], val); 2523 if (err) 2524 goto out; 2525 if (index == 2) { /* floor: disable if val == 0 */ 2526 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2527 if (err) 2528 goto out; 2529 reg &= 0x7f; 2530 if (val) 2531 reg |= 0x80; 2532 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2533 } 2534 out: 2535 mutex_unlock(&data->update_lock); 2536 return err ? : count; 2537 } 2538 2539 /* Returns 0 if OK, -EINVAL otherwise */ 2540 static int check_trip_points(struct nct6775_data *data, int nr) 2541 { 2542 int i; 2543 2544 for (i = 0; i < data->auto_pwm_num - 1; i++) { 2545 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) 2546 return -EINVAL; 2547 } 2548 for (i = 0; i < data->auto_pwm_num - 1; i++) { 2549 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) 2550 return -EINVAL; 2551 } 2552 /* validate critical temperature and pwm if enabled (pwm > 0) */ 2553 if (data->auto_pwm[nr][data->auto_pwm_num]) { 2554 if (data->auto_temp[nr][data->auto_pwm_num - 1] > 2555 data->auto_temp[nr][data->auto_pwm_num] || 2556 data->auto_pwm[nr][data->auto_pwm_num - 1] > 2557 data->auto_pwm[nr][data->auto_pwm_num]) 2558 return -EINVAL; 2559 } 2560 return 0; 2561 } 2562 2563 static int pwm_update_registers(struct nct6775_data *data, int nr) 2564 { 2565 u16 reg; 2566 int err; 2567 2568 switch (data->pwm_enable[nr]) { 2569 case off: 2570 case manual: 2571 break; 2572 case speed_cruise: 2573 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2574 if (err) 2575 return err; 2576 reg = (reg & ~data->tolerance_mask) | 2577 (data->target_speed_tolerance[nr] & data->tolerance_mask); 2578 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2579 if (err) 2580 return err; 2581 err = nct6775_write_value(data, data->REG_TARGET[nr], 2582 data->target_speed[nr] & 0xff); 2583 if (err) 2584 return err; 2585 if (data->REG_TOLERANCE_H) { 2586 reg = (data->target_speed[nr] >> 8) & 0x0f; 2587 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1; 2588 err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg); 2589 if (err) 2590 return err; 2591 } 2592 break; 2593 case thermal_cruise: 2594 err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]); 2595 if (err) 2596 return err; 2597 fallthrough; 2598 default: 2599 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2600 if (err) 2601 return err; 2602 reg = (reg & ~data->tolerance_mask) | 2603 data->temp_tolerance[0][nr]; 2604 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2605 if (err) 2606 return err; 2607 break; 2608 } 2609 2610 return 0; 2611 } 2612 2613 static ssize_t 2614 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 2615 { 2616 struct nct6775_data *data = nct6775_update_device(dev); 2617 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2618 2619 if (IS_ERR(data)) 2620 return PTR_ERR(data); 2621 2622 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]); 2623 } 2624 2625 static ssize_t 2626 store_pwm_enable(struct device *dev, struct device_attribute *attr, 2627 const char *buf, size_t count) 2628 { 2629 struct nct6775_data *data = dev_get_drvdata(dev); 2630 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2631 int nr = sattr->index; 2632 unsigned long val; 2633 int err; 2634 u16 reg; 2635 2636 err = kstrtoul(buf, 10, &val); 2637 if (err < 0) 2638 return err; 2639 2640 if (val > sf4) 2641 return -EINVAL; 2642 2643 if (val == sf3 && data->kind != nct6775) 2644 return -EINVAL; 2645 2646 if (val == sf4 && check_trip_points(data, nr)) { 2647 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n"); 2648 dev_err(dev, "Adjust trip points and try again\n"); 2649 return -EINVAL; 2650 } 2651 2652 mutex_lock(&data->update_lock); 2653 data->pwm_enable[nr] = val; 2654 if (val == off) { 2655 /* 2656 * turn off pwm control: select manual mode, set pwm to maximum 2657 */ 2658 data->pwm[0][nr] = 255; 2659 err = nct6775_write_value(data, data->REG_PWM[0][nr], 255); 2660 if (err) 2661 goto out; 2662 } 2663 err = pwm_update_registers(data, nr); 2664 if (err) 2665 goto out; 2666 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2667 if (err) 2668 goto out; 2669 reg &= 0x0f; 2670 reg |= pwm_enable_to_reg(val) << 4; 2671 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2672 out: 2673 mutex_unlock(&data->update_lock); 2674 return err ? : count; 2675 } 2676 2677 static ssize_t 2678 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src) 2679 { 2680 int i, sel = 0; 2681 2682 for (i = 0; i < NUM_TEMP; i++) { 2683 if (!(data->have_temp & BIT(i))) 2684 continue; 2685 if (src == data->temp_src[i]) { 2686 sel = i + 1; 2687 break; 2688 } 2689 } 2690 2691 return sprintf(buf, "%d\n", sel); 2692 } 2693 2694 static ssize_t 2695 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf) 2696 { 2697 struct nct6775_data *data = nct6775_update_device(dev); 2698 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2699 int index = sattr->index; 2700 2701 if (IS_ERR(data)) 2702 return PTR_ERR(data); 2703 2704 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]); 2705 } 2706 2707 static ssize_t 2708 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr, 2709 const char *buf, size_t count) 2710 { 2711 struct nct6775_data *data = nct6775_update_device(dev); 2712 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2713 int nr = sattr->index; 2714 unsigned long val; 2715 int err, src; 2716 u16 reg; 2717 2718 if (IS_ERR(data)) 2719 return PTR_ERR(data); 2720 2721 err = kstrtoul(buf, 10, &val); 2722 if (err < 0) 2723 return err; 2724 if (val == 0 || val > NUM_TEMP) 2725 return -EINVAL; 2726 if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1]) 2727 return -EINVAL; 2728 2729 mutex_lock(&data->update_lock); 2730 src = data->temp_src[val - 1]; 2731 data->pwm_temp_sel[nr] = src; 2732 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2733 if (err) 2734 goto out; 2735 reg &= 0xe0; 2736 reg |= src; 2737 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2738 out: 2739 mutex_unlock(&data->update_lock); 2740 2741 return err ? : count; 2742 } 2743 2744 static ssize_t 2745 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2746 char *buf) 2747 { 2748 struct nct6775_data *data = nct6775_update_device(dev); 2749 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2750 int index = sattr->index; 2751 2752 if (IS_ERR(data)) 2753 return PTR_ERR(data); 2754 2755 return show_pwm_temp_sel_common(data, buf, 2756 data->pwm_weight_temp_sel[index]); 2757 } 2758 2759 static ssize_t 2760 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2761 const char *buf, size_t count) 2762 { 2763 struct nct6775_data *data = nct6775_update_device(dev); 2764 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2765 int nr = sattr->index; 2766 unsigned long val; 2767 int err, src; 2768 u16 reg; 2769 2770 if (IS_ERR(data)) 2771 return PTR_ERR(data); 2772 2773 err = kstrtoul(buf, 10, &val); 2774 if (err < 0) 2775 return err; 2776 if (val > NUM_TEMP) 2777 return -EINVAL; 2778 val = array_index_nospec(val, NUM_TEMP + 1); 2779 if (val && (!(data->have_temp & BIT(val - 1)) || 2780 !data->temp_src[val - 1])) 2781 return -EINVAL; 2782 2783 mutex_lock(&data->update_lock); 2784 if (val) { 2785 src = data->temp_src[val - 1]; 2786 data->pwm_weight_temp_sel[nr] = src; 2787 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2788 if (err) 2789 goto out; 2790 reg &= 0xe0; 2791 reg |= (src | 0x80); 2792 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2793 } else { 2794 data->pwm_weight_temp_sel[nr] = 0; 2795 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2796 if (err) 2797 goto out; 2798 reg &= 0x7f; 2799 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2800 } 2801 out: 2802 mutex_unlock(&data->update_lock); 2803 2804 return err ? : count; 2805 } 2806 2807 static ssize_t 2808 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf) 2809 { 2810 struct nct6775_data *data = nct6775_update_device(dev); 2811 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2812 2813 if (IS_ERR(data)) 2814 return PTR_ERR(data); 2815 2816 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000); 2817 } 2818 2819 static ssize_t 2820 store_target_temp(struct device *dev, struct device_attribute *attr, 2821 const char *buf, size_t count) 2822 { 2823 struct nct6775_data *data = dev_get_drvdata(dev); 2824 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2825 int nr = sattr->index; 2826 unsigned long val; 2827 int err; 2828 2829 err = kstrtoul(buf, 10, &val); 2830 if (err < 0) 2831 return err; 2832 2833 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 2834 data->target_temp_mask); 2835 2836 mutex_lock(&data->update_lock); 2837 data->target_temp[nr] = val; 2838 err = pwm_update_registers(data, nr); 2839 mutex_unlock(&data->update_lock); 2840 return err ? : count; 2841 } 2842 2843 static ssize_t 2844 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf) 2845 { 2846 struct nct6775_data *data = nct6775_update_device(dev); 2847 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2848 int nr = sattr->index; 2849 2850 if (IS_ERR(data)) 2851 return PTR_ERR(data); 2852 2853 return sprintf(buf, "%d\n", 2854 fan_from_reg16(data->target_speed[nr], 2855 data->fan_div[nr])); 2856 } 2857 2858 static ssize_t 2859 store_target_speed(struct device *dev, struct device_attribute *attr, 2860 const char *buf, size_t count) 2861 { 2862 struct nct6775_data *data = dev_get_drvdata(dev); 2863 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2864 int nr = sattr->index; 2865 unsigned long val; 2866 int err; 2867 u16 speed; 2868 2869 err = kstrtoul(buf, 10, &val); 2870 if (err < 0) 2871 return err; 2872 2873 val = clamp_val(val, 0, 1350000U); 2874 speed = fan_to_reg(val, data->fan_div[nr]); 2875 2876 mutex_lock(&data->update_lock); 2877 data->target_speed[nr] = speed; 2878 err = pwm_update_registers(data, nr); 2879 mutex_unlock(&data->update_lock); 2880 return err ? : count; 2881 } 2882 2883 static ssize_t 2884 show_temp_tolerance(struct device *dev, struct device_attribute *attr, 2885 char *buf) 2886 { 2887 struct nct6775_data *data = nct6775_update_device(dev); 2888 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2889 int nr = sattr->nr; 2890 int index = sattr->index; 2891 2892 if (IS_ERR(data)) 2893 return PTR_ERR(data); 2894 2895 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000); 2896 } 2897 2898 static ssize_t 2899 store_temp_tolerance(struct device *dev, struct device_attribute *attr, 2900 const char *buf, size_t count) 2901 { 2902 struct nct6775_data *data = dev_get_drvdata(dev); 2903 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2904 int nr = sattr->nr; 2905 int index = sattr->index; 2906 unsigned long val; 2907 int err; 2908 2909 err = kstrtoul(buf, 10, &val); 2910 if (err < 0) 2911 return err; 2912 2913 /* Limit tolerance as needed */ 2914 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask); 2915 2916 mutex_lock(&data->update_lock); 2917 data->temp_tolerance[index][nr] = val; 2918 if (index) 2919 err = pwm_update_registers(data, nr); 2920 else 2921 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val); 2922 mutex_unlock(&data->update_lock); 2923 return err ? : count; 2924 } 2925 2926 /* 2927 * Fan speed tolerance is a tricky beast, since the associated register is 2928 * a tick counter, but the value is reported and configured as rpm. 2929 * Compute resulting low and high rpm values and report the difference. 2930 * A fan speed tolerance only makes sense if a fan target speed has been 2931 * configured, so only display values other than 0 if that is the case. 2932 */ 2933 static ssize_t 2934 show_speed_tolerance(struct device *dev, struct device_attribute *attr, 2935 char *buf) 2936 { 2937 struct nct6775_data *data = nct6775_update_device(dev); 2938 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2939 int nr = sattr->index; 2940 int target, tolerance = 0; 2941 2942 if (IS_ERR(data)) 2943 return PTR_ERR(data); 2944 2945 target = data->target_speed[nr]; 2946 2947 if (target) { 2948 int low = target - data->target_speed_tolerance[nr]; 2949 int high = target + data->target_speed_tolerance[nr]; 2950 2951 if (low <= 0) 2952 low = 1; 2953 if (high > 0xffff) 2954 high = 0xffff; 2955 if (high < low) 2956 high = low; 2957 2958 tolerance = (fan_from_reg16(low, data->fan_div[nr]) 2959 - fan_from_reg16(high, data->fan_div[nr])) / 2; 2960 } 2961 2962 return sprintf(buf, "%d\n", tolerance); 2963 } 2964 2965 static ssize_t 2966 store_speed_tolerance(struct device *dev, struct device_attribute *attr, 2967 const char *buf, size_t count) 2968 { 2969 struct nct6775_data *data = dev_get_drvdata(dev); 2970 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2971 int nr = sattr->index; 2972 unsigned long val; 2973 int err; 2974 int low, high; 2975 2976 err = kstrtoul(buf, 10, &val); 2977 if (err < 0) 2978 return err; 2979 2980 high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val; 2981 low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val; 2982 if (low <= 0) 2983 low = 1; 2984 if (high < low) 2985 high = low; 2986 2987 val = (fan_to_reg(low, data->fan_div[nr]) - 2988 fan_to_reg(high, data->fan_div[nr])) / 2; 2989 2990 /* Limit tolerance as needed */ 2991 val = clamp_val(val, 0, data->speed_tolerance_limit); 2992 2993 mutex_lock(&data->update_lock); 2994 data->target_speed_tolerance[nr] = val; 2995 err = pwm_update_registers(data, nr); 2996 mutex_unlock(&data->update_lock); 2997 return err ? : count; 2998 } 2999 3000 SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0); 3001 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0); 3002 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0); 3003 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0); 3004 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0); 3005 SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0); 3006 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance, 3007 store_speed_tolerance, 0); 3008 3009 /* Smart Fan registers */ 3010 3011 static ssize_t 3012 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf) 3013 { 3014 struct nct6775_data *data = nct6775_update_device(dev); 3015 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3016 int nr = sattr->nr; 3017 int index = sattr->index; 3018 3019 if (IS_ERR(data)) 3020 return PTR_ERR(data); 3021 3022 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000); 3023 } 3024 3025 static ssize_t 3026 store_weight_temp(struct device *dev, struct device_attribute *attr, 3027 const char *buf, size_t count) 3028 { 3029 struct nct6775_data *data = dev_get_drvdata(dev); 3030 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3031 int nr = sattr->nr; 3032 int index = sattr->index; 3033 unsigned long val; 3034 int err; 3035 3036 err = kstrtoul(buf, 10, &val); 3037 if (err < 0) 3038 return err; 3039 3040 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255); 3041 3042 mutex_lock(&data->update_lock); 3043 data->weight_temp[index][nr] = val; 3044 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val); 3045 mutex_unlock(&data->update_lock); 3046 return err ? : count; 3047 } 3048 3049 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644, 3050 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0); 3051 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step", 3052 0644, show_weight_temp, store_weight_temp, 0, 0); 3053 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol", 3054 0644, show_weight_temp, store_weight_temp, 0, 1); 3055 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base", 3056 0644, show_weight_temp, store_weight_temp, 0, 2); 3057 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5); 3058 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6); 3059 3060 static ssize_t 3061 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf) 3062 { 3063 struct nct6775_data *data = nct6775_update_device(dev); 3064 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3065 int nr = sattr->nr; 3066 int index = sattr->index; 3067 3068 if (IS_ERR(data)) 3069 return PTR_ERR(data); 3070 3071 return sprintf(buf, "%d\n", 3072 step_time_from_reg(data->fan_time[index][nr], 3073 data->pwm_mode[nr])); 3074 } 3075 3076 static ssize_t 3077 store_fan_time(struct device *dev, struct device_attribute *attr, 3078 const char *buf, size_t count) 3079 { 3080 struct nct6775_data *data = dev_get_drvdata(dev); 3081 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3082 int nr = sattr->nr; 3083 int index = sattr->index; 3084 unsigned long val; 3085 int err; 3086 3087 err = kstrtoul(buf, 10, &val); 3088 if (err < 0) 3089 return err; 3090 3091 val = step_time_to_reg(val, data->pwm_mode[nr]); 3092 mutex_lock(&data->update_lock); 3093 data->fan_time[index][nr] = val; 3094 err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val); 3095 mutex_unlock(&data->update_lock); 3096 return err ? : count; 3097 } 3098 3099 static ssize_t 3100 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf) 3101 { 3102 struct nct6775_data *data = nct6775_update_device(dev); 3103 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3104 3105 if (IS_ERR(data)) 3106 return PTR_ERR(data); 3107 3108 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]); 3109 } 3110 3111 static ssize_t 3112 store_auto_pwm(struct device *dev, struct device_attribute *attr, 3113 const char *buf, size_t count) 3114 { 3115 struct nct6775_data *data = dev_get_drvdata(dev); 3116 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3117 int nr = sattr->nr; 3118 int point = sattr->index; 3119 unsigned long val; 3120 int err; 3121 u16 reg; 3122 3123 err = kstrtoul(buf, 10, &val); 3124 if (err < 0) 3125 return err; 3126 if (val > 255) 3127 return -EINVAL; 3128 3129 if (point == data->auto_pwm_num) { 3130 if (data->kind != nct6775 && !val) 3131 return -EINVAL; 3132 if (data->kind != nct6779 && val) 3133 val = 0xff; 3134 } 3135 3136 mutex_lock(&data->update_lock); 3137 data->auto_pwm[nr][point] = val; 3138 if (point < data->auto_pwm_num) { 3139 err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point), 3140 data->auto_pwm[nr][point]); 3141 } else { 3142 switch (data->kind) { 3143 case nct6775: 3144 /* disable if needed (pwm == 0) */ 3145 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®); 3146 if (err) 3147 break; 3148 if (val) 3149 reg |= 0x02; 3150 else 3151 reg &= ~0x02; 3152 err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg); 3153 break; 3154 case nct6776: 3155 break; /* always enabled, nothing to do */ 3156 case nct6106: 3157 case nct6116: 3158 case nct6779: 3159 case nct6791: 3160 case nct6792: 3161 case nct6793: 3162 case nct6795: 3163 case nct6796: 3164 case nct6797: 3165 case nct6798: 3166 case nct6799: 3167 err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val); 3168 if (err) 3169 break; 3170 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®); 3171 if (err) 3172 break; 3173 if (val == 255) 3174 reg &= ~data->CRITICAL_PWM_ENABLE_MASK; 3175 else 3176 reg |= data->CRITICAL_PWM_ENABLE_MASK; 3177 err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg); 3178 break; 3179 } 3180 } 3181 mutex_unlock(&data->update_lock); 3182 return err ? : count; 3183 } 3184 3185 static ssize_t 3186 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf) 3187 { 3188 struct nct6775_data *data = nct6775_update_device(dev); 3189 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3190 int nr = sattr->nr; 3191 int point = sattr->index; 3192 3193 if (IS_ERR(data)) 3194 return PTR_ERR(data); 3195 3196 /* 3197 * We don't know for sure if the temperature is signed or unsigned. 3198 * Assume it is unsigned. 3199 */ 3200 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000); 3201 } 3202 3203 static ssize_t 3204 store_auto_temp(struct device *dev, struct device_attribute *attr, 3205 const char *buf, size_t count) 3206 { 3207 struct nct6775_data *data = dev_get_drvdata(dev); 3208 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3209 int nr = sattr->nr; 3210 int point = sattr->index; 3211 unsigned long val; 3212 int err; 3213 3214 err = kstrtoul(buf, 10, &val); 3215 if (err) 3216 return err; 3217 if (val > 255000) 3218 return -EINVAL; 3219 3220 mutex_lock(&data->update_lock); 3221 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000); 3222 if (point < data->auto_pwm_num) { 3223 err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point), 3224 data->auto_temp[nr][point]); 3225 } else { 3226 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr], 3227 data->auto_temp[nr][point]); 3228 } 3229 mutex_unlock(&data->update_lock); 3230 return err ? : count; 3231 } 3232 3233 static umode_t nct6775_pwm_is_visible(struct kobject *kobj, 3234 struct attribute *attr, int index) 3235 { 3236 struct device *dev = kobj_to_dev(kobj); 3237 struct nct6775_data *data = dev_get_drvdata(dev); 3238 int pwm = index / 36; /* pwm index */ 3239 int nr = index % 36; /* attribute index */ 3240 3241 if (!(data->has_pwm & BIT(pwm))) 3242 return 0; 3243 3244 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */ 3245 if (!data->REG_WEIGHT_TEMP_SEL[pwm]) 3246 return 0; 3247 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */ 3248 return 0; 3249 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */ 3250 return 0; 3251 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */ 3252 return 0; 3253 3254 if (nr >= 22 && nr <= 35) { /* auto point */ 3255 int api = (nr - 22) / 2; /* auto point index */ 3256 3257 if (api > data->auto_pwm_num) 3258 return 0; 3259 } 3260 return nct6775_attr_mode(data, attr); 3261 } 3262 3263 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0); 3264 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644, 3265 show_fan_time, store_fan_time, 0, 1); 3266 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644, 3267 show_fan_time, store_fan_time, 0, 2); 3268 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1); 3269 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2); 3270 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644, 3271 show_temp_tolerance, store_temp_tolerance, 0, 0); 3272 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance", 3273 0644, show_temp_tolerance, store_temp_tolerance, 0, 1); 3274 3275 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3); 3276 3277 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4); 3278 3279 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm", 3280 0644, show_auto_pwm, store_auto_pwm, 0, 0); 3281 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp", 3282 0644, show_auto_temp, store_auto_temp, 0, 0); 3283 3284 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm", 3285 0644, show_auto_pwm, store_auto_pwm, 0, 1); 3286 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp", 3287 0644, show_auto_temp, store_auto_temp, 0, 1); 3288 3289 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm", 3290 0644, show_auto_pwm, store_auto_pwm, 0, 2); 3291 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp", 3292 0644, show_auto_temp, store_auto_temp, 0, 2); 3293 3294 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm", 3295 0644, show_auto_pwm, store_auto_pwm, 0, 3); 3296 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp", 3297 0644, show_auto_temp, store_auto_temp, 0, 3); 3298 3299 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm", 3300 0644, show_auto_pwm, store_auto_pwm, 0, 4); 3301 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp", 3302 0644, show_auto_temp, store_auto_temp, 0, 4); 3303 3304 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm", 3305 0644, show_auto_pwm, store_auto_pwm, 0, 5); 3306 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp", 3307 0644, show_auto_temp, store_auto_temp, 0, 5); 3308 3309 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm", 3310 0644, show_auto_pwm, store_auto_pwm, 0, 6); 3311 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp", 3312 0644, show_auto_temp, store_auto_temp, 0, 6); 3313 3314 /* 3315 * nct6775_pwm_is_visible uses the index into the following array 3316 * to determine if attributes should be created or not. 3317 * Any change in order or content must be matched. 3318 */ 3319 static struct sensor_device_template *nct6775_attributes_pwm_template[] = { 3320 &sensor_dev_template_pwm, 3321 &sensor_dev_template_pwm_mode, 3322 &sensor_dev_template_pwm_enable, 3323 &sensor_dev_template_pwm_temp_sel, 3324 &sensor_dev_template_pwm_temp_tolerance, 3325 &sensor_dev_template_pwm_crit_temp_tolerance, 3326 &sensor_dev_template_pwm_target_temp, 3327 &sensor_dev_template_fan_target, 3328 &sensor_dev_template_fan_tolerance, 3329 &sensor_dev_template_pwm_stop_time, 3330 &sensor_dev_template_pwm_step_up_time, 3331 &sensor_dev_template_pwm_step_down_time, 3332 &sensor_dev_template_pwm_start, 3333 &sensor_dev_template_pwm_floor, 3334 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */ 3335 &sensor_dev_template_pwm_weight_temp_step, 3336 &sensor_dev_template_pwm_weight_temp_step_tol, 3337 &sensor_dev_template_pwm_weight_temp_step_base, 3338 &sensor_dev_template_pwm_weight_duty_step, /* 18 */ 3339 &sensor_dev_template_pwm_max, /* 19 */ 3340 &sensor_dev_template_pwm_step, /* 20 */ 3341 &sensor_dev_template_pwm_weight_duty_base, /* 21 */ 3342 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */ 3343 &sensor_dev_template_pwm_auto_point1_temp, 3344 &sensor_dev_template_pwm_auto_point2_pwm, 3345 &sensor_dev_template_pwm_auto_point2_temp, 3346 &sensor_dev_template_pwm_auto_point3_pwm, 3347 &sensor_dev_template_pwm_auto_point3_temp, 3348 &sensor_dev_template_pwm_auto_point4_pwm, 3349 &sensor_dev_template_pwm_auto_point4_temp, 3350 &sensor_dev_template_pwm_auto_point5_pwm, 3351 &sensor_dev_template_pwm_auto_point5_temp, 3352 &sensor_dev_template_pwm_auto_point6_pwm, 3353 &sensor_dev_template_pwm_auto_point6_temp, 3354 &sensor_dev_template_pwm_auto_point7_pwm, 3355 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */ 3356 3357 NULL 3358 }; 3359 3360 static const struct sensor_template_group nct6775_pwm_template_group = { 3361 .templates = nct6775_attributes_pwm_template, 3362 .is_visible = nct6775_pwm_is_visible, 3363 .base = 1, 3364 }; 3365 3366 static inline int nct6775_init_device(struct nct6775_data *data) 3367 { 3368 int i, err; 3369 u16 tmp, diode; 3370 3371 /* Start monitoring if needed */ 3372 if (data->REG_CONFIG) { 3373 err = nct6775_read_value(data, data->REG_CONFIG, &tmp); 3374 if (err) 3375 return err; 3376 if (!(tmp & 0x01)) { 3377 err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01); 3378 if (err) 3379 return err; 3380 } 3381 } 3382 3383 /* Enable temperature sensors if needed */ 3384 for (i = 0; i < NUM_TEMP; i++) { 3385 if (!(data->have_temp & BIT(i))) 3386 continue; 3387 if (!data->reg_temp_config[i]) 3388 continue; 3389 err = nct6775_read_value(data, data->reg_temp_config[i], &tmp); 3390 if (err) 3391 return err; 3392 if (tmp & 0x01) { 3393 err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe); 3394 if (err) 3395 return err; 3396 } 3397 } 3398 3399 /* Enable VBAT monitoring if needed */ 3400 err = nct6775_read_value(data, data->REG_VBAT, &tmp); 3401 if (err) 3402 return err; 3403 if (!(tmp & 0x01)) { 3404 err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01); 3405 if (err) 3406 return err; 3407 } 3408 3409 err = nct6775_read_value(data, data->REG_DIODE, &diode); 3410 if (err) 3411 return err; 3412 3413 for (i = 0; i < data->temp_fixed_num; i++) { 3414 if (!(data->have_temp_fixed & BIT(i))) 3415 continue; 3416 if ((tmp & (data->DIODE_MASK << i))) /* diode */ 3417 data->temp_type[i] 3418 = 3 - ((diode >> i) & data->DIODE_MASK); 3419 else /* thermistor */ 3420 data->temp_type[i] = 4; 3421 } 3422 3423 return 0; 3424 } 3425 3426 static int add_temp_sensors(struct nct6775_data *data, const u16 *regp, 3427 int *available, int *mask) 3428 { 3429 int i, err; 3430 u16 src; 3431 3432 for (i = 0; i < data->pwm_num && *available; i++) { 3433 int index; 3434 3435 if (!regp[i]) 3436 continue; 3437 err = nct6775_read_value(data, regp[i], &src); 3438 if (err) 3439 return err; 3440 src &= 0x1f; 3441 if (!src || (*mask & BIT(src))) 3442 continue; 3443 if (!(data->temp_mask & BIT(src))) 3444 continue; 3445 3446 index = __ffs(*available); 3447 err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src); 3448 if (err) 3449 return err; 3450 *available &= ~BIT(index); 3451 *mask |= BIT(src); 3452 } 3453 3454 return 0; 3455 } 3456 3457 int nct6775_probe(struct device *dev, struct nct6775_data *data, 3458 const struct regmap_config *regmapcfg) 3459 { 3460 int i, s, err = 0; 3461 int mask, available; 3462 u16 src; 3463 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config; 3464 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit; 3465 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL; 3466 int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp; 3467 struct device *hwmon_dev; 3468 struct sensor_template_group tsi_temp_tg; 3469 3470 data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg); 3471 if (IS_ERR(data->regmap)) 3472 return PTR_ERR(data->regmap); 3473 3474 mutex_init(&data->update_lock); 3475 data->name = nct6775_device_names[data->kind]; 3476 data->bank = 0xff; /* Force initial bank selection */ 3477 data->scale_in = scale_in; 3478 3479 switch (data->kind) { 3480 case nct6106: 3481 data->in_num = 9; 3482 data->pwm_num = 3; 3483 data->auto_pwm_num = 4; 3484 data->temp_fixed_num = 3; 3485 data->num_temp_alarms = 6; 3486 data->num_temp_beeps = 6; 3487 3488 data->fan_from_reg = fan_from_reg13; 3489 data->fan_from_reg_min = fan_from_reg13; 3490 3491 data->temp_label = nct6776_temp_label; 3492 data->temp_mask = NCT6776_TEMP_MASK; 3493 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3494 3495 data->REG_VBAT = NCT6106_REG_VBAT; 3496 data->REG_DIODE = NCT6106_REG_DIODE; 3497 data->DIODE_MASK = NCT6106_DIODE_MASK; 3498 data->REG_VIN = NCT6106_REG_IN; 3499 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3500 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3501 data->REG_TARGET = NCT6106_REG_TARGET; 3502 data->REG_FAN = NCT6106_REG_FAN; 3503 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE; 3504 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN; 3505 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES; 3506 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT; 3507 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME; 3508 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME; 3509 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME; 3510 data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H; 3511 data->REG_PWM[0] = NCT6116_REG_PWM; 3512 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT; 3513 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT; 3514 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3515 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3516 data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3517 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3518 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3519 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP; 3520 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM; 3521 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP; 3522 data->REG_CRITICAL_TEMP_TOLERANCE 3523 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE; 3524 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE; 3525 data->CRITICAL_PWM_ENABLE_MASK 3526 = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3527 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM; 3528 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3529 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE; 3530 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3531 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3532 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3533 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3534 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3535 data->REG_ALARM = NCT6106_REG_ALARM; 3536 data->ALARM_BITS = NCT6106_ALARM_BITS; 3537 data->REG_BEEP = NCT6106_REG_BEEP; 3538 data->BEEP_BITS = NCT6106_BEEP_BITS; 3539 data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP; 3540 3541 reg_temp = NCT6106_REG_TEMP; 3542 reg_temp_mon = NCT6106_REG_TEMP_MON; 3543 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3544 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3545 num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP); 3546 reg_temp_over = NCT6106_REG_TEMP_OVER; 3547 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3548 reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3549 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3550 reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3551 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3552 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3553 3554 break; 3555 case nct6116: 3556 data->in_num = 9; 3557 data->pwm_num = 3; 3558 data->auto_pwm_num = 4; 3559 data->temp_fixed_num = 3; 3560 data->num_temp_alarms = 3; 3561 data->num_temp_beeps = 3; 3562 3563 data->fan_from_reg = fan_from_reg13; 3564 data->fan_from_reg_min = fan_from_reg13; 3565 3566 data->temp_label = nct6776_temp_label; 3567 data->temp_mask = NCT6776_TEMP_MASK; 3568 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3569 3570 data->REG_VBAT = NCT6106_REG_VBAT; 3571 data->REG_DIODE = NCT6106_REG_DIODE; 3572 data->DIODE_MASK = NCT6106_DIODE_MASK; 3573 data->REG_VIN = NCT6106_REG_IN; 3574 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3575 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3576 data->REG_TARGET = NCT6116_REG_TARGET; 3577 data->REG_FAN = NCT6116_REG_FAN; 3578 data->REG_FAN_MODE = NCT6116_REG_FAN_MODE; 3579 data->REG_FAN_MIN = NCT6116_REG_FAN_MIN; 3580 data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES; 3581 data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT; 3582 data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME; 3583 data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME; 3584 data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME; 3585 data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H; 3586 data->REG_PWM[0] = NCT6116_REG_PWM; 3587 data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT; 3588 data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT; 3589 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3590 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3591 data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3592 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3593 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3594 data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP; 3595 data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM; 3596 data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP; 3597 data->REG_CRITICAL_TEMP_TOLERANCE 3598 = NCT6116_REG_CRITICAL_TEMP_TOLERANCE; 3599 data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE; 3600 data->CRITICAL_PWM_ENABLE_MASK 3601 = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3602 data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM; 3603 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3604 data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE; 3605 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3606 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3607 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3608 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3609 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3610 data->REG_ALARM = NCT6106_REG_ALARM; 3611 data->ALARM_BITS = NCT6116_ALARM_BITS; 3612 data->REG_BEEP = NCT6106_REG_BEEP; 3613 data->BEEP_BITS = NCT6116_BEEP_BITS; 3614 data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP; 3615 3616 reg_temp = NCT6106_REG_TEMP; 3617 reg_temp_mon = NCT6106_REG_TEMP_MON; 3618 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3619 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3620 num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP); 3621 reg_temp_over = NCT6106_REG_TEMP_OVER; 3622 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3623 reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3624 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3625 reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3626 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3627 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3628 3629 break; 3630 case nct6775: 3631 data->in_num = 9; 3632 data->pwm_num = 3; 3633 data->auto_pwm_num = 6; 3634 data->has_fan_div = true; 3635 data->temp_fixed_num = 3; 3636 data->num_temp_alarms = 3; 3637 data->num_temp_beeps = 3; 3638 3639 data->ALARM_BITS = NCT6775_ALARM_BITS; 3640 data->BEEP_BITS = NCT6775_BEEP_BITS; 3641 3642 data->fan_from_reg = fan_from_reg16; 3643 data->fan_from_reg_min = fan_from_reg8; 3644 data->target_temp_mask = 0x7f; 3645 data->tolerance_mask = 0x0f; 3646 data->speed_tolerance_limit = 15; 3647 3648 data->temp_label = nct6775_temp_label; 3649 data->temp_mask = NCT6775_TEMP_MASK; 3650 data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK; 3651 3652 data->REG_CONFIG = NCT6775_REG_CONFIG; 3653 data->REG_VBAT = NCT6775_REG_VBAT; 3654 data->REG_DIODE = NCT6775_REG_DIODE; 3655 data->DIODE_MASK = NCT6775_DIODE_MASK; 3656 data->REG_VIN = NCT6775_REG_IN; 3657 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3658 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3659 data->REG_TARGET = NCT6775_REG_TARGET; 3660 data->REG_FAN = NCT6775_REG_FAN; 3661 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3662 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN; 3663 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES; 3664 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3665 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3666 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; 3667 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; 3668 data->REG_PWM[0] = NCT6775_REG_PWM; 3669 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3670 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3671 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT; 3672 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT; 3673 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3674 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3675 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE; 3676 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK; 3677 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3678 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3679 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3680 data->REG_CRITICAL_TEMP_TOLERANCE 3681 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3682 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3683 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3684 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3685 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3686 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3687 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3688 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3689 data->REG_ALARM = NCT6775_REG_ALARM; 3690 data->REG_BEEP = NCT6775_REG_BEEP; 3691 data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP; 3692 3693 reg_temp = NCT6775_REG_TEMP; 3694 reg_temp_mon = NCT6775_REG_TEMP_MON; 3695 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3696 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3697 num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP); 3698 reg_temp_over = NCT6775_REG_TEMP_OVER; 3699 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3700 reg_temp_config = NCT6775_REG_TEMP_CONFIG; 3701 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE; 3702 reg_temp_crit = NCT6775_REG_TEMP_CRIT; 3703 3704 break; 3705 case nct6776: 3706 data->in_num = 9; 3707 data->pwm_num = 3; 3708 data->auto_pwm_num = 4; 3709 data->has_fan_div = false; 3710 data->temp_fixed_num = 3; 3711 data->num_temp_alarms = 3; 3712 data->num_temp_beeps = 6; 3713 3714 data->ALARM_BITS = NCT6776_ALARM_BITS; 3715 data->BEEP_BITS = NCT6776_BEEP_BITS; 3716 3717 data->fan_from_reg = fan_from_reg13; 3718 data->fan_from_reg_min = fan_from_reg13; 3719 data->target_temp_mask = 0xff; 3720 data->tolerance_mask = 0x07; 3721 data->speed_tolerance_limit = 63; 3722 3723 data->temp_label = nct6776_temp_label; 3724 data->temp_mask = NCT6776_TEMP_MASK; 3725 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3726 3727 data->REG_CONFIG = NCT6775_REG_CONFIG; 3728 data->REG_VBAT = NCT6775_REG_VBAT; 3729 data->REG_DIODE = NCT6775_REG_DIODE; 3730 data->DIODE_MASK = NCT6775_DIODE_MASK; 3731 data->REG_VIN = NCT6775_REG_IN; 3732 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3733 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3734 data->REG_TARGET = NCT6775_REG_TARGET; 3735 data->REG_FAN = NCT6775_REG_FAN; 3736 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3737 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3738 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES; 3739 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3740 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3741 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3742 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3743 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3744 data->REG_PWM[0] = NCT6775_REG_PWM; 3745 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3746 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3747 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3748 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3749 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3750 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3751 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3752 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3753 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3754 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3755 data->REG_CRITICAL_TEMP_TOLERANCE 3756 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3757 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3758 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3759 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3760 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3761 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3762 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3763 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3764 data->REG_ALARM = NCT6775_REG_ALARM; 3765 data->REG_BEEP = NCT6776_REG_BEEP; 3766 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3767 3768 reg_temp = NCT6775_REG_TEMP; 3769 reg_temp_mon = NCT6775_REG_TEMP_MON; 3770 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3771 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3772 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3773 reg_temp_over = NCT6775_REG_TEMP_OVER; 3774 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3775 reg_temp_config = NCT6776_REG_TEMP_CONFIG; 3776 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE; 3777 reg_temp_crit = NCT6776_REG_TEMP_CRIT; 3778 3779 break; 3780 case nct6779: 3781 data->in_num = 15; 3782 data->pwm_num = 5; 3783 data->auto_pwm_num = 4; 3784 data->has_fan_div = false; 3785 data->temp_fixed_num = 6; 3786 data->num_temp_alarms = 2; 3787 data->num_temp_beeps = 2; 3788 3789 data->ALARM_BITS = NCT6779_ALARM_BITS; 3790 data->BEEP_BITS = NCT6779_BEEP_BITS; 3791 3792 data->fan_from_reg = fan_from_reg_rpm; 3793 data->fan_from_reg_min = fan_from_reg13; 3794 data->target_temp_mask = 0xff; 3795 data->tolerance_mask = 0x07; 3796 data->speed_tolerance_limit = 63; 3797 3798 data->temp_label = nct6779_temp_label; 3799 data->temp_mask = NCT6779_TEMP_MASK; 3800 data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK; 3801 3802 data->REG_CONFIG = NCT6775_REG_CONFIG; 3803 data->REG_VBAT = NCT6775_REG_VBAT; 3804 data->REG_DIODE = NCT6775_REG_DIODE; 3805 data->DIODE_MASK = NCT6775_DIODE_MASK; 3806 data->REG_VIN = NCT6779_REG_IN; 3807 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3808 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3809 data->REG_TARGET = NCT6775_REG_TARGET; 3810 data->REG_FAN = NCT6779_REG_FAN; 3811 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3812 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3813 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3814 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3815 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3816 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3817 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3818 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3819 data->REG_PWM[0] = NCT6775_REG_PWM; 3820 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3821 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3822 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3823 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3824 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3825 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3826 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3827 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3828 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3829 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3830 data->REG_CRITICAL_TEMP_TOLERANCE 3831 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3832 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3833 data->CRITICAL_PWM_ENABLE_MASK 3834 = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3835 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 3836 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 3837 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3838 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3839 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3840 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3841 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3842 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3843 data->REG_ALARM = NCT6779_REG_ALARM; 3844 data->REG_BEEP = NCT6776_REG_BEEP; 3845 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3846 3847 reg_temp = NCT6779_REG_TEMP; 3848 reg_temp_mon = NCT6779_REG_TEMP_MON; 3849 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3850 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 3851 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3852 reg_temp_over = NCT6779_REG_TEMP_OVER; 3853 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3854 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 3855 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 3856 reg_temp_crit = NCT6779_REG_TEMP_CRIT; 3857 3858 break; 3859 case nct6791: 3860 case nct6792: 3861 case nct6793: 3862 case nct6795: 3863 case nct6796: 3864 case nct6797: 3865 case nct6798: 3866 case nct6799: 3867 data->in_num = 15; 3868 data->pwm_num = (data->kind == nct6796 || 3869 data->kind == nct6797 || 3870 data->kind == nct6798 || 3871 data->kind == nct6799) ? 7 : 6; 3872 data->auto_pwm_num = 4; 3873 data->has_fan_div = false; 3874 data->temp_fixed_num = 6; 3875 data->num_temp_alarms = 2; 3876 data->num_temp_beeps = 2; 3877 3878 data->ALARM_BITS = NCT6791_ALARM_BITS; 3879 data->BEEP_BITS = NCT6779_BEEP_BITS; 3880 3881 data->fan_from_reg = fan_from_reg_rpm; 3882 data->fan_from_reg_min = fan_from_reg13; 3883 data->target_temp_mask = 0xff; 3884 data->tolerance_mask = 0x07; 3885 data->speed_tolerance_limit = 63; 3886 3887 switch (data->kind) { 3888 default: 3889 case nct6791: 3890 data->temp_label = nct6779_temp_label; 3891 data->temp_mask = NCT6791_TEMP_MASK; 3892 data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK; 3893 break; 3894 case nct6792: 3895 data->temp_label = nct6792_temp_label; 3896 data->temp_mask = NCT6792_TEMP_MASK; 3897 data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK; 3898 break; 3899 case nct6793: 3900 data->temp_label = nct6793_temp_label; 3901 data->temp_mask = NCT6793_TEMP_MASK; 3902 data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK; 3903 break; 3904 case nct6795: 3905 case nct6797: 3906 data->temp_label = nct6795_temp_label; 3907 data->temp_mask = NCT6795_TEMP_MASK; 3908 data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK; 3909 break; 3910 case nct6796: 3911 data->temp_label = nct6796_temp_label; 3912 data->temp_mask = NCT6796_TEMP_MASK; 3913 data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK; 3914 break; 3915 case nct6798: 3916 data->temp_label = nct6798_temp_label; 3917 data->temp_mask = NCT6798_TEMP_MASK; 3918 data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK; 3919 break; 3920 case nct6799: 3921 data->temp_label = nct6799_temp_label; 3922 data->temp_mask = NCT6799_TEMP_MASK; 3923 data->virt_temp_mask = NCT6799_VIRT_TEMP_MASK; 3924 break; 3925 } 3926 3927 data->REG_CONFIG = NCT6775_REG_CONFIG; 3928 data->REG_VBAT = NCT6775_REG_VBAT; 3929 data->REG_DIODE = NCT6775_REG_DIODE; 3930 data->DIODE_MASK = NCT6775_DIODE_MASK; 3931 data->REG_VIN = NCT6779_REG_IN; 3932 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3933 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3934 data->REG_TARGET = NCT6775_REG_TARGET; 3935 data->REG_FAN = NCT6779_REG_FAN; 3936 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3937 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3938 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3939 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3940 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3941 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3942 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3943 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3944 data->REG_PWM[0] = NCT6775_REG_PWM; 3945 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3946 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3947 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP; 3948 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE; 3949 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3950 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3951 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3952 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3953 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3954 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3955 data->REG_CRITICAL_TEMP_TOLERANCE 3956 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3957 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3958 data->CRITICAL_PWM_ENABLE_MASK 3959 = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3960 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 3961 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 3962 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3963 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3964 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL; 3965 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; 3966 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL; 3967 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE; 3968 data->REG_ALARM = NCT6791_REG_ALARM; 3969 if (data->kind == nct6791) 3970 data->REG_BEEP = NCT6776_REG_BEEP; 3971 else 3972 data->REG_BEEP = NCT6792_REG_BEEP; 3973 switch (data->kind) { 3974 case nct6791: 3975 case nct6792: 3976 case nct6793: 3977 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3978 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3979 break; 3980 case nct6795: 3981 case nct6796: 3982 case nct6797: 3983 case nct6798: 3984 case nct6799: 3985 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; 3986 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); 3987 break; 3988 default: 3989 num_reg_tsi_temp = 0; 3990 break; 3991 } 3992 3993 if (data->kind == nct6798 || data->kind == nct6799) 3994 data->scale_in = scale_in_6798; 3995 3996 reg_temp = NCT6779_REG_TEMP; 3997 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3998 if (data->kind == nct6791) { 3999 reg_temp_mon = NCT6779_REG_TEMP_MON; 4000 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 4001 } else { 4002 reg_temp_mon = NCT6792_REG_TEMP_MON; 4003 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON); 4004 } 4005 reg_temp_over = NCT6779_REG_TEMP_OVER; 4006 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 4007 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 4008 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 4009 reg_temp_crit = NCT6779_REG_TEMP_CRIT; 4010 4011 break; 4012 default: 4013 return -ENODEV; 4014 } 4015 data->have_in = BIT(data->in_num) - 1; 4016 data->have_temp = 0; 4017 4018 /* 4019 * On some boards, not all available temperature sources are monitored, 4020 * even though some of the monitoring registers are unused. 4021 * Get list of unused monitoring registers, then detect if any fan 4022 * controls are configured to use unmonitored temperature sources. 4023 * If so, assign the unmonitored temperature sources to available 4024 * monitoring registers. 4025 */ 4026 mask = 0; 4027 available = 0; 4028 for (i = 0; i < num_reg_temp; i++) { 4029 if (reg_temp[i] == 0) 4030 continue; 4031 4032 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 4033 if (err) 4034 return err; 4035 src &= 0x1f; 4036 if (!src || (mask & BIT(src))) 4037 available |= BIT(i); 4038 4039 mask |= BIT(src); 4040 } 4041 4042 /* 4043 * Now find unmonitored temperature registers and enable monitoring 4044 * if additional monitoring registers are available. 4045 */ 4046 err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask); 4047 if (err) 4048 return err; 4049 err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask); 4050 if (err) 4051 return err; 4052 4053 mask = 0; 4054 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */ 4055 for (i = 0; i < num_reg_temp; i++) { 4056 if (reg_temp[i] == 0) 4057 continue; 4058 4059 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 4060 if (err) 4061 return err; 4062 src &= 0x1f; 4063 if (!src || (mask & BIT(src))) 4064 continue; 4065 4066 if (!(data->temp_mask & BIT(src))) { 4067 dev_info(dev, 4068 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4069 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]); 4070 continue; 4071 } 4072 4073 mask |= BIT(src); 4074 4075 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4076 if (src <= data->temp_fixed_num) { 4077 data->have_temp |= BIT(src - 1); 4078 data->have_temp_fixed |= BIT(src - 1); 4079 data->reg_temp[0][src - 1] = reg_temp[i]; 4080 data->reg_temp[1][src - 1] = reg_temp_over[i]; 4081 data->reg_temp[2][src - 1] = reg_temp_hyst[i]; 4082 if (reg_temp_crit_h && reg_temp_crit_h[i]) 4083 data->reg_temp[3][src - 1] = reg_temp_crit_h[i]; 4084 else if (reg_temp_crit[src - 1]) 4085 data->reg_temp[3][src - 1] 4086 = reg_temp_crit[src - 1]; 4087 if (reg_temp_crit_l && reg_temp_crit_l[i]) 4088 data->reg_temp[4][src - 1] = reg_temp_crit_l[i]; 4089 data->reg_temp_config[src - 1] = reg_temp_config[i]; 4090 data->temp_src[src - 1] = src; 4091 continue; 4092 } 4093 4094 if (s >= NUM_TEMP) 4095 continue; 4096 4097 /* Use dynamic index for other sources */ 4098 data->have_temp |= BIT(s); 4099 data->reg_temp[0][s] = reg_temp[i]; 4100 data->reg_temp[1][s] = reg_temp_over[i]; 4101 data->reg_temp[2][s] = reg_temp_hyst[i]; 4102 data->reg_temp_config[s] = reg_temp_config[i]; 4103 if (reg_temp_crit_h && reg_temp_crit_h[i]) 4104 data->reg_temp[3][s] = reg_temp_crit_h[i]; 4105 else if (reg_temp_crit[src - 1]) 4106 data->reg_temp[3][s] = reg_temp_crit[src - 1]; 4107 if (reg_temp_crit_l && reg_temp_crit_l[i]) 4108 data->reg_temp[4][s] = reg_temp_crit_l[i]; 4109 4110 data->temp_src[s] = src; 4111 s++; 4112 } 4113 4114 /* 4115 * Repeat with temperatures used for fan control. 4116 * This set of registers does not support limits. 4117 */ 4118 for (i = 0; i < num_reg_temp_mon; i++) { 4119 if (reg_temp_mon[i] == 0) 4120 continue; 4121 4122 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src); 4123 if (err) 4124 return err; 4125 src &= 0x1f; 4126 if (!src) 4127 continue; 4128 4129 if (!(data->temp_mask & BIT(src))) { 4130 dev_info(dev, 4131 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4132 src, i, data->REG_TEMP_SEL[i], 4133 reg_temp_mon[i]); 4134 continue; 4135 } 4136 4137 /* 4138 * For virtual temperature sources, the 'virtual' temperature 4139 * for each fan reflects a different temperature, and there 4140 * are no duplicates. 4141 */ 4142 if (!(data->virt_temp_mask & BIT(src))) { 4143 if (mask & BIT(src)) 4144 continue; 4145 mask |= BIT(src); 4146 } 4147 4148 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4149 if (src <= data->temp_fixed_num) { 4150 if (data->have_temp & BIT(src - 1)) 4151 continue; 4152 data->have_temp |= BIT(src - 1); 4153 data->have_temp_fixed |= BIT(src - 1); 4154 data->reg_temp[0][src - 1] = reg_temp_mon[i]; 4155 data->temp_src[src - 1] = src; 4156 continue; 4157 } 4158 4159 if (s >= NUM_TEMP) 4160 continue; 4161 4162 /* Use dynamic index for other sources */ 4163 data->have_temp |= BIT(s); 4164 data->reg_temp[0][s] = reg_temp_mon[i]; 4165 data->temp_src[s] = src; 4166 s++; 4167 } 4168 4169 #ifdef USE_ALTERNATE 4170 /* 4171 * Go through the list of alternate temp registers and enable 4172 * if possible. 4173 * The temperature is already monitored if the respective bit in <mask> 4174 * is set. 4175 */ 4176 for (i = 0; i < 31; i++) { 4177 if (!(data->temp_mask & BIT(i + 1))) 4178 continue; 4179 if (!reg_temp_alternate[i]) 4180 continue; 4181 if (mask & BIT(i + 1)) 4182 continue; 4183 if (i < data->temp_fixed_num) { 4184 if (data->have_temp & BIT(i)) 4185 continue; 4186 data->have_temp |= BIT(i); 4187 data->have_temp_fixed |= BIT(i); 4188 data->reg_temp[0][i] = reg_temp_alternate[i]; 4189 if (i < num_reg_temp) { 4190 data->reg_temp[1][i] = reg_temp_over[i]; 4191 data->reg_temp[2][i] = reg_temp_hyst[i]; 4192 } 4193 data->temp_src[i] = i + 1; 4194 continue; 4195 } 4196 4197 if (s >= NUM_TEMP) /* Abort if no more space */ 4198 break; 4199 4200 data->have_temp |= BIT(s); 4201 data->reg_temp[0][s] = reg_temp_alternate[i]; 4202 data->temp_src[s] = i + 1; 4203 s++; 4204 } 4205 #endif /* USE_ALTERNATE */ 4206 4207 /* Check which TSIx_TEMP registers are active */ 4208 for (i = 0; i < num_reg_tsi_temp; i++) { 4209 u16 tmp; 4210 4211 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp); 4212 if (err) 4213 return err; 4214 if (tmp) 4215 data->have_tsi_temp |= BIT(i); 4216 } 4217 4218 /* Initialize the chip */ 4219 err = nct6775_init_device(data); 4220 if (err) 4221 return err; 4222 4223 if (data->driver_init) { 4224 err = data->driver_init(data); 4225 if (err) 4226 return err; 4227 } 4228 4229 /* Read fan clock dividers immediately */ 4230 err = nct6775_init_fan_common(dev, data); 4231 if (err) 4232 return err; 4233 4234 /* Register sysfs hooks */ 4235 err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group, 4236 data->pwm_num); 4237 if (err) 4238 return err; 4239 4240 err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group, 4241 fls(data->have_in)); 4242 if (err) 4243 return err; 4244 4245 err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group, 4246 fls(data->has_fan)); 4247 if (err) 4248 return err; 4249 4250 err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group, 4251 fls(data->have_temp)); 4252 if (err) 4253 return err; 4254 4255 if (data->have_tsi_temp) { 4256 tsi_temp_tg.templates = nct6775_tsi_temp_template; 4257 tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible; 4258 tsi_temp_tg.base = fls(data->have_temp) + 1; 4259 err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg, 4260 fls(data->have_tsi_temp)); 4261 if (err) 4262 return err; 4263 } 4264 4265 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name, 4266 data, data->groups); 4267 return PTR_ERR_OR_ZERO(hwmon_dev); 4268 } 4269 EXPORT_SYMBOL_GPL(nct6775_probe); 4270 4271 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); 4272 MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips"); 4273 MODULE_LICENSE("GPL"); 4274