1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * nct6775 - Driver for the hardware monitoring functionality of 4 * Nuvoton NCT677x Super-I/O chips 5 * 6 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net> 7 * 8 * Derived from w83627ehf driver 9 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de> 10 * Copyright (C) 2006 Yuan Mu (Winbond), 11 * Rudolf Marek <r.marek@assembler.cz> 12 * David Hubbard <david.c.hubbard@gmail.com> 13 * Daniel J Blueman <daniel.blueman@gmail.com> 14 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00) 15 * 16 * Shamelessly ripped from the w83627hf driver 17 * Copyright (C) 2003 Mark Studebaker 18 * 19 * Supports the following chips: 20 * 21 * Chip #vin #fan #pwm #temp chip IDs man ID 22 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3 23 * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3 24 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3 25 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3 26 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3 27 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3 28 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3 29 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3 30 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3 31 * nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3 32 * nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3 33 * (0xd451) 34 * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3 35 * (0xd429) 36 * 37 * #temp lists the number of monitored temperature sources (first value) plus 38 * the number of directly connectable temperature sensors (second value). 39 */ 40 41 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 42 43 #include <linux/module.h> 44 #include <linux/init.h> 45 #include <linux/slab.h> 46 #include <linux/jiffies.h> 47 #include <linux/hwmon.h> 48 #include <linux/hwmon-sysfs.h> 49 #include <linux/err.h> 50 #include <linux/mutex.h> 51 #include <linux/bitops.h> 52 #include <linux/nospec.h> 53 #include <linux/regmap.h> 54 #include "lm75.h" 55 #include "nct6775.h" 56 57 #undef DEFAULT_SYMBOL_NAMESPACE 58 #define DEFAULT_SYMBOL_NAMESPACE HWMON_NCT6775 59 60 #define USE_ALTERNATE 61 62 /* used to set data->name = nct6775_device_names[data->sio_kind] */ 63 static const char * const nct6775_device_names[] = { 64 "nct6106", 65 "nct6116", 66 "nct6775", 67 "nct6776", 68 "nct6779", 69 "nct6791", 70 "nct6792", 71 "nct6793", 72 "nct6795", 73 "nct6796", 74 "nct6797", 75 "nct6798", 76 }; 77 78 /* Common and NCT6775 specific data */ 79 80 /* Voltage min/max registers for nr=7..14 are in bank 5 */ 81 82 static const u16 NCT6775_REG_IN_MAX[] = { 83 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a, 84 0x55c, 0x55e, 0x560, 0x562 }; 85 static const u16 NCT6775_REG_IN_MIN[] = { 86 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b, 87 0x55d, 0x55f, 0x561, 0x563 }; 88 static const u16 NCT6775_REG_IN[] = { 89 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552 90 }; 91 92 #define NCT6775_REG_VBAT 0x5D 93 #define NCT6775_REG_DIODE 0x5E 94 #define NCT6775_DIODE_MASK 0x02 95 96 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B }; 97 98 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */ 99 100 static const s8 NCT6775_ALARM_BITS[] = { 101 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 102 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 103 -1, /* unused */ 104 6, 7, 11, -1, -1, /* fan1..fan5 */ 105 -1, -1, -1, /* unused */ 106 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 107 12, -1 }; /* intrusion0, intrusion1 */ 108 109 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e }; 110 111 /* 112 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures, 113 * 30..31 intrusion 114 */ 115 static const s8 NCT6775_BEEP_BITS[] = { 116 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */ 117 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 118 21, /* global beep enable */ 119 6, 7, 11, 28, -1, /* fan1..fan5 */ 120 -1, -1, -1, /* unused */ 121 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 122 12, -1 }; /* intrusion0, intrusion1 */ 123 124 /* DC or PWM output fan configuration */ 125 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 }; 126 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 }; 127 128 /* Advanced Fan control, some values are common for all fans */ 129 130 static const u16 NCT6775_REG_TARGET[] = { 131 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 }; 132 static const u16 NCT6775_REG_FAN_MODE[] = { 133 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 }; 134 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = { 135 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 }; 136 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = { 137 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 }; 138 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 139 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 }; 140 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 141 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 }; 142 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a }; 143 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b }; 144 145 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 146 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 }; 147 static const u16 NCT6775_REG_PWM[] = { 148 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 }; 149 static const u16 NCT6775_REG_PWM_READ[] = { 150 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 }; 151 152 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 }; 153 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d }; 154 static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = { 155 0x641, 0x642, 0x643, 0x644 }; 156 static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { }; 157 158 static const u16 NCT6775_REG_TEMP[] = { 159 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d }; 160 161 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 }; 162 163 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 164 0, 0x152, 0x252, 0x628, 0x629, 0x62A }; 165 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 166 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D }; 167 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 168 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C }; 169 170 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 171 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 }; 172 173 static const u16 NCT6775_REG_TEMP_SEL[] = { 174 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 }; 175 176 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = { 177 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 }; 178 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = { 179 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a }; 180 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = { 181 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b }; 182 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = { 183 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c }; 184 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = { 185 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d }; 186 187 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 }; 188 189 static const u16 NCT6775_REG_AUTO_TEMP[] = { 190 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 }; 191 static const u16 NCT6775_REG_AUTO_PWM[] = { 192 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 }; 193 194 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p)) 195 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p)) 196 197 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 }; 198 199 static const u16 NCT6775_REG_CRITICAL_TEMP[] = { 200 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 }; 201 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = { 202 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 }; 203 204 static const char *const nct6775_temp_label[] = { 205 "", 206 "SYSTIN", 207 "CPUTIN", 208 "AUXTIN", 209 "AMD SB-TSI", 210 "PECI Agent 0", 211 "PECI Agent 1", 212 "PECI Agent 2", 213 "PECI Agent 3", 214 "PECI Agent 4", 215 "PECI Agent 5", 216 "PECI Agent 6", 217 "PECI Agent 7", 218 "PCH_CHIP_CPU_MAX_TEMP", 219 "PCH_CHIP_TEMP", 220 "PCH_CPU_TEMP", 221 "PCH_MCH_TEMP", 222 "PCH_DIM0_TEMP", 223 "PCH_DIM1_TEMP", 224 "PCH_DIM2_TEMP", 225 "PCH_DIM3_TEMP" 226 }; 227 228 #define NCT6775_TEMP_MASK 0x001ffffe 229 #define NCT6775_VIRT_TEMP_MASK 0x00000000 230 231 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = { 232 [13] = 0x661, 233 [14] = 0x662, 234 [15] = 0x664, 235 }; 236 237 static const u16 NCT6775_REG_TEMP_CRIT[32] = { 238 [4] = 0xa00, 239 [5] = 0xa01, 240 [6] = 0xa02, 241 [7] = 0xa03, 242 [8] = 0xa04, 243 [9] = 0xa05, 244 [10] = 0xa06, 245 [11] = 0xa07 246 }; 247 248 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 }; 249 250 /* NCT6776 specific data */ 251 252 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */ 253 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME 254 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME 255 256 static const s8 NCT6776_ALARM_BITS[] = { 257 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 258 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 259 -1, /* unused */ 260 6, 7, 11, 10, 23, /* fan1..fan5 */ 261 -1, -1, -1, /* unused */ 262 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 263 12, 9 }; /* intrusion0, intrusion1 */ 264 265 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 }; 266 267 static const s8 NCT6776_BEEP_BITS[] = { 268 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */ 269 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 270 24, /* global beep enable */ 271 25, 26, 27, 28, 29, /* fan1..fan5 */ 272 -1, -1, -1, /* unused */ 273 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ 274 30, 31 }; /* intrusion0, intrusion1 */ 275 276 static const u16 NCT6776_REG_TOLERANCE_H[] = { 277 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c }; 278 279 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 }; 280 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 }; 281 282 static const u16 NCT6776_REG_FAN_MIN[] = { 283 0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c }; 284 static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = { 285 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 }; 286 287 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = { 288 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e }; 289 290 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 291 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A }; 292 293 static const char *const nct6776_temp_label[] = { 294 "", 295 "SYSTIN", 296 "CPUTIN", 297 "AUXTIN", 298 "SMBUSMASTER 0", 299 "SMBUSMASTER 1", 300 "SMBUSMASTER 2", 301 "SMBUSMASTER 3", 302 "SMBUSMASTER 4", 303 "SMBUSMASTER 5", 304 "SMBUSMASTER 6", 305 "SMBUSMASTER 7", 306 "PECI Agent 0", 307 "PECI Agent 1", 308 "PCH_CHIP_CPU_MAX_TEMP", 309 "PCH_CHIP_TEMP", 310 "PCH_CPU_TEMP", 311 "PCH_MCH_TEMP", 312 "PCH_DIM0_TEMP", 313 "PCH_DIM1_TEMP", 314 "PCH_DIM2_TEMP", 315 "PCH_DIM3_TEMP", 316 "BYTE_TEMP" 317 }; 318 319 #define NCT6776_TEMP_MASK 0x007ffffe 320 #define NCT6776_VIRT_TEMP_MASK 0x00000000 321 322 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = { 323 [14] = 0x401, 324 [15] = 0x402, 325 [16] = 0x404, 326 }; 327 328 static const u16 NCT6776_REG_TEMP_CRIT[32] = { 329 [11] = 0x709, 330 [12] = 0x70a, 331 }; 332 333 static const u16 NCT6776_REG_TSI_TEMP[] = { 334 0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 }; 335 336 /* NCT6779 specific data */ 337 338 static const u16 NCT6779_REG_IN[] = { 339 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487, 340 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e }; 341 342 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = { 343 0x459, 0x45A, 0x45B, 0x568 }; 344 345 static const s8 NCT6779_ALARM_BITS[] = { 346 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 347 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */ 348 -1, /* unused */ 349 6, 7, 11, 10, 23, /* fan1..fan5 */ 350 -1, -1, -1, /* unused */ 351 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 352 12, 9 }; /* intrusion0, intrusion1 */ 353 354 static const s8 NCT6779_BEEP_BITS[] = { 355 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */ 356 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */ 357 24, /* global beep enable */ 358 25, 26, 27, 28, 29, /* fan1..fan5 */ 359 -1, -1, -1, /* unused */ 360 16, 17, -1, -1, -1, -1, /* temp1..temp6 */ 361 30, 31 }; /* intrusion0, intrusion1 */ 362 363 static const u16 NCT6779_REG_FAN[] = { 364 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce }; 365 static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = { 366 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f }; 367 368 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = { 369 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 }; 370 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01 371 static const u16 NCT6779_REG_CRITICAL_PWM[] = { 372 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 }; 373 374 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 }; 375 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b }; 376 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 377 0x18, 0x152 }; 378 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 379 0x3a, 0x153 }; 380 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 381 0x39, 0x155 }; 382 383 static const u16 NCT6779_REG_TEMP_OFFSET[] = { 384 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c }; 385 386 static const char *const nct6779_temp_label[] = { 387 "", 388 "SYSTIN", 389 "CPUTIN", 390 "AUXTIN0", 391 "AUXTIN1", 392 "AUXTIN2", 393 "AUXTIN3", 394 "", 395 "SMBUSMASTER 0", 396 "SMBUSMASTER 1", 397 "SMBUSMASTER 2", 398 "SMBUSMASTER 3", 399 "SMBUSMASTER 4", 400 "SMBUSMASTER 5", 401 "SMBUSMASTER 6", 402 "SMBUSMASTER 7", 403 "PECI Agent 0", 404 "PECI Agent 1", 405 "PCH_CHIP_CPU_MAX_TEMP", 406 "PCH_CHIP_TEMP", 407 "PCH_CPU_TEMP", 408 "PCH_MCH_TEMP", 409 "PCH_DIM0_TEMP", 410 "PCH_DIM1_TEMP", 411 "PCH_DIM2_TEMP", 412 "PCH_DIM3_TEMP", 413 "BYTE_TEMP", 414 "", 415 "", 416 "", 417 "", 418 "Virtual_TEMP" 419 }; 420 421 #define NCT6779_TEMP_MASK 0x07ffff7e 422 #define NCT6779_VIRT_TEMP_MASK 0x00000000 423 #define NCT6791_TEMP_MASK 0x87ffff7e 424 #define NCT6791_VIRT_TEMP_MASK 0x80000000 425 426 static const u16 NCT6779_REG_TEMP_ALTERNATE[32] 427 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0, 428 0, 0, 0, 0, 0, 0, 0, 0, 429 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407, 430 0x408, 0 }; 431 432 static const u16 NCT6779_REG_TEMP_CRIT[32] = { 433 [15] = 0x709, 434 [16] = 0x70a, 435 }; 436 437 /* NCT6791 specific data */ 438 439 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 }; 440 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a }; 441 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b }; 442 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c }; 443 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d }; 444 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e }; 445 446 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = { 447 0x459, 0x45A, 0x45B, 0x568, 0x45D }; 448 449 static const s8 NCT6791_ALARM_BITS[] = { 450 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */ 451 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */ 452 -1, /* unused */ 453 6, 7, 11, 10, 23, 33, /* fan1..fan6 */ 454 -1, -1, /* unused */ 455 4, 5, 13, -1, -1, -1, /* temp1..temp6 */ 456 12, 9 }; /* intrusion0, intrusion1 */ 457 458 /* NCT6792/NCT6793 specific data */ 459 460 static const u16 NCT6792_REG_TEMP_MON[] = { 461 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d }; 462 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = { 463 0xb2, 0xb3, 0xb4, 0xb5, 0xbf }; 464 465 static const char *const nct6792_temp_label[] = { 466 "", 467 "SYSTIN", 468 "CPUTIN", 469 "AUXTIN0", 470 "AUXTIN1", 471 "AUXTIN2", 472 "AUXTIN3", 473 "", 474 "SMBUSMASTER 0", 475 "SMBUSMASTER 1", 476 "SMBUSMASTER 2", 477 "SMBUSMASTER 3", 478 "SMBUSMASTER 4", 479 "SMBUSMASTER 5", 480 "SMBUSMASTER 6", 481 "SMBUSMASTER 7", 482 "PECI Agent 0", 483 "PECI Agent 1", 484 "PCH_CHIP_CPU_MAX_TEMP", 485 "PCH_CHIP_TEMP", 486 "PCH_CPU_TEMP", 487 "PCH_MCH_TEMP", 488 "PCH_DIM0_TEMP", 489 "PCH_DIM1_TEMP", 490 "PCH_DIM2_TEMP", 491 "PCH_DIM3_TEMP", 492 "BYTE_TEMP", 493 "PECI Agent 0 Calibration", 494 "PECI Agent 1 Calibration", 495 "", 496 "", 497 "Virtual_TEMP" 498 }; 499 500 #define NCT6792_TEMP_MASK 0x9fffff7e 501 #define NCT6792_VIRT_TEMP_MASK 0x80000000 502 503 static const char *const nct6793_temp_label[] = { 504 "", 505 "SYSTIN", 506 "CPUTIN", 507 "AUXTIN0", 508 "AUXTIN1", 509 "AUXTIN2", 510 "AUXTIN3", 511 "", 512 "SMBUSMASTER 0", 513 "SMBUSMASTER 1", 514 "", 515 "", 516 "", 517 "", 518 "", 519 "", 520 "PECI Agent 0", 521 "PECI Agent 1", 522 "PCH_CHIP_CPU_MAX_TEMP", 523 "PCH_CHIP_TEMP", 524 "PCH_CPU_TEMP", 525 "PCH_MCH_TEMP", 526 "Agent0 Dimm0 ", 527 "Agent0 Dimm1", 528 "Agent1 Dimm0", 529 "Agent1 Dimm1", 530 "BYTE_TEMP0", 531 "BYTE_TEMP1", 532 "PECI Agent 0 Calibration", 533 "PECI Agent 1 Calibration", 534 "", 535 "Virtual_TEMP" 536 }; 537 538 #define NCT6793_TEMP_MASK 0xbfff037e 539 #define NCT6793_VIRT_TEMP_MASK 0x80000000 540 541 static const char *const nct6795_temp_label[] = { 542 "", 543 "SYSTIN", 544 "CPUTIN", 545 "AUXTIN0", 546 "AUXTIN1", 547 "AUXTIN2", 548 "AUXTIN3", 549 "", 550 "SMBUSMASTER 0", 551 "SMBUSMASTER 1", 552 "SMBUSMASTER 2", 553 "SMBUSMASTER 3", 554 "SMBUSMASTER 4", 555 "SMBUSMASTER 5", 556 "SMBUSMASTER 6", 557 "SMBUSMASTER 7", 558 "PECI Agent 0", 559 "PECI Agent 1", 560 "PCH_CHIP_CPU_MAX_TEMP", 561 "PCH_CHIP_TEMP", 562 "PCH_CPU_TEMP", 563 "PCH_MCH_TEMP", 564 "Agent0 Dimm0", 565 "Agent0 Dimm1", 566 "Agent1 Dimm0", 567 "Agent1 Dimm1", 568 "BYTE_TEMP0", 569 "BYTE_TEMP1", 570 "PECI Agent 0 Calibration", 571 "PECI Agent 1 Calibration", 572 "", 573 "Virtual_TEMP" 574 }; 575 576 #define NCT6795_TEMP_MASK 0xbfffff7e 577 #define NCT6795_VIRT_TEMP_MASK 0x80000000 578 579 static const char *const nct6796_temp_label[] = { 580 "", 581 "SYSTIN", 582 "CPUTIN", 583 "AUXTIN0", 584 "AUXTIN1", 585 "AUXTIN2", 586 "AUXTIN3", 587 "AUXTIN4", 588 "SMBUSMASTER 0", 589 "SMBUSMASTER 1", 590 "Virtual_TEMP", 591 "Virtual_TEMP", 592 "", 593 "", 594 "", 595 "", 596 "PECI Agent 0", 597 "PECI Agent 1", 598 "PCH_CHIP_CPU_MAX_TEMP", 599 "PCH_CHIP_TEMP", 600 "PCH_CPU_TEMP", 601 "PCH_MCH_TEMP", 602 "Agent0 Dimm0", 603 "Agent0 Dimm1", 604 "Agent1 Dimm0", 605 "Agent1 Dimm1", 606 "BYTE_TEMP0", 607 "BYTE_TEMP1", 608 "PECI Agent 0 Calibration", 609 "PECI Agent 1 Calibration", 610 "", 611 "Virtual_TEMP" 612 }; 613 614 #define NCT6796_TEMP_MASK 0xbfff0ffe 615 #define NCT6796_VIRT_TEMP_MASK 0x80000c00 616 617 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b }; 618 619 static const char *const nct6798_temp_label[] = { 620 "", 621 "SYSTIN", 622 "CPUTIN", 623 "AUXTIN0", 624 "AUXTIN1", 625 "AUXTIN2", 626 "AUXTIN3", 627 "AUXTIN4", 628 "SMBUSMASTER 0", 629 "SMBUSMASTER 1", 630 "Virtual_TEMP", 631 "Virtual_TEMP", 632 "", 633 "", 634 "", 635 "", 636 "PECI Agent 0", 637 "PECI Agent 1", 638 "PCH_CHIP_CPU_MAX_TEMP", 639 "PCH_CHIP_TEMP", 640 "PCH_CPU_TEMP", 641 "PCH_MCH_TEMP", 642 "Agent0 Dimm0", 643 "Agent0 Dimm1", 644 "Agent1 Dimm0", 645 "Agent1 Dimm1", 646 "BYTE_TEMP0", 647 "BYTE_TEMP1", 648 "PECI Agent 0 Calibration", /* undocumented */ 649 "PECI Agent 1 Calibration", /* undocumented */ 650 "", 651 "Virtual_TEMP" 652 }; 653 654 #define NCT6798_TEMP_MASK 0xbfff0ffe 655 #define NCT6798_VIRT_TEMP_MASK 0x80000c00 656 657 /* NCT6102D/NCT6106D specific data */ 658 659 #define NCT6106_REG_VBAT 0x318 660 #define NCT6106_REG_DIODE 0x319 661 #define NCT6106_DIODE_MASK 0x01 662 663 static const u16 NCT6106_REG_IN_MAX[] = { 664 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 }; 665 static const u16 NCT6106_REG_IN_MIN[] = { 666 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 }; 667 static const u16 NCT6106_REG_IN[] = { 668 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 }; 669 670 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 }; 671 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a }; 672 static const u16 NCT6106_REG_TEMP_HYST[] = { 673 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 }; 674 static const u16 NCT6106_REG_TEMP_OVER[] = { 675 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 }; 676 static const u16 NCT6106_REG_TEMP_CRIT_L[] = { 677 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 }; 678 static const u16 NCT6106_REG_TEMP_CRIT_H[] = { 679 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 }; 680 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 }; 681 static const u16 NCT6106_REG_TEMP_CONFIG[] = { 682 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc }; 683 684 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 }; 685 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 }; 686 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 }; 687 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 }; 688 689 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 }; 690 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 }; 691 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c }; 692 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 }; 693 static const u16 NCT6106_REG_TEMP_SOURCE[] = { 694 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 }; 695 696 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a }; 697 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = { 698 0x11b, 0x12b, 0x13b }; 699 700 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c }; 701 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10 702 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d }; 703 704 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 }; 705 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 }; 706 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 }; 707 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 }; 708 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 }; 709 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 }; 710 711 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 }; 712 713 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 }; 714 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 }; 715 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a }; 716 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b }; 717 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c }; 718 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d }; 719 720 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 }; 721 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 }; 722 723 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = { 724 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d }; 725 726 static const s8 NCT6106_ALARM_BITS[] = { 727 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 728 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */ 729 -1, /* unused */ 730 32, 33, 34, -1, -1, /* fan1..fan5 */ 731 -1, -1, -1, /* unused */ 732 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ 733 48, -1 /* intrusion0, intrusion1 */ 734 }; 735 736 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = { 737 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 }; 738 739 static const s8 NCT6106_BEEP_BITS[] = { 740 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 741 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */ 742 32, /* global beep enable */ 743 24, 25, 26, 27, 28, /* fan1..fan5 */ 744 -1, -1, -1, /* unused */ 745 16, 17, 18, 19, 20, 21, /* temp1..temp6 */ 746 34, -1 /* intrusion0, intrusion1 */ 747 }; 748 749 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = { 750 [14] = 0x51, 751 [15] = 0x52, 752 [16] = 0x54, 753 }; 754 755 static const u16 NCT6106_REG_TEMP_CRIT[32] = { 756 [11] = 0x204, 757 [12] = 0x205, 758 }; 759 760 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 }; 761 762 /* NCT6112D/NCT6114D/NCT6116D specific data */ 763 764 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 }; 765 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 }; 766 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 }; 767 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 }; 768 769 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 }; 770 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 }; 771 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 }; 772 static const u16 NCT6116_REG_TEMP_SOURCE[] = { 773 0xb0, 0xb1, 0xb2 }; 774 775 static const u16 NCT6116_REG_CRITICAL_TEMP[] = { 776 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa }; 777 static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = { 778 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab }; 779 780 static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = { 781 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac }; 782 static const u16 NCT6116_REG_CRITICAL_PWM[] = { 783 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad }; 784 785 static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = { 786 0x114, 0x124, 0x134, 0x194, 0x1a4 }; 787 static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = { 788 0x115, 0x125, 0x135, 0x195, 0x1a5 }; 789 static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = { 790 0x116, 0x126, 0x136, 0x196, 0x1a6 }; 791 static const u16 NCT6116_REG_FAN_START_OUTPUT[] = { 792 0x117, 0x127, 0x137, 0x197, 0x1a7 }; 793 static const u16 NCT6116_REG_FAN_STOP_TIME[] = { 794 0x118, 0x128, 0x138, 0x198, 0x1a8 }; 795 static const u16 NCT6116_REG_TOLERANCE_H[] = { 796 0x112, 0x122, 0x132, 0x192, 0x1a2 }; 797 798 static const u16 NCT6116_REG_TARGET[] = { 799 0x111, 0x121, 0x131, 0x191, 0x1a1 }; 800 801 static const u16 NCT6116_REG_AUTO_TEMP[] = { 802 0x160, 0x170, 0x180, 0x1d0, 0x1e0 }; 803 static const u16 NCT6116_REG_AUTO_PWM[] = { 804 0x164, 0x174, 0x184, 0x1d4, 0x1e4 }; 805 806 static const s8 NCT6116_ALARM_BITS[] = { 807 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 808 9, -1, -1, -1, -1, -1, -1, /* in8..in9 */ 809 -1, /* unused */ 810 32, 33, 34, 35, 36, /* fan1..fan5 */ 811 -1, -1, -1, /* unused */ 812 16, 17, 18, -1, -1, -1, /* temp1..temp6 */ 813 48, -1 /* intrusion0, intrusion1 */ 814 }; 815 816 static const s8 NCT6116_BEEP_BITS[] = { 817 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */ 818 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */ 819 32, /* global beep enable */ 820 24, 25, 26, 27, 28, /* fan1..fan5 */ 821 -1, -1, -1, /* unused */ 822 16, 17, 18, -1, -1, -1, /* temp1..temp6 */ 823 34, -1 /* intrusion0, intrusion1 */ 824 }; 825 826 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b }; 827 828 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode) 829 { 830 if (mode == 0 && pwm == 255) 831 return off; 832 return mode + 1; 833 } 834 835 static int pwm_enable_to_reg(enum pwm_enable mode) 836 { 837 if (mode == off) 838 return 0; 839 return mode - 1; 840 } 841 842 /* 843 * Conversions 844 */ 845 846 /* 1 is DC mode, output in ms */ 847 static unsigned int step_time_from_reg(u8 reg, u8 mode) 848 { 849 return mode ? 400 * reg : 100 * reg; 850 } 851 852 static u8 step_time_to_reg(unsigned int msec, u8 mode) 853 { 854 return clamp_val((mode ? (msec + 200) / 400 : 855 (msec + 50) / 100), 1, 255); 856 } 857 858 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg) 859 { 860 if (reg == 0 || reg == 255) 861 return 0; 862 return 1350000U / (reg << divreg); 863 } 864 865 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg) 866 { 867 if ((reg & 0xff1f) == 0xff1f) 868 return 0; 869 870 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3); 871 872 if (reg == 0) 873 return 0; 874 875 return 1350000U / reg; 876 } 877 878 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg) 879 { 880 if (reg == 0 || reg == 0xffff) 881 return 0; 882 883 /* 884 * Even though the registers are 16 bit wide, the fan divisor 885 * still applies. 886 */ 887 return 1350000U / (reg << divreg); 888 } 889 890 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg) 891 { 892 return reg; 893 } 894 895 static u16 fan_to_reg(u32 fan, unsigned int divreg) 896 { 897 if (!fan) 898 return 0; 899 900 return (1350000U / fan) >> divreg; 901 } 902 903 static inline unsigned int 904 div_from_reg(u8 reg) 905 { 906 return BIT(reg); 907 } 908 909 /* 910 * Some of the voltage inputs have internal scaling, the tables below 911 * contain 8 (the ADC LSB in mV) * scaling factor * 100 912 */ 913 static const u16 scale_in[15] = { 914 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800, 915 800, 800 916 }; 917 918 static inline long in_from_reg(u8 reg, u8 nr) 919 { 920 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100); 921 } 922 923 static inline u8 in_to_reg(u32 val, u8 nr) 924 { 925 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255); 926 } 927 928 /* TSI temperatures are in 8.3 format */ 929 static inline unsigned int tsi_temp_from_reg(unsigned int reg) 930 { 931 return (reg >> 5) * 125; 932 } 933 934 /* 935 * Data structures and manipulation thereof 936 */ 937 938 struct sensor_device_template { 939 struct device_attribute dev_attr; 940 union { 941 struct { 942 u8 nr; 943 u8 index; 944 } s; 945 int index; 946 } u; 947 bool s2; /* true if both index and nr are used */ 948 }; 949 950 struct sensor_device_attr_u { 951 union { 952 struct sensor_device_attribute a1; 953 struct sensor_device_attribute_2 a2; 954 } u; 955 char name[32]; 956 }; 957 958 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \ 959 .attr = {.name = _template, .mode = _mode }, \ 960 .show = _show, \ 961 .store = _store, \ 962 } 963 964 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \ 965 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 966 .u.index = _index, \ 967 .s2 = false } 968 969 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 970 _nr, _index) \ 971 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 972 .u.s.index = _index, \ 973 .u.s.nr = _nr, \ 974 .s2 = true } 975 976 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \ 977 static struct sensor_device_template sensor_dev_template_##_name \ 978 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \ 979 _index) 980 981 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \ 982 _nr, _index) \ 983 static struct sensor_device_template sensor_dev_template_##_name \ 984 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 985 _nr, _index) 986 987 struct sensor_template_group { 988 struct sensor_device_template **templates; 989 umode_t (*is_visible)(struct kobject *, struct attribute *, int); 990 int base; 991 }; 992 993 static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data, 994 const struct sensor_template_group *tg, int repeat) 995 { 996 struct attribute_group *group; 997 struct sensor_device_attr_u *su; 998 struct sensor_device_attribute *a; 999 struct sensor_device_attribute_2 *a2; 1000 struct attribute **attrs; 1001 struct sensor_device_template **t; 1002 int i, count; 1003 1004 if (repeat <= 0) 1005 return -EINVAL; 1006 1007 t = tg->templates; 1008 for (count = 0; *t; t++, count++) 1009 ; 1010 1011 if (count == 0) 1012 return -EINVAL; 1013 1014 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL); 1015 if (group == NULL) 1016 return -ENOMEM; 1017 1018 attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs), 1019 GFP_KERNEL); 1020 if (attrs == NULL) 1021 return -ENOMEM; 1022 1023 su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)), 1024 GFP_KERNEL); 1025 if (su == NULL) 1026 return -ENOMEM; 1027 1028 group->attrs = attrs; 1029 group->is_visible = tg->is_visible; 1030 1031 for (i = 0; i < repeat; i++) { 1032 t = tg->templates; 1033 while (*t != NULL) { 1034 snprintf(su->name, sizeof(su->name), 1035 (*t)->dev_attr.attr.name, tg->base + i); 1036 if ((*t)->s2) { 1037 a2 = &su->u.a2; 1038 sysfs_attr_init(&a2->dev_attr.attr); 1039 a2->dev_attr.attr.name = su->name; 1040 a2->nr = (*t)->u.s.nr + i; 1041 a2->index = (*t)->u.s.index; 1042 a2->dev_attr.attr.mode = 1043 (*t)->dev_attr.attr.mode; 1044 a2->dev_attr.show = (*t)->dev_attr.show; 1045 a2->dev_attr.store = (*t)->dev_attr.store; 1046 *attrs = &a2->dev_attr.attr; 1047 } else { 1048 a = &su->u.a1; 1049 sysfs_attr_init(&a->dev_attr.attr); 1050 a->dev_attr.attr.name = su->name; 1051 a->index = (*t)->u.index + i; 1052 a->dev_attr.attr.mode = 1053 (*t)->dev_attr.attr.mode; 1054 a->dev_attr.show = (*t)->dev_attr.show; 1055 a->dev_attr.store = (*t)->dev_attr.store; 1056 *attrs = &a->dev_attr.attr; 1057 } 1058 attrs++; 1059 su++; 1060 t++; 1061 } 1062 } 1063 1064 return nct6775_add_attr_group(data, group); 1065 } 1066 1067 bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg) 1068 { 1069 switch (data->kind) { 1070 case nct6106: 1071 return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1072 (reg >= 0x59 && reg < 0x69 && (reg & 1)) || 1073 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || 1074 reg == 0x111 || reg == 0x121 || reg == 0x131; 1075 case nct6116: 1076 return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1077 reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b || 1078 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 || 1079 reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 || 1080 reg == 0x191 || reg == 0x1a1; 1081 case nct6775: 1082 return (((reg & 0xff00) == 0x100 || 1083 (reg & 0xff00) == 0x200) && 1084 ((reg & 0x00ff) == 0x50 || 1085 (reg & 0x00ff) == 0x53 || 1086 (reg & 0x00ff) == 0x55)) || 1087 (reg & 0xfff0) == 0x630 || 1088 reg == 0x640 || reg == 0x642 || 1089 reg == 0x662 || reg == 0x669 || 1090 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1091 reg == 0x73 || reg == 0x75 || reg == 0x77; 1092 case nct6776: 1093 return (((reg & 0xff00) == 0x100 || 1094 (reg & 0xff00) == 0x200) && 1095 ((reg & 0x00ff) == 0x50 || 1096 (reg & 0x00ff) == 0x53 || 1097 (reg & 0x00ff) == 0x55)) || 1098 (reg & 0xfff0) == 0x630 || 1099 reg == 0x402 || 1100 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1101 reg == 0x640 || reg == 0x642 || 1102 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1103 reg == 0x73 || reg == 0x75 || reg == 0x77; 1104 case nct6779: 1105 case nct6791: 1106 case nct6792: 1107 case nct6793: 1108 case nct6795: 1109 case nct6796: 1110 case nct6797: 1111 case nct6798: 1112 return reg == 0x150 || reg == 0x153 || reg == 0x155 || 1113 (reg & 0xfff0) == 0x4c0 || 1114 reg == 0x402 || 1115 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1116 reg == 0x63a || reg == 0x63c || reg == 0x63e || 1117 reg == 0x640 || reg == 0x642 || reg == 0x64a || 1118 reg == 0x64c || 1119 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 || 1120 reg == 0x7b || reg == 0x7d; 1121 } 1122 return false; 1123 } 1124 EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized); 1125 1126 /* We left-align 8-bit temperature values to make the code simpler */ 1127 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val) 1128 { 1129 int err; 1130 1131 err = nct6775_read_value(data, reg, val); 1132 if (err) 1133 return err; 1134 1135 if (!nct6775_reg_is_word_sized(data, reg)) 1136 *val <<= 8; 1137 1138 return 0; 1139 } 1140 1141 /* This function assumes that the caller holds data->update_lock */ 1142 static int nct6775_write_fan_div(struct nct6775_data *data, int nr) 1143 { 1144 u16 reg; 1145 int err; 1146 u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2; 1147 unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */ 1148 1149 err = nct6775_read_value(data, fandiv_reg, ®); 1150 if (err) 1151 return err; 1152 reg &= 0x70 >> oddshift; 1153 reg |= data->fan_div[nr] & (0x7 << oddshift); 1154 return nct6775_write_value(data, fandiv_reg, reg); 1155 } 1156 1157 static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr) 1158 { 1159 if (data->kind == nct6775) 1160 return nct6775_write_fan_div(data, nr); 1161 return 0; 1162 } 1163 1164 static int nct6775_update_fan_div(struct nct6775_data *data) 1165 { 1166 int err; 1167 u16 i; 1168 1169 err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i); 1170 if (err) 1171 return err; 1172 data->fan_div[0] = i & 0x7; 1173 data->fan_div[1] = (i & 0x70) >> 4; 1174 err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i); 1175 if (err) 1176 return err; 1177 data->fan_div[2] = i & 0x7; 1178 if (data->has_fan & BIT(3)) 1179 data->fan_div[3] = (i & 0x70) >> 4; 1180 1181 return 0; 1182 } 1183 1184 static int nct6775_update_fan_div_common(struct nct6775_data *data) 1185 { 1186 if (data->kind == nct6775) 1187 return nct6775_update_fan_div(data); 1188 return 0; 1189 } 1190 1191 static int nct6775_init_fan_div(struct nct6775_data *data) 1192 { 1193 int i, err; 1194 1195 err = nct6775_update_fan_div_common(data); 1196 if (err) 1197 return err; 1198 1199 /* 1200 * For all fans, start with highest divider value if the divider 1201 * register is not initialized. This ensures that we get a 1202 * reading from the fan count register, even if it is not optimal. 1203 * We'll compute a better divider later on. 1204 */ 1205 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) { 1206 if (!(data->has_fan & BIT(i))) 1207 continue; 1208 if (data->fan_div[i] == 0) { 1209 data->fan_div[i] = 7; 1210 err = nct6775_write_fan_div_common(data, i); 1211 if (err) 1212 return err; 1213 } 1214 } 1215 1216 return 0; 1217 } 1218 1219 static int nct6775_init_fan_common(struct device *dev, 1220 struct nct6775_data *data) 1221 { 1222 int i, err; 1223 u16 reg; 1224 1225 if (data->has_fan_div) { 1226 err = nct6775_init_fan_div(data); 1227 if (err) 1228 return err; 1229 } 1230 1231 /* 1232 * If fan_min is not set (0), set it to 0xff to disable it. This 1233 * prevents the unnecessary warning when fanX_min is reported as 0. 1234 */ 1235 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) { 1236 if (data->has_fan_min & BIT(i)) { 1237 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®); 1238 if (err) 1239 return err; 1240 if (!reg) { 1241 err = nct6775_write_value(data, data->REG_FAN_MIN[i], 1242 data->has_fan_div ? 0xff : 0xff1f); 1243 if (err) 1244 return err; 1245 } 1246 } 1247 } 1248 1249 return 0; 1250 } 1251 1252 static int nct6775_select_fan_div(struct device *dev, 1253 struct nct6775_data *data, int nr, u16 reg) 1254 { 1255 int err; 1256 u8 fan_div = data->fan_div[nr]; 1257 u16 fan_min; 1258 1259 if (!data->has_fan_div) 1260 return 0; 1261 1262 /* 1263 * If we failed to measure the fan speed, or the reported value is not 1264 * in the optimal range, and the clock divider can be modified, 1265 * let's try that for next time. 1266 */ 1267 if (reg == 0x00 && fan_div < 0x07) 1268 fan_div++; 1269 else if (reg != 0x00 && reg < 0x30 && fan_div > 0) 1270 fan_div--; 1271 1272 if (fan_div != data->fan_div[nr]) { 1273 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n", 1274 nr + 1, div_from_reg(data->fan_div[nr]), 1275 div_from_reg(fan_div)); 1276 1277 /* Preserve min limit if possible */ 1278 if (data->has_fan_min & BIT(nr)) { 1279 fan_min = data->fan_min[nr]; 1280 if (fan_div > data->fan_div[nr]) { 1281 if (fan_min != 255 && fan_min > 1) 1282 fan_min >>= 1; 1283 } else { 1284 if (fan_min != 255) { 1285 fan_min <<= 1; 1286 if (fan_min > 254) 1287 fan_min = 254; 1288 } 1289 } 1290 if (fan_min != data->fan_min[nr]) { 1291 data->fan_min[nr] = fan_min; 1292 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min); 1293 if (err) 1294 return err; 1295 } 1296 } 1297 data->fan_div[nr] = fan_div; 1298 err = nct6775_write_fan_div_common(data, nr); 1299 if (err) 1300 return err; 1301 } 1302 1303 return 0; 1304 } 1305 1306 static int nct6775_update_pwm(struct device *dev) 1307 { 1308 struct nct6775_data *data = dev_get_drvdata(dev); 1309 int i, j, err; 1310 u16 fanmodecfg, reg; 1311 bool duty_is_dc; 1312 1313 for (i = 0; i < data->pwm_num; i++) { 1314 if (!(data->has_pwm & BIT(i))) 1315 continue; 1316 1317 err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®); 1318 if (err) 1319 return err; 1320 duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]); 1321 data->pwm_mode[i] = !duty_is_dc; 1322 1323 err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg); 1324 if (err) 1325 return err; 1326 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) { 1327 if (data->REG_PWM[j] && data->REG_PWM[j][i]) { 1328 err = nct6775_read_value(data, data->REG_PWM[j][i], ®); 1329 if (err) 1330 return err; 1331 data->pwm[j][i] = reg; 1332 } 1333 } 1334 1335 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i], 1336 (fanmodecfg >> 4) & 7); 1337 1338 if (!data->temp_tolerance[0][i] || 1339 data->pwm_enable[i] != speed_cruise) 1340 data->temp_tolerance[0][i] = fanmodecfg & 0x0f; 1341 if (!data->target_speed_tolerance[i] || 1342 data->pwm_enable[i] == speed_cruise) { 1343 u8 t = fanmodecfg & 0x0f; 1344 1345 if (data->REG_TOLERANCE_H) { 1346 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1347 if (err) 1348 return err; 1349 t |= (reg & 0x70) >> 1; 1350 } 1351 data->target_speed_tolerance[i] = t; 1352 } 1353 1354 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®); 1355 if (err) 1356 return err; 1357 data->temp_tolerance[1][i] = reg; 1358 1359 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®); 1360 if (err) 1361 return err; 1362 data->pwm_temp_sel[i] = reg & 0x1f; 1363 /* If fan can stop, report floor as 0 */ 1364 if (reg & 0x80) 1365 data->pwm[2][i] = 0; 1366 1367 if (!data->REG_WEIGHT_TEMP_SEL[i]) 1368 continue; 1369 1370 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®); 1371 if (err) 1372 return err; 1373 data->pwm_weight_temp_sel[i] = reg & 0x1f; 1374 /* If weight is disabled, report weight source as 0 */ 1375 if (!(reg & 0x80)) 1376 data->pwm_weight_temp_sel[i] = 0; 1377 1378 /* Weight temp data */ 1379 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) { 1380 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®); 1381 if (err) 1382 return err; 1383 data->weight_temp[j][i] = reg; 1384 } 1385 } 1386 1387 return 0; 1388 } 1389 1390 static int nct6775_update_pwm_limits(struct device *dev) 1391 { 1392 struct nct6775_data *data = dev_get_drvdata(dev); 1393 int i, j, err; 1394 u16 reg, reg_t; 1395 1396 for (i = 0; i < data->pwm_num; i++) { 1397 if (!(data->has_pwm & BIT(i))) 1398 continue; 1399 1400 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) { 1401 err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®); 1402 if (err) 1403 return err; 1404 data->fan_time[j][i] = reg; 1405 } 1406 1407 err = nct6775_read_value(data, data->REG_TARGET[i], ®_t); 1408 if (err) 1409 return err; 1410 1411 /* Update only in matching mode or if never updated */ 1412 if (!data->target_temp[i] || 1413 data->pwm_enable[i] == thermal_cruise) 1414 data->target_temp[i] = reg_t & data->target_temp_mask; 1415 if (!data->target_speed[i] || 1416 data->pwm_enable[i] == speed_cruise) { 1417 if (data->REG_TOLERANCE_H) { 1418 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1419 if (err) 1420 return err; 1421 reg_t |= (reg & 0x0f) << 8; 1422 } 1423 data->target_speed[i] = reg_t; 1424 } 1425 1426 for (j = 0; j < data->auto_pwm_num; j++) { 1427 err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®); 1428 if (err) 1429 return err; 1430 data->auto_pwm[i][j] = reg; 1431 1432 err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®); 1433 if (err) 1434 return err; 1435 data->auto_temp[i][j] = reg; 1436 } 1437 1438 /* critical auto_pwm temperature data */ 1439 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®); 1440 if (err) 1441 return err; 1442 data->auto_temp[i][data->auto_pwm_num] = reg; 1443 1444 switch (data->kind) { 1445 case nct6775: 1446 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®); 1447 if (err) 1448 return err; 1449 data->auto_pwm[i][data->auto_pwm_num] = 1450 (reg & 0x02) ? 0xff : 0x00; 1451 break; 1452 case nct6776: 1453 data->auto_pwm[i][data->auto_pwm_num] = 0xff; 1454 break; 1455 case nct6106: 1456 case nct6116: 1457 case nct6779: 1458 case nct6791: 1459 case nct6792: 1460 case nct6793: 1461 case nct6795: 1462 case nct6796: 1463 case nct6797: 1464 case nct6798: 1465 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®); 1466 if (err) 1467 return err; 1468 if (reg & data->CRITICAL_PWM_ENABLE_MASK) { 1469 err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®); 1470 if (err) 1471 return err; 1472 } else { 1473 reg = 0xff; 1474 } 1475 data->auto_pwm[i][data->auto_pwm_num] = reg; 1476 break; 1477 } 1478 } 1479 1480 return 0; 1481 } 1482 1483 static struct nct6775_data *nct6775_update_device(struct device *dev) 1484 { 1485 struct nct6775_data *data = dev_get_drvdata(dev); 1486 int i, j, err = 0; 1487 u16 reg; 1488 1489 mutex_lock(&data->update_lock); 1490 1491 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1492 || !data->valid) { 1493 /* Fan clock dividers */ 1494 err = nct6775_update_fan_div_common(data); 1495 if (err) 1496 goto out; 1497 1498 /* Measured voltages and limits */ 1499 for (i = 0; i < data->in_num; i++) { 1500 if (!(data->have_in & BIT(i))) 1501 continue; 1502 1503 err = nct6775_read_value(data, data->REG_VIN[i], ®); 1504 if (err) 1505 goto out; 1506 data->in[i][0] = reg; 1507 1508 err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®); 1509 if (err) 1510 goto out; 1511 data->in[i][1] = reg; 1512 1513 err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®); 1514 if (err) 1515 goto out; 1516 data->in[i][2] = reg; 1517 } 1518 1519 /* Measured fan speeds and limits */ 1520 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) { 1521 if (!(data->has_fan & BIT(i))) 1522 continue; 1523 1524 err = nct6775_read_value(data, data->REG_FAN[i], ®); 1525 if (err) 1526 goto out; 1527 data->rpm[i] = data->fan_from_reg(reg, 1528 data->fan_div[i]); 1529 1530 if (data->has_fan_min & BIT(i)) { 1531 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®); 1532 if (err) 1533 goto out; 1534 data->fan_min[i] = reg; 1535 } 1536 1537 if (data->REG_FAN_PULSES[i]) { 1538 err = nct6775_read_value(data, data->REG_FAN_PULSES[i], ®); 1539 if (err) 1540 goto out; 1541 data->fan_pulses[i] = (reg >> data->FAN_PULSE_SHIFT[i]) & 0x03; 1542 } 1543 1544 err = nct6775_select_fan_div(dev, data, i, reg); 1545 if (err) 1546 goto out; 1547 } 1548 1549 err = nct6775_update_pwm(dev); 1550 if (err) 1551 goto out; 1552 1553 err = nct6775_update_pwm_limits(dev); 1554 if (err) 1555 goto out; 1556 1557 /* Measured temperatures and limits */ 1558 for (i = 0; i < NUM_TEMP; i++) { 1559 if (!(data->have_temp & BIT(i))) 1560 continue; 1561 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) { 1562 if (data->reg_temp[j][i]) { 1563 err = nct6775_read_temp(data, data->reg_temp[j][i], ®); 1564 if (err) 1565 goto out; 1566 data->temp[j][i] = reg; 1567 } 1568 } 1569 if (i >= NUM_TEMP_FIXED || 1570 !(data->have_temp_fixed & BIT(i))) 1571 continue; 1572 err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®); 1573 if (err) 1574 goto out; 1575 data->temp_offset[i] = reg; 1576 } 1577 1578 for (i = 0; i < NUM_TSI_TEMP; i++) { 1579 if (!(data->have_tsi_temp & BIT(i))) 1580 continue; 1581 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®); 1582 if (err) 1583 goto out; 1584 data->tsi_temp[i] = reg; 1585 } 1586 1587 data->alarms = 0; 1588 for (i = 0; i < NUM_REG_ALARM; i++) { 1589 u16 alarm; 1590 1591 if (!data->REG_ALARM[i]) 1592 continue; 1593 err = nct6775_read_value(data, data->REG_ALARM[i], &alarm); 1594 if (err) 1595 goto out; 1596 data->alarms |= ((u64)alarm) << (i << 3); 1597 } 1598 1599 data->beeps = 0; 1600 for (i = 0; i < NUM_REG_BEEP; i++) { 1601 u16 beep; 1602 1603 if (!data->REG_BEEP[i]) 1604 continue; 1605 err = nct6775_read_value(data, data->REG_BEEP[i], &beep); 1606 if (err) 1607 goto out; 1608 data->beeps |= ((u64)beep) << (i << 3); 1609 } 1610 1611 data->last_updated = jiffies; 1612 data->valid = true; 1613 } 1614 out: 1615 mutex_unlock(&data->update_lock); 1616 return err ? ERR_PTR(err) : data; 1617 } 1618 1619 /* 1620 * Sysfs callback functions 1621 */ 1622 static ssize_t 1623 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf) 1624 { 1625 struct nct6775_data *data = nct6775_update_device(dev); 1626 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1627 int index = sattr->index; 1628 int nr = sattr->nr; 1629 1630 if (IS_ERR(data)) 1631 return PTR_ERR(data); 1632 1633 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr)); 1634 } 1635 1636 static ssize_t 1637 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf, 1638 size_t count) 1639 { 1640 struct nct6775_data *data = dev_get_drvdata(dev); 1641 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1642 int index = sattr->index; 1643 int nr = sattr->nr; 1644 unsigned long val; 1645 int err; 1646 1647 err = kstrtoul(buf, 10, &val); 1648 if (err < 0) 1649 return err; 1650 mutex_lock(&data->update_lock); 1651 data->in[nr][index] = in_to_reg(val, nr); 1652 err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]); 1653 mutex_unlock(&data->update_lock); 1654 return err ? : count; 1655 } 1656 1657 ssize_t 1658 nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1659 { 1660 struct nct6775_data *data = nct6775_update_device(dev); 1661 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1662 int nr; 1663 1664 if (IS_ERR(data)) 1665 return PTR_ERR(data); 1666 1667 nr = data->ALARM_BITS[sattr->index]; 1668 return sprintf(buf, "%u\n", 1669 (unsigned int)((data->alarms >> nr) & 0x01)); 1670 } 1671 EXPORT_SYMBOL_GPL(nct6775_show_alarm); 1672 1673 static int find_temp_source(struct nct6775_data *data, int index, int count) 1674 { 1675 int source = data->temp_src[index]; 1676 int nr, err; 1677 1678 for (nr = 0; nr < count; nr++) { 1679 u16 src; 1680 1681 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src); 1682 if (err) 1683 return err; 1684 if ((src & 0x1f) == source) 1685 return nr; 1686 } 1687 return -ENODEV; 1688 } 1689 1690 static ssize_t 1691 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1692 { 1693 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1694 struct nct6775_data *data = nct6775_update_device(dev); 1695 unsigned int alarm = 0; 1696 int nr; 1697 1698 if (IS_ERR(data)) 1699 return PTR_ERR(data); 1700 1701 /* 1702 * For temperatures, there is no fixed mapping from registers to alarm 1703 * bits. Alarm bits are determined by the temperature source mapping. 1704 */ 1705 nr = find_temp_source(data, sattr->index, data->num_temp_alarms); 1706 if (nr >= 0) { 1707 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE]; 1708 1709 alarm = (data->alarms >> bit) & 0x01; 1710 } 1711 return sprintf(buf, "%u\n", alarm); 1712 } 1713 1714 ssize_t 1715 nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf) 1716 { 1717 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1718 struct nct6775_data *data = nct6775_update_device(dev); 1719 int nr; 1720 1721 if (IS_ERR(data)) 1722 return PTR_ERR(data); 1723 1724 nr = data->BEEP_BITS[sattr->index]; 1725 1726 return sprintf(buf, "%u\n", 1727 (unsigned int)((data->beeps >> nr) & 0x01)); 1728 } 1729 EXPORT_SYMBOL_GPL(nct6775_show_beep); 1730 1731 ssize_t 1732 nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 1733 { 1734 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1735 struct nct6775_data *data = dev_get_drvdata(dev); 1736 int nr = data->BEEP_BITS[sattr->index]; 1737 int regindex = nr >> 3; 1738 unsigned long val; 1739 int err; 1740 1741 err = kstrtoul(buf, 10, &val); 1742 if (err < 0) 1743 return err; 1744 if (val > 1) 1745 return -EINVAL; 1746 1747 mutex_lock(&data->update_lock); 1748 if (val) 1749 data->beeps |= (1ULL << nr); 1750 else 1751 data->beeps &= ~(1ULL << nr); 1752 err = nct6775_write_value(data, data->REG_BEEP[regindex], 1753 (data->beeps >> (regindex << 3)) & 0xff); 1754 mutex_unlock(&data->update_lock); 1755 return err ? : count; 1756 } 1757 EXPORT_SYMBOL_GPL(nct6775_store_beep); 1758 1759 static ssize_t 1760 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf) 1761 { 1762 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1763 struct nct6775_data *data = nct6775_update_device(dev); 1764 unsigned int beep = 0; 1765 int nr; 1766 1767 if (IS_ERR(data)) 1768 return PTR_ERR(data); 1769 1770 /* 1771 * For temperatures, there is no fixed mapping from registers to beep 1772 * enable bits. Beep enable bits are determined by the temperature 1773 * source mapping. 1774 */ 1775 nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1776 if (nr >= 0) { 1777 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1778 1779 beep = (data->beeps >> bit) & 0x01; 1780 } 1781 return sprintf(buf, "%u\n", beep); 1782 } 1783 1784 static ssize_t 1785 store_temp_beep(struct device *dev, struct device_attribute *attr, 1786 const char *buf, size_t count) 1787 { 1788 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1789 struct nct6775_data *data = dev_get_drvdata(dev); 1790 int nr, bit, regindex; 1791 unsigned long val; 1792 int err; 1793 1794 err = kstrtoul(buf, 10, &val); 1795 if (err < 0) 1796 return err; 1797 if (val > 1) 1798 return -EINVAL; 1799 1800 nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1801 if (nr < 0) 1802 return nr; 1803 1804 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1805 regindex = bit >> 3; 1806 1807 mutex_lock(&data->update_lock); 1808 if (val) 1809 data->beeps |= (1ULL << bit); 1810 else 1811 data->beeps &= ~(1ULL << bit); 1812 err = nct6775_write_value(data, data->REG_BEEP[regindex], 1813 (data->beeps >> (regindex << 3)) & 0xff); 1814 mutex_unlock(&data->update_lock); 1815 1816 return err ? : count; 1817 } 1818 1819 static umode_t nct6775_in_is_visible(struct kobject *kobj, 1820 struct attribute *attr, int index) 1821 { 1822 struct device *dev = kobj_to_dev(kobj); 1823 struct nct6775_data *data = dev_get_drvdata(dev); 1824 int in = index / 5; /* voltage index */ 1825 1826 if (!(data->have_in & BIT(in))) 1827 return 0; 1828 1829 return nct6775_attr_mode(data, attr); 1830 } 1831 1832 SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0); 1833 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0); 1834 SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0); 1835 SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1); 1836 SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2); 1837 1838 /* 1839 * nct6775_in_is_visible uses the index into the following array 1840 * to determine if attributes should be created or not. 1841 * Any change in order or content must be matched. 1842 */ 1843 static struct sensor_device_template *nct6775_attributes_in_template[] = { 1844 &sensor_dev_template_in_input, 1845 &sensor_dev_template_in_alarm, 1846 &sensor_dev_template_in_beep, 1847 &sensor_dev_template_in_min, 1848 &sensor_dev_template_in_max, 1849 NULL 1850 }; 1851 1852 static const struct sensor_template_group nct6775_in_template_group = { 1853 .templates = nct6775_attributes_in_template, 1854 .is_visible = nct6775_in_is_visible, 1855 }; 1856 1857 static ssize_t 1858 show_fan(struct device *dev, struct device_attribute *attr, char *buf) 1859 { 1860 struct nct6775_data *data = nct6775_update_device(dev); 1861 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1862 int nr = sattr->index; 1863 1864 if (IS_ERR(data)) 1865 return PTR_ERR(data); 1866 1867 return sprintf(buf, "%d\n", data->rpm[nr]); 1868 } 1869 1870 static ssize_t 1871 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf) 1872 { 1873 struct nct6775_data *data = nct6775_update_device(dev); 1874 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1875 int nr = sattr->index; 1876 1877 if (IS_ERR(data)) 1878 return PTR_ERR(data); 1879 1880 return sprintf(buf, "%d\n", 1881 data->fan_from_reg_min(data->fan_min[nr], 1882 data->fan_div[nr])); 1883 } 1884 1885 static ssize_t 1886 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf) 1887 { 1888 struct nct6775_data *data = nct6775_update_device(dev); 1889 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1890 int nr = sattr->index; 1891 1892 if (IS_ERR(data)) 1893 return PTR_ERR(data); 1894 1895 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr])); 1896 } 1897 1898 static ssize_t 1899 store_fan_min(struct device *dev, struct device_attribute *attr, 1900 const char *buf, size_t count) 1901 { 1902 struct nct6775_data *data = dev_get_drvdata(dev); 1903 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1904 int nr = sattr->index; 1905 unsigned long val; 1906 unsigned int reg; 1907 u8 new_div; 1908 int err; 1909 1910 err = kstrtoul(buf, 10, &val); 1911 if (err < 0) 1912 return err; 1913 1914 mutex_lock(&data->update_lock); 1915 if (!data->has_fan_div) { 1916 /* NCT6776F or NCT6779D; we know this is a 13 bit register */ 1917 if (!val) { 1918 val = 0xff1f; 1919 } else { 1920 if (val > 1350000U) 1921 val = 135000U; 1922 val = 1350000U / val; 1923 val = (val & 0x1f) | ((val << 3) & 0xff00); 1924 } 1925 data->fan_min[nr] = val; 1926 goto write_min; /* Leave fan divider alone */ 1927 } 1928 if (!val) { 1929 /* No min limit, alarm disabled */ 1930 data->fan_min[nr] = 255; 1931 new_div = data->fan_div[nr]; /* No change */ 1932 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1); 1933 goto write_div; 1934 } 1935 reg = 1350000U / val; 1936 if (reg >= 128 * 255) { 1937 /* 1938 * Speed below this value cannot possibly be represented, 1939 * even with the highest divider (128) 1940 */ 1941 data->fan_min[nr] = 254; 1942 new_div = 7; /* 128 == BIT(7) */ 1943 dev_warn(dev, 1944 "fan%u low limit %lu below minimum %u, set to minimum\n", 1945 nr + 1, val, data->fan_from_reg_min(254, 7)); 1946 } else if (!reg) { 1947 /* 1948 * Speed above this value cannot possibly be represented, 1949 * even with the lowest divider (1) 1950 */ 1951 data->fan_min[nr] = 1; 1952 new_div = 0; /* 1 == BIT(0) */ 1953 dev_warn(dev, 1954 "fan%u low limit %lu above maximum %u, set to maximum\n", 1955 nr + 1, val, data->fan_from_reg_min(1, 0)); 1956 } else { 1957 /* 1958 * Automatically pick the best divider, i.e. the one such 1959 * that the min limit will correspond to a register value 1960 * in the 96..192 range 1961 */ 1962 new_div = 0; 1963 while (reg > 192 && new_div < 7) { 1964 reg >>= 1; 1965 new_div++; 1966 } 1967 data->fan_min[nr] = reg; 1968 } 1969 1970 write_div: 1971 /* 1972 * Write both the fan clock divider (if it changed) and the new 1973 * fan min (unconditionally) 1974 */ 1975 if (new_div != data->fan_div[nr]) { 1976 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n", 1977 nr + 1, div_from_reg(data->fan_div[nr]), 1978 div_from_reg(new_div)); 1979 data->fan_div[nr] = new_div; 1980 err = nct6775_write_fan_div_common(data, nr); 1981 if (err) 1982 goto write_min; 1983 /* Give the chip time to sample a new speed value */ 1984 data->last_updated = jiffies; 1985 } 1986 1987 write_min: 1988 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]); 1989 mutex_unlock(&data->update_lock); 1990 1991 return err ? : count; 1992 } 1993 1994 static ssize_t 1995 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf) 1996 { 1997 struct nct6775_data *data = nct6775_update_device(dev); 1998 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1999 int p; 2000 2001 if (IS_ERR(data)) 2002 return PTR_ERR(data); 2003 2004 p = data->fan_pulses[sattr->index]; 2005 return sprintf(buf, "%d\n", p ? : 4); 2006 } 2007 2008 static ssize_t 2009 store_fan_pulses(struct device *dev, struct device_attribute *attr, 2010 const char *buf, size_t count) 2011 { 2012 struct nct6775_data *data = dev_get_drvdata(dev); 2013 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2014 int nr = sattr->index; 2015 unsigned long val; 2016 int err; 2017 u16 reg; 2018 2019 err = kstrtoul(buf, 10, &val); 2020 if (err < 0) 2021 return err; 2022 2023 if (val > 4) 2024 return -EINVAL; 2025 2026 mutex_lock(&data->update_lock); 2027 data->fan_pulses[nr] = val & 3; 2028 err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®); 2029 if (err) 2030 goto out; 2031 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]); 2032 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr]; 2033 err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg); 2034 out: 2035 mutex_unlock(&data->update_lock); 2036 2037 return err ? : count; 2038 } 2039 2040 static umode_t nct6775_fan_is_visible(struct kobject *kobj, 2041 struct attribute *attr, int index) 2042 { 2043 struct device *dev = kobj_to_dev(kobj); 2044 struct nct6775_data *data = dev_get_drvdata(dev); 2045 int fan = index / 6; /* fan index */ 2046 int nr = index % 6; /* attribute index */ 2047 2048 if (!(data->has_fan & BIT(fan))) 2049 return 0; 2050 2051 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1) 2052 return 0; 2053 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1) 2054 return 0; 2055 if (nr == 3 && !data->REG_FAN_PULSES[fan]) 2056 return 0; 2057 if (nr == 4 && !(data->has_fan_min & BIT(fan))) 2058 return 0; 2059 if (nr == 5 && data->kind != nct6775) 2060 return 0; 2061 2062 return nct6775_attr_mode(data, attr); 2063 } 2064 2065 SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0); 2066 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE); 2067 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep, 2068 nct6775_store_beep, FAN_ALARM_BASE); 2069 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0); 2070 SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0); 2071 SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0); 2072 2073 /* 2074 * nct6775_fan_is_visible uses the index into the following array 2075 * to determine if attributes should be created or not. 2076 * Any change in order or content must be matched. 2077 */ 2078 static struct sensor_device_template *nct6775_attributes_fan_template[] = { 2079 &sensor_dev_template_fan_input, 2080 &sensor_dev_template_fan_alarm, /* 1 */ 2081 &sensor_dev_template_fan_beep, /* 2 */ 2082 &sensor_dev_template_fan_pulses, 2083 &sensor_dev_template_fan_min, /* 4 */ 2084 &sensor_dev_template_fan_div, /* 5 */ 2085 NULL 2086 }; 2087 2088 static const struct sensor_template_group nct6775_fan_template_group = { 2089 .templates = nct6775_attributes_fan_template, 2090 .is_visible = nct6775_fan_is_visible, 2091 .base = 1, 2092 }; 2093 2094 static ssize_t 2095 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2096 { 2097 struct nct6775_data *data = nct6775_update_device(dev); 2098 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2099 int nr = sattr->index; 2100 2101 if (IS_ERR(data)) 2102 return PTR_ERR(data); 2103 2104 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]); 2105 } 2106 2107 static ssize_t 2108 show_temp(struct device *dev, struct device_attribute *attr, char *buf) 2109 { 2110 struct nct6775_data *data = nct6775_update_device(dev); 2111 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2112 int nr = sattr->nr; 2113 int index = sattr->index; 2114 2115 if (IS_ERR(data)) 2116 return PTR_ERR(data); 2117 2118 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr])); 2119 } 2120 2121 static ssize_t 2122 store_temp(struct device *dev, struct device_attribute *attr, const char *buf, 2123 size_t count) 2124 { 2125 struct nct6775_data *data = dev_get_drvdata(dev); 2126 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2127 int nr = sattr->nr; 2128 int index = sattr->index; 2129 int err; 2130 long val; 2131 2132 err = kstrtol(buf, 10, &val); 2133 if (err < 0) 2134 return err; 2135 2136 mutex_lock(&data->update_lock); 2137 data->temp[index][nr] = LM75_TEMP_TO_REG(val); 2138 err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]); 2139 mutex_unlock(&data->update_lock); 2140 return err ? : count; 2141 } 2142 2143 static ssize_t 2144 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf) 2145 { 2146 struct nct6775_data *data = nct6775_update_device(dev); 2147 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2148 2149 if (IS_ERR(data)) 2150 return PTR_ERR(data); 2151 2152 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000); 2153 } 2154 2155 static ssize_t 2156 store_temp_offset(struct device *dev, struct device_attribute *attr, 2157 const char *buf, size_t count) 2158 { 2159 struct nct6775_data *data = dev_get_drvdata(dev); 2160 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2161 int nr = sattr->index; 2162 long val; 2163 int err; 2164 2165 err = kstrtol(buf, 10, &val); 2166 if (err < 0) 2167 return err; 2168 2169 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127); 2170 2171 mutex_lock(&data->update_lock); 2172 data->temp_offset[nr] = val; 2173 err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val); 2174 mutex_unlock(&data->update_lock); 2175 2176 return err ? : count; 2177 } 2178 2179 static ssize_t 2180 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf) 2181 { 2182 struct nct6775_data *data = nct6775_update_device(dev); 2183 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2184 int nr = sattr->index; 2185 2186 if (IS_ERR(data)) 2187 return PTR_ERR(data); 2188 2189 return sprintf(buf, "%d\n", (int)data->temp_type[nr]); 2190 } 2191 2192 static ssize_t 2193 store_temp_type(struct device *dev, struct device_attribute *attr, 2194 const char *buf, size_t count) 2195 { 2196 struct nct6775_data *data = nct6775_update_device(dev); 2197 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2198 int nr = sattr->index; 2199 unsigned long val; 2200 int err; 2201 u8 vbit, dbit; 2202 u16 vbat, diode; 2203 2204 if (IS_ERR(data)) 2205 return PTR_ERR(data); 2206 2207 err = kstrtoul(buf, 10, &val); 2208 if (err < 0) 2209 return err; 2210 2211 if (val != 1 && val != 3 && val != 4) 2212 return -EINVAL; 2213 2214 mutex_lock(&data->update_lock); 2215 2216 data->temp_type[nr] = val; 2217 vbit = 0x02 << nr; 2218 dbit = data->DIODE_MASK << nr; 2219 2220 err = nct6775_read_value(data, data->REG_VBAT, &vbat); 2221 if (err) 2222 goto out; 2223 vbat &= ~vbit; 2224 2225 err = nct6775_read_value(data, data->REG_DIODE, &diode); 2226 if (err) 2227 goto out; 2228 diode &= ~dbit; 2229 2230 switch (val) { 2231 case 1: /* CPU diode (diode, current mode) */ 2232 vbat |= vbit; 2233 diode |= dbit; 2234 break; 2235 case 3: /* diode, voltage mode */ 2236 vbat |= dbit; 2237 break; 2238 case 4: /* thermistor */ 2239 break; 2240 } 2241 err = nct6775_write_value(data, data->REG_VBAT, vbat); 2242 if (err) 2243 goto out; 2244 err = nct6775_write_value(data, data->REG_DIODE, diode); 2245 out: 2246 mutex_unlock(&data->update_lock); 2247 return err ? : count; 2248 } 2249 2250 static umode_t nct6775_temp_is_visible(struct kobject *kobj, 2251 struct attribute *attr, int index) 2252 { 2253 struct device *dev = kobj_to_dev(kobj); 2254 struct nct6775_data *data = dev_get_drvdata(dev); 2255 int temp = index / 10; /* temp index */ 2256 int nr = index % 10; /* attribute index */ 2257 2258 if (!(data->have_temp & BIT(temp))) 2259 return 0; 2260 2261 if (nr == 1 && !data->temp_label) 2262 return 0; 2263 2264 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0) 2265 return 0; /* alarm */ 2266 2267 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0) 2268 return 0; /* beep */ 2269 2270 if (nr == 4 && !data->reg_temp[1][temp]) /* max */ 2271 return 0; 2272 2273 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */ 2274 return 0; 2275 2276 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */ 2277 return 0; 2278 2279 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */ 2280 return 0; 2281 2282 /* offset and type only apply to fixed sensors */ 2283 if (nr > 7 && !(data->have_temp_fixed & BIT(temp))) 2284 return 0; 2285 2286 return nct6775_attr_mode(data, attr); 2287 } 2288 2289 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0); 2290 SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0); 2291 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1); 2292 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2); 2293 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3); 2294 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4); 2295 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0); 2296 SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0); 2297 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0); 2298 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0); 2299 2300 /* 2301 * nct6775_temp_is_visible uses the index into the following array 2302 * to determine if attributes should be created or not. 2303 * Any change in order or content must be matched. 2304 */ 2305 static struct sensor_device_template *nct6775_attributes_temp_template[] = { 2306 &sensor_dev_template_temp_input, 2307 &sensor_dev_template_temp_label, 2308 &sensor_dev_template_temp_alarm, /* 2 */ 2309 &sensor_dev_template_temp_beep, /* 3 */ 2310 &sensor_dev_template_temp_max, /* 4 */ 2311 &sensor_dev_template_temp_max_hyst, /* 5 */ 2312 &sensor_dev_template_temp_crit, /* 6 */ 2313 &sensor_dev_template_temp_lcrit, /* 7 */ 2314 &sensor_dev_template_temp_offset, /* 8 */ 2315 &sensor_dev_template_temp_type, /* 9 */ 2316 NULL 2317 }; 2318 2319 static const struct sensor_template_group nct6775_temp_template_group = { 2320 .templates = nct6775_attributes_temp_template, 2321 .is_visible = nct6775_temp_is_visible, 2322 .base = 1, 2323 }; 2324 2325 static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf) 2326 { 2327 struct nct6775_data *data = nct6775_update_device(dev); 2328 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2329 2330 if (IS_ERR(data)) 2331 return PTR_ERR(data); 2332 2333 return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index])); 2334 } 2335 2336 static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2337 { 2338 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2339 2340 return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index); 2341 } 2342 2343 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0); 2344 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0); 2345 2346 static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr, 2347 int index) 2348 { 2349 struct device *dev = kobj_to_dev(kobj); 2350 struct nct6775_data *data = dev_get_drvdata(dev); 2351 int temp = index / 2; 2352 2353 return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0; 2354 } 2355 2356 /* 2357 * The index calculation in nct6775_tsi_temp_is_visible() must be kept in 2358 * sync with the size of this array. 2359 */ 2360 static struct sensor_device_template *nct6775_tsi_temp_template[] = { 2361 &sensor_dev_template_tsi_temp_input, 2362 &sensor_dev_template_tsi_temp_label, 2363 NULL 2364 }; 2365 2366 static ssize_t 2367 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf) 2368 { 2369 struct nct6775_data *data = nct6775_update_device(dev); 2370 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2371 2372 if (IS_ERR(data)) 2373 return PTR_ERR(data); 2374 2375 return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]); 2376 } 2377 2378 static ssize_t 2379 store_pwm_mode(struct device *dev, struct device_attribute *attr, 2380 const char *buf, size_t count) 2381 { 2382 struct nct6775_data *data = dev_get_drvdata(dev); 2383 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2384 int nr = sattr->index; 2385 unsigned long val; 2386 int err; 2387 u16 reg; 2388 2389 err = kstrtoul(buf, 10, &val); 2390 if (err < 0) 2391 return err; 2392 2393 if (val > 1) 2394 return -EINVAL; 2395 2396 /* Setting DC mode (0) is not supported for all chips/channels */ 2397 if (data->REG_PWM_MODE[nr] == 0) { 2398 if (!val) 2399 return -EINVAL; 2400 return count; 2401 } 2402 2403 mutex_lock(&data->update_lock); 2404 data->pwm_mode[nr] = val; 2405 err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®); 2406 if (err) 2407 goto out; 2408 reg &= ~data->PWM_MODE_MASK[nr]; 2409 if (!val) 2410 reg |= data->PWM_MODE_MASK[nr]; 2411 err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg); 2412 out: 2413 mutex_unlock(&data->update_lock); 2414 return err ? : count; 2415 } 2416 2417 static ssize_t 2418 show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 2419 { 2420 struct nct6775_data *data = nct6775_update_device(dev); 2421 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2422 int nr = sattr->nr; 2423 int index = sattr->index; 2424 int err; 2425 u16 pwm; 2426 2427 if (IS_ERR(data)) 2428 return PTR_ERR(data); 2429 2430 /* 2431 * For automatic fan control modes, show current pwm readings. 2432 * Otherwise, show the configured value. 2433 */ 2434 if (index == 0 && data->pwm_enable[nr] > manual) { 2435 err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm); 2436 if (err) 2437 return err; 2438 } else { 2439 pwm = data->pwm[index][nr]; 2440 } 2441 2442 return sprintf(buf, "%d\n", pwm); 2443 } 2444 2445 static ssize_t 2446 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf, 2447 size_t count) 2448 { 2449 struct nct6775_data *data = dev_get_drvdata(dev); 2450 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2451 int nr = sattr->nr; 2452 int index = sattr->index; 2453 unsigned long val; 2454 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 }; 2455 int maxval[7] 2456 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 }; 2457 int err; 2458 u16 reg; 2459 2460 err = kstrtoul(buf, 10, &val); 2461 if (err < 0) 2462 return err; 2463 val = clamp_val(val, minval[index], maxval[index]); 2464 2465 mutex_lock(&data->update_lock); 2466 data->pwm[index][nr] = val; 2467 err = nct6775_write_value(data, data->REG_PWM[index][nr], val); 2468 if (err) 2469 goto out; 2470 if (index == 2) { /* floor: disable if val == 0 */ 2471 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2472 if (err) 2473 goto out; 2474 reg &= 0x7f; 2475 if (val) 2476 reg |= 0x80; 2477 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2478 } 2479 out: 2480 mutex_unlock(&data->update_lock); 2481 return err ? : count; 2482 } 2483 2484 /* Returns 0 if OK, -EINVAL otherwise */ 2485 static int check_trip_points(struct nct6775_data *data, int nr) 2486 { 2487 int i; 2488 2489 for (i = 0; i < data->auto_pwm_num - 1; i++) { 2490 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) 2491 return -EINVAL; 2492 } 2493 for (i = 0; i < data->auto_pwm_num - 1; i++) { 2494 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) 2495 return -EINVAL; 2496 } 2497 /* validate critical temperature and pwm if enabled (pwm > 0) */ 2498 if (data->auto_pwm[nr][data->auto_pwm_num]) { 2499 if (data->auto_temp[nr][data->auto_pwm_num - 1] > 2500 data->auto_temp[nr][data->auto_pwm_num] || 2501 data->auto_pwm[nr][data->auto_pwm_num - 1] > 2502 data->auto_pwm[nr][data->auto_pwm_num]) 2503 return -EINVAL; 2504 } 2505 return 0; 2506 } 2507 2508 static int pwm_update_registers(struct nct6775_data *data, int nr) 2509 { 2510 u16 reg; 2511 int err; 2512 2513 switch (data->pwm_enable[nr]) { 2514 case off: 2515 case manual: 2516 break; 2517 case speed_cruise: 2518 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2519 if (err) 2520 return err; 2521 reg = (reg & ~data->tolerance_mask) | 2522 (data->target_speed_tolerance[nr] & data->tolerance_mask); 2523 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2524 if (err) 2525 return err; 2526 err = nct6775_write_value(data, data->REG_TARGET[nr], 2527 data->target_speed[nr] & 0xff); 2528 if (err) 2529 return err; 2530 if (data->REG_TOLERANCE_H) { 2531 reg = (data->target_speed[nr] >> 8) & 0x0f; 2532 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1; 2533 err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg); 2534 if (err) 2535 return err; 2536 } 2537 break; 2538 case thermal_cruise: 2539 err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]); 2540 if (err) 2541 return err; 2542 fallthrough; 2543 default: 2544 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2545 if (err) 2546 return err; 2547 reg = (reg & ~data->tolerance_mask) | 2548 data->temp_tolerance[0][nr]; 2549 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2550 if (err) 2551 return err; 2552 break; 2553 } 2554 2555 return 0; 2556 } 2557 2558 static ssize_t 2559 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 2560 { 2561 struct nct6775_data *data = nct6775_update_device(dev); 2562 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2563 2564 if (IS_ERR(data)) 2565 return PTR_ERR(data); 2566 2567 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]); 2568 } 2569 2570 static ssize_t 2571 store_pwm_enable(struct device *dev, struct device_attribute *attr, 2572 const char *buf, size_t count) 2573 { 2574 struct nct6775_data *data = dev_get_drvdata(dev); 2575 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2576 int nr = sattr->index; 2577 unsigned long val; 2578 int err; 2579 u16 reg; 2580 2581 err = kstrtoul(buf, 10, &val); 2582 if (err < 0) 2583 return err; 2584 2585 if (val > sf4) 2586 return -EINVAL; 2587 2588 if (val == sf3 && data->kind != nct6775) 2589 return -EINVAL; 2590 2591 if (val == sf4 && check_trip_points(data, nr)) { 2592 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n"); 2593 dev_err(dev, "Adjust trip points and try again\n"); 2594 return -EINVAL; 2595 } 2596 2597 mutex_lock(&data->update_lock); 2598 data->pwm_enable[nr] = val; 2599 if (val == off) { 2600 /* 2601 * turn off pwm control: select manual mode, set pwm to maximum 2602 */ 2603 data->pwm[0][nr] = 255; 2604 err = nct6775_write_value(data, data->REG_PWM[0][nr], 255); 2605 if (err) 2606 goto out; 2607 } 2608 err = pwm_update_registers(data, nr); 2609 if (err) 2610 goto out; 2611 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2612 if (err) 2613 goto out; 2614 reg &= 0x0f; 2615 reg |= pwm_enable_to_reg(val) << 4; 2616 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2617 out: 2618 mutex_unlock(&data->update_lock); 2619 return err ? : count; 2620 } 2621 2622 static ssize_t 2623 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src) 2624 { 2625 int i, sel = 0; 2626 2627 for (i = 0; i < NUM_TEMP; i++) { 2628 if (!(data->have_temp & BIT(i))) 2629 continue; 2630 if (src == data->temp_src[i]) { 2631 sel = i + 1; 2632 break; 2633 } 2634 } 2635 2636 return sprintf(buf, "%d\n", sel); 2637 } 2638 2639 static ssize_t 2640 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf) 2641 { 2642 struct nct6775_data *data = nct6775_update_device(dev); 2643 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2644 int index = sattr->index; 2645 2646 if (IS_ERR(data)) 2647 return PTR_ERR(data); 2648 2649 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]); 2650 } 2651 2652 static ssize_t 2653 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr, 2654 const char *buf, size_t count) 2655 { 2656 struct nct6775_data *data = nct6775_update_device(dev); 2657 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2658 int nr = sattr->index; 2659 unsigned long val; 2660 int err, src; 2661 u16 reg; 2662 2663 if (IS_ERR(data)) 2664 return PTR_ERR(data); 2665 2666 err = kstrtoul(buf, 10, &val); 2667 if (err < 0) 2668 return err; 2669 if (val == 0 || val > NUM_TEMP) 2670 return -EINVAL; 2671 if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1]) 2672 return -EINVAL; 2673 2674 mutex_lock(&data->update_lock); 2675 src = data->temp_src[val - 1]; 2676 data->pwm_temp_sel[nr] = src; 2677 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2678 if (err) 2679 goto out; 2680 reg &= 0xe0; 2681 reg |= src; 2682 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2683 out: 2684 mutex_unlock(&data->update_lock); 2685 2686 return err ? : count; 2687 } 2688 2689 static ssize_t 2690 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2691 char *buf) 2692 { 2693 struct nct6775_data *data = nct6775_update_device(dev); 2694 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2695 int index = sattr->index; 2696 2697 if (IS_ERR(data)) 2698 return PTR_ERR(data); 2699 2700 return show_pwm_temp_sel_common(data, buf, 2701 data->pwm_weight_temp_sel[index]); 2702 } 2703 2704 static ssize_t 2705 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2706 const char *buf, size_t count) 2707 { 2708 struct nct6775_data *data = nct6775_update_device(dev); 2709 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2710 int nr = sattr->index; 2711 unsigned long val; 2712 int err, src; 2713 u16 reg; 2714 2715 if (IS_ERR(data)) 2716 return PTR_ERR(data); 2717 2718 err = kstrtoul(buf, 10, &val); 2719 if (err < 0) 2720 return err; 2721 if (val > NUM_TEMP) 2722 return -EINVAL; 2723 val = array_index_nospec(val, NUM_TEMP + 1); 2724 if (val && (!(data->have_temp & BIT(val - 1)) || 2725 !data->temp_src[val - 1])) 2726 return -EINVAL; 2727 2728 mutex_lock(&data->update_lock); 2729 if (val) { 2730 src = data->temp_src[val - 1]; 2731 data->pwm_weight_temp_sel[nr] = src; 2732 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2733 if (err) 2734 goto out; 2735 reg &= 0xe0; 2736 reg |= (src | 0x80); 2737 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2738 } else { 2739 data->pwm_weight_temp_sel[nr] = 0; 2740 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2741 if (err) 2742 goto out; 2743 reg &= 0x7f; 2744 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2745 } 2746 out: 2747 mutex_unlock(&data->update_lock); 2748 2749 return err ? : count; 2750 } 2751 2752 static ssize_t 2753 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf) 2754 { 2755 struct nct6775_data *data = nct6775_update_device(dev); 2756 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2757 2758 if (IS_ERR(data)) 2759 return PTR_ERR(data); 2760 2761 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000); 2762 } 2763 2764 static ssize_t 2765 store_target_temp(struct device *dev, struct device_attribute *attr, 2766 const char *buf, size_t count) 2767 { 2768 struct nct6775_data *data = dev_get_drvdata(dev); 2769 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2770 int nr = sattr->index; 2771 unsigned long val; 2772 int err; 2773 2774 err = kstrtoul(buf, 10, &val); 2775 if (err < 0) 2776 return err; 2777 2778 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 2779 data->target_temp_mask); 2780 2781 mutex_lock(&data->update_lock); 2782 data->target_temp[nr] = val; 2783 err = pwm_update_registers(data, nr); 2784 mutex_unlock(&data->update_lock); 2785 return err ? : count; 2786 } 2787 2788 static ssize_t 2789 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf) 2790 { 2791 struct nct6775_data *data = nct6775_update_device(dev); 2792 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2793 int nr = sattr->index; 2794 2795 if (IS_ERR(data)) 2796 return PTR_ERR(data); 2797 2798 return sprintf(buf, "%d\n", 2799 fan_from_reg16(data->target_speed[nr], 2800 data->fan_div[nr])); 2801 } 2802 2803 static ssize_t 2804 store_target_speed(struct device *dev, struct device_attribute *attr, 2805 const char *buf, size_t count) 2806 { 2807 struct nct6775_data *data = dev_get_drvdata(dev); 2808 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2809 int nr = sattr->index; 2810 unsigned long val; 2811 int err; 2812 u16 speed; 2813 2814 err = kstrtoul(buf, 10, &val); 2815 if (err < 0) 2816 return err; 2817 2818 val = clamp_val(val, 0, 1350000U); 2819 speed = fan_to_reg(val, data->fan_div[nr]); 2820 2821 mutex_lock(&data->update_lock); 2822 data->target_speed[nr] = speed; 2823 err = pwm_update_registers(data, nr); 2824 mutex_unlock(&data->update_lock); 2825 return err ? : count; 2826 } 2827 2828 static ssize_t 2829 show_temp_tolerance(struct device *dev, struct device_attribute *attr, 2830 char *buf) 2831 { 2832 struct nct6775_data *data = nct6775_update_device(dev); 2833 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2834 int nr = sattr->nr; 2835 int index = sattr->index; 2836 2837 if (IS_ERR(data)) 2838 return PTR_ERR(data); 2839 2840 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000); 2841 } 2842 2843 static ssize_t 2844 store_temp_tolerance(struct device *dev, struct device_attribute *attr, 2845 const char *buf, size_t count) 2846 { 2847 struct nct6775_data *data = dev_get_drvdata(dev); 2848 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2849 int nr = sattr->nr; 2850 int index = sattr->index; 2851 unsigned long val; 2852 int err; 2853 2854 err = kstrtoul(buf, 10, &val); 2855 if (err < 0) 2856 return err; 2857 2858 /* Limit tolerance as needed */ 2859 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask); 2860 2861 mutex_lock(&data->update_lock); 2862 data->temp_tolerance[index][nr] = val; 2863 if (index) 2864 err = pwm_update_registers(data, nr); 2865 else 2866 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val); 2867 mutex_unlock(&data->update_lock); 2868 return err ? : count; 2869 } 2870 2871 /* 2872 * Fan speed tolerance is a tricky beast, since the associated register is 2873 * a tick counter, but the value is reported and configured as rpm. 2874 * Compute resulting low and high rpm values and report the difference. 2875 * A fan speed tolerance only makes sense if a fan target speed has been 2876 * configured, so only display values other than 0 if that is the case. 2877 */ 2878 static ssize_t 2879 show_speed_tolerance(struct device *dev, struct device_attribute *attr, 2880 char *buf) 2881 { 2882 struct nct6775_data *data = nct6775_update_device(dev); 2883 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2884 int nr = sattr->index; 2885 int target, tolerance = 0; 2886 2887 if (IS_ERR(data)) 2888 return PTR_ERR(data); 2889 2890 target = data->target_speed[nr]; 2891 2892 if (target) { 2893 int low = target - data->target_speed_tolerance[nr]; 2894 int high = target + data->target_speed_tolerance[nr]; 2895 2896 if (low <= 0) 2897 low = 1; 2898 if (high > 0xffff) 2899 high = 0xffff; 2900 if (high < low) 2901 high = low; 2902 2903 tolerance = (fan_from_reg16(low, data->fan_div[nr]) 2904 - fan_from_reg16(high, data->fan_div[nr])) / 2; 2905 } 2906 2907 return sprintf(buf, "%d\n", tolerance); 2908 } 2909 2910 static ssize_t 2911 store_speed_tolerance(struct device *dev, struct device_attribute *attr, 2912 const char *buf, size_t count) 2913 { 2914 struct nct6775_data *data = dev_get_drvdata(dev); 2915 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2916 int nr = sattr->index; 2917 unsigned long val; 2918 int err; 2919 int low, high; 2920 2921 err = kstrtoul(buf, 10, &val); 2922 if (err < 0) 2923 return err; 2924 2925 high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val; 2926 low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val; 2927 if (low <= 0) 2928 low = 1; 2929 if (high < low) 2930 high = low; 2931 2932 val = (fan_to_reg(low, data->fan_div[nr]) - 2933 fan_to_reg(high, data->fan_div[nr])) / 2; 2934 2935 /* Limit tolerance as needed */ 2936 val = clamp_val(val, 0, data->speed_tolerance_limit); 2937 2938 mutex_lock(&data->update_lock); 2939 data->target_speed_tolerance[nr] = val; 2940 err = pwm_update_registers(data, nr); 2941 mutex_unlock(&data->update_lock); 2942 return err ? : count; 2943 } 2944 2945 SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0); 2946 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0); 2947 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0); 2948 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0); 2949 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0); 2950 SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0); 2951 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance, 2952 store_speed_tolerance, 0); 2953 2954 /* Smart Fan registers */ 2955 2956 static ssize_t 2957 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf) 2958 { 2959 struct nct6775_data *data = nct6775_update_device(dev); 2960 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2961 int nr = sattr->nr; 2962 int index = sattr->index; 2963 2964 if (IS_ERR(data)) 2965 return PTR_ERR(data); 2966 2967 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000); 2968 } 2969 2970 static ssize_t 2971 store_weight_temp(struct device *dev, struct device_attribute *attr, 2972 const char *buf, size_t count) 2973 { 2974 struct nct6775_data *data = dev_get_drvdata(dev); 2975 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2976 int nr = sattr->nr; 2977 int index = sattr->index; 2978 unsigned long val; 2979 int err; 2980 2981 err = kstrtoul(buf, 10, &val); 2982 if (err < 0) 2983 return err; 2984 2985 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255); 2986 2987 mutex_lock(&data->update_lock); 2988 data->weight_temp[index][nr] = val; 2989 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val); 2990 mutex_unlock(&data->update_lock); 2991 return err ? : count; 2992 } 2993 2994 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644, 2995 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0); 2996 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step", 2997 0644, show_weight_temp, store_weight_temp, 0, 0); 2998 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol", 2999 0644, show_weight_temp, store_weight_temp, 0, 1); 3000 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base", 3001 0644, show_weight_temp, store_weight_temp, 0, 2); 3002 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5); 3003 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6); 3004 3005 static ssize_t 3006 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf) 3007 { 3008 struct nct6775_data *data = nct6775_update_device(dev); 3009 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3010 int nr = sattr->nr; 3011 int index = sattr->index; 3012 3013 if (IS_ERR(data)) 3014 return PTR_ERR(data); 3015 3016 return sprintf(buf, "%d\n", 3017 step_time_from_reg(data->fan_time[index][nr], 3018 data->pwm_mode[nr])); 3019 } 3020 3021 static ssize_t 3022 store_fan_time(struct device *dev, struct device_attribute *attr, 3023 const char *buf, size_t count) 3024 { 3025 struct nct6775_data *data = dev_get_drvdata(dev); 3026 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3027 int nr = sattr->nr; 3028 int index = sattr->index; 3029 unsigned long val; 3030 int err; 3031 3032 err = kstrtoul(buf, 10, &val); 3033 if (err < 0) 3034 return err; 3035 3036 val = step_time_to_reg(val, data->pwm_mode[nr]); 3037 mutex_lock(&data->update_lock); 3038 data->fan_time[index][nr] = val; 3039 err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val); 3040 mutex_unlock(&data->update_lock); 3041 return err ? : count; 3042 } 3043 3044 static ssize_t 3045 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf) 3046 { 3047 struct nct6775_data *data = nct6775_update_device(dev); 3048 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3049 3050 if (IS_ERR(data)) 3051 return PTR_ERR(data); 3052 3053 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]); 3054 } 3055 3056 static ssize_t 3057 store_auto_pwm(struct device *dev, struct device_attribute *attr, 3058 const char *buf, size_t count) 3059 { 3060 struct nct6775_data *data = dev_get_drvdata(dev); 3061 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3062 int nr = sattr->nr; 3063 int point = sattr->index; 3064 unsigned long val; 3065 int err; 3066 u16 reg; 3067 3068 err = kstrtoul(buf, 10, &val); 3069 if (err < 0) 3070 return err; 3071 if (val > 255) 3072 return -EINVAL; 3073 3074 if (point == data->auto_pwm_num) { 3075 if (data->kind != nct6775 && !val) 3076 return -EINVAL; 3077 if (data->kind != nct6779 && val) 3078 val = 0xff; 3079 } 3080 3081 mutex_lock(&data->update_lock); 3082 data->auto_pwm[nr][point] = val; 3083 if (point < data->auto_pwm_num) { 3084 err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point), 3085 data->auto_pwm[nr][point]); 3086 } else { 3087 switch (data->kind) { 3088 case nct6775: 3089 /* disable if needed (pwm == 0) */ 3090 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®); 3091 if (err) 3092 break; 3093 if (val) 3094 reg |= 0x02; 3095 else 3096 reg &= ~0x02; 3097 err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg); 3098 break; 3099 case nct6776: 3100 break; /* always enabled, nothing to do */ 3101 case nct6106: 3102 case nct6116: 3103 case nct6779: 3104 case nct6791: 3105 case nct6792: 3106 case nct6793: 3107 case nct6795: 3108 case nct6796: 3109 case nct6797: 3110 case nct6798: 3111 err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val); 3112 if (err) 3113 break; 3114 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®); 3115 if (err) 3116 break; 3117 if (val == 255) 3118 reg &= ~data->CRITICAL_PWM_ENABLE_MASK; 3119 else 3120 reg |= data->CRITICAL_PWM_ENABLE_MASK; 3121 err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg); 3122 break; 3123 } 3124 } 3125 mutex_unlock(&data->update_lock); 3126 return err ? : count; 3127 } 3128 3129 static ssize_t 3130 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf) 3131 { 3132 struct nct6775_data *data = nct6775_update_device(dev); 3133 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3134 int nr = sattr->nr; 3135 int point = sattr->index; 3136 3137 if (IS_ERR(data)) 3138 return PTR_ERR(data); 3139 3140 /* 3141 * We don't know for sure if the temperature is signed or unsigned. 3142 * Assume it is unsigned. 3143 */ 3144 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000); 3145 } 3146 3147 static ssize_t 3148 store_auto_temp(struct device *dev, struct device_attribute *attr, 3149 const char *buf, size_t count) 3150 { 3151 struct nct6775_data *data = dev_get_drvdata(dev); 3152 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3153 int nr = sattr->nr; 3154 int point = sattr->index; 3155 unsigned long val; 3156 int err; 3157 3158 err = kstrtoul(buf, 10, &val); 3159 if (err) 3160 return err; 3161 if (val > 255000) 3162 return -EINVAL; 3163 3164 mutex_lock(&data->update_lock); 3165 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000); 3166 if (point < data->auto_pwm_num) { 3167 err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point), 3168 data->auto_temp[nr][point]); 3169 } else { 3170 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr], 3171 data->auto_temp[nr][point]); 3172 } 3173 mutex_unlock(&data->update_lock); 3174 return err ? : count; 3175 } 3176 3177 static umode_t nct6775_pwm_is_visible(struct kobject *kobj, 3178 struct attribute *attr, int index) 3179 { 3180 struct device *dev = kobj_to_dev(kobj); 3181 struct nct6775_data *data = dev_get_drvdata(dev); 3182 int pwm = index / 36; /* pwm index */ 3183 int nr = index % 36; /* attribute index */ 3184 3185 if (!(data->has_pwm & BIT(pwm))) 3186 return 0; 3187 3188 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */ 3189 if (!data->REG_WEIGHT_TEMP_SEL[pwm]) 3190 return 0; 3191 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */ 3192 return 0; 3193 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */ 3194 return 0; 3195 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */ 3196 return 0; 3197 3198 if (nr >= 22 && nr <= 35) { /* auto point */ 3199 int api = (nr - 22) / 2; /* auto point index */ 3200 3201 if (api > data->auto_pwm_num) 3202 return 0; 3203 } 3204 return nct6775_attr_mode(data, attr); 3205 } 3206 3207 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0); 3208 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644, 3209 show_fan_time, store_fan_time, 0, 1); 3210 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644, 3211 show_fan_time, store_fan_time, 0, 2); 3212 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1); 3213 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2); 3214 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644, 3215 show_temp_tolerance, store_temp_tolerance, 0, 0); 3216 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance", 3217 0644, show_temp_tolerance, store_temp_tolerance, 0, 1); 3218 3219 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3); 3220 3221 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4); 3222 3223 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm", 3224 0644, show_auto_pwm, store_auto_pwm, 0, 0); 3225 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp", 3226 0644, show_auto_temp, store_auto_temp, 0, 0); 3227 3228 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm", 3229 0644, show_auto_pwm, store_auto_pwm, 0, 1); 3230 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp", 3231 0644, show_auto_temp, store_auto_temp, 0, 1); 3232 3233 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm", 3234 0644, show_auto_pwm, store_auto_pwm, 0, 2); 3235 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp", 3236 0644, show_auto_temp, store_auto_temp, 0, 2); 3237 3238 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm", 3239 0644, show_auto_pwm, store_auto_pwm, 0, 3); 3240 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp", 3241 0644, show_auto_temp, store_auto_temp, 0, 3); 3242 3243 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm", 3244 0644, show_auto_pwm, store_auto_pwm, 0, 4); 3245 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp", 3246 0644, show_auto_temp, store_auto_temp, 0, 4); 3247 3248 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm", 3249 0644, show_auto_pwm, store_auto_pwm, 0, 5); 3250 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp", 3251 0644, show_auto_temp, store_auto_temp, 0, 5); 3252 3253 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm", 3254 0644, show_auto_pwm, store_auto_pwm, 0, 6); 3255 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp", 3256 0644, show_auto_temp, store_auto_temp, 0, 6); 3257 3258 /* 3259 * nct6775_pwm_is_visible uses the index into the following array 3260 * to determine if attributes should be created or not. 3261 * Any change in order or content must be matched. 3262 */ 3263 static struct sensor_device_template *nct6775_attributes_pwm_template[] = { 3264 &sensor_dev_template_pwm, 3265 &sensor_dev_template_pwm_mode, 3266 &sensor_dev_template_pwm_enable, 3267 &sensor_dev_template_pwm_temp_sel, 3268 &sensor_dev_template_pwm_temp_tolerance, 3269 &sensor_dev_template_pwm_crit_temp_tolerance, 3270 &sensor_dev_template_pwm_target_temp, 3271 &sensor_dev_template_fan_target, 3272 &sensor_dev_template_fan_tolerance, 3273 &sensor_dev_template_pwm_stop_time, 3274 &sensor_dev_template_pwm_step_up_time, 3275 &sensor_dev_template_pwm_step_down_time, 3276 &sensor_dev_template_pwm_start, 3277 &sensor_dev_template_pwm_floor, 3278 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */ 3279 &sensor_dev_template_pwm_weight_temp_step, 3280 &sensor_dev_template_pwm_weight_temp_step_tol, 3281 &sensor_dev_template_pwm_weight_temp_step_base, 3282 &sensor_dev_template_pwm_weight_duty_step, /* 18 */ 3283 &sensor_dev_template_pwm_max, /* 19 */ 3284 &sensor_dev_template_pwm_step, /* 20 */ 3285 &sensor_dev_template_pwm_weight_duty_base, /* 21 */ 3286 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */ 3287 &sensor_dev_template_pwm_auto_point1_temp, 3288 &sensor_dev_template_pwm_auto_point2_pwm, 3289 &sensor_dev_template_pwm_auto_point2_temp, 3290 &sensor_dev_template_pwm_auto_point3_pwm, 3291 &sensor_dev_template_pwm_auto_point3_temp, 3292 &sensor_dev_template_pwm_auto_point4_pwm, 3293 &sensor_dev_template_pwm_auto_point4_temp, 3294 &sensor_dev_template_pwm_auto_point5_pwm, 3295 &sensor_dev_template_pwm_auto_point5_temp, 3296 &sensor_dev_template_pwm_auto_point6_pwm, 3297 &sensor_dev_template_pwm_auto_point6_temp, 3298 &sensor_dev_template_pwm_auto_point7_pwm, 3299 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */ 3300 3301 NULL 3302 }; 3303 3304 static const struct sensor_template_group nct6775_pwm_template_group = { 3305 .templates = nct6775_attributes_pwm_template, 3306 .is_visible = nct6775_pwm_is_visible, 3307 .base = 1, 3308 }; 3309 3310 static inline int nct6775_init_device(struct nct6775_data *data) 3311 { 3312 int i, err; 3313 u16 tmp, diode; 3314 3315 /* Start monitoring if needed */ 3316 if (data->REG_CONFIG) { 3317 err = nct6775_read_value(data, data->REG_CONFIG, &tmp); 3318 if (err) 3319 return err; 3320 if (!(tmp & 0x01)) { 3321 err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01); 3322 if (err) 3323 return err; 3324 } 3325 } 3326 3327 /* Enable temperature sensors if needed */ 3328 for (i = 0; i < NUM_TEMP; i++) { 3329 if (!(data->have_temp & BIT(i))) 3330 continue; 3331 if (!data->reg_temp_config[i]) 3332 continue; 3333 err = nct6775_read_value(data, data->reg_temp_config[i], &tmp); 3334 if (err) 3335 return err; 3336 if (tmp & 0x01) { 3337 err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe); 3338 if (err) 3339 return err; 3340 } 3341 } 3342 3343 /* Enable VBAT monitoring if needed */ 3344 err = nct6775_read_value(data, data->REG_VBAT, &tmp); 3345 if (err) 3346 return err; 3347 if (!(tmp & 0x01)) { 3348 err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01); 3349 if (err) 3350 return err; 3351 } 3352 3353 err = nct6775_read_value(data, data->REG_DIODE, &diode); 3354 if (err) 3355 return err; 3356 3357 for (i = 0; i < data->temp_fixed_num; i++) { 3358 if (!(data->have_temp_fixed & BIT(i))) 3359 continue; 3360 if ((tmp & (data->DIODE_MASK << i))) /* diode */ 3361 data->temp_type[i] 3362 = 3 - ((diode >> i) & data->DIODE_MASK); 3363 else /* thermistor */ 3364 data->temp_type[i] = 4; 3365 } 3366 3367 return 0; 3368 } 3369 3370 static int add_temp_sensors(struct nct6775_data *data, const u16 *regp, 3371 int *available, int *mask) 3372 { 3373 int i, err; 3374 u16 src; 3375 3376 for (i = 0; i < data->pwm_num && *available; i++) { 3377 int index; 3378 3379 if (!regp[i]) 3380 continue; 3381 err = nct6775_read_value(data, regp[i], &src); 3382 if (err) 3383 return err; 3384 src &= 0x1f; 3385 if (!src || (*mask & BIT(src))) 3386 continue; 3387 if (!(data->temp_mask & BIT(src))) 3388 continue; 3389 3390 index = __ffs(*available); 3391 err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src); 3392 if (err) 3393 return err; 3394 *available &= ~BIT(index); 3395 *mask |= BIT(src); 3396 } 3397 3398 return 0; 3399 } 3400 3401 int nct6775_probe(struct device *dev, struct nct6775_data *data, 3402 const struct regmap_config *regmapcfg) 3403 { 3404 int i, s, err = 0; 3405 int mask, available; 3406 u16 src; 3407 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config; 3408 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit; 3409 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL; 3410 int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp; 3411 struct device *hwmon_dev; 3412 struct sensor_template_group tsi_temp_tg; 3413 3414 data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg); 3415 if (IS_ERR(data->regmap)) 3416 return PTR_ERR(data->regmap); 3417 3418 mutex_init(&data->update_lock); 3419 data->name = nct6775_device_names[data->kind]; 3420 data->bank = 0xff; /* Force initial bank selection */ 3421 3422 switch (data->kind) { 3423 case nct6106: 3424 data->in_num = 9; 3425 data->pwm_num = 3; 3426 data->auto_pwm_num = 4; 3427 data->temp_fixed_num = 3; 3428 data->num_temp_alarms = 6; 3429 data->num_temp_beeps = 6; 3430 3431 data->fan_from_reg = fan_from_reg13; 3432 data->fan_from_reg_min = fan_from_reg13; 3433 3434 data->temp_label = nct6776_temp_label; 3435 data->temp_mask = NCT6776_TEMP_MASK; 3436 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3437 3438 data->REG_VBAT = NCT6106_REG_VBAT; 3439 data->REG_DIODE = NCT6106_REG_DIODE; 3440 data->DIODE_MASK = NCT6106_DIODE_MASK; 3441 data->REG_VIN = NCT6106_REG_IN; 3442 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3443 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3444 data->REG_TARGET = NCT6106_REG_TARGET; 3445 data->REG_FAN = NCT6106_REG_FAN; 3446 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE; 3447 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN; 3448 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES; 3449 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT; 3450 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME; 3451 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME; 3452 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME; 3453 data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H; 3454 data->REG_PWM[0] = NCT6116_REG_PWM; 3455 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT; 3456 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT; 3457 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3458 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3459 data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3460 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3461 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3462 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP; 3463 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM; 3464 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP; 3465 data->REG_CRITICAL_TEMP_TOLERANCE 3466 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE; 3467 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE; 3468 data->CRITICAL_PWM_ENABLE_MASK 3469 = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3470 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM; 3471 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3472 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE; 3473 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3474 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3475 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3476 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3477 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3478 data->REG_ALARM = NCT6106_REG_ALARM; 3479 data->ALARM_BITS = NCT6106_ALARM_BITS; 3480 data->REG_BEEP = NCT6106_REG_BEEP; 3481 data->BEEP_BITS = NCT6106_BEEP_BITS; 3482 data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP; 3483 3484 reg_temp = NCT6106_REG_TEMP; 3485 reg_temp_mon = NCT6106_REG_TEMP_MON; 3486 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3487 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3488 num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP); 3489 reg_temp_over = NCT6106_REG_TEMP_OVER; 3490 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3491 reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3492 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3493 reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3494 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3495 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3496 3497 break; 3498 case nct6116: 3499 data->in_num = 9; 3500 data->pwm_num = 3; 3501 data->auto_pwm_num = 4; 3502 data->temp_fixed_num = 3; 3503 data->num_temp_alarms = 3; 3504 data->num_temp_beeps = 3; 3505 3506 data->fan_from_reg = fan_from_reg13; 3507 data->fan_from_reg_min = fan_from_reg13; 3508 3509 data->temp_label = nct6776_temp_label; 3510 data->temp_mask = NCT6776_TEMP_MASK; 3511 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3512 3513 data->REG_VBAT = NCT6106_REG_VBAT; 3514 data->REG_DIODE = NCT6106_REG_DIODE; 3515 data->DIODE_MASK = NCT6106_DIODE_MASK; 3516 data->REG_VIN = NCT6106_REG_IN; 3517 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3518 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3519 data->REG_TARGET = NCT6116_REG_TARGET; 3520 data->REG_FAN = NCT6116_REG_FAN; 3521 data->REG_FAN_MODE = NCT6116_REG_FAN_MODE; 3522 data->REG_FAN_MIN = NCT6116_REG_FAN_MIN; 3523 data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES; 3524 data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT; 3525 data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME; 3526 data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME; 3527 data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME; 3528 data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H; 3529 data->REG_PWM[0] = NCT6116_REG_PWM; 3530 data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT; 3531 data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT; 3532 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3533 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3534 data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3535 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3536 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3537 data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP; 3538 data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM; 3539 data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP; 3540 data->REG_CRITICAL_TEMP_TOLERANCE 3541 = NCT6116_REG_CRITICAL_TEMP_TOLERANCE; 3542 data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE; 3543 data->CRITICAL_PWM_ENABLE_MASK 3544 = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3545 data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM; 3546 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3547 data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE; 3548 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3549 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3550 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3551 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3552 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3553 data->REG_ALARM = NCT6106_REG_ALARM; 3554 data->ALARM_BITS = NCT6116_ALARM_BITS; 3555 data->REG_BEEP = NCT6106_REG_BEEP; 3556 data->BEEP_BITS = NCT6116_BEEP_BITS; 3557 data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP; 3558 3559 reg_temp = NCT6106_REG_TEMP; 3560 reg_temp_mon = NCT6106_REG_TEMP_MON; 3561 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3562 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3563 num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP); 3564 reg_temp_over = NCT6106_REG_TEMP_OVER; 3565 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3566 reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3567 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3568 reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3569 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3570 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3571 3572 break; 3573 case nct6775: 3574 data->in_num = 9; 3575 data->pwm_num = 3; 3576 data->auto_pwm_num = 6; 3577 data->has_fan_div = true; 3578 data->temp_fixed_num = 3; 3579 data->num_temp_alarms = 3; 3580 data->num_temp_beeps = 3; 3581 3582 data->ALARM_BITS = NCT6775_ALARM_BITS; 3583 data->BEEP_BITS = NCT6775_BEEP_BITS; 3584 3585 data->fan_from_reg = fan_from_reg16; 3586 data->fan_from_reg_min = fan_from_reg8; 3587 data->target_temp_mask = 0x7f; 3588 data->tolerance_mask = 0x0f; 3589 data->speed_tolerance_limit = 15; 3590 3591 data->temp_label = nct6775_temp_label; 3592 data->temp_mask = NCT6775_TEMP_MASK; 3593 data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK; 3594 3595 data->REG_CONFIG = NCT6775_REG_CONFIG; 3596 data->REG_VBAT = NCT6775_REG_VBAT; 3597 data->REG_DIODE = NCT6775_REG_DIODE; 3598 data->DIODE_MASK = NCT6775_DIODE_MASK; 3599 data->REG_VIN = NCT6775_REG_IN; 3600 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3601 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3602 data->REG_TARGET = NCT6775_REG_TARGET; 3603 data->REG_FAN = NCT6775_REG_FAN; 3604 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3605 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN; 3606 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES; 3607 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3608 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3609 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; 3610 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; 3611 data->REG_PWM[0] = NCT6775_REG_PWM; 3612 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3613 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3614 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT; 3615 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT; 3616 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3617 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3618 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE; 3619 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK; 3620 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3621 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3622 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3623 data->REG_CRITICAL_TEMP_TOLERANCE 3624 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3625 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3626 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3627 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3628 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3629 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3630 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3631 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3632 data->REG_ALARM = NCT6775_REG_ALARM; 3633 data->REG_BEEP = NCT6775_REG_BEEP; 3634 data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP; 3635 3636 reg_temp = NCT6775_REG_TEMP; 3637 reg_temp_mon = NCT6775_REG_TEMP_MON; 3638 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3639 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3640 num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP); 3641 reg_temp_over = NCT6775_REG_TEMP_OVER; 3642 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3643 reg_temp_config = NCT6775_REG_TEMP_CONFIG; 3644 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE; 3645 reg_temp_crit = NCT6775_REG_TEMP_CRIT; 3646 3647 break; 3648 case nct6776: 3649 data->in_num = 9; 3650 data->pwm_num = 3; 3651 data->auto_pwm_num = 4; 3652 data->has_fan_div = false; 3653 data->temp_fixed_num = 3; 3654 data->num_temp_alarms = 3; 3655 data->num_temp_beeps = 6; 3656 3657 data->ALARM_BITS = NCT6776_ALARM_BITS; 3658 data->BEEP_BITS = NCT6776_BEEP_BITS; 3659 3660 data->fan_from_reg = fan_from_reg13; 3661 data->fan_from_reg_min = fan_from_reg13; 3662 data->target_temp_mask = 0xff; 3663 data->tolerance_mask = 0x07; 3664 data->speed_tolerance_limit = 63; 3665 3666 data->temp_label = nct6776_temp_label; 3667 data->temp_mask = NCT6776_TEMP_MASK; 3668 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3669 3670 data->REG_CONFIG = NCT6775_REG_CONFIG; 3671 data->REG_VBAT = NCT6775_REG_VBAT; 3672 data->REG_DIODE = NCT6775_REG_DIODE; 3673 data->DIODE_MASK = NCT6775_DIODE_MASK; 3674 data->REG_VIN = NCT6775_REG_IN; 3675 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3676 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3677 data->REG_TARGET = NCT6775_REG_TARGET; 3678 data->REG_FAN = NCT6775_REG_FAN; 3679 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3680 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3681 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES; 3682 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3683 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3684 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3685 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3686 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3687 data->REG_PWM[0] = NCT6775_REG_PWM; 3688 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3689 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3690 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3691 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3692 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3693 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3694 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3695 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3696 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3697 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3698 data->REG_CRITICAL_TEMP_TOLERANCE 3699 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3700 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3701 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3702 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3703 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3704 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3705 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3706 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3707 data->REG_ALARM = NCT6775_REG_ALARM; 3708 data->REG_BEEP = NCT6776_REG_BEEP; 3709 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3710 3711 reg_temp = NCT6775_REG_TEMP; 3712 reg_temp_mon = NCT6775_REG_TEMP_MON; 3713 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3714 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3715 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3716 reg_temp_over = NCT6775_REG_TEMP_OVER; 3717 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3718 reg_temp_config = NCT6776_REG_TEMP_CONFIG; 3719 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE; 3720 reg_temp_crit = NCT6776_REG_TEMP_CRIT; 3721 3722 break; 3723 case nct6779: 3724 data->in_num = 15; 3725 data->pwm_num = 5; 3726 data->auto_pwm_num = 4; 3727 data->has_fan_div = false; 3728 data->temp_fixed_num = 6; 3729 data->num_temp_alarms = 2; 3730 data->num_temp_beeps = 2; 3731 3732 data->ALARM_BITS = NCT6779_ALARM_BITS; 3733 data->BEEP_BITS = NCT6779_BEEP_BITS; 3734 3735 data->fan_from_reg = fan_from_reg_rpm; 3736 data->fan_from_reg_min = fan_from_reg13; 3737 data->target_temp_mask = 0xff; 3738 data->tolerance_mask = 0x07; 3739 data->speed_tolerance_limit = 63; 3740 3741 data->temp_label = nct6779_temp_label; 3742 data->temp_mask = NCT6779_TEMP_MASK; 3743 data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK; 3744 3745 data->REG_CONFIG = NCT6775_REG_CONFIG; 3746 data->REG_VBAT = NCT6775_REG_VBAT; 3747 data->REG_DIODE = NCT6775_REG_DIODE; 3748 data->DIODE_MASK = NCT6775_DIODE_MASK; 3749 data->REG_VIN = NCT6779_REG_IN; 3750 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3751 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3752 data->REG_TARGET = NCT6775_REG_TARGET; 3753 data->REG_FAN = NCT6779_REG_FAN; 3754 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3755 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3756 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3757 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3758 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3759 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3760 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3761 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3762 data->REG_PWM[0] = NCT6775_REG_PWM; 3763 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3764 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3765 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3766 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3767 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3768 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3769 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3770 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3771 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3772 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3773 data->REG_CRITICAL_TEMP_TOLERANCE 3774 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3775 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3776 data->CRITICAL_PWM_ENABLE_MASK 3777 = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3778 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 3779 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 3780 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3781 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3782 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3783 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3784 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3785 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3786 data->REG_ALARM = NCT6779_REG_ALARM; 3787 data->REG_BEEP = NCT6776_REG_BEEP; 3788 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3789 3790 reg_temp = NCT6779_REG_TEMP; 3791 reg_temp_mon = NCT6779_REG_TEMP_MON; 3792 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3793 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 3794 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3795 reg_temp_over = NCT6779_REG_TEMP_OVER; 3796 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3797 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 3798 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 3799 reg_temp_crit = NCT6779_REG_TEMP_CRIT; 3800 3801 break; 3802 case nct6791: 3803 case nct6792: 3804 case nct6793: 3805 case nct6795: 3806 case nct6796: 3807 case nct6797: 3808 case nct6798: 3809 data->in_num = 15; 3810 data->pwm_num = (data->kind == nct6796 || 3811 data->kind == nct6797 || 3812 data->kind == nct6798) ? 7 : 6; 3813 data->auto_pwm_num = 4; 3814 data->has_fan_div = false; 3815 data->temp_fixed_num = 6; 3816 data->num_temp_alarms = 2; 3817 data->num_temp_beeps = 2; 3818 3819 data->ALARM_BITS = NCT6791_ALARM_BITS; 3820 data->BEEP_BITS = NCT6779_BEEP_BITS; 3821 3822 data->fan_from_reg = fan_from_reg_rpm; 3823 data->fan_from_reg_min = fan_from_reg13; 3824 data->target_temp_mask = 0xff; 3825 data->tolerance_mask = 0x07; 3826 data->speed_tolerance_limit = 63; 3827 3828 switch (data->kind) { 3829 default: 3830 case nct6791: 3831 data->temp_label = nct6779_temp_label; 3832 data->temp_mask = NCT6791_TEMP_MASK; 3833 data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK; 3834 break; 3835 case nct6792: 3836 data->temp_label = nct6792_temp_label; 3837 data->temp_mask = NCT6792_TEMP_MASK; 3838 data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK; 3839 break; 3840 case nct6793: 3841 data->temp_label = nct6793_temp_label; 3842 data->temp_mask = NCT6793_TEMP_MASK; 3843 data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK; 3844 break; 3845 case nct6795: 3846 case nct6797: 3847 data->temp_label = nct6795_temp_label; 3848 data->temp_mask = NCT6795_TEMP_MASK; 3849 data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK; 3850 break; 3851 case nct6796: 3852 data->temp_label = nct6796_temp_label; 3853 data->temp_mask = NCT6796_TEMP_MASK; 3854 data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK; 3855 break; 3856 case nct6798: 3857 data->temp_label = nct6798_temp_label; 3858 data->temp_mask = NCT6798_TEMP_MASK; 3859 data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK; 3860 break; 3861 } 3862 3863 data->REG_CONFIG = NCT6775_REG_CONFIG; 3864 data->REG_VBAT = NCT6775_REG_VBAT; 3865 data->REG_DIODE = NCT6775_REG_DIODE; 3866 data->DIODE_MASK = NCT6775_DIODE_MASK; 3867 data->REG_VIN = NCT6779_REG_IN; 3868 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3869 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3870 data->REG_TARGET = NCT6775_REG_TARGET; 3871 data->REG_FAN = NCT6779_REG_FAN; 3872 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3873 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3874 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3875 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3876 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3877 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3878 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3879 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3880 data->REG_PWM[0] = NCT6775_REG_PWM; 3881 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3882 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3883 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP; 3884 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE; 3885 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3886 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3887 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3888 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3889 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3890 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3891 data->REG_CRITICAL_TEMP_TOLERANCE 3892 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3893 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3894 data->CRITICAL_PWM_ENABLE_MASK 3895 = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3896 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 3897 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 3898 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3899 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3900 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL; 3901 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; 3902 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL; 3903 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE; 3904 data->REG_ALARM = NCT6791_REG_ALARM; 3905 if (data->kind == nct6791) 3906 data->REG_BEEP = NCT6776_REG_BEEP; 3907 else 3908 data->REG_BEEP = NCT6792_REG_BEEP; 3909 switch (data->kind) { 3910 case nct6791: 3911 case nct6792: 3912 case nct6793: 3913 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3914 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3915 break; 3916 case nct6795: 3917 case nct6796: 3918 case nct6797: 3919 case nct6798: 3920 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; 3921 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); 3922 break; 3923 default: 3924 num_reg_tsi_temp = 0; 3925 break; 3926 } 3927 3928 reg_temp = NCT6779_REG_TEMP; 3929 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3930 if (data->kind == nct6791) { 3931 reg_temp_mon = NCT6779_REG_TEMP_MON; 3932 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 3933 } else { 3934 reg_temp_mon = NCT6792_REG_TEMP_MON; 3935 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON); 3936 } 3937 reg_temp_over = NCT6779_REG_TEMP_OVER; 3938 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3939 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 3940 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 3941 reg_temp_crit = NCT6779_REG_TEMP_CRIT; 3942 3943 break; 3944 default: 3945 return -ENODEV; 3946 } 3947 data->have_in = BIT(data->in_num) - 1; 3948 data->have_temp = 0; 3949 3950 /* 3951 * On some boards, not all available temperature sources are monitored, 3952 * even though some of the monitoring registers are unused. 3953 * Get list of unused monitoring registers, then detect if any fan 3954 * controls are configured to use unmonitored temperature sources. 3955 * If so, assign the unmonitored temperature sources to available 3956 * monitoring registers. 3957 */ 3958 mask = 0; 3959 available = 0; 3960 for (i = 0; i < num_reg_temp; i++) { 3961 if (reg_temp[i] == 0) 3962 continue; 3963 3964 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 3965 if (err) 3966 return err; 3967 src &= 0x1f; 3968 if (!src || (mask & BIT(src))) 3969 available |= BIT(i); 3970 3971 mask |= BIT(src); 3972 } 3973 3974 /* 3975 * Now find unmonitored temperature registers and enable monitoring 3976 * if additional monitoring registers are available. 3977 */ 3978 err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask); 3979 if (err) 3980 return err; 3981 err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask); 3982 if (err) 3983 return err; 3984 3985 mask = 0; 3986 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */ 3987 for (i = 0; i < num_reg_temp; i++) { 3988 if (reg_temp[i] == 0) 3989 continue; 3990 3991 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 3992 if (err) 3993 return err; 3994 src &= 0x1f; 3995 if (!src || (mask & BIT(src))) 3996 continue; 3997 3998 if (!(data->temp_mask & BIT(src))) { 3999 dev_info(dev, 4000 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4001 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]); 4002 continue; 4003 } 4004 4005 mask |= BIT(src); 4006 4007 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4008 if (src <= data->temp_fixed_num) { 4009 data->have_temp |= BIT(src - 1); 4010 data->have_temp_fixed |= BIT(src - 1); 4011 data->reg_temp[0][src - 1] = reg_temp[i]; 4012 data->reg_temp[1][src - 1] = reg_temp_over[i]; 4013 data->reg_temp[2][src - 1] = reg_temp_hyst[i]; 4014 if (reg_temp_crit_h && reg_temp_crit_h[i]) 4015 data->reg_temp[3][src - 1] = reg_temp_crit_h[i]; 4016 else if (reg_temp_crit[src - 1]) 4017 data->reg_temp[3][src - 1] 4018 = reg_temp_crit[src - 1]; 4019 if (reg_temp_crit_l && reg_temp_crit_l[i]) 4020 data->reg_temp[4][src - 1] = reg_temp_crit_l[i]; 4021 data->reg_temp_config[src - 1] = reg_temp_config[i]; 4022 data->temp_src[src - 1] = src; 4023 continue; 4024 } 4025 4026 if (s >= NUM_TEMP) 4027 continue; 4028 4029 /* Use dynamic index for other sources */ 4030 data->have_temp |= BIT(s); 4031 data->reg_temp[0][s] = reg_temp[i]; 4032 data->reg_temp[1][s] = reg_temp_over[i]; 4033 data->reg_temp[2][s] = reg_temp_hyst[i]; 4034 data->reg_temp_config[s] = reg_temp_config[i]; 4035 if (reg_temp_crit_h && reg_temp_crit_h[i]) 4036 data->reg_temp[3][s] = reg_temp_crit_h[i]; 4037 else if (reg_temp_crit[src - 1]) 4038 data->reg_temp[3][s] = reg_temp_crit[src - 1]; 4039 if (reg_temp_crit_l && reg_temp_crit_l[i]) 4040 data->reg_temp[4][s] = reg_temp_crit_l[i]; 4041 4042 data->temp_src[s] = src; 4043 s++; 4044 } 4045 4046 /* 4047 * Repeat with temperatures used for fan control. 4048 * This set of registers does not support limits. 4049 */ 4050 for (i = 0; i < num_reg_temp_mon; i++) { 4051 if (reg_temp_mon[i] == 0) 4052 continue; 4053 4054 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src); 4055 if (err) 4056 return err; 4057 src &= 0x1f; 4058 if (!src) 4059 continue; 4060 4061 if (!(data->temp_mask & BIT(src))) { 4062 dev_info(dev, 4063 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4064 src, i, data->REG_TEMP_SEL[i], 4065 reg_temp_mon[i]); 4066 continue; 4067 } 4068 4069 /* 4070 * For virtual temperature sources, the 'virtual' temperature 4071 * for each fan reflects a different temperature, and there 4072 * are no duplicates. 4073 */ 4074 if (!(data->virt_temp_mask & BIT(src))) { 4075 if (mask & BIT(src)) 4076 continue; 4077 mask |= BIT(src); 4078 } 4079 4080 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4081 if (src <= data->temp_fixed_num) { 4082 if (data->have_temp & BIT(src - 1)) 4083 continue; 4084 data->have_temp |= BIT(src - 1); 4085 data->have_temp_fixed |= BIT(src - 1); 4086 data->reg_temp[0][src - 1] = reg_temp_mon[i]; 4087 data->temp_src[src - 1] = src; 4088 continue; 4089 } 4090 4091 if (s >= NUM_TEMP) 4092 continue; 4093 4094 /* Use dynamic index for other sources */ 4095 data->have_temp |= BIT(s); 4096 data->reg_temp[0][s] = reg_temp_mon[i]; 4097 data->temp_src[s] = src; 4098 s++; 4099 } 4100 4101 #ifdef USE_ALTERNATE 4102 /* 4103 * Go through the list of alternate temp registers and enable 4104 * if possible. 4105 * The temperature is already monitored if the respective bit in <mask> 4106 * is set. 4107 */ 4108 for (i = 0; i < 31; i++) { 4109 if (!(data->temp_mask & BIT(i + 1))) 4110 continue; 4111 if (!reg_temp_alternate[i]) 4112 continue; 4113 if (mask & BIT(i + 1)) 4114 continue; 4115 if (i < data->temp_fixed_num) { 4116 if (data->have_temp & BIT(i)) 4117 continue; 4118 data->have_temp |= BIT(i); 4119 data->have_temp_fixed |= BIT(i); 4120 data->reg_temp[0][i] = reg_temp_alternate[i]; 4121 if (i < num_reg_temp) { 4122 data->reg_temp[1][i] = reg_temp_over[i]; 4123 data->reg_temp[2][i] = reg_temp_hyst[i]; 4124 } 4125 data->temp_src[i] = i + 1; 4126 continue; 4127 } 4128 4129 if (s >= NUM_TEMP) /* Abort if no more space */ 4130 break; 4131 4132 data->have_temp |= BIT(s); 4133 data->reg_temp[0][s] = reg_temp_alternate[i]; 4134 data->temp_src[s] = i + 1; 4135 s++; 4136 } 4137 #endif /* USE_ALTERNATE */ 4138 4139 /* Check which TSIx_TEMP registers are active */ 4140 for (i = 0; i < num_reg_tsi_temp; i++) { 4141 u16 tmp; 4142 4143 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp); 4144 if (err) 4145 return err; 4146 if (tmp) 4147 data->have_tsi_temp |= BIT(i); 4148 } 4149 4150 /* Initialize the chip */ 4151 err = nct6775_init_device(data); 4152 if (err) 4153 return err; 4154 4155 if (data->driver_init) { 4156 err = data->driver_init(data); 4157 if (err) 4158 return err; 4159 } 4160 4161 /* Read fan clock dividers immediately */ 4162 err = nct6775_init_fan_common(dev, data); 4163 if (err) 4164 return err; 4165 4166 /* Register sysfs hooks */ 4167 err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group, 4168 data->pwm_num); 4169 if (err) 4170 return err; 4171 4172 err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group, 4173 fls(data->have_in)); 4174 if (err) 4175 return err; 4176 4177 err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group, 4178 fls(data->has_fan)); 4179 if (err) 4180 return err; 4181 4182 err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group, 4183 fls(data->have_temp)); 4184 if (err) 4185 return err; 4186 4187 if (data->have_tsi_temp) { 4188 tsi_temp_tg.templates = nct6775_tsi_temp_template; 4189 tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible; 4190 tsi_temp_tg.base = fls(data->have_temp) + 1; 4191 err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg, 4192 fls(data->have_tsi_temp)); 4193 if (err) 4194 return err; 4195 } 4196 4197 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name, 4198 data, data->groups); 4199 return PTR_ERR_OR_ZERO(hwmon_dev); 4200 } 4201 EXPORT_SYMBOL_GPL(nct6775_probe); 4202 4203 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); 4204 MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips"); 4205 MODULE_LICENSE("GPL"); 4206