1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * max31790.c - Part of lm_sensors, Linux kernel modules for hardware 4 * monitoring. 5 * 6 * (C) 2015 by Il Han <corone.il.han@gmail.com> 7 */ 8 9 #include <linux/err.h> 10 #include <linux/hwmon.h> 11 #include <linux/i2c.h> 12 #include <linux/init.h> 13 #include <linux/jiffies.h> 14 #include <linux/module.h> 15 #include <linux/slab.h> 16 17 /* MAX31790 registers */ 18 #define MAX31790_REG_GLOBAL_CONFIG 0x00 19 #define MAX31790_REG_FAN_CONFIG(ch) (0x02 + (ch)) 20 #define MAX31790_REG_FAN_DYNAMICS(ch) (0x08 + (ch)) 21 #define MAX31790_REG_FAN_FAULT_STATUS2 0x10 22 #define MAX31790_REG_FAN_FAULT_STATUS1 0x11 23 #define MAX31790_REG_TACH_COUNT(ch) (0x18 + (ch) * 2) 24 #define MAX31790_REG_PWM_DUTY_CYCLE(ch) (0x30 + (ch) * 2) 25 #define MAX31790_REG_PWMOUT(ch) (0x40 + (ch) * 2) 26 #define MAX31790_REG_TARGET_COUNT(ch) (0x50 + (ch) * 2) 27 28 /* Fan Config register bits */ 29 #define MAX31790_FAN_CFG_RPM_MODE 0x80 30 #define MAX31790_FAN_CFG_CTRL_MON 0x10 31 #define MAX31790_FAN_CFG_TACH_INPUT_EN 0x08 32 #define MAX31790_FAN_CFG_TACH_INPUT 0x01 33 34 /* Fan Dynamics register bits */ 35 #define MAX31790_FAN_DYN_SR_SHIFT 5 36 #define MAX31790_FAN_DYN_SR_MASK 0xE0 37 #define SR_FROM_REG(reg) (((reg) & MAX31790_FAN_DYN_SR_MASK) \ 38 >> MAX31790_FAN_DYN_SR_SHIFT) 39 40 #define FAN_RPM_MIN 120 41 #define FAN_RPM_MAX 7864320 42 43 #define FAN_COUNT_REG_MAX 0xffe0 44 45 #define RPM_FROM_REG(reg, sr) (((reg) >> 4) ? \ 46 ((60 * (sr) * 8192) / ((reg) >> 4)) : \ 47 FAN_RPM_MAX) 48 #define RPM_TO_REG(rpm, sr) ((60 * (sr) * 8192) / ((rpm) * 2)) 49 50 #define NR_CHANNEL 6 51 52 /* 53 * Client data (each client gets its own) 54 */ 55 struct max31790_data { 56 struct i2c_client *client; 57 struct mutex update_lock; 58 bool valid; /* zero until following fields are valid */ 59 unsigned long last_updated; /* in jiffies */ 60 61 /* register values */ 62 u8 fan_config[NR_CHANNEL]; 63 u8 fan_dynamics[NR_CHANNEL]; 64 u16 fault_status; 65 u16 tach[NR_CHANNEL * 2]; 66 u16 pwm[NR_CHANNEL]; 67 u16 target_count[NR_CHANNEL]; 68 }; 69 70 static struct max31790_data *max31790_update_device(struct device *dev) 71 { 72 struct max31790_data *data = dev_get_drvdata(dev); 73 struct i2c_client *client = data->client; 74 struct max31790_data *ret = data; 75 int i; 76 int rv; 77 78 mutex_lock(&data->update_lock); 79 80 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { 81 rv = i2c_smbus_read_byte_data(client, 82 MAX31790_REG_FAN_FAULT_STATUS1); 83 if (rv < 0) 84 goto abort; 85 data->fault_status |= rv & 0x3F; 86 87 rv = i2c_smbus_read_byte_data(client, 88 MAX31790_REG_FAN_FAULT_STATUS2); 89 if (rv < 0) 90 goto abort; 91 data->fault_status |= (rv & 0x3F) << 6; 92 93 for (i = 0; i < NR_CHANNEL; i++) { 94 rv = i2c_smbus_read_word_swapped(client, 95 MAX31790_REG_TACH_COUNT(i)); 96 if (rv < 0) 97 goto abort; 98 data->tach[i] = rv; 99 100 if (data->fan_config[i] 101 & MAX31790_FAN_CFG_TACH_INPUT) { 102 rv = i2c_smbus_read_word_swapped(client, 103 MAX31790_REG_TACH_COUNT(NR_CHANNEL 104 + i)); 105 if (rv < 0) 106 goto abort; 107 data->tach[NR_CHANNEL + i] = rv; 108 } else { 109 rv = i2c_smbus_read_word_swapped(client, 110 MAX31790_REG_PWM_DUTY_CYCLE(i)); 111 if (rv < 0) 112 goto abort; 113 data->pwm[i] = rv; 114 115 rv = i2c_smbus_read_word_swapped(client, 116 MAX31790_REG_TARGET_COUNT(i)); 117 if (rv < 0) 118 goto abort; 119 data->target_count[i] = rv; 120 } 121 } 122 123 data->last_updated = jiffies; 124 data->valid = true; 125 } 126 goto done; 127 128 abort: 129 data->valid = false; 130 ret = ERR_PTR(rv); 131 132 done: 133 mutex_unlock(&data->update_lock); 134 135 return ret; 136 } 137 138 static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 }; 139 140 static u8 get_tach_period(u8 fan_dynamics) 141 { 142 return tach_period[SR_FROM_REG(fan_dynamics)]; 143 } 144 145 static u8 bits_for_tach_period(int rpm) 146 { 147 u8 bits; 148 149 if (rpm < 500) 150 bits = 0x0; 151 else if (rpm < 1000) 152 bits = 0x1; 153 else if (rpm < 2000) 154 bits = 0x2; 155 else if (rpm < 4000) 156 bits = 0x3; 157 else if (rpm < 8000) 158 bits = 0x4; 159 else 160 bits = 0x5; 161 162 return bits; 163 } 164 165 static int max31790_read_fan(struct device *dev, u32 attr, int channel, 166 long *val) 167 { 168 struct max31790_data *data = max31790_update_device(dev); 169 int sr, rpm; 170 171 if (IS_ERR(data)) 172 return PTR_ERR(data); 173 174 switch (attr) { 175 case hwmon_fan_input: 176 sr = get_tach_period(data->fan_dynamics[channel % NR_CHANNEL]); 177 if (data->tach[channel] == FAN_COUNT_REG_MAX) 178 rpm = 0; 179 else 180 rpm = RPM_FROM_REG(data->tach[channel], sr); 181 *val = rpm; 182 return 0; 183 case hwmon_fan_target: 184 sr = get_tach_period(data->fan_dynamics[channel]); 185 rpm = RPM_FROM_REG(data->target_count[channel], sr); 186 *val = rpm; 187 return 0; 188 case hwmon_fan_fault: 189 mutex_lock(&data->update_lock); 190 *val = !!(data->fault_status & (1 << channel)); 191 data->fault_status &= ~(1 << channel); 192 /* 193 * If a fault bit is set, we need to write into one of the fan 194 * configuration registers to clear it. Note that this also 195 * clears the fault for the companion channel if enabled. 196 */ 197 if (*val) { 198 int reg = MAX31790_REG_TARGET_COUNT(channel % NR_CHANNEL); 199 200 i2c_smbus_write_byte_data(data->client, reg, 201 data->target_count[channel % NR_CHANNEL] >> 8); 202 } 203 mutex_unlock(&data->update_lock); 204 return 0; 205 default: 206 return -EOPNOTSUPP; 207 } 208 } 209 210 static int max31790_write_fan(struct device *dev, u32 attr, int channel, 211 long val) 212 { 213 struct max31790_data *data = dev_get_drvdata(dev); 214 struct i2c_client *client = data->client; 215 int target_count; 216 int err = 0; 217 u8 bits; 218 int sr; 219 220 mutex_lock(&data->update_lock); 221 222 switch (attr) { 223 case hwmon_fan_target: 224 val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX); 225 bits = bits_for_tach_period(val); 226 data->fan_dynamics[channel] = 227 ((data->fan_dynamics[channel] & 228 ~MAX31790_FAN_DYN_SR_MASK) | 229 (bits << MAX31790_FAN_DYN_SR_SHIFT)); 230 err = i2c_smbus_write_byte_data(client, 231 MAX31790_REG_FAN_DYNAMICS(channel), 232 data->fan_dynamics[channel]); 233 if (err < 0) 234 break; 235 236 sr = get_tach_period(data->fan_dynamics[channel]); 237 target_count = RPM_TO_REG(val, sr); 238 target_count = clamp_val(target_count, 0x1, 0x7FF); 239 240 data->target_count[channel] = target_count << 5; 241 242 err = i2c_smbus_write_word_swapped(client, 243 MAX31790_REG_TARGET_COUNT(channel), 244 data->target_count[channel]); 245 break; 246 default: 247 err = -EOPNOTSUPP; 248 break; 249 } 250 251 mutex_unlock(&data->update_lock); 252 253 return err; 254 } 255 256 static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel) 257 { 258 const struct max31790_data *data = _data; 259 u8 fan_config = data->fan_config[channel % NR_CHANNEL]; 260 261 switch (attr) { 262 case hwmon_fan_input: 263 case hwmon_fan_fault: 264 if (channel < NR_CHANNEL || 265 (fan_config & MAX31790_FAN_CFG_TACH_INPUT)) 266 return 0444; 267 return 0; 268 case hwmon_fan_target: 269 if (channel < NR_CHANNEL && 270 !(fan_config & MAX31790_FAN_CFG_TACH_INPUT)) 271 return 0644; 272 return 0; 273 default: 274 return 0; 275 } 276 } 277 278 static int max31790_read_pwm(struct device *dev, u32 attr, int channel, 279 long *val) 280 { 281 struct max31790_data *data = max31790_update_device(dev); 282 u8 fan_config; 283 284 if (IS_ERR(data)) 285 return PTR_ERR(data); 286 287 fan_config = data->fan_config[channel]; 288 289 switch (attr) { 290 case hwmon_pwm_input: 291 *val = data->pwm[channel] >> 8; 292 return 0; 293 case hwmon_pwm_enable: 294 if (fan_config & MAX31790_FAN_CFG_CTRL_MON) 295 *val = 0; 296 else if (fan_config & MAX31790_FAN_CFG_RPM_MODE) 297 *val = 2; 298 else 299 *val = 1; 300 return 0; 301 default: 302 return -EOPNOTSUPP; 303 } 304 } 305 306 static int max31790_write_pwm(struct device *dev, u32 attr, int channel, 307 long val) 308 { 309 struct max31790_data *data = dev_get_drvdata(dev); 310 struct i2c_client *client = data->client; 311 u8 fan_config; 312 int err = 0; 313 314 mutex_lock(&data->update_lock); 315 316 switch (attr) { 317 case hwmon_pwm_input: 318 if (val < 0 || val > 255) { 319 err = -EINVAL; 320 break; 321 } 322 data->valid = false; 323 err = i2c_smbus_write_word_swapped(client, 324 MAX31790_REG_PWMOUT(channel), 325 val << 8); 326 break; 327 case hwmon_pwm_enable: 328 fan_config = data->fan_config[channel]; 329 if (val == 0) { 330 fan_config |= MAX31790_FAN_CFG_CTRL_MON; 331 /* 332 * Disable RPM mode; otherwise disabling fan speed 333 * monitoring is not possible. 334 */ 335 fan_config &= ~MAX31790_FAN_CFG_RPM_MODE; 336 } else if (val == 1) { 337 fan_config &= ~(MAX31790_FAN_CFG_CTRL_MON | MAX31790_FAN_CFG_RPM_MODE); 338 } else if (val == 2) { 339 fan_config &= ~MAX31790_FAN_CFG_CTRL_MON; 340 /* 341 * The chip sets MAX31790_FAN_CFG_TACH_INPUT_EN on its 342 * own if MAX31790_FAN_CFG_RPM_MODE is set. 343 * Do it here as well to reflect the actual register 344 * value in the cache. 345 */ 346 fan_config |= (MAX31790_FAN_CFG_RPM_MODE | MAX31790_FAN_CFG_TACH_INPUT_EN); 347 } else { 348 err = -EINVAL; 349 break; 350 } 351 if (fan_config != data->fan_config[channel]) { 352 err = i2c_smbus_write_byte_data(client, MAX31790_REG_FAN_CONFIG(channel), 353 fan_config); 354 if (!err) 355 data->fan_config[channel] = fan_config; 356 } 357 break; 358 default: 359 err = -EOPNOTSUPP; 360 break; 361 } 362 363 mutex_unlock(&data->update_lock); 364 365 return err; 366 } 367 368 static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel) 369 { 370 const struct max31790_data *data = _data; 371 u8 fan_config = data->fan_config[channel]; 372 373 switch (attr) { 374 case hwmon_pwm_input: 375 case hwmon_pwm_enable: 376 if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT)) 377 return 0644; 378 return 0; 379 default: 380 return 0; 381 } 382 } 383 384 static int max31790_read(struct device *dev, enum hwmon_sensor_types type, 385 u32 attr, int channel, long *val) 386 { 387 switch (type) { 388 case hwmon_fan: 389 return max31790_read_fan(dev, attr, channel, val); 390 case hwmon_pwm: 391 return max31790_read_pwm(dev, attr, channel, val); 392 default: 393 return -EOPNOTSUPP; 394 } 395 } 396 397 static int max31790_write(struct device *dev, enum hwmon_sensor_types type, 398 u32 attr, int channel, long val) 399 { 400 switch (type) { 401 case hwmon_fan: 402 return max31790_write_fan(dev, attr, channel, val); 403 case hwmon_pwm: 404 return max31790_write_pwm(dev, attr, channel, val); 405 default: 406 return -EOPNOTSUPP; 407 } 408 } 409 410 static umode_t max31790_is_visible(const void *data, 411 enum hwmon_sensor_types type, 412 u32 attr, int channel) 413 { 414 switch (type) { 415 case hwmon_fan: 416 return max31790_fan_is_visible(data, attr, channel); 417 case hwmon_pwm: 418 return max31790_pwm_is_visible(data, attr, channel); 419 default: 420 return 0; 421 } 422 } 423 424 static const struct hwmon_channel_info *max31790_info[] = { 425 HWMON_CHANNEL_INFO(fan, 426 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT, 427 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT, 428 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT, 429 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT, 430 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT, 431 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT, 432 HWMON_F_INPUT | HWMON_F_FAULT, 433 HWMON_F_INPUT | HWMON_F_FAULT, 434 HWMON_F_INPUT | HWMON_F_FAULT, 435 HWMON_F_INPUT | HWMON_F_FAULT, 436 HWMON_F_INPUT | HWMON_F_FAULT, 437 HWMON_F_INPUT | HWMON_F_FAULT), 438 HWMON_CHANNEL_INFO(pwm, 439 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 440 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 441 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 442 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 443 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 444 HWMON_PWM_INPUT | HWMON_PWM_ENABLE), 445 NULL 446 }; 447 448 static const struct hwmon_ops max31790_hwmon_ops = { 449 .is_visible = max31790_is_visible, 450 .read = max31790_read, 451 .write = max31790_write, 452 }; 453 454 static const struct hwmon_chip_info max31790_chip_info = { 455 .ops = &max31790_hwmon_ops, 456 .info = max31790_info, 457 }; 458 459 static int max31790_init_client(struct i2c_client *client, 460 struct max31790_data *data) 461 { 462 int i, rv; 463 464 for (i = 0; i < NR_CHANNEL; i++) { 465 rv = i2c_smbus_read_byte_data(client, 466 MAX31790_REG_FAN_CONFIG(i)); 467 if (rv < 0) 468 return rv; 469 data->fan_config[i] = rv; 470 471 rv = i2c_smbus_read_byte_data(client, 472 MAX31790_REG_FAN_DYNAMICS(i)); 473 if (rv < 0) 474 return rv; 475 data->fan_dynamics[i] = rv; 476 } 477 478 return 0; 479 } 480 481 static int max31790_probe(struct i2c_client *client) 482 { 483 struct i2c_adapter *adapter = client->adapter; 484 struct device *dev = &client->dev; 485 struct max31790_data *data; 486 struct device *hwmon_dev; 487 int err; 488 489 if (!i2c_check_functionality(adapter, 490 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) 491 return -ENODEV; 492 493 data = devm_kzalloc(dev, sizeof(struct max31790_data), GFP_KERNEL); 494 if (!data) 495 return -ENOMEM; 496 497 data->client = client; 498 mutex_init(&data->update_lock); 499 500 /* 501 * Initialize the max31790 chip 502 */ 503 err = max31790_init_client(client, data); 504 if (err) 505 return err; 506 507 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 508 data, 509 &max31790_chip_info, 510 NULL); 511 512 return PTR_ERR_OR_ZERO(hwmon_dev); 513 } 514 515 static const struct i2c_device_id max31790_id[] = { 516 { "max31790", 0 }, 517 { } 518 }; 519 MODULE_DEVICE_TABLE(i2c, max31790_id); 520 521 static struct i2c_driver max31790_driver = { 522 .class = I2C_CLASS_HWMON, 523 .probe_new = max31790_probe, 524 .driver = { 525 .name = "max31790", 526 }, 527 .id_table = max31790_id, 528 }; 529 530 module_i2c_driver(max31790_driver); 531 532 MODULE_AUTHOR("Il Han <corone.il.han@gmail.com>"); 533 MODULE_DESCRIPTION("MAX31790 sensor driver"); 534 MODULE_LICENSE("GPL"); 535