xref: /openbmc/linux/drivers/hwmon/lm83.c (revision 1975d167)
1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
28d5d45fbSJean Delvare /*
38d5d45fbSJean Delvare  * lm83.c - Part of lm_sensors, Linux kernel modules for hardware
48d5d45fbSJean Delvare  *          monitoring
57c81c60fSJean Delvare  * Copyright (C) 2003-2009  Jean Delvare <jdelvare@suse.de>
68d5d45fbSJean Delvare  *
78d5d45fbSJean Delvare  * Heavily inspired from the lm78, lm75 and adm1021 drivers. The LM83 is
88d5d45fbSJean Delvare  * a sensor chip made by National Semiconductor. It reports up to four
98d5d45fbSJean Delvare  * temperatures (its own plus up to three external ones) with a 1 deg
108d5d45fbSJean Delvare  * resolution and a 3-4 deg accuracy. Complete datasheet can be obtained
118d5d45fbSJean Delvare  * from National's website at:
128d5d45fbSJean Delvare  *   http://www.national.com/pf/LM/LM83.html
138d5d45fbSJean Delvare  * Since the datasheet omits to give the chip stepping code, I give it
148d5d45fbSJean Delvare  * here: 0x03 (at register 0xff).
158d5d45fbSJean Delvare  *
1643cb7ebeSJordan Crouse  * Also supports the LM82 temp sensor, which is basically a stripped down
1743cb7ebeSJordan Crouse  * model of the LM83.  Datasheet is here:
1843cb7ebeSJordan Crouse  * http://www.national.com/pf/LM/LM82.html
198d5d45fbSJean Delvare  */
208d5d45fbSJean Delvare 
21c291f612SGuenter Roeck #include <linux/bits.h>
22943b0830SMark M. Hoffman #include <linux/err.h>
237c68c2c7SGuenter Roeck #include <linux/i2c.h>
247c68c2c7SGuenter Roeck #include <linux/init.h>
257c68c2c7SGuenter Roeck #include <linux/hwmon.h>
267c68c2c7SGuenter Roeck #include <linux/module.h>
27719af4f1SGuenter Roeck #include <linux/regmap.h>
287c68c2c7SGuenter Roeck #include <linux/slab.h>
298d5d45fbSJean Delvare 
308d5d45fbSJean Delvare /*
318d5d45fbSJean Delvare  * Addresses to scan
328d5d45fbSJean Delvare  * Address is selected using 2 three-level pins, resulting in 9 possible
338d5d45fbSJean Delvare  * addresses.
348d5d45fbSJean Delvare  */
358d5d45fbSJean Delvare 
3625e9c86dSMark M. Hoffman static const unsigned short normal_i2c[] = {
3725e9c86dSMark M. Hoffman 	0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x4c, 0x4d, 0x4e, I2C_CLIENT_END };
388d5d45fbSJean Delvare 
39e5e9f44cSJean Delvare enum chips { lm83, lm82 };
408d5d45fbSJean Delvare 
418d5d45fbSJean Delvare /*
428d5d45fbSJean Delvare  * The LM83 registers
438d5d45fbSJean Delvare  * Manufacturer ID is 0x01 for National Semiconductor.
448d5d45fbSJean Delvare  */
458d5d45fbSJean Delvare 
468d5d45fbSJean Delvare #define LM83_REG_R_MAN_ID		0xFE
478d5d45fbSJean Delvare #define LM83_REG_R_CHIP_ID		0xFF
488d5d45fbSJean Delvare #define LM83_REG_R_CONFIG		0x03
498d5d45fbSJean Delvare #define LM83_REG_W_CONFIG		0x09
508d5d45fbSJean Delvare #define LM83_REG_R_STATUS1		0x02
518d5d45fbSJean Delvare #define LM83_REG_R_STATUS2		0x35
528d5d45fbSJean Delvare #define LM83_REG_R_LOCAL_TEMP		0x00
538d5d45fbSJean Delvare #define LM83_REG_R_LOCAL_HIGH		0x05
548d5d45fbSJean Delvare #define LM83_REG_W_LOCAL_HIGH		0x0B
558d5d45fbSJean Delvare #define LM83_REG_R_REMOTE1_TEMP		0x30
568d5d45fbSJean Delvare #define LM83_REG_R_REMOTE1_HIGH		0x38
578d5d45fbSJean Delvare #define LM83_REG_W_REMOTE1_HIGH		0x50
588d5d45fbSJean Delvare #define LM83_REG_R_REMOTE2_TEMP		0x01
598d5d45fbSJean Delvare #define LM83_REG_R_REMOTE2_HIGH		0x07
608d5d45fbSJean Delvare #define LM83_REG_W_REMOTE2_HIGH		0x0D
618d5d45fbSJean Delvare #define LM83_REG_R_REMOTE3_TEMP		0x31
628d5d45fbSJean Delvare #define LM83_REG_R_REMOTE3_HIGH		0x3A
638d5d45fbSJean Delvare #define LM83_REG_W_REMOTE3_HIGH		0x52
648d5d45fbSJean Delvare #define LM83_REG_R_TCRIT		0x42
658d5d45fbSJean Delvare #define LM83_REG_W_TCRIT		0x5A
668d5d45fbSJean Delvare 
67719af4f1SGuenter Roeck static const u8 LM83_REG_TEMP[] = {
688d5d45fbSJean Delvare 	LM83_REG_R_LOCAL_TEMP,
698d5d45fbSJean Delvare 	LM83_REG_R_REMOTE1_TEMP,
708d5d45fbSJean Delvare 	LM83_REG_R_REMOTE2_TEMP,
718d5d45fbSJean Delvare 	LM83_REG_R_REMOTE3_TEMP,
72c291f612SGuenter Roeck };
73c291f612SGuenter Roeck 
74c291f612SGuenter Roeck static const u8 LM83_REG_MAX[] = {
758d5d45fbSJean Delvare 	LM83_REG_R_LOCAL_HIGH,
768d5d45fbSJean Delvare 	LM83_REG_R_REMOTE1_HIGH,
778d5d45fbSJean Delvare 	LM83_REG_R_REMOTE2_HIGH,
788d5d45fbSJean Delvare 	LM83_REG_R_REMOTE3_HIGH,
79c291f612SGuenter Roeck };
80c291f612SGuenter Roeck 
81c291f612SGuenter Roeck /* alarm and fault registers and bits, indexed by channel */
82c291f612SGuenter Roeck static const u8 LM83_ALARM_REG[] = {
83c291f612SGuenter Roeck 	LM83_REG_R_STATUS1, LM83_REG_R_STATUS2, LM83_REG_R_STATUS1, LM83_REG_R_STATUS2
84c291f612SGuenter Roeck };
85c291f612SGuenter Roeck 
86c291f612SGuenter Roeck static const u8 LM83_MAX_ALARM_BIT[] = {
87c291f612SGuenter Roeck 	BIT(6), BIT(7), BIT(4), BIT(4)
88c291f612SGuenter Roeck };
89c291f612SGuenter Roeck 
90c291f612SGuenter Roeck static const u8 LM83_CRIT_ALARM_BIT[] = {
91c291f612SGuenter Roeck 	BIT(0), BIT(0), BIT(1), BIT(1)
92c291f612SGuenter Roeck };
93c291f612SGuenter Roeck 
94c291f612SGuenter Roeck static const u8 LM83_FAULT_BIT[] = {
95c291f612SGuenter Roeck 	0, BIT(5), BIT(2), BIT(2)
968d5d45fbSJean Delvare };
978d5d45fbSJean Delvare 
988d5d45fbSJean Delvare /*
998d5d45fbSJean Delvare  * Client data (each client gets its own)
1008d5d45fbSJean Delvare  */
1018d5d45fbSJean Delvare 
1028d5d45fbSJean Delvare struct lm83_data {
103719af4f1SGuenter Roeck 	struct regmap *regmap;
104c291f612SGuenter Roeck 	enum chips type;
1058d5d45fbSJean Delvare };
1068d5d45fbSJean Delvare 
107719af4f1SGuenter Roeck /* regmap code */
108719af4f1SGuenter Roeck 
lm83_regmap_reg_read(void * context,unsigned int reg,unsigned int * val)109719af4f1SGuenter Roeck static int lm83_regmap_reg_read(void *context, unsigned int reg, unsigned int *val)
11041936370SGuenter Roeck {
111719af4f1SGuenter Roeck 	struct i2c_client *client = context;
112719af4f1SGuenter Roeck 	int ret;
11341936370SGuenter Roeck 
114719af4f1SGuenter Roeck 	ret = i2c_smbus_read_byte_data(client, reg);
115719af4f1SGuenter Roeck 	if (ret < 0)
116719af4f1SGuenter Roeck 		return ret;
11741936370SGuenter Roeck 
118719af4f1SGuenter Roeck 	*val = ret;
119719af4f1SGuenter Roeck 	return 0;
12041936370SGuenter Roeck }
12141936370SGuenter Roeck 
122719af4f1SGuenter Roeck /*
123719af4f1SGuenter Roeck  * The regmap write function maps read register addresses to write register
124719af4f1SGuenter Roeck  * addresses. This is necessary for regmap register caching to work.
125719af4f1SGuenter Roeck  * An alternative would be to clear the regmap cache whenever a register is
126719af4f1SGuenter Roeck  * written, but that would be much more expensive.
127719af4f1SGuenter Roeck  */
lm83_regmap_reg_write(void * context,unsigned int reg,unsigned int val)128719af4f1SGuenter Roeck static int lm83_regmap_reg_write(void *context, unsigned int reg, unsigned int val)
129719af4f1SGuenter Roeck {
130719af4f1SGuenter Roeck 	struct i2c_client *client = context;
13141936370SGuenter Roeck 
132719af4f1SGuenter Roeck 	switch (reg) {
133719af4f1SGuenter Roeck 	case LM83_REG_R_CONFIG:
134719af4f1SGuenter Roeck 	case LM83_REG_R_LOCAL_HIGH:
135719af4f1SGuenter Roeck 	case LM83_REG_R_REMOTE2_HIGH:
136719af4f1SGuenter Roeck 		reg += 0x06;
137719af4f1SGuenter Roeck 		break;
138719af4f1SGuenter Roeck 	case LM83_REG_R_REMOTE1_HIGH:
139719af4f1SGuenter Roeck 	case LM83_REG_R_REMOTE3_HIGH:
140719af4f1SGuenter Roeck 	case LM83_REG_R_TCRIT:
141719af4f1SGuenter Roeck 		reg += 0x18;
142719af4f1SGuenter Roeck 		break;
143719af4f1SGuenter Roeck 	default:
144719af4f1SGuenter Roeck 		break;
14541936370SGuenter Roeck 	}
14641936370SGuenter Roeck 
147719af4f1SGuenter Roeck 	return i2c_smbus_write_byte_data(client, reg, val);
148719af4f1SGuenter Roeck }
149719af4f1SGuenter Roeck 
lm83_regmap_is_volatile(struct device * dev,unsigned int reg)150719af4f1SGuenter Roeck static bool lm83_regmap_is_volatile(struct device *dev, unsigned int reg)
151719af4f1SGuenter Roeck {
152719af4f1SGuenter Roeck 	switch (reg) {
153719af4f1SGuenter Roeck 	case LM83_REG_R_LOCAL_TEMP:
154719af4f1SGuenter Roeck 	case LM83_REG_R_REMOTE1_TEMP:
155719af4f1SGuenter Roeck 	case LM83_REG_R_REMOTE2_TEMP:
156719af4f1SGuenter Roeck 	case LM83_REG_R_REMOTE3_TEMP:
157719af4f1SGuenter Roeck 	case LM83_REG_R_STATUS1:
158719af4f1SGuenter Roeck 	case LM83_REG_R_STATUS2:
159719af4f1SGuenter Roeck 		return true;
160719af4f1SGuenter Roeck 	default:
161719af4f1SGuenter Roeck 		return false;
162719af4f1SGuenter Roeck 	}
163719af4f1SGuenter Roeck }
164719af4f1SGuenter Roeck 
165719af4f1SGuenter Roeck static const struct regmap_config lm83_regmap_config = {
166719af4f1SGuenter Roeck 	.reg_bits = 8,
167719af4f1SGuenter Roeck 	.val_bits = 8,
168719af4f1SGuenter Roeck 	.cache_type = REGCACHE_RBTREE,
169719af4f1SGuenter Roeck 	.volatile_reg = lm83_regmap_is_volatile,
170719af4f1SGuenter Roeck 	.reg_read = lm83_regmap_reg_read,
171719af4f1SGuenter Roeck 	.reg_write = lm83_regmap_reg_write,
172719af4f1SGuenter Roeck };
173719af4f1SGuenter Roeck 
174c291f612SGuenter Roeck /* hwmon API */
1758d5d45fbSJean Delvare 
lm83_temp_read(struct device * dev,u32 attr,int channel,long * val)176c291f612SGuenter Roeck static int lm83_temp_read(struct device *dev, u32 attr, int channel, long *val)
1778d5d45fbSJean Delvare {
178719af4f1SGuenter Roeck 	struct lm83_data *data = dev_get_drvdata(dev);
179719af4f1SGuenter Roeck 	unsigned int regval;
180b3789a0dSFrans Meulenbroeks 	int err;
181b3789a0dSFrans Meulenbroeks 
182c291f612SGuenter Roeck 	switch (attr) {
183c291f612SGuenter Roeck 	case hwmon_temp_input:
184c291f612SGuenter Roeck 		err = regmap_read(data->regmap, LM83_REG_TEMP[channel], &regval);
185b3789a0dSFrans Meulenbroeks 		if (err < 0)
186b3789a0dSFrans Meulenbroeks 			return err;
187c291f612SGuenter Roeck 		*val = (s8)regval * 1000;
188c291f612SGuenter Roeck 		break;
189c291f612SGuenter Roeck 	case hwmon_temp_max:
190c291f612SGuenter Roeck 		err = regmap_read(data->regmap, LM83_REG_MAX[channel], &regval);
191c291f612SGuenter Roeck 		if (err < 0)
192c291f612SGuenter Roeck 			return err;
193c291f612SGuenter Roeck 		*val = (s8)regval * 1000;
194c291f612SGuenter Roeck 		break;
195c291f612SGuenter Roeck 	case hwmon_temp_crit:
196c291f612SGuenter Roeck 		err = regmap_read(data->regmap, LM83_REG_R_TCRIT, &regval);
197c291f612SGuenter Roeck 		if (err < 0)
198c291f612SGuenter Roeck 			return err;
199c291f612SGuenter Roeck 		*val = (s8)regval * 1000;
200c291f612SGuenter Roeck 		break;
201c291f612SGuenter Roeck 	case hwmon_temp_max_alarm:
202c291f612SGuenter Roeck 		err = regmap_read(data->regmap, LM83_ALARM_REG[channel], &regval);
203c291f612SGuenter Roeck 		if (err < 0)
204c291f612SGuenter Roeck 			return err;
205c291f612SGuenter Roeck 		*val = !!(regval & LM83_MAX_ALARM_BIT[channel]);
206c291f612SGuenter Roeck 		break;
207c291f612SGuenter Roeck 	case hwmon_temp_crit_alarm:
208c291f612SGuenter Roeck 		err = regmap_read(data->regmap, LM83_ALARM_REG[channel], &regval);
209c291f612SGuenter Roeck 		if (err < 0)
210c291f612SGuenter Roeck 			return err;
211c291f612SGuenter Roeck 		*val = !!(regval & LM83_CRIT_ALARM_BIT[channel]);
212c291f612SGuenter Roeck 		break;
213c291f612SGuenter Roeck 	case hwmon_temp_fault:
214c291f612SGuenter Roeck 		err = regmap_read(data->regmap, LM83_ALARM_REG[channel], &regval);
215c291f612SGuenter Roeck 		if (err < 0)
216c291f612SGuenter Roeck 			return err;
217c291f612SGuenter Roeck 		*val = !!(regval & LM83_FAULT_BIT[channel]);
218c291f612SGuenter Roeck 		break;
219c291f612SGuenter Roeck 	default:
220c291f612SGuenter Roeck 		return -EOPNOTSUPP;
221c291f612SGuenter Roeck 	}
222c291f612SGuenter Roeck 	return 0;
2238d5d45fbSJean Delvare }
2248d5d45fbSJean Delvare 
lm83_temp_write(struct device * dev,u32 attr,int channel,long val)225c291f612SGuenter Roeck static int lm83_temp_write(struct device *dev, u32 attr, int channel, long val)
2268d5d45fbSJean Delvare {
227719af4f1SGuenter Roeck 	struct lm83_data *data = dev_get_drvdata(dev);
228c291f612SGuenter Roeck 	unsigned int regval;
229719af4f1SGuenter Roeck 	int err;
230719af4f1SGuenter Roeck 
231c291f612SGuenter Roeck 	regval = DIV_ROUND_CLOSEST(clamp_val(val, -128000, 127000), 1000);
232c291f612SGuenter Roeck 
233c291f612SGuenter Roeck 	switch (attr) {
234c291f612SGuenter Roeck 	case hwmon_temp_max:
235c291f612SGuenter Roeck 		err = regmap_write(data->regmap, LM83_REG_MAX[channel], regval);
236c291f612SGuenter Roeck 		if (err < 0)
237c291f612SGuenter Roeck 			return err;
238c291f612SGuenter Roeck 		break;
239c291f612SGuenter Roeck 	case hwmon_temp_crit:
240c291f612SGuenter Roeck 		err = regmap_write(data->regmap, LM83_REG_R_TCRIT, regval);
241c291f612SGuenter Roeck 		if (err < 0)
242c291f612SGuenter Roeck 			return err;
243c291f612SGuenter Roeck 		break;
244c291f612SGuenter Roeck 	default:
245c291f612SGuenter Roeck 		return -EOPNOTSUPP;
246c291f612SGuenter Roeck 	}
247c291f612SGuenter Roeck 	return 0;
248c291f612SGuenter Roeck }
249c291f612SGuenter Roeck 
lm83_chip_read(struct device * dev,u32 attr,int channel,long * val)250c291f612SGuenter Roeck static int lm83_chip_read(struct device *dev, u32 attr, int channel, long *val)
251c291f612SGuenter Roeck {
252c291f612SGuenter Roeck 	struct lm83_data *data = dev_get_drvdata(dev);
253c291f612SGuenter Roeck 	unsigned int regval;
254c291f612SGuenter Roeck 	int err;
255c291f612SGuenter Roeck 
256c291f612SGuenter Roeck 	switch (attr) {
257c291f612SGuenter Roeck 	case hwmon_chip_alarms:
258719af4f1SGuenter Roeck 		err = regmap_read(data->regmap, LM83_REG_R_STATUS1, &regval);
259719af4f1SGuenter Roeck 		if (err < 0)
260719af4f1SGuenter Roeck 			return err;
261c291f612SGuenter Roeck 		*val = regval;
262719af4f1SGuenter Roeck 		err = regmap_read(data->regmap, LM83_REG_R_STATUS2, &regval);
263719af4f1SGuenter Roeck 		if (err < 0)
264719af4f1SGuenter Roeck 			return err;
265c291f612SGuenter Roeck 		*val |= regval << 8;
266c291f612SGuenter Roeck 		return 0;
267c291f612SGuenter Roeck 	default:
268c291f612SGuenter Roeck 		return -EOPNOTSUPP;
2698d5d45fbSJean Delvare 	}
2708d5d45fbSJean Delvare 
271c291f612SGuenter Roeck 	return 0;
272c291f612SGuenter Roeck }
273c291f612SGuenter Roeck 
lm83_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)274c291f612SGuenter Roeck static int lm83_read(struct device *dev, enum hwmon_sensor_types type,
275c291f612SGuenter Roeck 		     u32 attr, int channel, long *val)
2762d45771eSJean Delvare {
277c291f612SGuenter Roeck 	switch (type) {
278c291f612SGuenter Roeck 	case hwmon_chip:
279c291f612SGuenter Roeck 		return lm83_chip_read(dev, attr, channel, val);
280c291f612SGuenter Roeck 	case hwmon_temp:
281c291f612SGuenter Roeck 		return lm83_temp_read(dev, attr, channel, val);
282c291f612SGuenter Roeck 	default:
283c291f612SGuenter Roeck 		return -EOPNOTSUPP;
284719af4f1SGuenter Roeck 	}
2852d45771eSJean Delvare }
2862d45771eSJean Delvare 
lm83_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long val)287c291f612SGuenter Roeck static int lm83_write(struct device *dev, enum hwmon_sensor_types type,
288c291f612SGuenter Roeck 		      u32 attr, int channel, long val)
289c291f612SGuenter Roeck {
290c291f612SGuenter Roeck 	switch (type) {
291c291f612SGuenter Roeck 	case hwmon_temp:
292c291f612SGuenter Roeck 		return lm83_temp_write(dev, attr, channel, val);
293c291f612SGuenter Roeck 	default:
294c291f612SGuenter Roeck 		return -EOPNOTSUPP;
295c291f612SGuenter Roeck 	}
296c291f612SGuenter Roeck }
2972d45771eSJean Delvare 
lm83_is_visible(const void * _data,enum hwmon_sensor_types type,u32 attr,int channel)298c291f612SGuenter Roeck static umode_t lm83_is_visible(const void *_data, enum hwmon_sensor_types type,
299c291f612SGuenter Roeck 			       u32 attr, int channel)
300c291f612SGuenter Roeck {
301c291f612SGuenter Roeck 	const struct lm83_data *data = _data;
3020e39e01cSJean Delvare 
3038d5d45fbSJean Delvare 	/*
304c291f612SGuenter Roeck 	 * LM82 only supports a single external channel, modeled as channel 2.
3058d5d45fbSJean Delvare 	 */
306c291f612SGuenter Roeck 	if (data->type == lm82 && (channel == 1 || channel == 3))
307c291f612SGuenter Roeck 		return 0;
308c291f612SGuenter Roeck 
309c291f612SGuenter Roeck 	switch (type) {
310c291f612SGuenter Roeck 	case hwmon_chip:
311c291f612SGuenter Roeck 		if (attr == hwmon_chip_alarms)
312c291f612SGuenter Roeck 			return 0444;
313c291f612SGuenter Roeck 		break;
314c291f612SGuenter Roeck 	case hwmon_temp:
315c291f612SGuenter Roeck 		switch (attr) {
316c291f612SGuenter Roeck 		case hwmon_temp_input:
317c291f612SGuenter Roeck 		case hwmon_temp_max_alarm:
318c291f612SGuenter Roeck 		case hwmon_temp_crit_alarm:
319c291f612SGuenter Roeck 			return 0444;
320c291f612SGuenter Roeck 		case hwmon_temp_fault:
321c291f612SGuenter Roeck 			if (channel)
322c291f612SGuenter Roeck 				return 0444;
323c291f612SGuenter Roeck 			break;
324c291f612SGuenter Roeck 		case hwmon_temp_max:
325c291f612SGuenter Roeck 			return 0644;
326c291f612SGuenter Roeck 		case hwmon_temp_crit:
327c291f612SGuenter Roeck 			if (channel == 2)
328c291f612SGuenter Roeck 				return 0644;
329c291f612SGuenter Roeck 			return 0444;
330c291f612SGuenter Roeck 		default:
331c291f612SGuenter Roeck 			break;
332c291f612SGuenter Roeck 		}
333c291f612SGuenter Roeck 		break;
334c291f612SGuenter Roeck 	default:
335c291f612SGuenter Roeck 		break;
336c291f612SGuenter Roeck 	}
337c291f612SGuenter Roeck 	return 0;
338c291f612SGuenter Roeck }
339c291f612SGuenter Roeck 
3403c370243SKrzysztof Kozlowski static const struct hwmon_channel_info * const lm83_info[] = {
341c291f612SGuenter Roeck 	HWMON_CHANNEL_INFO(chip, HWMON_C_ALARMS),
342c291f612SGuenter Roeck 	HWMON_CHANNEL_INFO(temp,
343c291f612SGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
344c291f612SGuenter Roeck 			   HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM,
345c291f612SGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
346c291f612SGuenter Roeck 			   HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT,
347c291f612SGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
348c291f612SGuenter Roeck 			   HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT,
349c291f612SGuenter Roeck 			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT |
350c291f612SGuenter Roeck 			   HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT
351c291f612SGuenter Roeck 			   ),
352c291f612SGuenter Roeck 	NULL
353c291f612SGuenter Roeck };
354c291f612SGuenter Roeck 
355c291f612SGuenter Roeck static const struct hwmon_ops lm83_hwmon_ops = {
356c291f612SGuenter Roeck 	.is_visible = lm83_is_visible,
357c291f612SGuenter Roeck 	.read = lm83_read,
358c291f612SGuenter Roeck 	.write = lm83_write,
359c291f612SGuenter Roeck };
360c291f612SGuenter Roeck 
361c291f612SGuenter Roeck static const struct hwmon_chip_info lm83_chip_info = {
362c291f612SGuenter Roeck 	.ops = &lm83_hwmon_ops,
363c291f612SGuenter Roeck 	.info = lm83_info,
364c291f612SGuenter Roeck };
3658d5d45fbSJean Delvare 
366b6aacdceSJean Delvare /* Return 0 if detection is successful, -ENODEV otherwise */
lm83_detect(struct i2c_client * client,struct i2c_board_info * info)36781de0eeaSGuenter Roeck static int lm83_detect(struct i2c_client *client,
368b6aacdceSJean Delvare 		       struct i2c_board_info *info)
3698d5d45fbSJean Delvare {
37081de0eeaSGuenter Roeck 	struct i2c_adapter *adapter = client->adapter;
371b57dc394SJean Delvare 	const char *name;
372b57dc394SJean Delvare 	u8 man_id, chip_id;
3738d5d45fbSJean Delvare 
3748d5d45fbSJean Delvare 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
375b6aacdceSJean Delvare 		return -ENODEV;
3768d5d45fbSJean Delvare 
377b57dc394SJean Delvare 	/* Detection */
37881de0eeaSGuenter Roeck 	if ((i2c_smbus_read_byte_data(client, LM83_REG_R_STATUS1) & 0xA8) ||
37981de0eeaSGuenter Roeck 	    (i2c_smbus_read_byte_data(client, LM83_REG_R_STATUS2) & 0x48) ||
38081de0eeaSGuenter Roeck 	    (i2c_smbus_read_byte_data(client, LM83_REG_R_CONFIG) & 0x41)) {
381b57dc394SJean Delvare 		dev_dbg(&adapter->dev, "LM83 detection failed at 0x%02x\n",
38281de0eeaSGuenter Roeck 			client->addr);
383b6aacdceSJean Delvare 		return -ENODEV;
3848d5d45fbSJean Delvare 	}
3858d5d45fbSJean Delvare 
386b57dc394SJean Delvare 	/* Identification */
38781de0eeaSGuenter Roeck 	man_id = i2c_smbus_read_byte_data(client, LM83_REG_R_MAN_ID);
388b57dc394SJean Delvare 	if (man_id != 0x01)	/* National Semiconductor */
389b6aacdceSJean Delvare 		return -ENODEV;
3908d5d45fbSJean Delvare 
39181de0eeaSGuenter Roeck 	chip_id = i2c_smbus_read_byte_data(client, LM83_REG_R_CHIP_ID);
392b57dc394SJean Delvare 	switch (chip_id) {
393b57dc394SJean Delvare 	case 0x03:
394913ac02aSGuenter Roeck 		/*
395913ac02aSGuenter Roeck 		 * According to the LM82 datasheet dated March 2013, recent
396913ac02aSGuenter Roeck 		 * revisions of LM82 have a die revision of 0x03. This was
397913ac02aSGuenter Roeck 		 * confirmed with a real chip. Further details in this revision
398913ac02aSGuenter Roeck 		 * of the LM82 datasheet strongly suggest that LM82 is just a
399913ac02aSGuenter Roeck 		 * repackaged LM83. It is therefore impossible to distinguish
400913ac02aSGuenter Roeck 		 * those chips from LM83, and they will be misdetected as LM83.
401913ac02aSGuenter Roeck 		 */
4028d5d45fbSJean Delvare 		name = "lm83";
403b57dc394SJean Delvare 		break;
404b57dc394SJean Delvare 	case 0x01:
40543cb7ebeSJordan Crouse 		name = "lm82";
406b57dc394SJean Delvare 		break;
407b57dc394SJean Delvare 	default:
408b57dc394SJean Delvare 		/* identification failed */
4094d63c2d3SGuenter Roeck 		dev_dbg(&adapter->dev,
410b57dc394SJean Delvare 			"Unsupported chip (man_id=0x%02X, chip_id=0x%02X)\n",
411b57dc394SJean Delvare 			man_id, chip_id);
412b57dc394SJean Delvare 		return -ENODEV;
4138d5d45fbSJean Delvare 	}
4148d5d45fbSJean Delvare 
415f2f394dbSWolfram Sang 	strscpy(info->type, name, I2C_NAME_SIZE);
416b6aacdceSJean Delvare 
417b6aacdceSJean Delvare 	return 0;
418b6aacdceSJean Delvare }
419b6aacdceSJean Delvare 
42011e3377bSGuenter Roeck static const struct i2c_device_id lm83_id[] = {
42111e3377bSGuenter Roeck 	{ "lm83", lm83 },
42211e3377bSGuenter Roeck 	{ "lm82", lm82 },
42311e3377bSGuenter Roeck 	{ }
42411e3377bSGuenter Roeck };
42511e3377bSGuenter Roeck MODULE_DEVICE_TABLE(i2c, lm83_id);
42667487038SStephen Kitt 
lm83_probe(struct i2c_client * client)42781de0eeaSGuenter Roeck static int lm83_probe(struct i2c_client *client)
428b6aacdceSJean Delvare {
429719af4f1SGuenter Roeck 	struct device *dev = &client->dev;
430a0ac840dSGuenter Roeck 	struct device *hwmon_dev;
431b6aacdceSJean Delvare 	struct lm83_data *data;
432b6aacdceSJean Delvare 
433719af4f1SGuenter Roeck 	data = devm_kzalloc(dev, sizeof(struct lm83_data), GFP_KERNEL);
434c087f73aSGuenter Roeck 	if (!data)
435c087f73aSGuenter Roeck 		return -ENOMEM;
436b6aacdceSJean Delvare 
437719af4f1SGuenter Roeck 	data->regmap = devm_regmap_init(dev, NULL, client, &lm83_regmap_config);
438719af4f1SGuenter Roeck 	if (IS_ERR(data->regmap))
439719af4f1SGuenter Roeck 		return PTR_ERR(data->regmap);
4408d5d45fbSJean Delvare 
441c291f612SGuenter Roeck 	data->type = i2c_match_id(lm83_id, client)->driver_data;
44243cb7ebeSJordan Crouse 
443c291f612SGuenter Roeck 	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
444c291f612SGuenter Roeck 							 data, &lm83_chip_info, NULL);
445a0ac840dSGuenter Roeck 	return PTR_ERR_OR_ZERO(hwmon_dev);
4468d5d45fbSJean Delvare }
4478d5d45fbSJean Delvare 
44841936370SGuenter Roeck /*
44941936370SGuenter Roeck  * Driver data (common to all clients)
45041936370SGuenter Roeck  */
4518d5d45fbSJean Delvare 
45241936370SGuenter Roeck static struct i2c_driver lm83_driver = {
45341936370SGuenter Roeck 	.class		= I2C_CLASS_HWMON,
45441936370SGuenter Roeck 	.driver = {
45541936370SGuenter Roeck 		.name	= "lm83",
45641936370SGuenter Roeck 	},
457*1975d167SUwe Kleine-König 	.probe		= lm83_probe,
45841936370SGuenter Roeck 	.id_table	= lm83_id,
45941936370SGuenter Roeck 	.detect		= lm83_detect,
46041936370SGuenter Roeck 	.address_list	= normal_i2c,
46141936370SGuenter Roeck };
4628d5d45fbSJean Delvare 
463f0967eeaSAxel Lin module_i2c_driver(lm83_driver);
4648d5d45fbSJean Delvare 
4657c81c60fSJean Delvare MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
4668d5d45fbSJean Delvare MODULE_DESCRIPTION("LM83 driver");
4678d5d45fbSJean Delvare MODULE_LICENSE("GPL");
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