13c57e89bSClemens Ladisch /* 230b146d1SWei Hu * k10temp.c - AMD Family 10h/11h/12h/14h/15h/16h processor hardware monitoring 33c57e89bSClemens Ladisch * 43c57e89bSClemens Ladisch * Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de> 53c57e89bSClemens Ladisch * 63c57e89bSClemens Ladisch * 73c57e89bSClemens Ladisch * This driver is free software; you can redistribute it and/or 83c57e89bSClemens Ladisch * modify it under the terms of the GNU General Public License; either 93c57e89bSClemens Ladisch * version 2 of the License, or (at your option) any later version. 103c57e89bSClemens Ladisch * 113c57e89bSClemens Ladisch * This driver is distributed in the hope that it will be useful, 123c57e89bSClemens Ladisch * but WITHOUT ANY WARRANTY; without even the implied warranty of 133c57e89bSClemens Ladisch * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 143c57e89bSClemens Ladisch * See the GNU General Public License for more details. 153c57e89bSClemens Ladisch * 163c57e89bSClemens Ladisch * You should have received a copy of the GNU General Public License 173c57e89bSClemens Ladisch * along with this driver; if not, see <http://www.gnu.org/licenses/>. 183c57e89bSClemens Ladisch */ 193c57e89bSClemens Ladisch 203c57e89bSClemens Ladisch #include <linux/err.h> 213c57e89bSClemens Ladisch #include <linux/hwmon.h> 223c57e89bSClemens Ladisch #include <linux/hwmon-sysfs.h> 233c57e89bSClemens Ladisch #include <linux/init.h> 243c57e89bSClemens Ladisch #include <linux/module.h> 253c57e89bSClemens Ladisch #include <linux/pci.h> 263c57e89bSClemens Ladisch #include <asm/processor.h> 273c57e89bSClemens Ladisch 289e581311SAndre Przywara MODULE_DESCRIPTION("AMD Family 10h+ CPU core temperature monitor"); 293c57e89bSClemens Ladisch MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); 303c57e89bSClemens Ladisch MODULE_LICENSE("GPL"); 313c57e89bSClemens Ladisch 323c57e89bSClemens Ladisch static bool force; 333c57e89bSClemens Ladisch module_param(force, bool, 0444); 343c57e89bSClemens Ladisch MODULE_PARM_DESC(force, "force loading on processors with erratum 319"); 353c57e89bSClemens Ladisch 36f89ce270SAravind Gopalakrishnan /* Provide lock for writing to NB_SMU_IND_ADDR */ 37f89ce270SAravind Gopalakrishnan static DEFINE_MUTEX(nb_smu_ind_mutex); 38f89ce270SAravind Gopalakrishnan 399af0a9aeSGuenter Roeck #ifndef PCI_DEVICE_ID_AMD_17H_DF_F3 409af0a9aeSGuenter Roeck #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 419af0a9aeSGuenter Roeck #endif 429af0a9aeSGuenter Roeck 43877d8948SGuenter Roeck #ifndef PCI_DEVICE_ID_AMD_17H_RR_NB 44877d8948SGuenter Roeck #define PCI_DEVICE_ID_AMD_17H_RR_NB 0x15d0 45877d8948SGuenter Roeck #endif 46877d8948SGuenter Roeck 47c5114a1cSClemens Ladisch /* CPUID function 0x80000001, ebx */ 48c5114a1cSClemens Ladisch #define CPUID_PKGTYPE_MASK 0xf0000000 49c5114a1cSClemens Ladisch #define CPUID_PKGTYPE_F 0x00000000 50c5114a1cSClemens Ladisch #define CPUID_PKGTYPE_AM2R2_AM3 0x10000000 51c5114a1cSClemens Ladisch 52c5114a1cSClemens Ladisch /* DRAM controller (PCI function 2) */ 53c5114a1cSClemens Ladisch #define REG_DCT0_CONFIG_HIGH 0x094 54c5114a1cSClemens Ladisch #define DDR3_MODE 0x00000100 55c5114a1cSClemens Ladisch 56c5114a1cSClemens Ladisch /* miscellaneous (PCI function 3) */ 573c57e89bSClemens Ladisch #define REG_HARDWARE_THERMAL_CONTROL 0x64 583c57e89bSClemens Ladisch #define HTC_ENABLE 0x00000001 593c57e89bSClemens Ladisch 603c57e89bSClemens Ladisch #define REG_REPORTED_TEMPERATURE 0xa4 613c57e89bSClemens Ladisch 623c57e89bSClemens Ladisch #define REG_NORTHBRIDGE_CAPABILITIES 0xe8 633c57e89bSClemens Ladisch #define NB_CAP_HTC 0x00000400 643c57e89bSClemens Ladisch 65f89ce270SAravind Gopalakrishnan /* 66f89ce270SAravind Gopalakrishnan * For F15h M60h, functionality of REG_REPORTED_TEMPERATURE 67f89ce270SAravind Gopalakrishnan * has been moved to D0F0xBC_xD820_0CA4 [Reported Temperature 68f89ce270SAravind Gopalakrishnan * Control] 69f89ce270SAravind Gopalakrishnan */ 70f89ce270SAravind Gopalakrishnan #define F15H_M60H_REPORTED_TEMP_CTRL_OFFSET 0xd8200ca4 71f89ce270SAravind Gopalakrishnan 729af0a9aeSGuenter Roeck /* F17h M01h Access througn SMN */ 739af0a9aeSGuenter Roeck #define F17H_M01H_REPORTED_TEMP_CTRL_OFFSET 0x00059800 749af0a9aeSGuenter Roeck 7568546abfSGuenter Roeck struct k10temp_data { 7668546abfSGuenter Roeck struct pci_dev *pdev; 7768546abfSGuenter Roeck void (*read_tempreg)(struct pci_dev *pdev, u32 *regval); 781b50b776SGuenter Roeck int temp_offset; 791b597889SGuenter Roeck u32 temp_adjust_mask; 801b50b776SGuenter Roeck }; 811b50b776SGuenter Roeck 821b50b776SGuenter Roeck struct tctl_offset { 831b50b776SGuenter Roeck u8 model; 841b50b776SGuenter Roeck char const *id; 851b50b776SGuenter Roeck int offset; 861b50b776SGuenter Roeck }; 871b50b776SGuenter Roeck 881b50b776SGuenter Roeck static const struct tctl_offset tctl_offset_table[] = { 89ab5ee246SGuenter Roeck { 0x17, "AMD Ryzen 5 1600X", 20000 }, 901b50b776SGuenter Roeck { 0x17, "AMD Ryzen 7 1700X", 20000 }, 911b50b776SGuenter Roeck { 0x17, "AMD Ryzen 7 1800X", 20000 }, 921b597889SGuenter Roeck { 0x17, "AMD Ryzen 7 2700X", 10000 }, 931b50b776SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 1950X", 27000 }, 941b50b776SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 1920X", 27000 }, 956509614fSGuenter Roeck { 0x17, "AMD Ryzen Threadripper 1900X", 27000 }, 961b50b776SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 1950", 10000 }, 971b50b776SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 1920", 10000 }, 981b50b776SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 1910", 10000 }, 9968546abfSGuenter Roeck }; 10068546abfSGuenter Roeck 10168546abfSGuenter Roeck static void read_tempreg_pci(struct pci_dev *pdev, u32 *regval) 10268546abfSGuenter Roeck { 10368546abfSGuenter Roeck pci_read_config_dword(pdev, REG_REPORTED_TEMPERATURE, regval); 10468546abfSGuenter Roeck } 10568546abfSGuenter Roeck 10668546abfSGuenter Roeck static void amd_nb_index_read(struct pci_dev *pdev, unsigned int devfn, 10768546abfSGuenter Roeck unsigned int base, int offset, u32 *val) 108f89ce270SAravind Gopalakrishnan { 109f89ce270SAravind Gopalakrishnan mutex_lock(&nb_smu_ind_mutex); 110f89ce270SAravind Gopalakrishnan pci_bus_write_config_dword(pdev->bus, devfn, 11168546abfSGuenter Roeck base, offset); 112f89ce270SAravind Gopalakrishnan pci_bus_read_config_dword(pdev->bus, devfn, 11368546abfSGuenter Roeck base + 4, val); 114f89ce270SAravind Gopalakrishnan mutex_unlock(&nb_smu_ind_mutex); 115f89ce270SAravind Gopalakrishnan } 116f89ce270SAravind Gopalakrishnan 11768546abfSGuenter Roeck static void read_tempreg_nb_f15(struct pci_dev *pdev, u32 *regval) 11868546abfSGuenter Roeck { 11968546abfSGuenter Roeck amd_nb_index_read(pdev, PCI_DEVFN(0, 0), 0xb8, 12068546abfSGuenter Roeck F15H_M60H_REPORTED_TEMP_CTRL_OFFSET, regval); 12168546abfSGuenter Roeck } 12268546abfSGuenter Roeck 1239af0a9aeSGuenter Roeck static void read_tempreg_nb_f17(struct pci_dev *pdev, u32 *regval) 1249af0a9aeSGuenter Roeck { 1259af0a9aeSGuenter Roeck amd_nb_index_read(pdev, PCI_DEVFN(0, 0), 0x60, 1269af0a9aeSGuenter Roeck F17H_M01H_REPORTED_TEMP_CTRL_OFFSET, regval); 1279af0a9aeSGuenter Roeck } 1289af0a9aeSGuenter Roeck 1290c36d72eSJulia Lawall static ssize_t temp1_input_show(struct device *dev, 1303c57e89bSClemens Ladisch struct device_attribute *attr, char *buf) 1313c57e89bSClemens Ladisch { 13268546abfSGuenter Roeck struct k10temp_data *data = dev_get_drvdata(dev); 1333c57e89bSClemens Ladisch u32 regval; 13468546abfSGuenter Roeck unsigned int temp; 1353c57e89bSClemens Ladisch 13668546abfSGuenter Roeck data->read_tempreg(data->pdev, ®val); 13768546abfSGuenter Roeck temp = (regval >> 21) * 125; 1381b597889SGuenter Roeck if (regval & data->temp_adjust_mask) 1391b597889SGuenter Roeck temp -= 49000; 140aef17ca1SGuenter Roeck if (temp > data->temp_offset) 1411b50b776SGuenter Roeck temp -= data->temp_offset; 142aef17ca1SGuenter Roeck else 143aef17ca1SGuenter Roeck temp = 0; 14468546abfSGuenter Roeck 14568546abfSGuenter Roeck return sprintf(buf, "%u\n", temp); 1463c57e89bSClemens Ladisch } 1473c57e89bSClemens Ladisch 1480c36d72eSJulia Lawall static ssize_t temp1_max_show(struct device *dev, 1493c57e89bSClemens Ladisch struct device_attribute *attr, char *buf) 1503c57e89bSClemens Ladisch { 1513c57e89bSClemens Ladisch return sprintf(buf, "%d\n", 70 * 1000); 1523c57e89bSClemens Ladisch } 1533c57e89bSClemens Ladisch 1543c57e89bSClemens Ladisch static ssize_t show_temp_crit(struct device *dev, 1553c57e89bSClemens Ladisch struct device_attribute *devattr, char *buf) 1563c57e89bSClemens Ladisch { 1573c57e89bSClemens Ladisch struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 15868546abfSGuenter Roeck struct k10temp_data *data = dev_get_drvdata(dev); 1593c57e89bSClemens Ladisch int show_hyst = attr->index; 1603c57e89bSClemens Ladisch u32 regval; 1613c57e89bSClemens Ladisch int value; 1623c57e89bSClemens Ladisch 16368546abfSGuenter Roeck pci_read_config_dword(data->pdev, 1643c57e89bSClemens Ladisch REG_HARDWARE_THERMAL_CONTROL, ®val); 1653c57e89bSClemens Ladisch value = ((regval >> 16) & 0x7f) * 500 + 52000; 1663c57e89bSClemens Ladisch if (show_hyst) 1673c57e89bSClemens Ladisch value -= ((regval >> 24) & 0xf) * 500; 1683c57e89bSClemens Ladisch return sprintf(buf, "%d\n", value); 1693c57e89bSClemens Ladisch } 1703c57e89bSClemens Ladisch 1710c36d72eSJulia Lawall static DEVICE_ATTR_RO(temp1_input); 1720c36d72eSJulia Lawall static DEVICE_ATTR_RO(temp1_max); 1733c57e89bSClemens Ladisch static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0); 1743c57e89bSClemens Ladisch static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_crit, NULL, 1); 1753e3e1022SGuenter Roeck 1763e3e1022SGuenter Roeck static umode_t k10temp_is_visible(struct kobject *kobj, 1773e3e1022SGuenter Roeck struct attribute *attr, int index) 1783e3e1022SGuenter Roeck { 1793e3e1022SGuenter Roeck struct device *dev = container_of(kobj, struct device, kobj); 18068546abfSGuenter Roeck struct k10temp_data *data = dev_get_drvdata(dev); 18168546abfSGuenter Roeck struct pci_dev *pdev = data->pdev; 1823e3e1022SGuenter Roeck 1833e3e1022SGuenter Roeck if (index >= 2) { 1843e3e1022SGuenter Roeck u32 reg_caps, reg_htc; 1853e3e1022SGuenter Roeck 1863e3e1022SGuenter Roeck pci_read_config_dword(pdev, REG_NORTHBRIDGE_CAPABILITIES, 1873e3e1022SGuenter Roeck ®_caps); 1883e3e1022SGuenter Roeck pci_read_config_dword(pdev, REG_HARDWARE_THERMAL_CONTROL, 1893e3e1022SGuenter Roeck ®_htc); 1903e3e1022SGuenter Roeck if (!(reg_caps & NB_CAP_HTC) || !(reg_htc & HTC_ENABLE)) 1913e3e1022SGuenter Roeck return 0; 1923e3e1022SGuenter Roeck } 1933e3e1022SGuenter Roeck return attr->mode; 1943e3e1022SGuenter Roeck } 1953e3e1022SGuenter Roeck 1963e3e1022SGuenter Roeck static struct attribute *k10temp_attrs[] = { 1973e3e1022SGuenter Roeck &dev_attr_temp1_input.attr, 1983e3e1022SGuenter Roeck &dev_attr_temp1_max.attr, 1993e3e1022SGuenter Roeck &sensor_dev_attr_temp1_crit.dev_attr.attr, 2003e3e1022SGuenter Roeck &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, 2013e3e1022SGuenter Roeck NULL 2023e3e1022SGuenter Roeck }; 2033e3e1022SGuenter Roeck 2043e3e1022SGuenter Roeck static const struct attribute_group k10temp_group = { 2053e3e1022SGuenter Roeck .attrs = k10temp_attrs, 2063e3e1022SGuenter Roeck .is_visible = k10temp_is_visible, 2073e3e1022SGuenter Roeck }; 2083e3e1022SGuenter Roeck __ATTRIBUTE_GROUPS(k10temp); 2093c57e89bSClemens Ladisch 2106c931ae1SBill Pemberton static bool has_erratum_319(struct pci_dev *pdev) 2113c57e89bSClemens Ladisch { 212c5114a1cSClemens Ladisch u32 pkg_type, reg_dram_cfg; 213c5114a1cSClemens Ladisch 214c5114a1cSClemens Ladisch if (boot_cpu_data.x86 != 0x10) 215c5114a1cSClemens Ladisch return false; 216c5114a1cSClemens Ladisch 2173c57e89bSClemens Ladisch /* 218c5114a1cSClemens Ladisch * Erratum 319: The thermal sensor of Socket F/AM2+ processors 219c5114a1cSClemens Ladisch * may be unreliable. 2203c57e89bSClemens Ladisch */ 221c5114a1cSClemens Ladisch pkg_type = cpuid_ebx(0x80000001) & CPUID_PKGTYPE_MASK; 222c5114a1cSClemens Ladisch if (pkg_type == CPUID_PKGTYPE_F) 223c5114a1cSClemens Ladisch return true; 224c5114a1cSClemens Ladisch if (pkg_type != CPUID_PKGTYPE_AM2R2_AM3) 225c5114a1cSClemens Ladisch return false; 226c5114a1cSClemens Ladisch 227eefc2d9eSJean Delvare /* DDR3 memory implies socket AM3, which is good */ 228c5114a1cSClemens Ladisch pci_bus_read_config_dword(pdev->bus, 229c5114a1cSClemens Ladisch PCI_DEVFN(PCI_SLOT(pdev->devfn), 2), 230c5114a1cSClemens Ladisch REG_DCT0_CONFIG_HIGH, ®_dram_cfg); 231eefc2d9eSJean Delvare if (reg_dram_cfg & DDR3_MODE) 232eefc2d9eSJean Delvare return false; 233eefc2d9eSJean Delvare 234eefc2d9eSJean Delvare /* 235eefc2d9eSJean Delvare * Unfortunately it is possible to run a socket AM3 CPU with DDR2 236eefc2d9eSJean Delvare * memory. We blacklist all the cores which do exist in socket AM2+ 237eefc2d9eSJean Delvare * format. It still isn't perfect, as RB-C2 cores exist in both AM2+ 238eefc2d9eSJean Delvare * and AM3 formats, but that's the best we can do. 239eefc2d9eSJean Delvare */ 240eefc2d9eSJean Delvare return boot_cpu_data.x86_model < 4 || 241b399151cSJia Zhang (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_stepping <= 2); 2423c57e89bSClemens Ladisch } 2433c57e89bSClemens Ladisch 2446c931ae1SBill Pemberton static int k10temp_probe(struct pci_dev *pdev, 2453c57e89bSClemens Ladisch const struct pci_device_id *id) 2463c57e89bSClemens Ladisch { 247c5114a1cSClemens Ladisch int unreliable = has_erratum_319(pdev); 2483e3e1022SGuenter Roeck struct device *dev = &pdev->dev; 24968546abfSGuenter Roeck struct k10temp_data *data; 2503e3e1022SGuenter Roeck struct device *hwmon_dev; 2511b50b776SGuenter Roeck int i; 2523c57e89bSClemens Ladisch 2533e3e1022SGuenter Roeck if (unreliable) { 2543e3e1022SGuenter Roeck if (!force) { 2553e3e1022SGuenter Roeck dev_err(dev, 2563c57e89bSClemens Ladisch "unreliable CPU thermal sensor; monitoring disabled\n"); 2573e3e1022SGuenter Roeck return -ENODEV; 2583c57e89bSClemens Ladisch } 2593e3e1022SGuenter Roeck dev_warn(dev, 2603c57e89bSClemens Ladisch "unreliable CPU thermal sensor; check erratum 319\n"); 2613c57e89bSClemens Ladisch } 2623c57e89bSClemens Ladisch 26368546abfSGuenter Roeck data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); 26468546abfSGuenter Roeck if (!data) 26568546abfSGuenter Roeck return -ENOMEM; 26668546abfSGuenter Roeck 26768546abfSGuenter Roeck data->pdev = pdev; 26868546abfSGuenter Roeck 26968546abfSGuenter Roeck if (boot_cpu_data.x86 == 0x15 && (boot_cpu_data.x86_model == 0x60 || 2701b597889SGuenter Roeck boot_cpu_data.x86_model == 0x70)) { 27168546abfSGuenter Roeck data->read_tempreg = read_tempreg_nb_f15; 2721b597889SGuenter Roeck } else if (boot_cpu_data.x86 == 0x17) { 2731b597889SGuenter Roeck data->temp_adjust_mask = 0x80000; 2749af0a9aeSGuenter Roeck data->read_tempreg = read_tempreg_nb_f17; 2751b597889SGuenter Roeck } else { 27668546abfSGuenter Roeck data->read_tempreg = read_tempreg_pci; 2771b597889SGuenter Roeck } 27868546abfSGuenter Roeck 2791b50b776SGuenter Roeck for (i = 0; i < ARRAY_SIZE(tctl_offset_table); i++) { 2801b50b776SGuenter Roeck const struct tctl_offset *entry = &tctl_offset_table[i]; 2811b50b776SGuenter Roeck 2821b50b776SGuenter Roeck if (boot_cpu_data.x86 == entry->model && 2831b50b776SGuenter Roeck strstr(boot_cpu_data.x86_model_id, entry->id)) { 2841b50b776SGuenter Roeck data->temp_offset = entry->offset; 2851b50b776SGuenter Roeck break; 2861b50b776SGuenter Roeck } 2871b50b776SGuenter Roeck } 2881b50b776SGuenter Roeck 28968546abfSGuenter Roeck hwmon_dev = devm_hwmon_device_register_with_groups(dev, "k10temp", data, 2903e3e1022SGuenter Roeck k10temp_groups); 2913e3e1022SGuenter Roeck return PTR_ERR_OR_ZERO(hwmon_dev); 2923c57e89bSClemens Ladisch } 2933c57e89bSClemens Ladisch 294cd9bb056SJingoo Han static const struct pci_device_id k10temp_id_table[] = { 2953c57e89bSClemens Ladisch { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) }, 2963c57e89bSClemens Ladisch { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) }, 297aa4790a6SClemens Ladisch { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, 2989e581311SAndre Przywara { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) }, 29924214449SBorislav Petkov { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) }, 300d303b1b5SPhil Pokorny { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) }, 301f89ce270SAravind Gopalakrishnan { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F3) }, 30230b146d1SWei Hu { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) }, 303ec015950SAravind Gopalakrishnan { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, 3049af0a9aeSGuenter Roeck { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, 305877d8948SGuenter Roeck { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_RR_NB) }, 3063c57e89bSClemens Ladisch {} 3073c57e89bSClemens Ladisch }; 3083c57e89bSClemens Ladisch MODULE_DEVICE_TABLE(pci, k10temp_id_table); 3093c57e89bSClemens Ladisch 3103c57e89bSClemens Ladisch static struct pci_driver k10temp_driver = { 3113c57e89bSClemens Ladisch .name = "k10temp", 3123c57e89bSClemens Ladisch .id_table = k10temp_id_table, 3133c57e89bSClemens Ladisch .probe = k10temp_probe, 3143c57e89bSClemens Ladisch }; 3153c57e89bSClemens Ladisch 316f71f5a55SAxel Lin module_pci_driver(k10temp_driver); 317