13c57e89bSClemens Ladisch /* 230b146d1SWei Hu * k10temp.c - AMD Family 10h/11h/12h/14h/15h/16h processor hardware monitoring 33c57e89bSClemens Ladisch * 43c57e89bSClemens Ladisch * Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de> 53c57e89bSClemens Ladisch * 63c57e89bSClemens Ladisch * 73c57e89bSClemens Ladisch * This driver is free software; you can redistribute it and/or 83c57e89bSClemens Ladisch * modify it under the terms of the GNU General Public License; either 93c57e89bSClemens Ladisch * version 2 of the License, or (at your option) any later version. 103c57e89bSClemens Ladisch * 113c57e89bSClemens Ladisch * This driver is distributed in the hope that it will be useful, 123c57e89bSClemens Ladisch * but WITHOUT ANY WARRANTY; without even the implied warranty of 133c57e89bSClemens Ladisch * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 143c57e89bSClemens Ladisch * See the GNU General Public License for more details. 153c57e89bSClemens Ladisch * 163c57e89bSClemens Ladisch * You should have received a copy of the GNU General Public License 173c57e89bSClemens Ladisch * along with this driver; if not, see <http://www.gnu.org/licenses/>. 183c57e89bSClemens Ladisch */ 193c57e89bSClemens Ladisch 203c57e89bSClemens Ladisch #include <linux/err.h> 213c57e89bSClemens Ladisch #include <linux/hwmon.h> 223c57e89bSClemens Ladisch #include <linux/hwmon-sysfs.h> 233c57e89bSClemens Ladisch #include <linux/init.h> 243c57e89bSClemens Ladisch #include <linux/module.h> 253c57e89bSClemens Ladisch #include <linux/pci.h> 263b031622SGuenter Roeck #include <asm/amd_nb.h> 273c57e89bSClemens Ladisch #include <asm/processor.h> 283c57e89bSClemens Ladisch 299e581311SAndre Przywara MODULE_DESCRIPTION("AMD Family 10h+ CPU core temperature monitor"); 303c57e89bSClemens Ladisch MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); 313c57e89bSClemens Ladisch MODULE_LICENSE("GPL"); 323c57e89bSClemens Ladisch 333c57e89bSClemens Ladisch static bool force; 343c57e89bSClemens Ladisch module_param(force, bool, 0444); 353c57e89bSClemens Ladisch MODULE_PARM_DESC(force, "force loading on processors with erratum 319"); 363c57e89bSClemens Ladisch 37f89ce270SAravind Gopalakrishnan /* Provide lock for writing to NB_SMU_IND_ADDR */ 38f89ce270SAravind Gopalakrishnan static DEFINE_MUTEX(nb_smu_ind_mutex); 39f89ce270SAravind Gopalakrishnan 40ccaf63b4SGuenter Roeck #ifndef PCI_DEVICE_ID_AMD_15H_M70H_NB_F3 41ccaf63b4SGuenter Roeck #define PCI_DEVICE_ID_AMD_15H_M70H_NB_F3 0x15b3 42ccaf63b4SGuenter Roeck #endif 43ccaf63b4SGuenter Roeck 449af0a9aeSGuenter Roeck #ifndef PCI_DEVICE_ID_AMD_17H_DF_F3 459af0a9aeSGuenter Roeck #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 469af0a9aeSGuenter Roeck #endif 479af0a9aeSGuenter Roeck 483b031622SGuenter Roeck #ifndef PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 493b031622SGuenter Roeck #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb 50877d8948SGuenter Roeck #endif 51877d8948SGuenter Roeck 52c5114a1cSClemens Ladisch /* CPUID function 0x80000001, ebx */ 53c5114a1cSClemens Ladisch #define CPUID_PKGTYPE_MASK 0xf0000000 54c5114a1cSClemens Ladisch #define CPUID_PKGTYPE_F 0x00000000 55c5114a1cSClemens Ladisch #define CPUID_PKGTYPE_AM2R2_AM3 0x10000000 56c5114a1cSClemens Ladisch 57c5114a1cSClemens Ladisch /* DRAM controller (PCI function 2) */ 58c5114a1cSClemens Ladisch #define REG_DCT0_CONFIG_HIGH 0x094 59c5114a1cSClemens Ladisch #define DDR3_MODE 0x00000100 60c5114a1cSClemens Ladisch 61c5114a1cSClemens Ladisch /* miscellaneous (PCI function 3) */ 623c57e89bSClemens Ladisch #define REG_HARDWARE_THERMAL_CONTROL 0x64 633c57e89bSClemens Ladisch #define HTC_ENABLE 0x00000001 643c57e89bSClemens Ladisch 653c57e89bSClemens Ladisch #define REG_REPORTED_TEMPERATURE 0xa4 663c57e89bSClemens Ladisch 673c57e89bSClemens Ladisch #define REG_NORTHBRIDGE_CAPABILITIES 0xe8 683c57e89bSClemens Ladisch #define NB_CAP_HTC 0x00000400 693c57e89bSClemens Ladisch 70f89ce270SAravind Gopalakrishnan /* 7140626a1bSGuenter Roeck * For F15h M60h and M70h, REG_HARDWARE_THERMAL_CONTROL 7240626a1bSGuenter Roeck * and REG_REPORTED_TEMPERATURE have been moved to 7340626a1bSGuenter Roeck * D0F0xBC_xD820_0C64 [Hardware Temperature Control] 7440626a1bSGuenter Roeck * D0F0xBC_xD820_0CA4 [Reported Temperature Control] 75f89ce270SAravind Gopalakrishnan */ 7640626a1bSGuenter Roeck #define F15H_M60H_HARDWARE_TEMP_CTRL_OFFSET 0xd8200c64 77f89ce270SAravind Gopalakrishnan #define F15H_M60H_REPORTED_TEMP_CTRL_OFFSET 0xd8200ca4 78f89ce270SAravind Gopalakrishnan 799af0a9aeSGuenter Roeck /* F17h M01h Access througn SMN */ 809af0a9aeSGuenter Roeck #define F17H_M01H_REPORTED_TEMP_CTRL_OFFSET 0x00059800 819af0a9aeSGuenter Roeck 8268546abfSGuenter Roeck struct k10temp_data { 8368546abfSGuenter Roeck struct pci_dev *pdev; 8440626a1bSGuenter Roeck void (*read_htcreg)(struct pci_dev *pdev, u32 *regval); 8568546abfSGuenter Roeck void (*read_tempreg)(struct pci_dev *pdev, u32 *regval); 861b50b776SGuenter Roeck int temp_offset; 871b597889SGuenter Roeck u32 temp_adjust_mask; 88f934c059SGuenter Roeck bool show_tdie; 891b50b776SGuenter Roeck }; 901b50b776SGuenter Roeck 911b50b776SGuenter Roeck struct tctl_offset { 921b50b776SGuenter Roeck u8 model; 931b50b776SGuenter Roeck char const *id; 941b50b776SGuenter Roeck int offset; 951b50b776SGuenter Roeck }; 961b50b776SGuenter Roeck 971b50b776SGuenter Roeck static const struct tctl_offset tctl_offset_table[] = { 98ab5ee246SGuenter Roeck { 0x17, "AMD Ryzen 5 1600X", 20000 }, 991b50b776SGuenter Roeck { 0x17, "AMD Ryzen 7 1700X", 20000 }, 1001b50b776SGuenter Roeck { 0x17, "AMD Ryzen 7 1800X", 20000 }, 1011b597889SGuenter Roeck { 0x17, "AMD Ryzen 7 2700X", 10000 }, 102cd6a2064SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 19", 27000 }, /* 19{00,20,50}X */ 103cd6a2064SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 29", 27000 }, /* 29{20,50,70,90}[W]X */ 10468546abfSGuenter Roeck }; 10568546abfSGuenter Roeck 10640626a1bSGuenter Roeck static void read_htcreg_pci(struct pci_dev *pdev, u32 *regval) 10740626a1bSGuenter Roeck { 10840626a1bSGuenter Roeck pci_read_config_dword(pdev, REG_HARDWARE_THERMAL_CONTROL, regval); 10940626a1bSGuenter Roeck } 11040626a1bSGuenter Roeck 11168546abfSGuenter Roeck static void read_tempreg_pci(struct pci_dev *pdev, u32 *regval) 11268546abfSGuenter Roeck { 11368546abfSGuenter Roeck pci_read_config_dword(pdev, REG_REPORTED_TEMPERATURE, regval); 11468546abfSGuenter Roeck } 11568546abfSGuenter Roeck 11668546abfSGuenter Roeck static void amd_nb_index_read(struct pci_dev *pdev, unsigned int devfn, 11768546abfSGuenter Roeck unsigned int base, int offset, u32 *val) 118f89ce270SAravind Gopalakrishnan { 119f89ce270SAravind Gopalakrishnan mutex_lock(&nb_smu_ind_mutex); 120f89ce270SAravind Gopalakrishnan pci_bus_write_config_dword(pdev->bus, devfn, 12168546abfSGuenter Roeck base, offset); 122f89ce270SAravind Gopalakrishnan pci_bus_read_config_dword(pdev->bus, devfn, 12368546abfSGuenter Roeck base + 4, val); 124f89ce270SAravind Gopalakrishnan mutex_unlock(&nb_smu_ind_mutex); 125f89ce270SAravind Gopalakrishnan } 126f89ce270SAravind Gopalakrishnan 12740626a1bSGuenter Roeck static void read_htcreg_nb_f15(struct pci_dev *pdev, u32 *regval) 12840626a1bSGuenter Roeck { 12940626a1bSGuenter Roeck amd_nb_index_read(pdev, PCI_DEVFN(0, 0), 0xb8, 13040626a1bSGuenter Roeck F15H_M60H_HARDWARE_TEMP_CTRL_OFFSET, regval); 13140626a1bSGuenter Roeck } 13240626a1bSGuenter Roeck 13368546abfSGuenter Roeck static void read_tempreg_nb_f15(struct pci_dev *pdev, u32 *regval) 13468546abfSGuenter Roeck { 13568546abfSGuenter Roeck amd_nb_index_read(pdev, PCI_DEVFN(0, 0), 0xb8, 13668546abfSGuenter Roeck F15H_M60H_REPORTED_TEMP_CTRL_OFFSET, regval); 13768546abfSGuenter Roeck } 13868546abfSGuenter Roeck 1399af0a9aeSGuenter Roeck static void read_tempreg_nb_f17(struct pci_dev *pdev, u32 *regval) 1409af0a9aeSGuenter Roeck { 1413b031622SGuenter Roeck amd_smn_read(amd_pci_dev_to_node_id(pdev), 1429af0a9aeSGuenter Roeck F17H_M01H_REPORTED_TEMP_CTRL_OFFSET, regval); 1439af0a9aeSGuenter Roeck } 1449af0a9aeSGuenter Roeck 145fb8eefd3SColin Ian King static unsigned int get_raw_temp(struct k10temp_data *data) 1463c57e89bSClemens Ladisch { 14768546abfSGuenter Roeck unsigned int temp; 148f934c059SGuenter Roeck u32 regval; 1493c57e89bSClemens Ladisch 15068546abfSGuenter Roeck data->read_tempreg(data->pdev, ®val); 15168546abfSGuenter Roeck temp = (regval >> 21) * 125; 1521b597889SGuenter Roeck if (regval & data->temp_adjust_mask) 1531b597889SGuenter Roeck temp -= 49000; 154f934c059SGuenter Roeck return temp; 155f934c059SGuenter Roeck } 156f934c059SGuenter Roeck 157f934c059SGuenter Roeck static ssize_t temp1_input_show(struct device *dev, 158f934c059SGuenter Roeck struct device_attribute *attr, char *buf) 159f934c059SGuenter Roeck { 160f934c059SGuenter Roeck struct k10temp_data *data = dev_get_drvdata(dev); 161f934c059SGuenter Roeck unsigned int temp = get_raw_temp(data); 162f934c059SGuenter Roeck 163aef17ca1SGuenter Roeck if (temp > data->temp_offset) 1641b50b776SGuenter Roeck temp -= data->temp_offset; 165aef17ca1SGuenter Roeck else 166aef17ca1SGuenter Roeck temp = 0; 16768546abfSGuenter Roeck 16868546abfSGuenter Roeck return sprintf(buf, "%u\n", temp); 1693c57e89bSClemens Ladisch } 1703c57e89bSClemens Ladisch 171f934c059SGuenter Roeck static ssize_t temp2_input_show(struct device *dev, 172f934c059SGuenter Roeck struct device_attribute *devattr, char *buf) 173f934c059SGuenter Roeck { 174f934c059SGuenter Roeck struct k10temp_data *data = dev_get_drvdata(dev); 175f934c059SGuenter Roeck unsigned int temp = get_raw_temp(data); 176f934c059SGuenter Roeck 177f934c059SGuenter Roeck return sprintf(buf, "%u\n", temp); 178f934c059SGuenter Roeck } 179f934c059SGuenter Roeck 180f934c059SGuenter Roeck static ssize_t temp_label_show(struct device *dev, 181f934c059SGuenter Roeck struct device_attribute *devattr, char *buf) 182f934c059SGuenter Roeck { 183f934c059SGuenter Roeck struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 184f934c059SGuenter Roeck 185f934c059SGuenter Roeck return sprintf(buf, "%s\n", attr->index ? "Tctl" : "Tdie"); 186f934c059SGuenter Roeck } 187f934c059SGuenter Roeck 1880c36d72eSJulia Lawall static ssize_t temp1_max_show(struct device *dev, 1893c57e89bSClemens Ladisch struct device_attribute *attr, char *buf) 1903c57e89bSClemens Ladisch { 1913c57e89bSClemens Ladisch return sprintf(buf, "%d\n", 70 * 1000); 1923c57e89bSClemens Ladisch } 1933c57e89bSClemens Ladisch 1943c57e89bSClemens Ladisch static ssize_t show_temp_crit(struct device *dev, 1953c57e89bSClemens Ladisch struct device_attribute *devattr, char *buf) 1963c57e89bSClemens Ladisch { 1973c57e89bSClemens Ladisch struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 19868546abfSGuenter Roeck struct k10temp_data *data = dev_get_drvdata(dev); 1993c57e89bSClemens Ladisch int show_hyst = attr->index; 2003c57e89bSClemens Ladisch u32 regval; 2013c57e89bSClemens Ladisch int value; 2023c57e89bSClemens Ladisch 20340626a1bSGuenter Roeck data->read_htcreg(data->pdev, ®val); 2043c57e89bSClemens Ladisch value = ((regval >> 16) & 0x7f) * 500 + 52000; 2053c57e89bSClemens Ladisch if (show_hyst) 2063c57e89bSClemens Ladisch value -= ((regval >> 24) & 0xf) * 500; 2073c57e89bSClemens Ladisch return sprintf(buf, "%d\n", value); 2083c57e89bSClemens Ladisch } 2093c57e89bSClemens Ladisch 2100c36d72eSJulia Lawall static DEVICE_ATTR_RO(temp1_input); 2110c36d72eSJulia Lawall static DEVICE_ATTR_RO(temp1_max); 2123c57e89bSClemens Ladisch static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0); 2133c57e89bSClemens Ladisch static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_crit, NULL, 1); 2143e3e1022SGuenter Roeck 215f934c059SGuenter Roeck static SENSOR_DEVICE_ATTR(temp1_label, 0444, temp_label_show, NULL, 0); 216f934c059SGuenter Roeck static DEVICE_ATTR_RO(temp2_input); 217f934c059SGuenter Roeck static SENSOR_DEVICE_ATTR(temp2_label, 0444, temp_label_show, NULL, 1); 218f934c059SGuenter Roeck 2193e3e1022SGuenter Roeck static umode_t k10temp_is_visible(struct kobject *kobj, 2203e3e1022SGuenter Roeck struct attribute *attr, int index) 2213e3e1022SGuenter Roeck { 2223e3e1022SGuenter Roeck struct device *dev = container_of(kobj, struct device, kobj); 22368546abfSGuenter Roeck struct k10temp_data *data = dev_get_drvdata(dev); 22468546abfSGuenter Roeck struct pci_dev *pdev = data->pdev; 22540626a1bSGuenter Roeck u32 reg; 22640626a1bSGuenter Roeck 227f934c059SGuenter Roeck switch (index) { 228f934c059SGuenter Roeck case 0 ... 1: /* temp1_input, temp1_max */ 229f934c059SGuenter Roeck default: 230f934c059SGuenter Roeck break; 231f934c059SGuenter Roeck case 2 ... 3: /* temp1_crit, temp1_crit_hyst */ 23240626a1bSGuenter Roeck if (!data->read_htcreg) 23340626a1bSGuenter Roeck return 0; 2343e3e1022SGuenter Roeck 2353e3e1022SGuenter Roeck pci_read_config_dword(pdev, REG_NORTHBRIDGE_CAPABILITIES, 23640626a1bSGuenter Roeck ®); 23740626a1bSGuenter Roeck if (!(reg & NB_CAP_HTC)) 23840626a1bSGuenter Roeck return 0; 23940626a1bSGuenter Roeck 24040626a1bSGuenter Roeck data->read_htcreg(data->pdev, ®); 24140626a1bSGuenter Roeck if (!(reg & HTC_ENABLE)) 2423e3e1022SGuenter Roeck return 0; 243f934c059SGuenter Roeck break; 244f934c059SGuenter Roeck case 4 ... 6: /* temp1_label, temp2_input, temp2_label */ 245f934c059SGuenter Roeck if (!data->show_tdie) 246f934c059SGuenter Roeck return 0; 247f934c059SGuenter Roeck break; 2483e3e1022SGuenter Roeck } 2493e3e1022SGuenter Roeck return attr->mode; 2503e3e1022SGuenter Roeck } 2513e3e1022SGuenter Roeck 2523e3e1022SGuenter Roeck static struct attribute *k10temp_attrs[] = { 2533e3e1022SGuenter Roeck &dev_attr_temp1_input.attr, 2543e3e1022SGuenter Roeck &dev_attr_temp1_max.attr, 2553e3e1022SGuenter Roeck &sensor_dev_attr_temp1_crit.dev_attr.attr, 2563e3e1022SGuenter Roeck &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, 257f934c059SGuenter Roeck &sensor_dev_attr_temp1_label.dev_attr.attr, 258f934c059SGuenter Roeck &dev_attr_temp2_input.attr, 259f934c059SGuenter Roeck &sensor_dev_attr_temp2_label.dev_attr.attr, 2603e3e1022SGuenter Roeck NULL 2613e3e1022SGuenter Roeck }; 2623e3e1022SGuenter Roeck 2633e3e1022SGuenter Roeck static const struct attribute_group k10temp_group = { 2643e3e1022SGuenter Roeck .attrs = k10temp_attrs, 2653e3e1022SGuenter Roeck .is_visible = k10temp_is_visible, 2663e3e1022SGuenter Roeck }; 2673e3e1022SGuenter Roeck __ATTRIBUTE_GROUPS(k10temp); 2683c57e89bSClemens Ladisch 2696c931ae1SBill Pemberton static bool has_erratum_319(struct pci_dev *pdev) 2703c57e89bSClemens Ladisch { 271c5114a1cSClemens Ladisch u32 pkg_type, reg_dram_cfg; 272c5114a1cSClemens Ladisch 273c5114a1cSClemens Ladisch if (boot_cpu_data.x86 != 0x10) 274c5114a1cSClemens Ladisch return false; 275c5114a1cSClemens Ladisch 2763c57e89bSClemens Ladisch /* 277c5114a1cSClemens Ladisch * Erratum 319: The thermal sensor of Socket F/AM2+ processors 278c5114a1cSClemens Ladisch * may be unreliable. 2793c57e89bSClemens Ladisch */ 280c5114a1cSClemens Ladisch pkg_type = cpuid_ebx(0x80000001) & CPUID_PKGTYPE_MASK; 281c5114a1cSClemens Ladisch if (pkg_type == CPUID_PKGTYPE_F) 282c5114a1cSClemens Ladisch return true; 283c5114a1cSClemens Ladisch if (pkg_type != CPUID_PKGTYPE_AM2R2_AM3) 284c5114a1cSClemens Ladisch return false; 285c5114a1cSClemens Ladisch 286eefc2d9eSJean Delvare /* DDR3 memory implies socket AM3, which is good */ 287c5114a1cSClemens Ladisch pci_bus_read_config_dword(pdev->bus, 288c5114a1cSClemens Ladisch PCI_DEVFN(PCI_SLOT(pdev->devfn), 2), 289c5114a1cSClemens Ladisch REG_DCT0_CONFIG_HIGH, ®_dram_cfg); 290eefc2d9eSJean Delvare if (reg_dram_cfg & DDR3_MODE) 291eefc2d9eSJean Delvare return false; 292eefc2d9eSJean Delvare 293eefc2d9eSJean Delvare /* 294eefc2d9eSJean Delvare * Unfortunately it is possible to run a socket AM3 CPU with DDR2 295eefc2d9eSJean Delvare * memory. We blacklist all the cores which do exist in socket AM2+ 296eefc2d9eSJean Delvare * format. It still isn't perfect, as RB-C2 cores exist in both AM2+ 297eefc2d9eSJean Delvare * and AM3 formats, but that's the best we can do. 298eefc2d9eSJean Delvare */ 299eefc2d9eSJean Delvare return boot_cpu_data.x86_model < 4 || 300b399151cSJia Zhang (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_stepping <= 2); 3013c57e89bSClemens Ladisch } 3023c57e89bSClemens Ladisch 3036c931ae1SBill Pemberton static int k10temp_probe(struct pci_dev *pdev, 3043c57e89bSClemens Ladisch const struct pci_device_id *id) 3053c57e89bSClemens Ladisch { 306c5114a1cSClemens Ladisch int unreliable = has_erratum_319(pdev); 3073e3e1022SGuenter Roeck struct device *dev = &pdev->dev; 30868546abfSGuenter Roeck struct k10temp_data *data; 3093e3e1022SGuenter Roeck struct device *hwmon_dev; 3101b50b776SGuenter Roeck int i; 3113c57e89bSClemens Ladisch 3123e3e1022SGuenter Roeck if (unreliable) { 3133e3e1022SGuenter Roeck if (!force) { 3143e3e1022SGuenter Roeck dev_err(dev, 3153c57e89bSClemens Ladisch "unreliable CPU thermal sensor; monitoring disabled\n"); 3163e3e1022SGuenter Roeck return -ENODEV; 3173c57e89bSClemens Ladisch } 3183e3e1022SGuenter Roeck dev_warn(dev, 3193c57e89bSClemens Ladisch "unreliable CPU thermal sensor; check erratum 319\n"); 3203c57e89bSClemens Ladisch } 3213c57e89bSClemens Ladisch 32268546abfSGuenter Roeck data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); 32368546abfSGuenter Roeck if (!data) 32468546abfSGuenter Roeck return -ENOMEM; 32568546abfSGuenter Roeck 32668546abfSGuenter Roeck data->pdev = pdev; 32768546abfSGuenter Roeck 32853dfa008SGuenter Roeck if (boot_cpu_data.x86 == 0x15 && 32953dfa008SGuenter Roeck ((boot_cpu_data.x86_model & 0xf0) == 0x60 || 33053dfa008SGuenter Roeck (boot_cpu_data.x86_model & 0xf0) == 0x70)) { 33140626a1bSGuenter Roeck data->read_htcreg = read_htcreg_nb_f15; 33268546abfSGuenter Roeck data->read_tempreg = read_tempreg_nb_f15; 3331b597889SGuenter Roeck } else if (boot_cpu_data.x86 == 0x17) { 3341b597889SGuenter Roeck data->temp_adjust_mask = 0x80000; 3359af0a9aeSGuenter Roeck data->read_tempreg = read_tempreg_nb_f17; 336f934c059SGuenter Roeck data->show_tdie = true; 3371b597889SGuenter Roeck } else { 33840626a1bSGuenter Roeck data->read_htcreg = read_htcreg_pci; 33968546abfSGuenter Roeck data->read_tempreg = read_tempreg_pci; 3401b597889SGuenter Roeck } 34168546abfSGuenter Roeck 3421b50b776SGuenter Roeck for (i = 0; i < ARRAY_SIZE(tctl_offset_table); i++) { 3431b50b776SGuenter Roeck const struct tctl_offset *entry = &tctl_offset_table[i]; 3441b50b776SGuenter Roeck 3451b50b776SGuenter Roeck if (boot_cpu_data.x86 == entry->model && 3461b50b776SGuenter Roeck strstr(boot_cpu_data.x86_model_id, entry->id)) { 3471b50b776SGuenter Roeck data->temp_offset = entry->offset; 3481b50b776SGuenter Roeck break; 3491b50b776SGuenter Roeck } 3501b50b776SGuenter Roeck } 3511b50b776SGuenter Roeck 35268546abfSGuenter Roeck hwmon_dev = devm_hwmon_device_register_with_groups(dev, "k10temp", data, 3533e3e1022SGuenter Roeck k10temp_groups); 3543e3e1022SGuenter Roeck return PTR_ERR_OR_ZERO(hwmon_dev); 3553c57e89bSClemens Ladisch } 3563c57e89bSClemens Ladisch 357cd9bb056SJingoo Han static const struct pci_device_id k10temp_id_table[] = { 3583c57e89bSClemens Ladisch { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) }, 3593c57e89bSClemens Ladisch { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) }, 360aa4790a6SClemens Ladisch { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, 3619e581311SAndre Przywara { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) }, 36224214449SBorislav Petkov { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) }, 363d303b1b5SPhil Pokorny { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) }, 364f89ce270SAravind Gopalakrishnan { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F3) }, 365ccaf63b4SGuenter Roeck { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M70H_NB_F3) }, 36630b146d1SWei Hu { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) }, 367ec015950SAravind Gopalakrishnan { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, 3689af0a9aeSGuenter Roeck { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, 3693b031622SGuenter Roeck { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) }, 3703c57e89bSClemens Ladisch {} 3713c57e89bSClemens Ladisch }; 3723c57e89bSClemens Ladisch MODULE_DEVICE_TABLE(pci, k10temp_id_table); 3733c57e89bSClemens Ladisch 3743c57e89bSClemens Ladisch static struct pci_driver k10temp_driver = { 3753c57e89bSClemens Ladisch .name = "k10temp", 3763c57e89bSClemens Ladisch .id_table = k10temp_id_table, 3773c57e89bSClemens Ladisch .probe = k10temp_probe, 3783c57e89bSClemens Ladisch }; 3793c57e89bSClemens Ladisch 380f71f5a55SAxel Lin module_pci_driver(k10temp_driver); 381