13c57e89bSClemens Ladisch /* 230b146d1SWei Hu * k10temp.c - AMD Family 10h/11h/12h/14h/15h/16h processor hardware monitoring 33c57e89bSClemens Ladisch * 43c57e89bSClemens Ladisch * Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de> 53c57e89bSClemens Ladisch * 63c57e89bSClemens Ladisch * 73c57e89bSClemens Ladisch * This driver is free software; you can redistribute it and/or 83c57e89bSClemens Ladisch * modify it under the terms of the GNU General Public License; either 93c57e89bSClemens Ladisch * version 2 of the License, or (at your option) any later version. 103c57e89bSClemens Ladisch * 113c57e89bSClemens Ladisch * This driver is distributed in the hope that it will be useful, 123c57e89bSClemens Ladisch * but WITHOUT ANY WARRANTY; without even the implied warranty of 133c57e89bSClemens Ladisch * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 143c57e89bSClemens Ladisch * See the GNU General Public License for more details. 153c57e89bSClemens Ladisch * 163c57e89bSClemens Ladisch * You should have received a copy of the GNU General Public License 173c57e89bSClemens Ladisch * along with this driver; if not, see <http://www.gnu.org/licenses/>. 183c57e89bSClemens Ladisch */ 193c57e89bSClemens Ladisch 203c57e89bSClemens Ladisch #include <linux/err.h> 213c57e89bSClemens Ladisch #include <linux/hwmon.h> 223c57e89bSClemens Ladisch #include <linux/hwmon-sysfs.h> 233c57e89bSClemens Ladisch #include <linux/init.h> 243c57e89bSClemens Ladisch #include <linux/module.h> 253c57e89bSClemens Ladisch #include <linux/pci.h> 263c57e89bSClemens Ladisch #include <asm/processor.h> 273c57e89bSClemens Ladisch 289e581311SAndre Przywara MODULE_DESCRIPTION("AMD Family 10h+ CPU core temperature monitor"); 293c57e89bSClemens Ladisch MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); 303c57e89bSClemens Ladisch MODULE_LICENSE("GPL"); 313c57e89bSClemens Ladisch 323c57e89bSClemens Ladisch static bool force; 333c57e89bSClemens Ladisch module_param(force, bool, 0444); 343c57e89bSClemens Ladisch MODULE_PARM_DESC(force, "force loading on processors with erratum 319"); 353c57e89bSClemens Ladisch 36f89ce270SAravind Gopalakrishnan /* Provide lock for writing to NB_SMU_IND_ADDR */ 37f89ce270SAravind Gopalakrishnan static DEFINE_MUTEX(nb_smu_ind_mutex); 38f89ce270SAravind Gopalakrishnan 399af0a9aeSGuenter Roeck #ifndef PCI_DEVICE_ID_AMD_17H_DF_F3 409af0a9aeSGuenter Roeck #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 419af0a9aeSGuenter Roeck #endif 429af0a9aeSGuenter Roeck 43c5114a1cSClemens Ladisch /* CPUID function 0x80000001, ebx */ 44c5114a1cSClemens Ladisch #define CPUID_PKGTYPE_MASK 0xf0000000 45c5114a1cSClemens Ladisch #define CPUID_PKGTYPE_F 0x00000000 46c5114a1cSClemens Ladisch #define CPUID_PKGTYPE_AM2R2_AM3 0x10000000 47c5114a1cSClemens Ladisch 48c5114a1cSClemens Ladisch /* DRAM controller (PCI function 2) */ 49c5114a1cSClemens Ladisch #define REG_DCT0_CONFIG_HIGH 0x094 50c5114a1cSClemens Ladisch #define DDR3_MODE 0x00000100 51c5114a1cSClemens Ladisch 52c5114a1cSClemens Ladisch /* miscellaneous (PCI function 3) */ 533c57e89bSClemens Ladisch #define REG_HARDWARE_THERMAL_CONTROL 0x64 543c57e89bSClemens Ladisch #define HTC_ENABLE 0x00000001 553c57e89bSClemens Ladisch 563c57e89bSClemens Ladisch #define REG_REPORTED_TEMPERATURE 0xa4 573c57e89bSClemens Ladisch 583c57e89bSClemens Ladisch #define REG_NORTHBRIDGE_CAPABILITIES 0xe8 593c57e89bSClemens Ladisch #define NB_CAP_HTC 0x00000400 603c57e89bSClemens Ladisch 61f89ce270SAravind Gopalakrishnan /* 62f89ce270SAravind Gopalakrishnan * For F15h M60h, functionality of REG_REPORTED_TEMPERATURE 63f89ce270SAravind Gopalakrishnan * has been moved to D0F0xBC_xD820_0CA4 [Reported Temperature 64f89ce270SAravind Gopalakrishnan * Control] 65f89ce270SAravind Gopalakrishnan */ 66f89ce270SAravind Gopalakrishnan #define F15H_M60H_REPORTED_TEMP_CTRL_OFFSET 0xd8200ca4 67f89ce270SAravind Gopalakrishnan 689af0a9aeSGuenter Roeck /* F17h M01h Access througn SMN */ 699af0a9aeSGuenter Roeck #define F17H_M01H_REPORTED_TEMP_CTRL_OFFSET 0x00059800 709af0a9aeSGuenter Roeck 7168546abfSGuenter Roeck struct k10temp_data { 7268546abfSGuenter Roeck struct pci_dev *pdev; 7368546abfSGuenter Roeck void (*read_tempreg)(struct pci_dev *pdev, u32 *regval); 741b50b776SGuenter Roeck int temp_offset; 751b50b776SGuenter Roeck }; 761b50b776SGuenter Roeck 771b50b776SGuenter Roeck struct tctl_offset { 781b50b776SGuenter Roeck u8 model; 791b50b776SGuenter Roeck char const *id; 801b50b776SGuenter Roeck int offset; 811b50b776SGuenter Roeck }; 821b50b776SGuenter Roeck 831b50b776SGuenter Roeck static const struct tctl_offset tctl_offset_table[] = { 841b50b776SGuenter Roeck { 0x17, "AMD Ryzen 7 1600X", 20000 }, 851b50b776SGuenter Roeck { 0x17, "AMD Ryzen 7 1700X", 20000 }, 861b50b776SGuenter Roeck { 0x17, "AMD Ryzen 7 1800X", 20000 }, 871b50b776SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 1950X", 27000 }, 881b50b776SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 1920X", 27000 }, 891b50b776SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 1950", 10000 }, 901b50b776SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 1920", 10000 }, 911b50b776SGuenter Roeck { 0x17, "AMD Ryzen Threadripper 1910", 10000 }, 9268546abfSGuenter Roeck }; 9368546abfSGuenter Roeck 9468546abfSGuenter Roeck static void read_tempreg_pci(struct pci_dev *pdev, u32 *regval) 9568546abfSGuenter Roeck { 9668546abfSGuenter Roeck pci_read_config_dword(pdev, REG_REPORTED_TEMPERATURE, regval); 9768546abfSGuenter Roeck } 9868546abfSGuenter Roeck 9968546abfSGuenter Roeck static void amd_nb_index_read(struct pci_dev *pdev, unsigned int devfn, 10068546abfSGuenter Roeck unsigned int base, int offset, u32 *val) 101f89ce270SAravind Gopalakrishnan { 102f89ce270SAravind Gopalakrishnan mutex_lock(&nb_smu_ind_mutex); 103f89ce270SAravind Gopalakrishnan pci_bus_write_config_dword(pdev->bus, devfn, 10468546abfSGuenter Roeck base, offset); 105f89ce270SAravind Gopalakrishnan pci_bus_read_config_dword(pdev->bus, devfn, 10668546abfSGuenter Roeck base + 4, val); 107f89ce270SAravind Gopalakrishnan mutex_unlock(&nb_smu_ind_mutex); 108f89ce270SAravind Gopalakrishnan } 109f89ce270SAravind Gopalakrishnan 11068546abfSGuenter Roeck static void read_tempreg_nb_f15(struct pci_dev *pdev, u32 *regval) 11168546abfSGuenter Roeck { 11268546abfSGuenter Roeck amd_nb_index_read(pdev, PCI_DEVFN(0, 0), 0xb8, 11368546abfSGuenter Roeck F15H_M60H_REPORTED_TEMP_CTRL_OFFSET, regval); 11468546abfSGuenter Roeck } 11568546abfSGuenter Roeck 1169af0a9aeSGuenter Roeck static void read_tempreg_nb_f17(struct pci_dev *pdev, u32 *regval) 1179af0a9aeSGuenter Roeck { 1189af0a9aeSGuenter Roeck amd_nb_index_read(pdev, PCI_DEVFN(0, 0), 0x60, 1199af0a9aeSGuenter Roeck F17H_M01H_REPORTED_TEMP_CTRL_OFFSET, regval); 1209af0a9aeSGuenter Roeck } 1219af0a9aeSGuenter Roeck 1220c36d72eSJulia Lawall static ssize_t temp1_input_show(struct device *dev, 1233c57e89bSClemens Ladisch struct device_attribute *attr, char *buf) 1243c57e89bSClemens Ladisch { 12568546abfSGuenter Roeck struct k10temp_data *data = dev_get_drvdata(dev); 1263c57e89bSClemens Ladisch u32 regval; 12768546abfSGuenter Roeck unsigned int temp; 1283c57e89bSClemens Ladisch 12968546abfSGuenter Roeck data->read_tempreg(data->pdev, ®val); 13068546abfSGuenter Roeck temp = (regval >> 21) * 125; 1311b50b776SGuenter Roeck temp -= data->temp_offset; 13268546abfSGuenter Roeck 13368546abfSGuenter Roeck return sprintf(buf, "%u\n", temp); 1343c57e89bSClemens Ladisch } 1353c57e89bSClemens Ladisch 1360c36d72eSJulia Lawall static ssize_t temp1_max_show(struct device *dev, 1373c57e89bSClemens Ladisch struct device_attribute *attr, char *buf) 1383c57e89bSClemens Ladisch { 1393c57e89bSClemens Ladisch return sprintf(buf, "%d\n", 70 * 1000); 1403c57e89bSClemens Ladisch } 1413c57e89bSClemens Ladisch 1423c57e89bSClemens Ladisch static ssize_t show_temp_crit(struct device *dev, 1433c57e89bSClemens Ladisch struct device_attribute *devattr, char *buf) 1443c57e89bSClemens Ladisch { 1453c57e89bSClemens Ladisch struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 14668546abfSGuenter Roeck struct k10temp_data *data = dev_get_drvdata(dev); 1473c57e89bSClemens Ladisch int show_hyst = attr->index; 1483c57e89bSClemens Ladisch u32 regval; 1493c57e89bSClemens Ladisch int value; 1503c57e89bSClemens Ladisch 15168546abfSGuenter Roeck pci_read_config_dword(data->pdev, 1523c57e89bSClemens Ladisch REG_HARDWARE_THERMAL_CONTROL, ®val); 1533c57e89bSClemens Ladisch value = ((regval >> 16) & 0x7f) * 500 + 52000; 1543c57e89bSClemens Ladisch if (show_hyst) 1553c57e89bSClemens Ladisch value -= ((regval >> 24) & 0xf) * 500; 1563c57e89bSClemens Ladisch return sprintf(buf, "%d\n", value); 1573c57e89bSClemens Ladisch } 1583c57e89bSClemens Ladisch 1590c36d72eSJulia Lawall static DEVICE_ATTR_RO(temp1_input); 1600c36d72eSJulia Lawall static DEVICE_ATTR_RO(temp1_max); 1613c57e89bSClemens Ladisch static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0); 1623c57e89bSClemens Ladisch static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_crit, NULL, 1); 1633e3e1022SGuenter Roeck 1643e3e1022SGuenter Roeck static umode_t k10temp_is_visible(struct kobject *kobj, 1653e3e1022SGuenter Roeck struct attribute *attr, int index) 1663e3e1022SGuenter Roeck { 1673e3e1022SGuenter Roeck struct device *dev = container_of(kobj, struct device, kobj); 16868546abfSGuenter Roeck struct k10temp_data *data = dev_get_drvdata(dev); 16968546abfSGuenter Roeck struct pci_dev *pdev = data->pdev; 1703e3e1022SGuenter Roeck 1713e3e1022SGuenter Roeck if (index >= 2) { 1723e3e1022SGuenter Roeck u32 reg_caps, reg_htc; 1733e3e1022SGuenter Roeck 1743e3e1022SGuenter Roeck pci_read_config_dword(pdev, REG_NORTHBRIDGE_CAPABILITIES, 1753e3e1022SGuenter Roeck ®_caps); 1763e3e1022SGuenter Roeck pci_read_config_dword(pdev, REG_HARDWARE_THERMAL_CONTROL, 1773e3e1022SGuenter Roeck ®_htc); 1783e3e1022SGuenter Roeck if (!(reg_caps & NB_CAP_HTC) || !(reg_htc & HTC_ENABLE)) 1793e3e1022SGuenter Roeck return 0; 1803e3e1022SGuenter Roeck } 1813e3e1022SGuenter Roeck return attr->mode; 1823e3e1022SGuenter Roeck } 1833e3e1022SGuenter Roeck 1843e3e1022SGuenter Roeck static struct attribute *k10temp_attrs[] = { 1853e3e1022SGuenter Roeck &dev_attr_temp1_input.attr, 1863e3e1022SGuenter Roeck &dev_attr_temp1_max.attr, 1873e3e1022SGuenter Roeck &sensor_dev_attr_temp1_crit.dev_attr.attr, 1883e3e1022SGuenter Roeck &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, 1893e3e1022SGuenter Roeck NULL 1903e3e1022SGuenter Roeck }; 1913e3e1022SGuenter Roeck 1923e3e1022SGuenter Roeck static const struct attribute_group k10temp_group = { 1933e3e1022SGuenter Roeck .attrs = k10temp_attrs, 1943e3e1022SGuenter Roeck .is_visible = k10temp_is_visible, 1953e3e1022SGuenter Roeck }; 1963e3e1022SGuenter Roeck __ATTRIBUTE_GROUPS(k10temp); 1973c57e89bSClemens Ladisch 1986c931ae1SBill Pemberton static bool has_erratum_319(struct pci_dev *pdev) 1993c57e89bSClemens Ladisch { 200c5114a1cSClemens Ladisch u32 pkg_type, reg_dram_cfg; 201c5114a1cSClemens Ladisch 202c5114a1cSClemens Ladisch if (boot_cpu_data.x86 != 0x10) 203c5114a1cSClemens Ladisch return false; 204c5114a1cSClemens Ladisch 2053c57e89bSClemens Ladisch /* 206c5114a1cSClemens Ladisch * Erratum 319: The thermal sensor of Socket F/AM2+ processors 207c5114a1cSClemens Ladisch * may be unreliable. 2083c57e89bSClemens Ladisch */ 209c5114a1cSClemens Ladisch pkg_type = cpuid_ebx(0x80000001) & CPUID_PKGTYPE_MASK; 210c5114a1cSClemens Ladisch if (pkg_type == CPUID_PKGTYPE_F) 211c5114a1cSClemens Ladisch return true; 212c5114a1cSClemens Ladisch if (pkg_type != CPUID_PKGTYPE_AM2R2_AM3) 213c5114a1cSClemens Ladisch return false; 214c5114a1cSClemens Ladisch 215eefc2d9eSJean Delvare /* DDR3 memory implies socket AM3, which is good */ 216c5114a1cSClemens Ladisch pci_bus_read_config_dword(pdev->bus, 217c5114a1cSClemens Ladisch PCI_DEVFN(PCI_SLOT(pdev->devfn), 2), 218c5114a1cSClemens Ladisch REG_DCT0_CONFIG_HIGH, ®_dram_cfg); 219eefc2d9eSJean Delvare if (reg_dram_cfg & DDR3_MODE) 220eefc2d9eSJean Delvare return false; 221eefc2d9eSJean Delvare 222eefc2d9eSJean Delvare /* 223eefc2d9eSJean Delvare * Unfortunately it is possible to run a socket AM3 CPU with DDR2 224eefc2d9eSJean Delvare * memory. We blacklist all the cores which do exist in socket AM2+ 225eefc2d9eSJean Delvare * format. It still isn't perfect, as RB-C2 cores exist in both AM2+ 226eefc2d9eSJean Delvare * and AM3 formats, but that's the best we can do. 227eefc2d9eSJean Delvare */ 228eefc2d9eSJean Delvare return boot_cpu_data.x86_model < 4 || 229eefc2d9eSJean Delvare (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_mask <= 2); 2303c57e89bSClemens Ladisch } 2313c57e89bSClemens Ladisch 2326c931ae1SBill Pemberton static int k10temp_probe(struct pci_dev *pdev, 2333c57e89bSClemens Ladisch const struct pci_device_id *id) 2343c57e89bSClemens Ladisch { 235c5114a1cSClemens Ladisch int unreliable = has_erratum_319(pdev); 2363e3e1022SGuenter Roeck struct device *dev = &pdev->dev; 23768546abfSGuenter Roeck struct k10temp_data *data; 2383e3e1022SGuenter Roeck struct device *hwmon_dev; 2391b50b776SGuenter Roeck int i; 2403c57e89bSClemens Ladisch 2413e3e1022SGuenter Roeck if (unreliable) { 2423e3e1022SGuenter Roeck if (!force) { 2433e3e1022SGuenter Roeck dev_err(dev, 2443c57e89bSClemens Ladisch "unreliable CPU thermal sensor; monitoring disabled\n"); 2453e3e1022SGuenter Roeck return -ENODEV; 2463c57e89bSClemens Ladisch } 2473e3e1022SGuenter Roeck dev_warn(dev, 2483c57e89bSClemens Ladisch "unreliable CPU thermal sensor; check erratum 319\n"); 2493c57e89bSClemens Ladisch } 2503c57e89bSClemens Ladisch 25168546abfSGuenter Roeck data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); 25268546abfSGuenter Roeck if (!data) 25368546abfSGuenter Roeck return -ENOMEM; 25468546abfSGuenter Roeck 25568546abfSGuenter Roeck data->pdev = pdev; 25668546abfSGuenter Roeck 25768546abfSGuenter Roeck if (boot_cpu_data.x86 == 0x15 && (boot_cpu_data.x86_model == 0x60 || 25868546abfSGuenter Roeck boot_cpu_data.x86_model == 0x70)) 25968546abfSGuenter Roeck data->read_tempreg = read_tempreg_nb_f15; 2609af0a9aeSGuenter Roeck else if (boot_cpu_data.x86 == 0x17) 2619af0a9aeSGuenter Roeck data->read_tempreg = read_tempreg_nb_f17; 26268546abfSGuenter Roeck else 26368546abfSGuenter Roeck data->read_tempreg = read_tempreg_pci; 26468546abfSGuenter Roeck 2651b50b776SGuenter Roeck for (i = 0; i < ARRAY_SIZE(tctl_offset_table); i++) { 2661b50b776SGuenter Roeck const struct tctl_offset *entry = &tctl_offset_table[i]; 2671b50b776SGuenter Roeck 2681b50b776SGuenter Roeck if (boot_cpu_data.x86 == entry->model && 2691b50b776SGuenter Roeck strstr(boot_cpu_data.x86_model_id, entry->id)) { 2701b50b776SGuenter Roeck data->temp_offset = entry->offset; 2711b50b776SGuenter Roeck break; 2721b50b776SGuenter Roeck } 2731b50b776SGuenter Roeck } 2741b50b776SGuenter Roeck 27568546abfSGuenter Roeck hwmon_dev = devm_hwmon_device_register_with_groups(dev, "k10temp", data, 2763e3e1022SGuenter Roeck k10temp_groups); 2773e3e1022SGuenter Roeck return PTR_ERR_OR_ZERO(hwmon_dev); 2783c57e89bSClemens Ladisch } 2793c57e89bSClemens Ladisch 280cd9bb056SJingoo Han static const struct pci_device_id k10temp_id_table[] = { 2813c57e89bSClemens Ladisch { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) }, 2823c57e89bSClemens Ladisch { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) }, 283aa4790a6SClemens Ladisch { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, 2849e581311SAndre Przywara { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) }, 28524214449SBorislav Petkov { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) }, 286d303b1b5SPhil Pokorny { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) }, 287f89ce270SAravind Gopalakrishnan { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F3) }, 28830b146d1SWei Hu { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) }, 289ec015950SAravind Gopalakrishnan { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, 2909af0a9aeSGuenter Roeck { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) }, 2913c57e89bSClemens Ladisch {} 2923c57e89bSClemens Ladisch }; 2933c57e89bSClemens Ladisch MODULE_DEVICE_TABLE(pci, k10temp_id_table); 2943c57e89bSClemens Ladisch 2953c57e89bSClemens Ladisch static struct pci_driver k10temp_driver = { 2963c57e89bSClemens Ladisch .name = "k10temp", 2973c57e89bSClemens Ladisch .id_table = k10temp_id_table, 2983c57e89bSClemens Ladisch .probe = k10temp_probe, 2993c57e89bSClemens Ladisch }; 3003c57e89bSClemens Ladisch 301f71f5a55SAxel Lin module_pci_driver(k10temp_driver); 302