xref: /openbmc/linux/drivers/hwmon/jc42.c (revision 8b036556)
1 /*
2  * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
3  *
4  * Copyright (c) 2010  Ericsson AB.
5  *
6  * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
7  *
8  * JC42.4 compliant temperature sensors are typically used on memory modules.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or
13  * (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23  */
24 
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/i2c.h>
30 #include <linux/hwmon.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 
35 /* Addresses to scan */
36 static const unsigned short normal_i2c[] = {
37 	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
38 
39 /* JC42 registers. All registers are 16 bit. */
40 #define JC42_REG_CAP		0x00
41 #define JC42_REG_CONFIG		0x01
42 #define JC42_REG_TEMP_UPPER	0x02
43 #define JC42_REG_TEMP_LOWER	0x03
44 #define JC42_REG_TEMP_CRITICAL	0x04
45 #define JC42_REG_TEMP		0x05
46 #define JC42_REG_MANID		0x06
47 #define JC42_REG_DEVICEID	0x07
48 
49 /* Status bits in temperature register */
50 #define JC42_ALARM_CRIT_BIT	15
51 #define JC42_ALARM_MAX_BIT	14
52 #define JC42_ALARM_MIN_BIT	13
53 
54 /* Configuration register defines */
55 #define JC42_CFG_CRIT_ONLY	(1 << 2)
56 #define JC42_CFG_TCRIT_LOCK	(1 << 6)
57 #define JC42_CFG_EVENT_LOCK	(1 << 7)
58 #define JC42_CFG_SHUTDOWN	(1 << 8)
59 #define JC42_CFG_HYST_SHIFT	9
60 #define JC42_CFG_HYST_MASK	(0x03 << 9)
61 
62 /* Capabilities */
63 #define JC42_CAP_RANGE		(1 << 2)
64 
65 /* Manufacturer IDs */
66 #define ADT_MANID		0x11d4  /* Analog Devices */
67 #define ATMEL_MANID		0x001f  /* Atmel */
68 #define ATMEL_MANID2		0x1114	/* Atmel */
69 #define MAX_MANID		0x004d  /* Maxim */
70 #define IDT_MANID		0x00b3  /* IDT */
71 #define MCP_MANID		0x0054  /* Microchip */
72 #define NXP_MANID		0x1131  /* NXP Semiconductors */
73 #define ONS_MANID		0x1b09  /* ON Semiconductor */
74 #define STM_MANID		0x104a  /* ST Microelectronics */
75 
76 /* Supported chips */
77 
78 /* Analog Devices */
79 #define ADT7408_DEVID		0x0801
80 #define ADT7408_DEVID_MASK	0xffff
81 
82 /* Atmel */
83 #define AT30TS00_DEVID		0x8201
84 #define AT30TS00_DEVID_MASK	0xffff
85 
86 #define AT30TSE004_DEVID	0x2200
87 #define AT30TSE004_DEVID_MASK	0xffff
88 
89 /* IDT */
90 #define TS3000B3_DEVID		0x2903  /* Also matches TSE2002B3 */
91 #define TS3000B3_DEVID_MASK	0xffff
92 
93 #define TS3000GB2_DEVID		0x2912  /* Also matches TSE2002GB2 */
94 #define TS3000GB2_DEVID_MASK	0xffff
95 
96 /* Maxim */
97 #define MAX6604_DEVID		0x3e00
98 #define MAX6604_DEVID_MASK	0xffff
99 
100 /* Microchip */
101 #define MCP9804_DEVID		0x0200
102 #define MCP9804_DEVID_MASK	0xfffc
103 
104 #define MCP98242_DEVID		0x2000
105 #define MCP98242_DEVID_MASK	0xfffc
106 
107 #define MCP98243_DEVID		0x2100
108 #define MCP98243_DEVID_MASK	0xfffc
109 
110 #define MCP98244_DEVID		0x2200
111 #define MCP98244_DEVID_MASK	0xfffc
112 
113 #define MCP9843_DEVID		0x0000	/* Also matches mcp9805 */
114 #define MCP9843_DEVID_MASK	0xfffe
115 
116 /* NXP */
117 #define SE97_DEVID		0xa200
118 #define SE97_DEVID_MASK		0xfffc
119 
120 #define SE98_DEVID		0xa100
121 #define SE98_DEVID_MASK		0xfffc
122 
123 /* ON Semiconductor */
124 #define CAT6095_DEVID		0x0800	/* Also matches CAT34TS02 */
125 #define CAT6095_DEVID_MASK	0xffe0
126 
127 /* ST Microelectronics */
128 #define STTS424_DEVID		0x0101
129 #define STTS424_DEVID_MASK	0xffff
130 
131 #define STTS424E_DEVID		0x0000
132 #define STTS424E_DEVID_MASK	0xfffe
133 
134 #define STTS2002_DEVID		0x0300
135 #define STTS2002_DEVID_MASK	0xffff
136 
137 #define STTS2004_DEVID		0x2201
138 #define STTS2004_DEVID_MASK	0xffff
139 
140 #define STTS3000_DEVID		0x0200
141 #define STTS3000_DEVID_MASK	0xffff
142 
143 static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
144 
145 struct jc42_chips {
146 	u16 manid;
147 	u16 devid;
148 	u16 devid_mask;
149 };
150 
151 static struct jc42_chips jc42_chips[] = {
152 	{ ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
153 	{ ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
154 	{ ATMEL_MANID2, AT30TSE004_DEVID, AT30TSE004_DEVID_MASK },
155 	{ IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
156 	{ IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
157 	{ MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
158 	{ MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
159 	{ MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
160 	{ MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
161 	{ MCP_MANID, MCP98244_DEVID, MCP98244_DEVID_MASK },
162 	{ MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
163 	{ NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
164 	{ ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
165 	{ NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
166 	{ STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
167 	{ STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
168 	{ STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
169 	{ STM_MANID, STTS2004_DEVID, STTS2004_DEVID_MASK },
170 	{ STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
171 };
172 
173 enum temp_index {
174 	t_input = 0,
175 	t_crit,
176 	t_min,
177 	t_max,
178 	t_num_temp
179 };
180 
181 static const u8 temp_regs[t_num_temp] = {
182 	[t_input] = JC42_REG_TEMP,
183 	[t_crit] = JC42_REG_TEMP_CRITICAL,
184 	[t_min] = JC42_REG_TEMP_LOWER,
185 	[t_max] = JC42_REG_TEMP_UPPER,
186 };
187 
188 /* Each client has this additional data */
189 struct jc42_data {
190 	struct i2c_client *client;
191 	struct mutex	update_lock;	/* protect register access */
192 	bool		extended;	/* true if extended range supported */
193 	bool		valid;
194 	unsigned long	last_updated;	/* In jiffies */
195 	u16		orig_config;	/* original configuration */
196 	u16		config;		/* current configuration */
197 	u16		temp[t_num_temp];/* Temperatures */
198 };
199 
200 #define JC42_TEMP_MIN_EXTENDED	(-40000)
201 #define JC42_TEMP_MIN		0
202 #define JC42_TEMP_MAX		125000
203 
204 static u16 jc42_temp_to_reg(long temp, bool extended)
205 {
206 	int ntemp = clamp_val(temp,
207 			      extended ? JC42_TEMP_MIN_EXTENDED :
208 			      JC42_TEMP_MIN, JC42_TEMP_MAX);
209 
210 	/* convert from 0.001 to 0.0625 resolution */
211 	return (ntemp * 2 / 125) & 0x1fff;
212 }
213 
214 static int jc42_temp_from_reg(s16 reg)
215 {
216 	reg = sign_extend32(reg, 12);
217 
218 	/* convert from 0.0625 to 0.001 resolution */
219 	return reg * 125 / 2;
220 }
221 
222 static struct jc42_data *jc42_update_device(struct device *dev)
223 {
224 	struct jc42_data *data = dev_get_drvdata(dev);
225 	struct i2c_client *client = data->client;
226 	struct jc42_data *ret = data;
227 	int i, val;
228 
229 	mutex_lock(&data->update_lock);
230 
231 	if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
232 		for (i = 0; i < t_num_temp; i++) {
233 			val = i2c_smbus_read_word_swapped(client, temp_regs[i]);
234 			if (val < 0) {
235 				ret = ERR_PTR(val);
236 				goto abort;
237 			}
238 			data->temp[i] = val;
239 		}
240 		data->last_updated = jiffies;
241 		data->valid = true;
242 	}
243 abort:
244 	mutex_unlock(&data->update_lock);
245 	return ret;
246 }
247 
248 /* sysfs functions */
249 
250 static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
251 			 char *buf)
252 {
253 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
254 	struct jc42_data *data = jc42_update_device(dev);
255 	if (IS_ERR(data))
256 		return PTR_ERR(data);
257 	return sprintf(buf, "%d\n",
258 		       jc42_temp_from_reg(data->temp[attr->index]));
259 }
260 
261 static ssize_t show_temp_hyst(struct device *dev,
262 			      struct device_attribute *devattr, char *buf)
263 {
264 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
265 	struct jc42_data *data = jc42_update_device(dev);
266 	int temp, hyst;
267 
268 	if (IS_ERR(data))
269 		return PTR_ERR(data);
270 
271 	temp = jc42_temp_from_reg(data->temp[attr->index]);
272 	hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
273 			       >> JC42_CFG_HYST_SHIFT];
274 	return sprintf(buf, "%d\n", temp - hyst);
275 }
276 
277 static ssize_t set_temp(struct device *dev, struct device_attribute *devattr,
278 			const char *buf, size_t count)
279 {
280 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
281 	struct jc42_data *data = dev_get_drvdata(dev);
282 	int err, ret = count;
283 	int nr = attr->index;
284 	long val;
285 
286 	if (kstrtol(buf, 10, &val) < 0)
287 		return -EINVAL;
288 	mutex_lock(&data->update_lock);
289 	data->temp[nr] = jc42_temp_to_reg(val, data->extended);
290 	err = i2c_smbus_write_word_swapped(data->client, temp_regs[nr],
291 					   data->temp[nr]);
292 	if (err < 0)
293 		ret = err;
294 	mutex_unlock(&data->update_lock);
295 	return ret;
296 }
297 
298 /*
299  * JC42.4 compliant chips only support four hysteresis values.
300  * Pick best choice and go from there.
301  */
302 static ssize_t set_temp_crit_hyst(struct device *dev,
303 				  struct device_attribute *attr,
304 				  const char *buf, size_t count)
305 {
306 	struct jc42_data *data = dev_get_drvdata(dev);
307 	long val;
308 	int diff, hyst;
309 	int err;
310 	int ret = count;
311 
312 	if (kstrtol(buf, 10, &val) < 0)
313 		return -EINVAL;
314 
315 	val = clamp_val(val, (data->extended ? JC42_TEMP_MIN_EXTENDED :
316 			      JC42_TEMP_MIN) - 6000, JC42_TEMP_MAX);
317 	diff = jc42_temp_from_reg(data->temp[t_crit]) - val;
318 
319 	hyst = 0;
320 	if (diff > 0) {
321 		if (diff < 2250)
322 			hyst = 1;	/* 1.5 degrees C */
323 		else if (diff < 4500)
324 			hyst = 2;	/* 3.0 degrees C */
325 		else
326 			hyst = 3;	/* 6.0 degrees C */
327 	}
328 
329 	mutex_lock(&data->update_lock);
330 	data->config = (data->config & ~JC42_CFG_HYST_MASK)
331 	  | (hyst << JC42_CFG_HYST_SHIFT);
332 	err = i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
333 					   data->config);
334 	if (err < 0)
335 		ret = err;
336 	mutex_unlock(&data->update_lock);
337 	return ret;
338 }
339 
340 static ssize_t show_alarm(struct device *dev,
341 			  struct device_attribute *attr, char *buf)
342 {
343 	u16 bit = to_sensor_dev_attr(attr)->index;
344 	struct jc42_data *data = jc42_update_device(dev);
345 	u16 val;
346 
347 	if (IS_ERR(data))
348 		return PTR_ERR(data);
349 
350 	val = data->temp[t_input];
351 	if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
352 		val = 0;
353 	return sprintf(buf, "%u\n", (val >> bit) & 1);
354 }
355 
356 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, t_input);
357 static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp, set_temp, t_crit);
358 static SENSOR_DEVICE_ATTR(temp1_min, S_IRUGO, show_temp, set_temp, t_min);
359 static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp, set_temp, t_max);
360 
361 static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_hyst,
362 			  set_temp_crit_hyst, t_crit);
363 static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO, show_temp_hyst, NULL, t_max);
364 
365 static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
366 			  JC42_ALARM_CRIT_BIT);
367 static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
368 			  JC42_ALARM_MIN_BIT);
369 static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
370 			  JC42_ALARM_MAX_BIT);
371 
372 static struct attribute *jc42_attributes[] = {
373 	&sensor_dev_attr_temp1_input.dev_attr.attr,
374 	&sensor_dev_attr_temp1_crit.dev_attr.attr,
375 	&sensor_dev_attr_temp1_min.dev_attr.attr,
376 	&sensor_dev_attr_temp1_max.dev_attr.attr,
377 	&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
378 	&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
379 	&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
380 	&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
381 	&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
382 	NULL
383 };
384 
385 static umode_t jc42_attribute_mode(struct kobject *kobj,
386 				  struct attribute *attr, int index)
387 {
388 	struct device *dev = container_of(kobj, struct device, kobj);
389 	struct jc42_data *data = dev_get_drvdata(dev);
390 	unsigned int config = data->config;
391 	bool readonly;
392 
393 	if (attr == &sensor_dev_attr_temp1_crit.dev_attr.attr)
394 		readonly = config & JC42_CFG_TCRIT_LOCK;
395 	else if (attr == &sensor_dev_attr_temp1_min.dev_attr.attr ||
396 		 attr == &sensor_dev_attr_temp1_max.dev_attr.attr)
397 		readonly = config & JC42_CFG_EVENT_LOCK;
398 	else if (attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr)
399 		readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK);
400 	else
401 		readonly = true;
402 
403 	return S_IRUGO | (readonly ? 0 : S_IWUSR);
404 }
405 
406 static const struct attribute_group jc42_group = {
407 	.attrs = jc42_attributes,
408 	.is_visible = jc42_attribute_mode,
409 };
410 __ATTRIBUTE_GROUPS(jc42);
411 
412 /* Return 0 if detection is successful, -ENODEV otherwise */
413 static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info)
414 {
415 	struct i2c_adapter *adapter = client->adapter;
416 	int i, config, cap, manid, devid;
417 
418 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
419 				     I2C_FUNC_SMBUS_WORD_DATA))
420 		return -ENODEV;
421 
422 	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
423 	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
424 	manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
425 	devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);
426 
427 	if (cap < 0 || config < 0 || manid < 0 || devid < 0)
428 		return -ENODEV;
429 
430 	if ((cap & 0xff00) || (config & 0xf800))
431 		return -ENODEV;
432 
433 	for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
434 		struct jc42_chips *chip = &jc42_chips[i];
435 		if (manid == chip->manid &&
436 		    (devid & chip->devid_mask) == chip->devid) {
437 			strlcpy(info->type, "jc42", I2C_NAME_SIZE);
438 			return 0;
439 		}
440 	}
441 	return -ENODEV;
442 }
443 
444 static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id)
445 {
446 	struct device *dev = &client->dev;
447 	struct device *hwmon_dev;
448 	struct jc42_data *data;
449 	int config, cap;
450 
451 	data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
452 	if (!data)
453 		return -ENOMEM;
454 
455 	data->client = client;
456 	i2c_set_clientdata(client, data);
457 	mutex_init(&data->update_lock);
458 
459 	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
460 	if (cap < 0)
461 		return cap;
462 
463 	data->extended = !!(cap & JC42_CAP_RANGE);
464 
465 	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
466 	if (config < 0)
467 		return config;
468 
469 	data->orig_config = config;
470 	if (config & JC42_CFG_SHUTDOWN) {
471 		config &= ~JC42_CFG_SHUTDOWN;
472 		i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
473 	}
474 	data->config = config;
475 
476 	hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
477 							   data,
478 							   jc42_groups);
479 	return PTR_ERR_OR_ZERO(hwmon_dev);
480 }
481 
482 static int jc42_remove(struct i2c_client *client)
483 {
484 	struct jc42_data *data = i2c_get_clientdata(client);
485 
486 	/* Restore original configuration except hysteresis */
487 	if ((data->config & ~JC42_CFG_HYST_MASK) !=
488 	    (data->orig_config & ~JC42_CFG_HYST_MASK)) {
489 		int config;
490 
491 		config = (data->orig_config & ~JC42_CFG_HYST_MASK)
492 		  | (data->config & JC42_CFG_HYST_MASK);
493 		i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
494 	}
495 	return 0;
496 }
497 
498 #ifdef CONFIG_PM
499 
500 static int jc42_suspend(struct device *dev)
501 {
502 	struct jc42_data *data = dev_get_drvdata(dev);
503 
504 	data->config |= JC42_CFG_SHUTDOWN;
505 	i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
506 				     data->config);
507 	return 0;
508 }
509 
510 static int jc42_resume(struct device *dev)
511 {
512 	struct jc42_data *data = dev_get_drvdata(dev);
513 
514 	data->config &= ~JC42_CFG_SHUTDOWN;
515 	i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
516 				     data->config);
517 	return 0;
518 }
519 
520 static const struct dev_pm_ops jc42_dev_pm_ops = {
521 	.suspend = jc42_suspend,
522 	.resume = jc42_resume,
523 };
524 
525 #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
526 #else
527 #define JC42_DEV_PM_OPS NULL
528 #endif /* CONFIG_PM */
529 
530 static const struct i2c_device_id jc42_id[] = {
531 	{ "jc42", 0 },
532 	{ }
533 };
534 MODULE_DEVICE_TABLE(i2c, jc42_id);
535 
536 static struct i2c_driver jc42_driver = {
537 	.class		= I2C_CLASS_SPD,
538 	.driver = {
539 		.name	= "jc42",
540 		.pm = JC42_DEV_PM_OPS,
541 	},
542 	.probe		= jc42_probe,
543 	.remove		= jc42_remove,
544 	.id_table	= jc42_id,
545 	.detect		= jc42_detect,
546 	.address_list	= normal_i2c,
547 };
548 
549 module_i2c_driver(jc42_driver);
550 
551 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
552 MODULE_DESCRIPTION("JC42 driver");
553 MODULE_LICENSE("GPL");
554