1 /* 2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware 3 * monitoring. 4 * 5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a 6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in 7 * addition to an Environment Controller (Enhanced Hardware Monitor and 8 * Fan Controller) 9 * 10 * This driver supports only the Environment Controller in the IT8705F and 11 * similar parts. The other devices are supported by different drivers. 12 * 13 * Supports: IT8603E Super I/O chip w/LPC interface 14 * IT8705F Super I/O chip w/LPC interface 15 * IT8712F Super I/O chip w/LPC interface 16 * IT8716F Super I/O chip w/LPC interface 17 * IT8718F Super I/O chip w/LPC interface 18 * IT8720F Super I/O chip w/LPC interface 19 * IT8721F Super I/O chip w/LPC interface 20 * IT8726F Super I/O chip w/LPC interface 21 * IT8728F Super I/O chip w/LPC interface 22 * IT8758E Super I/O chip w/LPC interface 23 * IT8771E Super I/O chip w/LPC interface 24 * IT8772E Super I/O chip w/LPC interface 25 * IT8782F Super I/O chip w/LPC interface 26 * IT8783E/F Super I/O chip w/LPC interface 27 * Sis950 A clone of the IT8705F 28 * 29 * Copyright (C) 2001 Chris Gauthron 30 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de> 31 * 32 * This program is free software; you can redistribute it and/or modify 33 * it under the terms of the GNU General Public License as published by 34 * the Free Software Foundation; either version 2 of the License, or 35 * (at your option) any later version. 36 * 37 * This program is distributed in the hope that it will be useful, 38 * but WITHOUT ANY WARRANTY; without even the implied warranty of 39 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 40 * GNU General Public License for more details. 41 * 42 * You should have received a copy of the GNU General Public License 43 * along with this program; if not, write to the Free Software 44 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 45 */ 46 47 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 48 49 #include <linux/module.h> 50 #include <linux/init.h> 51 #include <linux/slab.h> 52 #include <linux/jiffies.h> 53 #include <linux/platform_device.h> 54 #include <linux/hwmon.h> 55 #include <linux/hwmon-sysfs.h> 56 #include <linux/hwmon-vid.h> 57 #include <linux/err.h> 58 #include <linux/mutex.h> 59 #include <linux/sysfs.h> 60 #include <linux/string.h> 61 #include <linux/dmi.h> 62 #include <linux/acpi.h> 63 #include <linux/io.h> 64 65 #define DRVNAME "it87" 66 67 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8771, 68 it8772, it8782, it8783, it8603 }; 69 70 static unsigned short force_id; 71 module_param(force_id, ushort, 0); 72 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 73 74 static struct platform_device *pdev; 75 76 #define REG 0x2e /* The register to read/write */ 77 #define DEV 0x07 /* Register: Logical device select */ 78 #define VAL 0x2f /* The value to read/write */ 79 #define PME 0x04 /* The device with the fan registers in it */ 80 81 /* The device with the IT8718F/IT8720F VID value in it */ 82 #define GPIO 0x07 83 84 #define DEVID 0x20 /* Register: Device ID */ 85 #define DEVREV 0x22 /* Register: Device Revision */ 86 87 static inline int superio_inb(int reg) 88 { 89 outb(reg, REG); 90 return inb(VAL); 91 } 92 93 static inline void superio_outb(int reg, int val) 94 { 95 outb(reg, REG); 96 outb(val, VAL); 97 } 98 99 static int superio_inw(int reg) 100 { 101 int val; 102 outb(reg++, REG); 103 val = inb(VAL) << 8; 104 outb(reg, REG); 105 val |= inb(VAL); 106 return val; 107 } 108 109 static inline void superio_select(int ldn) 110 { 111 outb(DEV, REG); 112 outb(ldn, VAL); 113 } 114 115 static inline int superio_enter(void) 116 { 117 /* 118 * Try to reserve REG and REG + 1 for exclusive access. 119 */ 120 if (!request_muxed_region(REG, 2, DRVNAME)) 121 return -EBUSY; 122 123 outb(0x87, REG); 124 outb(0x01, REG); 125 outb(0x55, REG); 126 outb(0x55, REG); 127 return 0; 128 } 129 130 static inline void superio_exit(void) 131 { 132 outb(0x02, REG); 133 outb(0x02, VAL); 134 release_region(REG, 2); 135 } 136 137 /* Logical device 4 registers */ 138 #define IT8712F_DEVID 0x8712 139 #define IT8705F_DEVID 0x8705 140 #define IT8716F_DEVID 0x8716 141 #define IT8718F_DEVID 0x8718 142 #define IT8720F_DEVID 0x8720 143 #define IT8721F_DEVID 0x8721 144 #define IT8726F_DEVID 0x8726 145 #define IT8728F_DEVID 0x8728 146 #define IT8771E_DEVID 0x8771 147 #define IT8772E_DEVID 0x8772 148 #define IT8782F_DEVID 0x8782 149 #define IT8783E_DEVID 0x8783 150 #define IT8306E_DEVID 0x8603 151 #define IT87_ACT_REG 0x30 152 #define IT87_BASE_REG 0x60 153 154 /* Logical device 7 registers (IT8712F and later) */ 155 #define IT87_SIO_GPIO1_REG 0x25 156 #define IT87_SIO_GPIO3_REG 0x27 157 #define IT87_SIO_GPIO5_REG 0x29 158 #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */ 159 #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */ 160 #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */ 161 #define IT87_SIO_VID_REG 0xfc /* VID value */ 162 #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */ 163 164 /* Update battery voltage after every reading if true */ 165 static bool update_vbat; 166 167 /* Not all BIOSes properly configure the PWM registers */ 168 static bool fix_pwm_polarity; 169 170 /* Many IT87 constants specified below */ 171 172 /* Length of ISA address segment */ 173 #define IT87_EXTENT 8 174 175 /* Length of ISA address segment for Environmental Controller */ 176 #define IT87_EC_EXTENT 2 177 178 /* Offset of EC registers from ISA base address */ 179 #define IT87_EC_OFFSET 5 180 181 /* Where are the ISA address/data registers relative to the EC base address */ 182 #define IT87_ADDR_REG_OFFSET 0 183 #define IT87_DATA_REG_OFFSET 1 184 185 /*----- The IT87 registers -----*/ 186 187 #define IT87_REG_CONFIG 0x00 188 189 #define IT87_REG_ALARM1 0x01 190 #define IT87_REG_ALARM2 0x02 191 #define IT87_REG_ALARM3 0x03 192 193 /* 194 * The IT8718F and IT8720F have the VID value in a different register, in 195 * Super-I/O configuration space. 196 */ 197 #define IT87_REG_VID 0x0a 198 /* 199 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b 200 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer 201 * mode. 202 */ 203 #define IT87_REG_FAN_DIV 0x0b 204 #define IT87_REG_FAN_16BIT 0x0c 205 206 /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */ 207 208 static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82 }; 209 static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86 }; 210 static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83 }; 211 static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87 }; 212 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 }; 213 214 #define IT87_REG_FAN_MAIN_CTRL 0x13 215 #define IT87_REG_FAN_CTL 0x14 216 #define IT87_REG_PWM(nr) (0x15 + (nr)) 217 #define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8) 218 219 #define IT87_REG_VIN(nr) (0x20 + (nr)) 220 #define IT87_REG_TEMP(nr) (0x29 + (nr)) 221 222 #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2) 223 #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2) 224 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2) 225 #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2) 226 227 #define IT87_REG_VIN_ENABLE 0x50 228 #define IT87_REG_TEMP_ENABLE 0x51 229 #define IT87_REG_TEMP_EXTRA 0x55 230 #define IT87_REG_BEEP_ENABLE 0x5c 231 232 #define IT87_REG_CHIPID 0x58 233 234 #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i)) 235 #define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i)) 236 237 struct it87_devices { 238 const char *name; 239 u16 features; 240 u8 peci_mask; 241 u8 old_peci_mask; 242 }; 243 244 #define FEAT_12MV_ADC (1 << 0) 245 #define FEAT_NEWER_AUTOPWM (1 << 1) 246 #define FEAT_OLD_AUTOPWM (1 << 2) 247 #define FEAT_16BIT_FANS (1 << 3) 248 #define FEAT_TEMP_OFFSET (1 << 4) 249 #define FEAT_TEMP_PECI (1 << 5) 250 #define FEAT_TEMP_OLD_PECI (1 << 6) 251 252 static const struct it87_devices it87_devices[] = { 253 [it87] = { 254 .name = "it87", 255 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */ 256 }, 257 [it8712] = { 258 .name = "it8712", 259 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */ 260 }, 261 [it8716] = { 262 .name = "it8716", 263 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET, 264 }, 265 [it8718] = { 266 .name = "it8718", 267 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET 268 | FEAT_TEMP_OLD_PECI, 269 .old_peci_mask = 0x4, 270 }, 271 [it8720] = { 272 .name = "it8720", 273 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET 274 | FEAT_TEMP_OLD_PECI, 275 .old_peci_mask = 0x4, 276 }, 277 [it8721] = { 278 .name = "it8721", 279 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 280 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI, 281 .peci_mask = 0x05, 282 .old_peci_mask = 0x02, /* Actually reports PCH */ 283 }, 284 [it8728] = { 285 .name = "it8728", 286 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 287 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, 288 .peci_mask = 0x07, 289 }, 290 [it8771] = { 291 .name = "it8771", 292 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 293 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, 294 /* PECI: guesswork */ 295 /* 12mV ADC (OHM) */ 296 /* 16 bit fans (OHM) */ 297 .peci_mask = 0x07, 298 }, 299 [it8772] = { 300 .name = "it8772", 301 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 302 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, 303 /* PECI (coreboot) */ 304 /* 12mV ADC (HWSensors4, OHM) */ 305 /* 16 bit fans (HWSensors4, OHM) */ 306 .peci_mask = 0x07, 307 }, 308 [it8782] = { 309 .name = "it8782", 310 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET 311 | FEAT_TEMP_OLD_PECI, 312 .old_peci_mask = 0x4, 313 }, 314 [it8783] = { 315 .name = "it8783", 316 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET 317 | FEAT_TEMP_OLD_PECI, 318 .old_peci_mask = 0x4, 319 }, 320 [it8603] = { 321 .name = "it8603", 322 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 323 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI, 324 .peci_mask = 0x07, 325 }, 326 }; 327 328 #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS) 329 #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC) 330 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM) 331 #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM) 332 #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET) 333 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \ 334 ((data)->peci_mask & (1 << nr))) 335 #define has_temp_old_peci(data, nr) \ 336 (((data)->features & FEAT_TEMP_OLD_PECI) && \ 337 ((data)->old_peci_mask & (1 << nr))) 338 339 struct it87_sio_data { 340 enum chips type; 341 /* Values read from Super-I/O config space */ 342 u8 revision; 343 u8 vid_value; 344 u8 beep_pin; 345 u8 internal; /* Internal sensors can be labeled */ 346 /* Features skipped based on config or DMI */ 347 u16 skip_in; 348 u8 skip_vid; 349 u8 skip_fan; 350 u8 skip_pwm; 351 u8 skip_temp; 352 }; 353 354 /* 355 * For each registered chip, we need to keep some data in memory. 356 * The structure is dynamically allocated. 357 */ 358 struct it87_data { 359 struct device *hwmon_dev; 360 enum chips type; 361 u16 features; 362 u8 peci_mask; 363 u8 old_peci_mask; 364 365 unsigned short addr; 366 const char *name; 367 struct mutex update_lock; 368 char valid; /* !=0 if following fields are valid */ 369 unsigned long last_updated; /* In jiffies */ 370 371 u16 in_scaled; /* Internal voltage sensors are scaled */ 372 u8 in[10][3]; /* [nr][0]=in, [1]=min, [2]=max */ 373 u8 has_fan; /* Bitfield, fans enabled */ 374 u16 fan[5][2]; /* Register values, [nr][0]=fan, [1]=min */ 375 u8 has_temp; /* Bitfield, temp sensors enabled */ 376 s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */ 377 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */ 378 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */ 379 u8 fan_div[3]; /* Register encoding, shifted right */ 380 u8 vid; /* Register encoding, combined */ 381 u8 vrm; 382 u32 alarms; /* Register encoding, combined */ 383 u8 beeps; /* Register encoding */ 384 u8 fan_main_ctrl; /* Register value */ 385 u8 fan_ctl; /* Register value */ 386 387 /* 388 * The following 3 arrays correspond to the same registers up to 389 * the IT8720F. The meaning of bits 6-0 depends on the value of bit 390 * 7, and we want to preserve settings on mode changes, so we have 391 * to track all values separately. 392 * Starting with the IT8721F, the manual PWM duty cycles are stored 393 * in separate registers (8-bit values), so the separate tracking 394 * is no longer needed, but it is still done to keep the driver 395 * simple. 396 */ 397 u8 pwm_ctrl[3]; /* Register value */ 398 u8 pwm_duty[3]; /* Manual PWM value set by user */ 399 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */ 400 401 /* Automatic fan speed control registers */ 402 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */ 403 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */ 404 }; 405 406 static int adc_lsb(const struct it87_data *data, int nr) 407 { 408 int lsb = has_12mv_adc(data) ? 12 : 16; 409 if (data->in_scaled & (1 << nr)) 410 lsb <<= 1; 411 return lsb; 412 } 413 414 static u8 in_to_reg(const struct it87_data *data, int nr, long val) 415 { 416 val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr)); 417 return clamp_val(val, 0, 255); 418 } 419 420 static int in_from_reg(const struct it87_data *data, int nr, int val) 421 { 422 return val * adc_lsb(data, nr); 423 } 424 425 static inline u8 FAN_TO_REG(long rpm, int div) 426 { 427 if (rpm == 0) 428 return 255; 429 rpm = clamp_val(rpm, 1, 1000000); 430 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); 431 } 432 433 static inline u16 FAN16_TO_REG(long rpm) 434 { 435 if (rpm == 0) 436 return 0xffff; 437 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe); 438 } 439 440 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \ 441 1350000 / ((val) * (div))) 442 /* The divider is fixed to 2 in 16-bit mode */ 443 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \ 444 1350000 / ((val) * 2)) 445 446 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \ 447 ((val) + 500) / 1000), -128, 127)) 448 #define TEMP_FROM_REG(val) ((val) * 1000) 449 450 static u8 pwm_to_reg(const struct it87_data *data, long val) 451 { 452 if (has_newer_autopwm(data)) 453 return val; 454 else 455 return val >> 1; 456 } 457 458 static int pwm_from_reg(const struct it87_data *data, u8 reg) 459 { 460 if (has_newer_autopwm(data)) 461 return reg; 462 else 463 return (reg & 0x7f) << 1; 464 } 465 466 467 static int DIV_TO_REG(int val) 468 { 469 int answer = 0; 470 while (answer < 7 && (val >>= 1)) 471 answer++; 472 return answer; 473 } 474 #define DIV_FROM_REG(val) (1 << (val)) 475 476 static const unsigned int pwm_freq[8] = { 477 48000000 / 128, 478 24000000 / 128, 479 12000000 / 128, 480 8000000 / 128, 481 6000000 / 128, 482 3000000 / 128, 483 1500000 / 128, 484 750000 / 128, 485 }; 486 487 static int it87_probe(struct platform_device *pdev); 488 static int it87_remove(struct platform_device *pdev); 489 490 static int it87_read_value(struct it87_data *data, u8 reg); 491 static void it87_write_value(struct it87_data *data, u8 reg, u8 value); 492 static struct it87_data *it87_update_device(struct device *dev); 493 static int it87_check_pwm(struct device *dev); 494 static void it87_init_device(struct platform_device *pdev); 495 496 497 static struct platform_driver it87_driver = { 498 .driver = { 499 .owner = THIS_MODULE, 500 .name = DRVNAME, 501 }, 502 .probe = it87_probe, 503 .remove = it87_remove, 504 }; 505 506 static ssize_t show_in(struct device *dev, struct device_attribute *attr, 507 char *buf) 508 { 509 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 510 int nr = sattr->nr; 511 int index = sattr->index; 512 513 struct it87_data *data = it87_update_device(dev); 514 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index])); 515 } 516 517 static ssize_t set_in(struct device *dev, struct device_attribute *attr, 518 const char *buf, size_t count) 519 { 520 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 521 int nr = sattr->nr; 522 int index = sattr->index; 523 524 struct it87_data *data = dev_get_drvdata(dev); 525 unsigned long val; 526 527 if (kstrtoul(buf, 10, &val) < 0) 528 return -EINVAL; 529 530 mutex_lock(&data->update_lock); 531 data->in[nr][index] = in_to_reg(data, nr, val); 532 it87_write_value(data, 533 index == 1 ? IT87_REG_VIN_MIN(nr) 534 : IT87_REG_VIN_MAX(nr), 535 data->in[nr][index]); 536 mutex_unlock(&data->update_lock); 537 return count; 538 } 539 540 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0); 541 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in, 542 0, 1); 543 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in, 544 0, 2); 545 546 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0); 547 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in, 548 1, 1); 549 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in, 550 1, 2); 551 552 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0); 553 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in, 554 2, 1); 555 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in, 556 2, 2); 557 558 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0); 559 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in, 560 3, 1); 561 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in, 562 3, 2); 563 564 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0); 565 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in, 566 4, 1); 567 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in, 568 4, 2); 569 570 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0); 571 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in, 572 5, 1); 573 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in, 574 5, 2); 575 576 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0); 577 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in, 578 6, 1); 579 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in, 580 6, 2); 581 582 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0); 583 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in, 584 7, 1); 585 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in, 586 7, 2); 587 588 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0); 589 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0); 590 591 /* 3 temperatures */ 592 static ssize_t show_temp(struct device *dev, struct device_attribute *attr, 593 char *buf) 594 { 595 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 596 int nr = sattr->nr; 597 int index = sattr->index; 598 struct it87_data *data = it87_update_device(dev); 599 600 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index])); 601 } 602 603 static ssize_t set_temp(struct device *dev, struct device_attribute *attr, 604 const char *buf, size_t count) 605 { 606 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 607 int nr = sattr->nr; 608 int index = sattr->index; 609 struct it87_data *data = dev_get_drvdata(dev); 610 long val; 611 u8 reg, regval; 612 613 if (kstrtol(buf, 10, &val) < 0) 614 return -EINVAL; 615 616 mutex_lock(&data->update_lock); 617 618 switch (index) { 619 default: 620 case 1: 621 reg = IT87_REG_TEMP_LOW(nr); 622 break; 623 case 2: 624 reg = IT87_REG_TEMP_HIGH(nr); 625 break; 626 case 3: 627 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE); 628 if (!(regval & 0x80)) { 629 regval |= 0x80; 630 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval); 631 } 632 data->valid = 0; 633 reg = IT87_REG_TEMP_OFFSET[nr]; 634 break; 635 } 636 637 data->temp[nr][index] = TEMP_TO_REG(val); 638 it87_write_value(data, reg, data->temp[nr][index]); 639 mutex_unlock(&data->update_lock); 640 return count; 641 } 642 643 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0); 644 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp, 645 0, 1); 646 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp, 647 0, 2); 648 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp, 649 set_temp, 0, 3); 650 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0); 651 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp, 652 1, 1); 653 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp, 654 1, 2); 655 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp, 656 set_temp, 1, 3); 657 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0); 658 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp, 659 2, 1); 660 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp, 661 2, 2); 662 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp, 663 set_temp, 2, 3); 664 665 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr, 666 char *buf) 667 { 668 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 669 int nr = sensor_attr->index; 670 struct it87_data *data = it87_update_device(dev); 671 u8 reg = data->sensor; /* In case value is updated while used */ 672 u8 extra = data->extra; 673 674 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) 675 || (has_temp_old_peci(data, nr) && (extra & 0x80))) 676 return sprintf(buf, "6\n"); /* Intel PECI */ 677 if (reg & (1 << nr)) 678 return sprintf(buf, "3\n"); /* thermal diode */ 679 if (reg & (8 << nr)) 680 return sprintf(buf, "4\n"); /* thermistor */ 681 return sprintf(buf, "0\n"); /* disabled */ 682 } 683 684 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr, 685 const char *buf, size_t count) 686 { 687 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 688 int nr = sensor_attr->index; 689 690 struct it87_data *data = dev_get_drvdata(dev); 691 long val; 692 u8 reg, extra; 693 694 if (kstrtol(buf, 10, &val) < 0) 695 return -EINVAL; 696 697 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE); 698 reg &= ~(1 << nr); 699 reg &= ~(8 << nr); 700 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6)) 701 reg &= 0x3f; 702 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); 703 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6)) 704 extra &= 0x7f; 705 if (val == 2) { /* backwards compatibility */ 706 dev_warn(dev, 707 "Sensor type 2 is deprecated, please use 4 instead\n"); 708 val = 4; 709 } 710 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */ 711 if (val == 3) 712 reg |= 1 << nr; 713 else if (val == 4) 714 reg |= 8 << nr; 715 else if (has_temp_peci(data, nr) && val == 6) 716 reg |= (nr + 1) << 6; 717 else if (has_temp_old_peci(data, nr) && val == 6) 718 extra |= 0x80; 719 else if (val != 0) 720 return -EINVAL; 721 722 mutex_lock(&data->update_lock); 723 data->sensor = reg; 724 data->extra = extra; 725 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor); 726 if (has_temp_old_peci(data, nr)) 727 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra); 728 data->valid = 0; /* Force cache refresh */ 729 mutex_unlock(&data->update_lock); 730 return count; 731 } 732 733 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type, 734 set_temp_type, 0); 735 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type, 736 set_temp_type, 1); 737 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type, 738 set_temp_type, 2); 739 740 /* 3 Fans */ 741 742 static int pwm_mode(const struct it87_data *data, int nr) 743 { 744 int ctrl = data->fan_main_ctrl & (1 << nr); 745 746 if (ctrl == 0 && data->type != it8603) /* Full speed */ 747 return 0; 748 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ 749 return 2; 750 else /* Manual mode */ 751 return 1; 752 } 753 754 static ssize_t show_fan(struct device *dev, struct device_attribute *attr, 755 char *buf) 756 { 757 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 758 int nr = sattr->nr; 759 int index = sattr->index; 760 int speed; 761 struct it87_data *data = it87_update_device(dev); 762 763 speed = has_16bit_fans(data) ? 764 FAN16_FROM_REG(data->fan[nr][index]) : 765 FAN_FROM_REG(data->fan[nr][index], 766 DIV_FROM_REG(data->fan_div[nr])); 767 return sprintf(buf, "%d\n", speed); 768 } 769 770 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr, 771 char *buf) 772 { 773 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 774 int nr = sensor_attr->index; 775 776 struct it87_data *data = it87_update_device(dev); 777 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr])); 778 } 779 static ssize_t show_pwm_enable(struct device *dev, 780 struct device_attribute *attr, char *buf) 781 { 782 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 783 int nr = sensor_attr->index; 784 785 struct it87_data *data = it87_update_device(dev); 786 return sprintf(buf, "%d\n", pwm_mode(data, nr)); 787 } 788 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, 789 char *buf) 790 { 791 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 792 int nr = sensor_attr->index; 793 794 struct it87_data *data = it87_update_device(dev); 795 return sprintf(buf, "%d\n", 796 pwm_from_reg(data, data->pwm_duty[nr])); 797 } 798 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr, 799 char *buf) 800 { 801 struct it87_data *data = it87_update_device(dev); 802 int index = (data->fan_ctl >> 4) & 0x07; 803 804 return sprintf(buf, "%u\n", pwm_freq[index]); 805 } 806 807 static ssize_t set_fan(struct device *dev, struct device_attribute *attr, 808 const char *buf, size_t count) 809 { 810 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 811 int nr = sattr->nr; 812 int index = sattr->index; 813 814 struct it87_data *data = dev_get_drvdata(dev); 815 long val; 816 u8 reg; 817 818 if (kstrtol(buf, 10, &val) < 0) 819 return -EINVAL; 820 821 mutex_lock(&data->update_lock); 822 823 if (has_16bit_fans(data)) { 824 data->fan[nr][index] = FAN16_TO_REG(val); 825 it87_write_value(data, IT87_REG_FAN_MIN[nr], 826 data->fan[nr][index] & 0xff); 827 it87_write_value(data, IT87_REG_FANX_MIN[nr], 828 data->fan[nr][index] >> 8); 829 } else { 830 reg = it87_read_value(data, IT87_REG_FAN_DIV); 831 switch (nr) { 832 case 0: 833 data->fan_div[nr] = reg & 0x07; 834 break; 835 case 1: 836 data->fan_div[nr] = (reg >> 3) & 0x07; 837 break; 838 case 2: 839 data->fan_div[nr] = (reg & 0x40) ? 3 : 1; 840 break; 841 } 842 data->fan[nr][index] = 843 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); 844 it87_write_value(data, IT87_REG_FAN_MIN[nr], 845 data->fan[nr][index]); 846 } 847 848 mutex_unlock(&data->update_lock); 849 return count; 850 } 851 852 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr, 853 const char *buf, size_t count) 854 { 855 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 856 int nr = sensor_attr->index; 857 858 struct it87_data *data = dev_get_drvdata(dev); 859 unsigned long val; 860 int min; 861 u8 old; 862 863 if (kstrtoul(buf, 10, &val) < 0) 864 return -EINVAL; 865 866 mutex_lock(&data->update_lock); 867 old = it87_read_value(data, IT87_REG_FAN_DIV); 868 869 /* Save fan min limit */ 870 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr])); 871 872 switch (nr) { 873 case 0: 874 case 1: 875 data->fan_div[nr] = DIV_TO_REG(val); 876 break; 877 case 2: 878 if (val < 8) 879 data->fan_div[nr] = 1; 880 else 881 data->fan_div[nr] = 3; 882 } 883 val = old & 0x80; 884 val |= (data->fan_div[0] & 0x07); 885 val |= (data->fan_div[1] & 0x07) << 3; 886 if (data->fan_div[2] == 3) 887 val |= 0x1 << 6; 888 it87_write_value(data, IT87_REG_FAN_DIV, val); 889 890 /* Restore fan min limit */ 891 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 892 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]); 893 894 mutex_unlock(&data->update_lock); 895 return count; 896 } 897 898 /* Returns 0 if OK, -EINVAL otherwise */ 899 static int check_trip_points(struct device *dev, int nr) 900 { 901 const struct it87_data *data = dev_get_drvdata(dev); 902 int i, err = 0; 903 904 if (has_old_autopwm(data)) { 905 for (i = 0; i < 3; i++) { 906 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) 907 err = -EINVAL; 908 } 909 for (i = 0; i < 2; i++) { 910 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) 911 err = -EINVAL; 912 } 913 } 914 915 if (err) { 916 dev_err(dev, 917 "Inconsistent trip points, not switching to automatic mode\n"); 918 dev_err(dev, "Adjust the trip points and try again\n"); 919 } 920 return err; 921 } 922 923 static ssize_t set_pwm_enable(struct device *dev, 924 struct device_attribute *attr, const char *buf, size_t count) 925 { 926 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 927 int nr = sensor_attr->index; 928 929 struct it87_data *data = dev_get_drvdata(dev); 930 long val; 931 932 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2) 933 return -EINVAL; 934 935 /* Check trip points before switching to automatic mode */ 936 if (val == 2) { 937 if (check_trip_points(dev, nr) < 0) 938 return -EINVAL; 939 } 940 941 /* IT8603E does not have on/off mode */ 942 if (val == 0 && data->type == it8603) 943 return -EINVAL; 944 945 mutex_lock(&data->update_lock); 946 947 if (val == 0) { 948 int tmp; 949 /* make sure the fan is on when in on/off mode */ 950 tmp = it87_read_value(data, IT87_REG_FAN_CTL); 951 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr)); 952 /* set on/off mode */ 953 data->fan_main_ctrl &= ~(1 << nr); 954 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, 955 data->fan_main_ctrl); 956 } else { 957 if (val == 1) /* Manual mode */ 958 data->pwm_ctrl[nr] = has_newer_autopwm(data) ? 959 data->pwm_temp_map[nr] : 960 data->pwm_duty[nr]; 961 else /* Automatic mode */ 962 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; 963 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); 964 965 if (data->type != it8603) { 966 /* set SmartGuardian mode */ 967 data->fan_main_ctrl |= (1 << nr); 968 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, 969 data->fan_main_ctrl); 970 } 971 } 972 973 mutex_unlock(&data->update_lock); 974 return count; 975 } 976 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, 977 const char *buf, size_t count) 978 { 979 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 980 int nr = sensor_attr->index; 981 982 struct it87_data *data = dev_get_drvdata(dev); 983 long val; 984 985 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) 986 return -EINVAL; 987 988 mutex_lock(&data->update_lock); 989 if (has_newer_autopwm(data)) { 990 /* 991 * If we are in automatic mode, the PWM duty cycle register 992 * is read-only so we can't write the value. 993 */ 994 if (data->pwm_ctrl[nr] & 0x80) { 995 mutex_unlock(&data->update_lock); 996 return -EBUSY; 997 } 998 data->pwm_duty[nr] = pwm_to_reg(data, val); 999 it87_write_value(data, IT87_REG_PWM_DUTY(nr), 1000 data->pwm_duty[nr]); 1001 } else { 1002 data->pwm_duty[nr] = pwm_to_reg(data, val); 1003 /* 1004 * If we are in manual mode, write the duty cycle immediately; 1005 * otherwise, just store it for later use. 1006 */ 1007 if (!(data->pwm_ctrl[nr] & 0x80)) { 1008 data->pwm_ctrl[nr] = data->pwm_duty[nr]; 1009 it87_write_value(data, IT87_REG_PWM(nr), 1010 data->pwm_ctrl[nr]); 1011 } 1012 } 1013 mutex_unlock(&data->update_lock); 1014 return count; 1015 } 1016 static ssize_t set_pwm_freq(struct device *dev, 1017 struct device_attribute *attr, const char *buf, size_t count) 1018 { 1019 struct it87_data *data = dev_get_drvdata(dev); 1020 unsigned long val; 1021 int i; 1022 1023 if (kstrtoul(buf, 10, &val) < 0) 1024 return -EINVAL; 1025 1026 /* Search for the nearest available frequency */ 1027 for (i = 0; i < 7; i++) { 1028 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2) 1029 break; 1030 } 1031 1032 mutex_lock(&data->update_lock); 1033 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f; 1034 data->fan_ctl |= i << 4; 1035 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl); 1036 mutex_unlock(&data->update_lock); 1037 1038 return count; 1039 } 1040 static ssize_t show_pwm_temp_map(struct device *dev, 1041 struct device_attribute *attr, char *buf) 1042 { 1043 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 1044 int nr = sensor_attr->index; 1045 1046 struct it87_data *data = it87_update_device(dev); 1047 int map; 1048 1049 if (data->pwm_temp_map[nr] < 3) 1050 map = 1 << data->pwm_temp_map[nr]; 1051 else 1052 map = 0; /* Should never happen */ 1053 return sprintf(buf, "%d\n", map); 1054 } 1055 static ssize_t set_pwm_temp_map(struct device *dev, 1056 struct device_attribute *attr, const char *buf, size_t count) 1057 { 1058 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 1059 int nr = sensor_attr->index; 1060 1061 struct it87_data *data = dev_get_drvdata(dev); 1062 long val; 1063 u8 reg; 1064 1065 /* 1066 * This check can go away if we ever support automatic fan speed 1067 * control on newer chips. 1068 */ 1069 if (!has_old_autopwm(data)) { 1070 dev_notice(dev, "Mapping change disabled for safety reasons\n"); 1071 return -EINVAL; 1072 } 1073 1074 if (kstrtol(buf, 10, &val) < 0) 1075 return -EINVAL; 1076 1077 switch (val) { 1078 case (1 << 0): 1079 reg = 0x00; 1080 break; 1081 case (1 << 1): 1082 reg = 0x01; 1083 break; 1084 case (1 << 2): 1085 reg = 0x02; 1086 break; 1087 default: 1088 return -EINVAL; 1089 } 1090 1091 mutex_lock(&data->update_lock); 1092 data->pwm_temp_map[nr] = reg; 1093 /* 1094 * If we are in automatic mode, write the temp mapping immediately; 1095 * otherwise, just store it for later use. 1096 */ 1097 if (data->pwm_ctrl[nr] & 0x80) { 1098 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; 1099 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); 1100 } 1101 mutex_unlock(&data->update_lock); 1102 return count; 1103 } 1104 1105 static ssize_t show_auto_pwm(struct device *dev, 1106 struct device_attribute *attr, char *buf) 1107 { 1108 struct it87_data *data = it87_update_device(dev); 1109 struct sensor_device_attribute_2 *sensor_attr = 1110 to_sensor_dev_attr_2(attr); 1111 int nr = sensor_attr->nr; 1112 int point = sensor_attr->index; 1113 1114 return sprintf(buf, "%d\n", 1115 pwm_from_reg(data, data->auto_pwm[nr][point])); 1116 } 1117 1118 static ssize_t set_auto_pwm(struct device *dev, 1119 struct device_attribute *attr, const char *buf, size_t count) 1120 { 1121 struct it87_data *data = dev_get_drvdata(dev); 1122 struct sensor_device_attribute_2 *sensor_attr = 1123 to_sensor_dev_attr_2(attr); 1124 int nr = sensor_attr->nr; 1125 int point = sensor_attr->index; 1126 long val; 1127 1128 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) 1129 return -EINVAL; 1130 1131 mutex_lock(&data->update_lock); 1132 data->auto_pwm[nr][point] = pwm_to_reg(data, val); 1133 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point), 1134 data->auto_pwm[nr][point]); 1135 mutex_unlock(&data->update_lock); 1136 return count; 1137 } 1138 1139 static ssize_t show_auto_temp(struct device *dev, 1140 struct device_attribute *attr, char *buf) 1141 { 1142 struct it87_data *data = it87_update_device(dev); 1143 struct sensor_device_attribute_2 *sensor_attr = 1144 to_sensor_dev_attr_2(attr); 1145 int nr = sensor_attr->nr; 1146 int point = sensor_attr->index; 1147 1148 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point])); 1149 } 1150 1151 static ssize_t set_auto_temp(struct device *dev, 1152 struct device_attribute *attr, const char *buf, size_t count) 1153 { 1154 struct it87_data *data = dev_get_drvdata(dev); 1155 struct sensor_device_attribute_2 *sensor_attr = 1156 to_sensor_dev_attr_2(attr); 1157 int nr = sensor_attr->nr; 1158 int point = sensor_attr->index; 1159 long val; 1160 1161 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000) 1162 return -EINVAL; 1163 1164 mutex_lock(&data->update_lock); 1165 data->auto_temp[nr][point] = TEMP_TO_REG(val); 1166 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), 1167 data->auto_temp[nr][point]); 1168 mutex_unlock(&data->update_lock); 1169 return count; 1170 } 1171 1172 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0); 1173 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan, 1174 0, 1); 1175 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div, 1176 set_fan_div, 0); 1177 1178 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0); 1179 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan, 1180 1, 1); 1181 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div, 1182 set_fan_div, 1); 1183 1184 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0); 1185 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan, 1186 2, 1); 1187 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div, 1188 set_fan_div, 2); 1189 1190 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0); 1191 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan, 1192 3, 1); 1193 1194 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0); 1195 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan, 1196 4, 1); 1197 1198 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, 1199 show_pwm_enable, set_pwm_enable, 0); 1200 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0); 1201 static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq); 1202 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR, 1203 show_pwm_temp_map, set_pwm_temp_map, 0); 1204 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, 1205 show_auto_pwm, set_auto_pwm, 0, 0); 1206 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR, 1207 show_auto_pwm, set_auto_pwm, 0, 1); 1208 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR, 1209 show_auto_pwm, set_auto_pwm, 0, 2); 1210 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO, 1211 show_auto_pwm, NULL, 0, 3); 1212 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR, 1213 show_auto_temp, set_auto_temp, 0, 1); 1214 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, 1215 show_auto_temp, set_auto_temp, 0, 0); 1216 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR, 1217 show_auto_temp, set_auto_temp, 0, 2); 1218 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR, 1219 show_auto_temp, set_auto_temp, 0, 3); 1220 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR, 1221 show_auto_temp, set_auto_temp, 0, 4); 1222 1223 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, 1224 show_pwm_enable, set_pwm_enable, 1); 1225 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1); 1226 static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL); 1227 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR, 1228 show_pwm_temp_map, set_pwm_temp_map, 1); 1229 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, 1230 show_auto_pwm, set_auto_pwm, 1, 0); 1231 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR, 1232 show_auto_pwm, set_auto_pwm, 1, 1); 1233 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR, 1234 show_auto_pwm, set_auto_pwm, 1, 2); 1235 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO, 1236 show_auto_pwm, NULL, 1, 3); 1237 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR, 1238 show_auto_temp, set_auto_temp, 1, 1); 1239 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, 1240 show_auto_temp, set_auto_temp, 1, 0); 1241 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR, 1242 show_auto_temp, set_auto_temp, 1, 2); 1243 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR, 1244 show_auto_temp, set_auto_temp, 1, 3); 1245 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR, 1246 show_auto_temp, set_auto_temp, 1, 4); 1247 1248 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, 1249 show_pwm_enable, set_pwm_enable, 2); 1250 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2); 1251 static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL); 1252 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR, 1253 show_pwm_temp_map, set_pwm_temp_map, 2); 1254 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, 1255 show_auto_pwm, set_auto_pwm, 2, 0); 1256 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR, 1257 show_auto_pwm, set_auto_pwm, 2, 1); 1258 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR, 1259 show_auto_pwm, set_auto_pwm, 2, 2); 1260 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO, 1261 show_auto_pwm, NULL, 2, 3); 1262 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR, 1263 show_auto_temp, set_auto_temp, 2, 1); 1264 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, 1265 show_auto_temp, set_auto_temp, 2, 0); 1266 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR, 1267 show_auto_temp, set_auto_temp, 2, 2); 1268 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, 1269 show_auto_temp, set_auto_temp, 2, 3); 1270 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR, 1271 show_auto_temp, set_auto_temp, 2, 4); 1272 1273 /* Alarms */ 1274 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, 1275 char *buf) 1276 { 1277 struct it87_data *data = it87_update_device(dev); 1278 return sprintf(buf, "%u\n", data->alarms); 1279 } 1280 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); 1281 1282 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, 1283 char *buf) 1284 { 1285 int bitnr = to_sensor_dev_attr(attr)->index; 1286 struct it87_data *data = it87_update_device(dev); 1287 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); 1288 } 1289 1290 static ssize_t clear_intrusion(struct device *dev, struct device_attribute 1291 *attr, const char *buf, size_t count) 1292 { 1293 struct it87_data *data = dev_get_drvdata(dev); 1294 long val; 1295 int config; 1296 1297 if (kstrtol(buf, 10, &val) < 0 || val != 0) 1298 return -EINVAL; 1299 1300 mutex_lock(&data->update_lock); 1301 config = it87_read_value(data, IT87_REG_CONFIG); 1302 if (config < 0) { 1303 count = config; 1304 } else { 1305 config |= 1 << 5; 1306 it87_write_value(data, IT87_REG_CONFIG, config); 1307 /* Invalidate cache to force re-read */ 1308 data->valid = 0; 1309 } 1310 mutex_unlock(&data->update_lock); 1311 1312 return count; 1313 } 1314 1315 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8); 1316 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9); 1317 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10); 1318 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11); 1319 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12); 1320 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13); 1321 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14); 1322 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15); 1323 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0); 1324 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1); 1325 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2); 1326 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3); 1327 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6); 1328 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16); 1329 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17); 1330 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18); 1331 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR, 1332 show_alarm, clear_intrusion, 4); 1333 1334 static ssize_t show_beep(struct device *dev, struct device_attribute *attr, 1335 char *buf) 1336 { 1337 int bitnr = to_sensor_dev_attr(attr)->index; 1338 struct it87_data *data = it87_update_device(dev); 1339 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1); 1340 } 1341 static ssize_t set_beep(struct device *dev, struct device_attribute *attr, 1342 const char *buf, size_t count) 1343 { 1344 int bitnr = to_sensor_dev_attr(attr)->index; 1345 struct it87_data *data = dev_get_drvdata(dev); 1346 long val; 1347 1348 if (kstrtol(buf, 10, &val) < 0 1349 || (val != 0 && val != 1)) 1350 return -EINVAL; 1351 1352 mutex_lock(&data->update_lock); 1353 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); 1354 if (val) 1355 data->beeps |= (1 << bitnr); 1356 else 1357 data->beeps &= ~(1 << bitnr); 1358 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps); 1359 mutex_unlock(&data->update_lock); 1360 return count; 1361 } 1362 1363 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, 1364 show_beep, set_beep, 1); 1365 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1); 1366 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1); 1367 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1); 1368 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1); 1369 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1); 1370 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1); 1371 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1); 1372 /* fanX_beep writability is set later */ 1373 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0); 1374 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0); 1375 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0); 1376 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0); 1377 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0); 1378 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, 1379 show_beep, set_beep, 2); 1380 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2); 1381 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2); 1382 1383 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr, 1384 char *buf) 1385 { 1386 struct it87_data *data = dev_get_drvdata(dev); 1387 return sprintf(buf, "%u\n", data->vrm); 1388 } 1389 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr, 1390 const char *buf, size_t count) 1391 { 1392 struct it87_data *data = dev_get_drvdata(dev); 1393 unsigned long val; 1394 1395 if (kstrtoul(buf, 10, &val) < 0) 1396 return -EINVAL; 1397 1398 data->vrm = val; 1399 1400 return count; 1401 } 1402 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); 1403 1404 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr, 1405 char *buf) 1406 { 1407 struct it87_data *data = it87_update_device(dev); 1408 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); 1409 } 1410 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); 1411 1412 static ssize_t show_label(struct device *dev, struct device_attribute *attr, 1413 char *buf) 1414 { 1415 static const char * const labels[] = { 1416 "+5V", 1417 "5VSB", 1418 "Vbat", 1419 }; 1420 static const char * const labels_it8721[] = { 1421 "+3.3V", 1422 "3VSB", 1423 "Vbat", 1424 }; 1425 struct it87_data *data = dev_get_drvdata(dev); 1426 int nr = to_sensor_dev_attr(attr)->index; 1427 1428 return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr] 1429 : labels[nr]); 1430 } 1431 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0); 1432 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1); 1433 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2); 1434 /* special AVCC3 IT8306E in9 */ 1435 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0); 1436 1437 static ssize_t show_name(struct device *dev, struct device_attribute 1438 *devattr, char *buf) 1439 { 1440 struct it87_data *data = dev_get_drvdata(dev); 1441 return sprintf(buf, "%s\n", data->name); 1442 } 1443 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); 1444 1445 static struct attribute *it87_attributes_in[10][5] = { 1446 { 1447 &sensor_dev_attr_in0_input.dev_attr.attr, 1448 &sensor_dev_attr_in0_min.dev_attr.attr, 1449 &sensor_dev_attr_in0_max.dev_attr.attr, 1450 &sensor_dev_attr_in0_alarm.dev_attr.attr, 1451 NULL 1452 }, { 1453 &sensor_dev_attr_in1_input.dev_attr.attr, 1454 &sensor_dev_attr_in1_min.dev_attr.attr, 1455 &sensor_dev_attr_in1_max.dev_attr.attr, 1456 &sensor_dev_attr_in1_alarm.dev_attr.attr, 1457 NULL 1458 }, { 1459 &sensor_dev_attr_in2_input.dev_attr.attr, 1460 &sensor_dev_attr_in2_min.dev_attr.attr, 1461 &sensor_dev_attr_in2_max.dev_attr.attr, 1462 &sensor_dev_attr_in2_alarm.dev_attr.attr, 1463 NULL 1464 }, { 1465 &sensor_dev_attr_in3_input.dev_attr.attr, 1466 &sensor_dev_attr_in3_min.dev_attr.attr, 1467 &sensor_dev_attr_in3_max.dev_attr.attr, 1468 &sensor_dev_attr_in3_alarm.dev_attr.attr, 1469 NULL 1470 }, { 1471 &sensor_dev_attr_in4_input.dev_attr.attr, 1472 &sensor_dev_attr_in4_min.dev_attr.attr, 1473 &sensor_dev_attr_in4_max.dev_attr.attr, 1474 &sensor_dev_attr_in4_alarm.dev_attr.attr, 1475 NULL 1476 }, { 1477 &sensor_dev_attr_in5_input.dev_attr.attr, 1478 &sensor_dev_attr_in5_min.dev_attr.attr, 1479 &sensor_dev_attr_in5_max.dev_attr.attr, 1480 &sensor_dev_attr_in5_alarm.dev_attr.attr, 1481 NULL 1482 }, { 1483 &sensor_dev_attr_in6_input.dev_attr.attr, 1484 &sensor_dev_attr_in6_min.dev_attr.attr, 1485 &sensor_dev_attr_in6_max.dev_attr.attr, 1486 &sensor_dev_attr_in6_alarm.dev_attr.attr, 1487 NULL 1488 }, { 1489 &sensor_dev_attr_in7_input.dev_attr.attr, 1490 &sensor_dev_attr_in7_min.dev_attr.attr, 1491 &sensor_dev_attr_in7_max.dev_attr.attr, 1492 &sensor_dev_attr_in7_alarm.dev_attr.attr, 1493 NULL 1494 }, { 1495 &sensor_dev_attr_in8_input.dev_attr.attr, 1496 NULL 1497 }, { 1498 &sensor_dev_attr_in9_input.dev_attr.attr, 1499 NULL 1500 } }; 1501 1502 static const struct attribute_group it87_group_in[10] = { 1503 { .attrs = it87_attributes_in[0] }, 1504 { .attrs = it87_attributes_in[1] }, 1505 { .attrs = it87_attributes_in[2] }, 1506 { .attrs = it87_attributes_in[3] }, 1507 { .attrs = it87_attributes_in[4] }, 1508 { .attrs = it87_attributes_in[5] }, 1509 { .attrs = it87_attributes_in[6] }, 1510 { .attrs = it87_attributes_in[7] }, 1511 { .attrs = it87_attributes_in[8] }, 1512 { .attrs = it87_attributes_in[9] }, 1513 }; 1514 1515 static struct attribute *it87_attributes_temp[3][6] = { 1516 { 1517 &sensor_dev_attr_temp1_input.dev_attr.attr, 1518 &sensor_dev_attr_temp1_max.dev_attr.attr, 1519 &sensor_dev_attr_temp1_min.dev_attr.attr, 1520 &sensor_dev_attr_temp1_type.dev_attr.attr, 1521 &sensor_dev_attr_temp1_alarm.dev_attr.attr, 1522 NULL 1523 } , { 1524 &sensor_dev_attr_temp2_input.dev_attr.attr, 1525 &sensor_dev_attr_temp2_max.dev_attr.attr, 1526 &sensor_dev_attr_temp2_min.dev_attr.attr, 1527 &sensor_dev_attr_temp2_type.dev_attr.attr, 1528 &sensor_dev_attr_temp2_alarm.dev_attr.attr, 1529 NULL 1530 } , { 1531 &sensor_dev_attr_temp3_input.dev_attr.attr, 1532 &sensor_dev_attr_temp3_max.dev_attr.attr, 1533 &sensor_dev_attr_temp3_min.dev_attr.attr, 1534 &sensor_dev_attr_temp3_type.dev_attr.attr, 1535 &sensor_dev_attr_temp3_alarm.dev_attr.attr, 1536 NULL 1537 } }; 1538 1539 static const struct attribute_group it87_group_temp[3] = { 1540 { .attrs = it87_attributes_temp[0] }, 1541 { .attrs = it87_attributes_temp[1] }, 1542 { .attrs = it87_attributes_temp[2] }, 1543 }; 1544 1545 static struct attribute *it87_attributes_temp_offset[] = { 1546 &sensor_dev_attr_temp1_offset.dev_attr.attr, 1547 &sensor_dev_attr_temp2_offset.dev_attr.attr, 1548 &sensor_dev_attr_temp3_offset.dev_attr.attr, 1549 }; 1550 1551 static struct attribute *it87_attributes[] = { 1552 &dev_attr_alarms.attr, 1553 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, 1554 &dev_attr_name.attr, 1555 NULL 1556 }; 1557 1558 static const struct attribute_group it87_group = { 1559 .attrs = it87_attributes, 1560 }; 1561 1562 static struct attribute *it87_attributes_in_beep[] = { 1563 &sensor_dev_attr_in0_beep.dev_attr.attr, 1564 &sensor_dev_attr_in1_beep.dev_attr.attr, 1565 &sensor_dev_attr_in2_beep.dev_attr.attr, 1566 &sensor_dev_attr_in3_beep.dev_attr.attr, 1567 &sensor_dev_attr_in4_beep.dev_attr.attr, 1568 &sensor_dev_attr_in5_beep.dev_attr.attr, 1569 &sensor_dev_attr_in6_beep.dev_attr.attr, 1570 &sensor_dev_attr_in7_beep.dev_attr.attr, 1571 NULL, 1572 NULL, 1573 }; 1574 1575 static struct attribute *it87_attributes_temp_beep[] = { 1576 &sensor_dev_attr_temp1_beep.dev_attr.attr, 1577 &sensor_dev_attr_temp2_beep.dev_attr.attr, 1578 &sensor_dev_attr_temp3_beep.dev_attr.attr, 1579 }; 1580 1581 static struct attribute *it87_attributes_fan[5][3+1] = { { 1582 &sensor_dev_attr_fan1_input.dev_attr.attr, 1583 &sensor_dev_attr_fan1_min.dev_attr.attr, 1584 &sensor_dev_attr_fan1_alarm.dev_attr.attr, 1585 NULL 1586 }, { 1587 &sensor_dev_attr_fan2_input.dev_attr.attr, 1588 &sensor_dev_attr_fan2_min.dev_attr.attr, 1589 &sensor_dev_attr_fan2_alarm.dev_attr.attr, 1590 NULL 1591 }, { 1592 &sensor_dev_attr_fan3_input.dev_attr.attr, 1593 &sensor_dev_attr_fan3_min.dev_attr.attr, 1594 &sensor_dev_attr_fan3_alarm.dev_attr.attr, 1595 NULL 1596 }, { 1597 &sensor_dev_attr_fan4_input.dev_attr.attr, 1598 &sensor_dev_attr_fan4_min.dev_attr.attr, 1599 &sensor_dev_attr_fan4_alarm.dev_attr.attr, 1600 NULL 1601 }, { 1602 &sensor_dev_attr_fan5_input.dev_attr.attr, 1603 &sensor_dev_attr_fan5_min.dev_attr.attr, 1604 &sensor_dev_attr_fan5_alarm.dev_attr.attr, 1605 NULL 1606 } }; 1607 1608 static const struct attribute_group it87_group_fan[5] = { 1609 { .attrs = it87_attributes_fan[0] }, 1610 { .attrs = it87_attributes_fan[1] }, 1611 { .attrs = it87_attributes_fan[2] }, 1612 { .attrs = it87_attributes_fan[3] }, 1613 { .attrs = it87_attributes_fan[4] }, 1614 }; 1615 1616 static const struct attribute *it87_attributes_fan_div[] = { 1617 &sensor_dev_attr_fan1_div.dev_attr.attr, 1618 &sensor_dev_attr_fan2_div.dev_attr.attr, 1619 &sensor_dev_attr_fan3_div.dev_attr.attr, 1620 }; 1621 1622 static struct attribute *it87_attributes_pwm[3][4+1] = { { 1623 &sensor_dev_attr_pwm1_enable.dev_attr.attr, 1624 &sensor_dev_attr_pwm1.dev_attr.attr, 1625 &dev_attr_pwm1_freq.attr, 1626 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr, 1627 NULL 1628 }, { 1629 &sensor_dev_attr_pwm2_enable.dev_attr.attr, 1630 &sensor_dev_attr_pwm2.dev_attr.attr, 1631 &dev_attr_pwm2_freq.attr, 1632 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr, 1633 NULL 1634 }, { 1635 &sensor_dev_attr_pwm3_enable.dev_attr.attr, 1636 &sensor_dev_attr_pwm3.dev_attr.attr, 1637 &dev_attr_pwm3_freq.attr, 1638 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr, 1639 NULL 1640 } }; 1641 1642 static const struct attribute_group it87_group_pwm[3] = { 1643 { .attrs = it87_attributes_pwm[0] }, 1644 { .attrs = it87_attributes_pwm[1] }, 1645 { .attrs = it87_attributes_pwm[2] }, 1646 }; 1647 1648 static struct attribute *it87_attributes_autopwm[3][9+1] = { { 1649 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, 1650 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, 1651 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr, 1652 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr, 1653 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, 1654 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr, 1655 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, 1656 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, 1657 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr, 1658 NULL 1659 }, { 1660 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, 1661 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, 1662 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr, 1663 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr, 1664 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr, 1665 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr, 1666 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr, 1667 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr, 1668 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr, 1669 NULL 1670 }, { 1671 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, 1672 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, 1673 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr, 1674 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr, 1675 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr, 1676 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr, 1677 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr, 1678 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr, 1679 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr, 1680 NULL 1681 } }; 1682 1683 static const struct attribute_group it87_group_autopwm[3] = { 1684 { .attrs = it87_attributes_autopwm[0] }, 1685 { .attrs = it87_attributes_autopwm[1] }, 1686 { .attrs = it87_attributes_autopwm[2] }, 1687 }; 1688 1689 static struct attribute *it87_attributes_fan_beep[] = { 1690 &sensor_dev_attr_fan1_beep.dev_attr.attr, 1691 &sensor_dev_attr_fan2_beep.dev_attr.attr, 1692 &sensor_dev_attr_fan3_beep.dev_attr.attr, 1693 &sensor_dev_attr_fan4_beep.dev_attr.attr, 1694 &sensor_dev_attr_fan5_beep.dev_attr.attr, 1695 }; 1696 1697 static struct attribute *it87_attributes_vid[] = { 1698 &dev_attr_vrm.attr, 1699 &dev_attr_cpu0_vid.attr, 1700 NULL 1701 }; 1702 1703 static const struct attribute_group it87_group_vid = { 1704 .attrs = it87_attributes_vid, 1705 }; 1706 1707 static struct attribute *it87_attributes_label[] = { 1708 &sensor_dev_attr_in3_label.dev_attr.attr, 1709 &sensor_dev_attr_in7_label.dev_attr.attr, 1710 &sensor_dev_attr_in8_label.dev_attr.attr, 1711 &sensor_dev_attr_in9_label.dev_attr.attr, 1712 NULL 1713 }; 1714 1715 static const struct attribute_group it87_group_label = { 1716 .attrs = it87_attributes_label, 1717 }; 1718 1719 /* SuperIO detection - will change isa_address if a chip is found */ 1720 static int __init it87_find(unsigned short *address, 1721 struct it87_sio_data *sio_data) 1722 { 1723 int err; 1724 u16 chip_type; 1725 const char *board_vendor, *board_name; 1726 1727 err = superio_enter(); 1728 if (err) 1729 return err; 1730 1731 err = -ENODEV; 1732 chip_type = force_id ? force_id : superio_inw(DEVID); 1733 1734 switch (chip_type) { 1735 case IT8705F_DEVID: 1736 sio_data->type = it87; 1737 break; 1738 case IT8712F_DEVID: 1739 sio_data->type = it8712; 1740 break; 1741 case IT8716F_DEVID: 1742 case IT8726F_DEVID: 1743 sio_data->type = it8716; 1744 break; 1745 case IT8718F_DEVID: 1746 sio_data->type = it8718; 1747 break; 1748 case IT8720F_DEVID: 1749 sio_data->type = it8720; 1750 break; 1751 case IT8721F_DEVID: 1752 sio_data->type = it8721; 1753 break; 1754 case IT8728F_DEVID: 1755 sio_data->type = it8728; 1756 break; 1757 case IT8771E_DEVID: 1758 sio_data->type = it8771; 1759 break; 1760 case IT8772E_DEVID: 1761 sio_data->type = it8772; 1762 break; 1763 case IT8782F_DEVID: 1764 sio_data->type = it8782; 1765 break; 1766 case IT8783E_DEVID: 1767 sio_data->type = it8783; 1768 break; 1769 case IT8306E_DEVID: 1770 sio_data->type = it8603; 1771 break; 1772 case 0xffff: /* No device at all */ 1773 goto exit; 1774 default: 1775 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type); 1776 goto exit; 1777 } 1778 1779 superio_select(PME); 1780 if (!(superio_inb(IT87_ACT_REG) & 0x01)) { 1781 pr_info("Device not activated, skipping\n"); 1782 goto exit; 1783 } 1784 1785 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1); 1786 if (*address == 0) { 1787 pr_info("Base address not set, skipping\n"); 1788 goto exit; 1789 } 1790 1791 err = 0; 1792 sio_data->revision = superio_inb(DEVREV) & 0x0f; 1793 pr_info("Found IT%04x%c chip at 0x%x, revision %d\n", chip_type, 1794 chip_type == 0x8771 || chip_type == 0x8772 || 1795 chip_type == 0x8603 ? 'E' : 'F', *address, 1796 sio_data->revision); 1797 1798 /* in8 (Vbat) is always internal */ 1799 sio_data->internal = (1 << 2); 1800 /* Only the IT8603E has in9 */ 1801 if (sio_data->type != it8603) 1802 sio_data->skip_in |= (1 << 9); 1803 1804 /* Read GPIO config and VID value from LDN 7 (GPIO) */ 1805 if (sio_data->type == it87) { 1806 /* The IT8705F doesn't have VID pins at all */ 1807 sio_data->skip_vid = 1; 1808 1809 /* The IT8705F has a different LD number for GPIO */ 1810 superio_select(5); 1811 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; 1812 } else if (sio_data->type == it8783) { 1813 int reg25, reg27, reg2a, reg2c, regef; 1814 1815 sio_data->skip_vid = 1; /* No VID */ 1816 1817 superio_select(GPIO); 1818 1819 reg25 = superio_inb(IT87_SIO_GPIO1_REG); 1820 reg27 = superio_inb(IT87_SIO_GPIO3_REG); 1821 reg2a = superio_inb(IT87_SIO_PINX1_REG); 1822 reg2c = superio_inb(IT87_SIO_PINX2_REG); 1823 regef = superio_inb(IT87_SIO_SPI_REG); 1824 1825 /* Check if fan3 is there or not */ 1826 if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2))) 1827 sio_data->skip_fan |= (1 << 2); 1828 if ((reg25 & (1 << 4)) 1829 || (!(reg2a & (1 << 1)) && (regef & (1 << 0)))) 1830 sio_data->skip_pwm |= (1 << 2); 1831 1832 /* Check if fan2 is there or not */ 1833 if (reg27 & (1 << 7)) 1834 sio_data->skip_fan |= (1 << 1); 1835 if (reg27 & (1 << 3)) 1836 sio_data->skip_pwm |= (1 << 1); 1837 1838 /* VIN5 */ 1839 if ((reg27 & (1 << 0)) || (reg2c & (1 << 2))) 1840 sio_data->skip_in |= (1 << 5); /* No VIN5 */ 1841 1842 /* VIN6 */ 1843 if (reg27 & (1 << 1)) 1844 sio_data->skip_in |= (1 << 6); /* No VIN6 */ 1845 1846 /* 1847 * VIN7 1848 * Does not depend on bit 2 of Reg2C, contrary to datasheet. 1849 */ 1850 if (reg27 & (1 << 2)) { 1851 /* 1852 * The data sheet is a bit unclear regarding the 1853 * internal voltage divider for VCCH5V. It says 1854 * "This bit enables and switches VIN7 (pin 91) to the 1855 * internal voltage divider for VCCH5V". 1856 * This is different to other chips, where the internal 1857 * voltage divider would connect VIN7 to an internal 1858 * voltage source. Maybe that is the case here as well. 1859 * 1860 * Since we don't know for sure, re-route it if that is 1861 * not the case, and ask the user to report if the 1862 * resulting voltage is sane. 1863 */ 1864 if (!(reg2c & (1 << 1))) { 1865 reg2c |= (1 << 1); 1866 superio_outb(IT87_SIO_PINX2_REG, reg2c); 1867 pr_notice("Routing internal VCCH5V to in7.\n"); 1868 } 1869 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n"); 1870 pr_notice("Please report if it displays a reasonable voltage.\n"); 1871 } 1872 1873 if (reg2c & (1 << 0)) 1874 sio_data->internal |= (1 << 0); 1875 if (reg2c & (1 << 1)) 1876 sio_data->internal |= (1 << 1); 1877 1878 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; 1879 } else if (sio_data->type == it8603) { 1880 int reg27, reg29; 1881 1882 sio_data->skip_vid = 1; /* No VID */ 1883 superio_select(GPIO); 1884 1885 reg27 = superio_inb(IT87_SIO_GPIO3_REG); 1886 1887 /* Check if fan3 is there or not */ 1888 if (reg27 & (1 << 6)) 1889 sio_data->skip_pwm |= (1 << 2); 1890 if (reg27 & (1 << 7)) 1891 sio_data->skip_fan |= (1 << 2); 1892 1893 /* Check if fan2 is there or not */ 1894 reg29 = superio_inb(IT87_SIO_GPIO5_REG); 1895 if (reg29 & (1 << 1)) 1896 sio_data->skip_pwm |= (1 << 1); 1897 if (reg29 & (1 << 2)) 1898 sio_data->skip_fan |= (1 << 1); 1899 1900 sio_data->skip_in |= (1 << 5); /* No VIN5 */ 1901 sio_data->skip_in |= (1 << 6); /* No VIN6 */ 1902 1903 /* no fan4 */ 1904 sio_data->skip_pwm |= (1 << 3); 1905 sio_data->skip_fan |= (1 << 3); 1906 1907 sio_data->internal |= (1 << 1); /* in7 is VSB */ 1908 sio_data->internal |= (1 << 3); /* in9 is AVCC */ 1909 1910 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; 1911 } else { 1912 int reg; 1913 bool uart6; 1914 1915 superio_select(GPIO); 1916 1917 reg = superio_inb(IT87_SIO_GPIO3_REG); 1918 if (sio_data->type == it8721 || sio_data->type == it8728 || 1919 sio_data->type == it8771 || sio_data->type == it8772 || 1920 sio_data->type == it8782) { 1921 /* 1922 * IT8721F/IT8758E, and IT8782F don't have VID pins 1923 * at all, not sure about the IT8728F and compatibles. 1924 */ 1925 sio_data->skip_vid = 1; 1926 } else { 1927 /* We need at least 4 VID pins */ 1928 if (reg & 0x0f) { 1929 pr_info("VID is disabled (pins used for GPIO)\n"); 1930 sio_data->skip_vid = 1; 1931 } 1932 } 1933 1934 /* Check if fan3 is there or not */ 1935 if (reg & (1 << 6)) 1936 sio_data->skip_pwm |= (1 << 2); 1937 if (reg & (1 << 7)) 1938 sio_data->skip_fan |= (1 << 2); 1939 1940 /* Check if fan2 is there or not */ 1941 reg = superio_inb(IT87_SIO_GPIO5_REG); 1942 if (reg & (1 << 1)) 1943 sio_data->skip_pwm |= (1 << 1); 1944 if (reg & (1 << 2)) 1945 sio_data->skip_fan |= (1 << 1); 1946 1947 if ((sio_data->type == it8718 || sio_data->type == it8720) 1948 && !(sio_data->skip_vid)) 1949 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); 1950 1951 reg = superio_inb(IT87_SIO_PINX2_REG); 1952 1953 uart6 = sio_data->type == it8782 && (reg & (1 << 2)); 1954 1955 /* 1956 * The IT8720F has no VIN7 pin, so VCCH should always be 1957 * routed internally to VIN7 with an internal divider. 1958 * Curiously, there still is a configuration bit to control 1959 * this, which means it can be set incorrectly. And even 1960 * more curiously, many boards out there are improperly 1961 * configured, even though the IT8720F datasheet claims 1962 * that the internal routing of VCCH to VIN7 is the default 1963 * setting. So we force the internal routing in this case. 1964 * 1965 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins. 1966 * If UART6 is enabled, re-route VIN7 to the internal divider 1967 * if that is not already the case. 1968 */ 1969 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) { 1970 reg |= (1 << 1); 1971 superio_outb(IT87_SIO_PINX2_REG, reg); 1972 pr_notice("Routing internal VCCH to in7\n"); 1973 } 1974 if (reg & (1 << 0)) 1975 sio_data->internal |= (1 << 0); 1976 if ((reg & (1 << 1)) || sio_data->type == it8721 || 1977 sio_data->type == it8728 || 1978 sio_data->type == it8771 || 1979 sio_data->type == it8772) 1980 sio_data->internal |= (1 << 1); 1981 1982 /* 1983 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7. 1984 * While VIN7 can be routed to the internal voltage divider, 1985 * VIN5 and VIN6 are not available if UART6 is enabled. 1986 * 1987 * Also, temp3 is not available if UART6 is enabled and TEMPIN3 1988 * is the temperature source. Since we can not read the 1989 * temperature source here, skip_temp is preliminary. 1990 */ 1991 if (uart6) { 1992 sio_data->skip_in |= (1 << 5) | (1 << 6); 1993 sio_data->skip_temp |= (1 << 2); 1994 } 1995 1996 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; 1997 } 1998 if (sio_data->beep_pin) 1999 pr_info("Beeping is supported\n"); 2000 2001 /* Disable specific features based on DMI strings */ 2002 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR); 2003 board_name = dmi_get_system_info(DMI_BOARD_NAME); 2004 if (board_vendor && board_name) { 2005 if (strcmp(board_vendor, "nVIDIA") == 0 2006 && strcmp(board_name, "FN68PT") == 0) { 2007 /* 2008 * On the Shuttle SN68PT, FAN_CTL2 is apparently not 2009 * connected to a fan, but to something else. One user 2010 * has reported instant system power-off when changing 2011 * the PWM2 duty cycle, so we disable it. 2012 * I use the board name string as the trigger in case 2013 * the same board is ever used in other systems. 2014 */ 2015 pr_info("Disabling pwm2 due to hardware constraints\n"); 2016 sio_data->skip_pwm = (1 << 1); 2017 } 2018 } 2019 2020 exit: 2021 superio_exit(); 2022 return err; 2023 } 2024 2025 static void it87_remove_files(struct device *dev) 2026 { 2027 struct it87_data *data = platform_get_drvdata(pdev); 2028 struct it87_sio_data *sio_data = dev_get_platdata(dev); 2029 int i; 2030 2031 sysfs_remove_group(&dev->kobj, &it87_group); 2032 for (i = 0; i < 10; i++) { 2033 if (sio_data->skip_in & (1 << i)) 2034 continue; 2035 sysfs_remove_group(&dev->kobj, &it87_group_in[i]); 2036 if (it87_attributes_in_beep[i]) 2037 sysfs_remove_file(&dev->kobj, 2038 it87_attributes_in_beep[i]); 2039 } 2040 for (i = 0; i < 3; i++) { 2041 if (!(data->has_temp & (1 << i))) 2042 continue; 2043 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]); 2044 if (has_temp_offset(data)) 2045 sysfs_remove_file(&dev->kobj, 2046 it87_attributes_temp_offset[i]); 2047 if (sio_data->beep_pin) 2048 sysfs_remove_file(&dev->kobj, 2049 it87_attributes_temp_beep[i]); 2050 } 2051 for (i = 0; i < 5; i++) { 2052 if (!(data->has_fan & (1 << i))) 2053 continue; 2054 sysfs_remove_group(&dev->kobj, &it87_group_fan[i]); 2055 if (sio_data->beep_pin) 2056 sysfs_remove_file(&dev->kobj, 2057 it87_attributes_fan_beep[i]); 2058 if (i < 3 && !has_16bit_fans(data)) 2059 sysfs_remove_file(&dev->kobj, 2060 it87_attributes_fan_div[i]); 2061 } 2062 for (i = 0; i < 3; i++) { 2063 if (sio_data->skip_pwm & (1 << 0)) 2064 continue; 2065 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]); 2066 if (has_old_autopwm(data)) 2067 sysfs_remove_group(&dev->kobj, 2068 &it87_group_autopwm[i]); 2069 } 2070 if (!sio_data->skip_vid) 2071 sysfs_remove_group(&dev->kobj, &it87_group_vid); 2072 sysfs_remove_group(&dev->kobj, &it87_group_label); 2073 } 2074 2075 static int it87_probe(struct platform_device *pdev) 2076 { 2077 struct it87_data *data; 2078 struct resource *res; 2079 struct device *dev = &pdev->dev; 2080 struct it87_sio_data *sio_data = dev_get_platdata(dev); 2081 int err = 0, i; 2082 int enable_pwm_interface; 2083 int fan_beep_need_rw; 2084 2085 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 2086 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT, 2087 DRVNAME)) { 2088 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", 2089 (unsigned long)res->start, 2090 (unsigned long)(res->start + IT87_EC_EXTENT - 1)); 2091 return -EBUSY; 2092 } 2093 2094 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL); 2095 if (!data) 2096 return -ENOMEM; 2097 2098 data->addr = res->start; 2099 data->type = sio_data->type; 2100 data->features = it87_devices[sio_data->type].features; 2101 data->peci_mask = it87_devices[sio_data->type].peci_mask; 2102 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask; 2103 data->name = it87_devices[sio_data->type].name; 2104 /* 2105 * IT8705F Datasheet 0.4.1, 3h == Version G. 2106 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J. 2107 * These are the first revisions with 16-bit tachometer support. 2108 */ 2109 switch (data->type) { 2110 case it87: 2111 if (sio_data->revision >= 0x03) { 2112 data->features &= ~FEAT_OLD_AUTOPWM; 2113 data->features |= FEAT_16BIT_FANS; 2114 } 2115 break; 2116 case it8712: 2117 if (sio_data->revision >= 0x08) { 2118 data->features &= ~FEAT_OLD_AUTOPWM; 2119 data->features |= FEAT_16BIT_FANS; 2120 } 2121 break; 2122 default: 2123 break; 2124 } 2125 2126 /* Now, we do the remaining detection. */ 2127 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) 2128 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) 2129 return -ENODEV; 2130 2131 platform_set_drvdata(pdev, data); 2132 2133 mutex_init(&data->update_lock); 2134 2135 /* Check PWM configuration */ 2136 enable_pwm_interface = it87_check_pwm(dev); 2137 2138 /* Starting with IT8721F, we handle scaling of internal voltages */ 2139 if (has_12mv_adc(data)) { 2140 if (sio_data->internal & (1 << 0)) 2141 data->in_scaled |= (1 << 3); /* in3 is AVCC */ 2142 if (sio_data->internal & (1 << 1)) 2143 data->in_scaled |= (1 << 7); /* in7 is VSB */ 2144 if (sio_data->internal & (1 << 2)) 2145 data->in_scaled |= (1 << 8); /* in8 is Vbat */ 2146 if (sio_data->internal & (1 << 3)) 2147 data->in_scaled |= (1 << 9); /* in9 is AVCC */ 2148 } else if (sio_data->type == it8782 || sio_data->type == it8783) { 2149 if (sio_data->internal & (1 << 0)) 2150 data->in_scaled |= (1 << 3); /* in3 is VCC5V */ 2151 if (sio_data->internal & (1 << 1)) 2152 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */ 2153 } 2154 2155 data->has_temp = 0x07; 2156 if (sio_data->skip_temp & (1 << 2)) { 2157 if (sio_data->type == it8782 2158 && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80)) 2159 data->has_temp &= ~(1 << 2); 2160 } 2161 2162 /* Initialize the IT87 chip */ 2163 it87_init_device(pdev); 2164 2165 /* Register sysfs hooks */ 2166 err = sysfs_create_group(&dev->kobj, &it87_group); 2167 if (err) 2168 return err; 2169 2170 for (i = 0; i < 10; i++) { 2171 if (sio_data->skip_in & (1 << i)) 2172 continue; 2173 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]); 2174 if (err) 2175 goto error; 2176 if (sio_data->beep_pin && it87_attributes_in_beep[i]) { 2177 err = sysfs_create_file(&dev->kobj, 2178 it87_attributes_in_beep[i]); 2179 if (err) 2180 goto error; 2181 } 2182 } 2183 2184 for (i = 0; i < 3; i++) { 2185 if (!(data->has_temp & (1 << i))) 2186 continue; 2187 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]); 2188 if (err) 2189 goto error; 2190 if (has_temp_offset(data)) { 2191 err = sysfs_create_file(&dev->kobj, 2192 it87_attributes_temp_offset[i]); 2193 if (err) 2194 goto error; 2195 } 2196 if (sio_data->beep_pin) { 2197 err = sysfs_create_file(&dev->kobj, 2198 it87_attributes_temp_beep[i]); 2199 if (err) 2200 goto error; 2201 } 2202 } 2203 2204 /* Do not create fan files for disabled fans */ 2205 fan_beep_need_rw = 1; 2206 for (i = 0; i < 5; i++) { 2207 if (!(data->has_fan & (1 << i))) 2208 continue; 2209 err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]); 2210 if (err) 2211 goto error; 2212 2213 if (i < 3 && !has_16bit_fans(data)) { 2214 err = sysfs_create_file(&dev->kobj, 2215 it87_attributes_fan_div[i]); 2216 if (err) 2217 goto error; 2218 } 2219 2220 if (sio_data->beep_pin) { 2221 err = sysfs_create_file(&dev->kobj, 2222 it87_attributes_fan_beep[i]); 2223 if (err) 2224 goto error; 2225 if (!fan_beep_need_rw) 2226 continue; 2227 2228 /* 2229 * As we have a single beep enable bit for all fans, 2230 * only the first enabled fan has a writable attribute 2231 * for it. 2232 */ 2233 if (sysfs_chmod_file(&dev->kobj, 2234 it87_attributes_fan_beep[i], 2235 S_IRUGO | S_IWUSR)) 2236 dev_dbg(dev, "chmod +w fan%d_beep failed\n", 2237 i + 1); 2238 fan_beep_need_rw = 0; 2239 } 2240 } 2241 2242 if (enable_pwm_interface) { 2243 for (i = 0; i < 3; i++) { 2244 if (sio_data->skip_pwm & (1 << i)) 2245 continue; 2246 err = sysfs_create_group(&dev->kobj, 2247 &it87_group_pwm[i]); 2248 if (err) 2249 goto error; 2250 2251 if (!has_old_autopwm(data)) 2252 continue; 2253 err = sysfs_create_group(&dev->kobj, 2254 &it87_group_autopwm[i]); 2255 if (err) 2256 goto error; 2257 } 2258 } 2259 2260 if (!sio_data->skip_vid) { 2261 data->vrm = vid_which_vrm(); 2262 /* VID reading from Super-I/O config space if available */ 2263 data->vid = sio_data->vid_value; 2264 err = sysfs_create_group(&dev->kobj, &it87_group_vid); 2265 if (err) 2266 goto error; 2267 } 2268 2269 /* Export labels for internal sensors */ 2270 for (i = 0; i < 4; i++) { 2271 if (!(sio_data->internal & (1 << i))) 2272 continue; 2273 err = sysfs_create_file(&dev->kobj, 2274 it87_attributes_label[i]); 2275 if (err) 2276 goto error; 2277 } 2278 2279 data->hwmon_dev = hwmon_device_register(dev); 2280 if (IS_ERR(data->hwmon_dev)) { 2281 err = PTR_ERR(data->hwmon_dev); 2282 goto error; 2283 } 2284 2285 return 0; 2286 2287 error: 2288 it87_remove_files(dev); 2289 return err; 2290 } 2291 2292 static int it87_remove(struct platform_device *pdev) 2293 { 2294 struct it87_data *data = platform_get_drvdata(pdev); 2295 2296 hwmon_device_unregister(data->hwmon_dev); 2297 it87_remove_files(&pdev->dev); 2298 2299 return 0; 2300 } 2301 2302 /* 2303 * Must be called with data->update_lock held, except during initialization. 2304 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, 2305 * would slow down the IT87 access and should not be necessary. 2306 */ 2307 static int it87_read_value(struct it87_data *data, u8 reg) 2308 { 2309 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); 2310 return inb_p(data->addr + IT87_DATA_REG_OFFSET); 2311 } 2312 2313 /* 2314 * Must be called with data->update_lock held, except during initialization. 2315 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, 2316 * would slow down the IT87 access and should not be necessary. 2317 */ 2318 static void it87_write_value(struct it87_data *data, u8 reg, u8 value) 2319 { 2320 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); 2321 outb_p(value, data->addr + IT87_DATA_REG_OFFSET); 2322 } 2323 2324 /* Return 1 if and only if the PWM interface is safe to use */ 2325 static int it87_check_pwm(struct device *dev) 2326 { 2327 struct it87_data *data = dev_get_drvdata(dev); 2328 /* 2329 * Some BIOSes fail to correctly configure the IT87 fans. All fans off 2330 * and polarity set to active low is sign that this is the case so we 2331 * disable pwm control to protect the user. 2332 */ 2333 int tmp = it87_read_value(data, IT87_REG_FAN_CTL); 2334 if ((tmp & 0x87) == 0) { 2335 if (fix_pwm_polarity) { 2336 /* 2337 * The user asks us to attempt a chip reconfiguration. 2338 * This means switching to active high polarity and 2339 * inverting all fan speed values. 2340 */ 2341 int i; 2342 u8 pwm[3]; 2343 2344 for (i = 0; i < 3; i++) 2345 pwm[i] = it87_read_value(data, 2346 IT87_REG_PWM(i)); 2347 2348 /* 2349 * If any fan is in automatic pwm mode, the polarity 2350 * might be correct, as suspicious as it seems, so we 2351 * better don't change anything (but still disable the 2352 * PWM interface). 2353 */ 2354 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) { 2355 dev_info(dev, 2356 "Reconfiguring PWM to active high polarity\n"); 2357 it87_write_value(data, IT87_REG_FAN_CTL, 2358 tmp | 0x87); 2359 for (i = 0; i < 3; i++) 2360 it87_write_value(data, 2361 IT87_REG_PWM(i), 2362 0x7f & ~pwm[i]); 2363 return 1; 2364 } 2365 2366 dev_info(dev, 2367 "PWM configuration is too broken to be fixed\n"); 2368 } 2369 2370 dev_info(dev, 2371 "Detected broken BIOS defaults, disabling PWM interface\n"); 2372 return 0; 2373 } else if (fix_pwm_polarity) { 2374 dev_info(dev, 2375 "PWM configuration looks sane, won't touch\n"); 2376 } 2377 2378 return 1; 2379 } 2380 2381 /* Called when we have found a new IT87. */ 2382 static void it87_init_device(struct platform_device *pdev) 2383 { 2384 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev); 2385 struct it87_data *data = platform_get_drvdata(pdev); 2386 int tmp, i; 2387 u8 mask; 2388 2389 /* 2390 * For each PWM channel: 2391 * - If it is in automatic mode, setting to manual mode should set 2392 * the fan to full speed by default. 2393 * - If it is in manual mode, we need a mapping to temperature 2394 * channels to use when later setting to automatic mode later. 2395 * Use a 1:1 mapping by default (we are clueless.) 2396 * In both cases, the value can (and should) be changed by the user 2397 * prior to switching to a different mode. 2398 * Note that this is no longer needed for the IT8721F and later, as 2399 * these have separate registers for the temperature mapping and the 2400 * manual duty cycle. 2401 */ 2402 for (i = 0; i < 3; i++) { 2403 data->pwm_temp_map[i] = i; 2404 data->pwm_duty[i] = 0x7f; /* Full speed */ 2405 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */ 2406 } 2407 2408 /* 2409 * Some chips seem to have default value 0xff for all limit 2410 * registers. For low voltage limits it makes no sense and triggers 2411 * alarms, so change to 0 instead. For high temperature limits, it 2412 * means -1 degree C, which surprisingly doesn't trigger an alarm, 2413 * but is still confusing, so change to 127 degrees C. 2414 */ 2415 for (i = 0; i < 8; i++) { 2416 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i)); 2417 if (tmp == 0xff) 2418 it87_write_value(data, IT87_REG_VIN_MIN(i), 0); 2419 } 2420 for (i = 0; i < 3; i++) { 2421 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i)); 2422 if (tmp == 0xff) 2423 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127); 2424 } 2425 2426 /* 2427 * Temperature channels are not forcibly enabled, as they can be 2428 * set to two different sensor types and we can't guess which one 2429 * is correct for a given system. These channels can be enabled at 2430 * run-time through the temp{1-3}_type sysfs accessors if needed. 2431 */ 2432 2433 /* Check if voltage monitors are reset manually or by some reason */ 2434 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE); 2435 if ((tmp & 0xff) == 0) { 2436 /* Enable all voltage monitors */ 2437 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff); 2438 } 2439 2440 /* Check if tachometers are reset manually or by some reason */ 2441 mask = 0x70 & ~(sio_data->skip_fan << 4); 2442 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL); 2443 if ((data->fan_main_ctrl & mask) == 0) { 2444 /* Enable all fan tachometers */ 2445 data->fan_main_ctrl |= mask; 2446 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, 2447 data->fan_main_ctrl); 2448 } 2449 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07; 2450 2451 /* Set tachometers to 16-bit mode if needed, IT8603E (and IT8728F?) 2452 * has it by default */ 2453 if (has_16bit_fans(data) && data->type != it8603) { 2454 tmp = it87_read_value(data, IT87_REG_FAN_16BIT); 2455 if (~tmp & 0x07 & data->has_fan) { 2456 dev_dbg(&pdev->dev, 2457 "Setting fan1-3 to 16-bit mode\n"); 2458 it87_write_value(data, IT87_REG_FAN_16BIT, 2459 tmp | 0x07); 2460 } 2461 /* IT8705F, IT8782F, and IT8783E/F only support three fans. */ 2462 if (data->type != it87 && data->type != it8782 && 2463 data->type != it8783) { 2464 if (tmp & (1 << 4)) 2465 data->has_fan |= (1 << 3); /* fan4 enabled */ 2466 if (tmp & (1 << 5)) 2467 data->has_fan |= (1 << 4); /* fan5 enabled */ 2468 } 2469 } 2470 2471 /* Fan input pins may be used for alternative functions */ 2472 data->has_fan &= ~sio_data->skip_fan; 2473 2474 /* Start monitoring */ 2475 it87_write_value(data, IT87_REG_CONFIG, 2476 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e) 2477 | (update_vbat ? 0x41 : 0x01)); 2478 } 2479 2480 static void it87_update_pwm_ctrl(struct it87_data *data, int nr) 2481 { 2482 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr)); 2483 if (has_newer_autopwm(data)) { 2484 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; 2485 data->pwm_duty[nr] = it87_read_value(data, 2486 IT87_REG_PWM_DUTY(nr)); 2487 } else { 2488 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ 2489 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; 2490 else /* Manual mode */ 2491 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f; 2492 } 2493 2494 if (has_old_autopwm(data)) { 2495 int i; 2496 2497 for (i = 0; i < 5 ; i++) 2498 data->auto_temp[nr][i] = it87_read_value(data, 2499 IT87_REG_AUTO_TEMP(nr, i)); 2500 for (i = 0; i < 3 ; i++) 2501 data->auto_pwm[nr][i] = it87_read_value(data, 2502 IT87_REG_AUTO_PWM(nr, i)); 2503 } 2504 } 2505 2506 static struct it87_data *it87_update_device(struct device *dev) 2507 { 2508 struct it87_data *data = dev_get_drvdata(dev); 2509 int i; 2510 2511 mutex_lock(&data->update_lock); 2512 2513 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 2514 || !data->valid) { 2515 if (update_vbat) { 2516 /* 2517 * Cleared after each update, so reenable. Value 2518 * returned by this read will be previous value 2519 */ 2520 it87_write_value(data, IT87_REG_CONFIG, 2521 it87_read_value(data, IT87_REG_CONFIG) | 0x40); 2522 } 2523 for (i = 0; i <= 7; i++) { 2524 data->in[i][0] = 2525 it87_read_value(data, IT87_REG_VIN(i)); 2526 data->in[i][1] = 2527 it87_read_value(data, IT87_REG_VIN_MIN(i)); 2528 data->in[i][2] = 2529 it87_read_value(data, IT87_REG_VIN_MAX(i)); 2530 } 2531 /* in8 (battery) has no limit registers */ 2532 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8)); 2533 if (data->type == it8603) 2534 data->in[9][0] = it87_read_value(data, 0x2f); 2535 2536 for (i = 0; i < 5; i++) { 2537 /* Skip disabled fans */ 2538 if (!(data->has_fan & (1 << i))) 2539 continue; 2540 2541 data->fan[i][1] = 2542 it87_read_value(data, IT87_REG_FAN_MIN[i]); 2543 data->fan[i][0] = it87_read_value(data, 2544 IT87_REG_FAN[i]); 2545 /* Add high byte if in 16-bit mode */ 2546 if (has_16bit_fans(data)) { 2547 data->fan[i][0] |= it87_read_value(data, 2548 IT87_REG_FANX[i]) << 8; 2549 data->fan[i][1] |= it87_read_value(data, 2550 IT87_REG_FANX_MIN[i]) << 8; 2551 } 2552 } 2553 for (i = 0; i < 3; i++) { 2554 if (!(data->has_temp & (1 << i))) 2555 continue; 2556 data->temp[i][0] = 2557 it87_read_value(data, IT87_REG_TEMP(i)); 2558 data->temp[i][1] = 2559 it87_read_value(data, IT87_REG_TEMP_LOW(i)); 2560 data->temp[i][2] = 2561 it87_read_value(data, IT87_REG_TEMP_HIGH(i)); 2562 if (has_temp_offset(data)) 2563 data->temp[i][3] = 2564 it87_read_value(data, 2565 IT87_REG_TEMP_OFFSET[i]); 2566 } 2567 2568 /* Newer chips don't have clock dividers */ 2569 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) { 2570 i = it87_read_value(data, IT87_REG_FAN_DIV); 2571 data->fan_div[0] = i & 0x07; 2572 data->fan_div[1] = (i >> 3) & 0x07; 2573 data->fan_div[2] = (i & 0x40) ? 3 : 1; 2574 } 2575 2576 data->alarms = 2577 it87_read_value(data, IT87_REG_ALARM1) | 2578 (it87_read_value(data, IT87_REG_ALARM2) << 8) | 2579 (it87_read_value(data, IT87_REG_ALARM3) << 16); 2580 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); 2581 2582 data->fan_main_ctrl = it87_read_value(data, 2583 IT87_REG_FAN_MAIN_CTRL); 2584 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL); 2585 for (i = 0; i < 3; i++) 2586 it87_update_pwm_ctrl(data, i); 2587 2588 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE); 2589 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); 2590 /* 2591 * The IT8705F does not have VID capability. 2592 * The IT8718F and later don't use IT87_REG_VID for the 2593 * same purpose. 2594 */ 2595 if (data->type == it8712 || data->type == it8716) { 2596 data->vid = it87_read_value(data, IT87_REG_VID); 2597 /* 2598 * The older IT8712F revisions had only 5 VID pins, 2599 * but we assume it is always safe to read 6 bits. 2600 */ 2601 data->vid &= 0x3f; 2602 } 2603 data->last_updated = jiffies; 2604 data->valid = 1; 2605 } 2606 2607 mutex_unlock(&data->update_lock); 2608 2609 return data; 2610 } 2611 2612 static int __init it87_device_add(unsigned short address, 2613 const struct it87_sio_data *sio_data) 2614 { 2615 struct resource res = { 2616 .start = address + IT87_EC_OFFSET, 2617 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1, 2618 .name = DRVNAME, 2619 .flags = IORESOURCE_IO, 2620 }; 2621 int err; 2622 2623 err = acpi_check_resource_conflict(&res); 2624 if (err) 2625 goto exit; 2626 2627 pdev = platform_device_alloc(DRVNAME, address); 2628 if (!pdev) { 2629 err = -ENOMEM; 2630 pr_err("Device allocation failed\n"); 2631 goto exit; 2632 } 2633 2634 err = platform_device_add_resources(pdev, &res, 1); 2635 if (err) { 2636 pr_err("Device resource addition failed (%d)\n", err); 2637 goto exit_device_put; 2638 } 2639 2640 err = platform_device_add_data(pdev, sio_data, 2641 sizeof(struct it87_sio_data)); 2642 if (err) { 2643 pr_err("Platform data allocation failed\n"); 2644 goto exit_device_put; 2645 } 2646 2647 err = platform_device_add(pdev); 2648 if (err) { 2649 pr_err("Device addition failed (%d)\n", err); 2650 goto exit_device_put; 2651 } 2652 2653 return 0; 2654 2655 exit_device_put: 2656 platform_device_put(pdev); 2657 exit: 2658 return err; 2659 } 2660 2661 static int __init sm_it87_init(void) 2662 { 2663 int err; 2664 unsigned short isa_address = 0; 2665 struct it87_sio_data sio_data; 2666 2667 memset(&sio_data, 0, sizeof(struct it87_sio_data)); 2668 err = it87_find(&isa_address, &sio_data); 2669 if (err) 2670 return err; 2671 err = platform_driver_register(&it87_driver); 2672 if (err) 2673 return err; 2674 2675 err = it87_device_add(isa_address, &sio_data); 2676 if (err) { 2677 platform_driver_unregister(&it87_driver); 2678 return err; 2679 } 2680 2681 return 0; 2682 } 2683 2684 static void __exit sm_it87_exit(void) 2685 { 2686 platform_device_unregister(pdev); 2687 platform_driver_unregister(&it87_driver); 2688 } 2689 2690 2691 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>"); 2692 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver"); 2693 module_param(update_vbat, bool, 0); 2694 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value"); 2695 module_param(fix_pwm_polarity, bool, 0); 2696 MODULE_PARM_DESC(fix_pwm_polarity, 2697 "Force PWM polarity to active high (DANGEROUS)"); 2698 MODULE_LICENSE("GPL"); 2699 2700 module_init(sm_it87_init); 2701 module_exit(sm_it87_exit); 2702