1 /* 2 * it87.c - Part of lm_sensors, Linux kernel modules for hardware 3 * monitoring. 4 * 5 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a 6 * parallel port, an IR port, a MIDI port, a floppy controller, etc., in 7 * addition to an Environment Controller (Enhanced Hardware Monitor and 8 * Fan Controller) 9 * 10 * This driver supports only the Environment Controller in the IT8705F and 11 * similar parts. The other devices are supported by different drivers. 12 * 13 * Supports: IT8603E Super I/O chip w/LPC interface 14 * IT8620E Super I/O chip w/LPC interface 15 * IT8623E Super I/O chip w/LPC interface 16 * IT8705F Super I/O chip w/LPC interface 17 * IT8712F Super I/O chip w/LPC interface 18 * IT8716F Super I/O chip w/LPC interface 19 * IT8718F Super I/O chip w/LPC interface 20 * IT8720F Super I/O chip w/LPC interface 21 * IT8721F Super I/O chip w/LPC interface 22 * IT8726F Super I/O chip w/LPC interface 23 * IT8728F Super I/O chip w/LPC interface 24 * IT8732F Super I/O chip w/LPC interface 25 * IT8758E Super I/O chip w/LPC interface 26 * IT8771E Super I/O chip w/LPC interface 27 * IT8772E Super I/O chip w/LPC interface 28 * IT8781F Super I/O chip w/LPC interface 29 * IT8782F Super I/O chip w/LPC interface 30 * IT8783E/F Super I/O chip w/LPC interface 31 * IT8786E Super I/O chip w/LPC interface 32 * IT8790E Super I/O chip w/LPC interface 33 * Sis950 A clone of the IT8705F 34 * 35 * Copyright (C) 2001 Chris Gauthron 36 * Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de> 37 * 38 * This program is free software; you can redistribute it and/or modify 39 * it under the terms of the GNU General Public License as published by 40 * the Free Software Foundation; either version 2 of the License, or 41 * (at your option) any later version. 42 * 43 * This program is distributed in the hope that it will be useful, 44 * but WITHOUT ANY WARRANTY; without even the implied warranty of 45 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 46 * GNU General Public License for more details. 47 * 48 * You should have received a copy of the GNU General Public License 49 * along with this program; if not, write to the Free Software 50 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 51 */ 52 53 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 54 55 #include <linux/module.h> 56 #include <linux/init.h> 57 #include <linux/slab.h> 58 #include <linux/jiffies.h> 59 #include <linux/platform_device.h> 60 #include <linux/hwmon.h> 61 #include <linux/hwmon-sysfs.h> 62 #include <linux/hwmon-vid.h> 63 #include <linux/err.h> 64 #include <linux/mutex.h> 65 #include <linux/sysfs.h> 66 #include <linux/string.h> 67 #include <linux/dmi.h> 68 #include <linux/acpi.h> 69 #include <linux/io.h> 70 71 #define DRVNAME "it87" 72 73 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732, 74 it8771, it8772, it8781, it8782, it8783, it8786, it8790, it8603, 75 it8620 }; 76 77 static unsigned short force_id; 78 module_param(force_id, ushort, 0); 79 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 80 81 static struct platform_device *pdev; 82 83 #define REG 0x2e /* The register to read/write */ 84 #define DEV 0x07 /* Register: Logical device select */ 85 #define VAL 0x2f /* The value to read/write */ 86 #define PME 0x04 /* The device with the fan registers in it */ 87 88 /* The device with the IT8718F/IT8720F VID value in it */ 89 #define GPIO 0x07 90 91 #define DEVID 0x20 /* Register: Device ID */ 92 #define DEVREV 0x22 /* Register: Device Revision */ 93 94 static inline int superio_inb(int reg) 95 { 96 outb(reg, REG); 97 return inb(VAL); 98 } 99 100 static inline void superio_outb(int reg, int val) 101 { 102 outb(reg, REG); 103 outb(val, VAL); 104 } 105 106 static int superio_inw(int reg) 107 { 108 int val; 109 outb(reg++, REG); 110 val = inb(VAL) << 8; 111 outb(reg, REG); 112 val |= inb(VAL); 113 return val; 114 } 115 116 static inline void superio_select(int ldn) 117 { 118 outb(DEV, REG); 119 outb(ldn, VAL); 120 } 121 122 static inline int superio_enter(void) 123 { 124 /* 125 * Try to reserve REG and REG + 1 for exclusive access. 126 */ 127 if (!request_muxed_region(REG, 2, DRVNAME)) 128 return -EBUSY; 129 130 outb(0x87, REG); 131 outb(0x01, REG); 132 outb(0x55, REG); 133 outb(0x55, REG); 134 return 0; 135 } 136 137 static inline void superio_exit(void) 138 { 139 outb(0x02, REG); 140 outb(0x02, VAL); 141 release_region(REG, 2); 142 } 143 144 /* Logical device 4 registers */ 145 #define IT8712F_DEVID 0x8712 146 #define IT8705F_DEVID 0x8705 147 #define IT8716F_DEVID 0x8716 148 #define IT8718F_DEVID 0x8718 149 #define IT8720F_DEVID 0x8720 150 #define IT8721F_DEVID 0x8721 151 #define IT8726F_DEVID 0x8726 152 #define IT8728F_DEVID 0x8728 153 #define IT8732F_DEVID 0x8732 154 #define IT8771E_DEVID 0x8771 155 #define IT8772E_DEVID 0x8772 156 #define IT8781F_DEVID 0x8781 157 #define IT8782F_DEVID 0x8782 158 #define IT8783E_DEVID 0x8783 159 #define IT8786E_DEVID 0x8786 160 #define IT8790E_DEVID 0x8790 161 #define IT8603E_DEVID 0x8603 162 #define IT8620E_DEVID 0x8620 163 #define IT8623E_DEVID 0x8623 164 #define IT87_ACT_REG 0x30 165 #define IT87_BASE_REG 0x60 166 167 /* Logical device 7 registers (IT8712F and later) */ 168 #define IT87_SIO_GPIO1_REG 0x25 169 #define IT87_SIO_GPIO2_REG 0x26 170 #define IT87_SIO_GPIO3_REG 0x27 171 #define IT87_SIO_GPIO5_REG 0x29 172 #define IT87_SIO_PINX1_REG 0x2a /* Pin selection */ 173 #define IT87_SIO_PINX2_REG 0x2c /* Pin selection */ 174 #define IT87_SIO_SPI_REG 0xef /* SPI function pin select */ 175 #define IT87_SIO_VID_REG 0xfc /* VID value */ 176 #define IT87_SIO_BEEP_PIN_REG 0xf6 /* Beep pin mapping */ 177 178 /* Update battery voltage after every reading if true */ 179 static bool update_vbat; 180 181 /* Not all BIOSes properly configure the PWM registers */ 182 static bool fix_pwm_polarity; 183 184 /* Many IT87 constants specified below */ 185 186 /* Length of ISA address segment */ 187 #define IT87_EXTENT 8 188 189 /* Length of ISA address segment for Environmental Controller */ 190 #define IT87_EC_EXTENT 2 191 192 /* Offset of EC registers from ISA base address */ 193 #define IT87_EC_OFFSET 5 194 195 /* Where are the ISA address/data registers relative to the EC base address */ 196 #define IT87_ADDR_REG_OFFSET 0 197 #define IT87_DATA_REG_OFFSET 1 198 199 /*----- The IT87 registers -----*/ 200 201 #define IT87_REG_CONFIG 0x00 202 203 #define IT87_REG_ALARM1 0x01 204 #define IT87_REG_ALARM2 0x02 205 #define IT87_REG_ALARM3 0x03 206 207 /* 208 * The IT8718F and IT8720F have the VID value in a different register, in 209 * Super-I/O configuration space. 210 */ 211 #define IT87_REG_VID 0x0a 212 /* 213 * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b 214 * for fan divisors. Later IT8712F revisions must use 16-bit tachometer 215 * mode. 216 */ 217 #define IT87_REG_FAN_DIV 0x0b 218 #define IT87_REG_FAN_16BIT 0x0c 219 220 /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */ 221 222 static const u8 IT87_REG_FAN[] = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c }; 223 static const u8 IT87_REG_FAN_MIN[] = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e }; 224 static const u8 IT87_REG_FANX[] = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d }; 225 static const u8 IT87_REG_FANX_MIN[] = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f }; 226 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 }; 227 228 #define IT87_REG_FAN_MAIN_CTRL 0x13 229 #define IT87_REG_FAN_CTL 0x14 230 #define IT87_REG_PWM(nr) (0x15 + (nr)) 231 #define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8) 232 233 #define IT87_REG_VIN(nr) (0x20 + (nr)) 234 #define IT87_REG_TEMP(nr) (0x29 + (nr)) 235 236 #define IT87_REG_VIN_MAX(nr) (0x30 + (nr) * 2) 237 #define IT87_REG_VIN_MIN(nr) (0x31 + (nr) * 2) 238 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2) 239 #define IT87_REG_TEMP_LOW(nr) (0x41 + (nr) * 2) 240 241 #define IT87_REG_VIN_ENABLE 0x50 242 #define IT87_REG_TEMP_ENABLE 0x51 243 #define IT87_REG_TEMP_EXTRA 0x55 244 #define IT87_REG_BEEP_ENABLE 0x5c 245 246 #define IT87_REG_CHIPID 0x58 247 248 #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i)) 249 #define IT87_REG_AUTO_PWM(nr, i) (0x65 + (nr) * 8 + (i)) 250 251 struct it87_devices { 252 const char *name; 253 const char * const suffix; 254 u16 features; 255 u8 peci_mask; 256 u8 old_peci_mask; 257 }; 258 259 #define FEAT_12MV_ADC (1 << 0) 260 #define FEAT_NEWER_AUTOPWM (1 << 1) 261 #define FEAT_OLD_AUTOPWM (1 << 2) 262 #define FEAT_16BIT_FANS (1 << 3) 263 #define FEAT_TEMP_OFFSET (1 << 4) 264 #define FEAT_TEMP_PECI (1 << 5) 265 #define FEAT_TEMP_OLD_PECI (1 << 6) 266 #define FEAT_FAN16_CONFIG (1 << 7) /* Need to enable 16-bit fans */ 267 #define FEAT_FIVE_FANS (1 << 8) /* Supports five fans */ 268 #define FEAT_VID (1 << 9) /* Set if chip supports VID */ 269 #define FEAT_IN7_INTERNAL (1 << 10) /* Set if in7 is internal */ 270 #define FEAT_SIX_FANS (1 << 11) /* Supports six fans */ 271 #define FEAT_10_9MV_ADC (1 << 12) 272 273 static const struct it87_devices it87_devices[] = { 274 [it87] = { 275 .name = "it87", 276 .suffix = "F", 277 .features = FEAT_OLD_AUTOPWM, /* may need to overwrite */ 278 }, 279 [it8712] = { 280 .name = "it8712", 281 .suffix = "F", 282 .features = FEAT_OLD_AUTOPWM | FEAT_VID, 283 /* may need to overwrite */ 284 }, 285 [it8716] = { 286 .name = "it8716", 287 .suffix = "F", 288 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID 289 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, 290 }, 291 [it8718] = { 292 .name = "it8718", 293 .suffix = "F", 294 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID 295 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, 296 .old_peci_mask = 0x4, 297 }, 298 [it8720] = { 299 .name = "it8720", 300 .suffix = "F", 301 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID 302 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS, 303 .old_peci_mask = 0x4, 304 }, 305 [it8721] = { 306 .name = "it8721", 307 .suffix = "F", 308 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 309 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI 310 | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL, 311 .peci_mask = 0x05, 312 .old_peci_mask = 0x02, /* Actually reports PCH */ 313 }, 314 [it8728] = { 315 .name = "it8728", 316 .suffix = "F", 317 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 318 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS 319 | FEAT_IN7_INTERNAL, 320 .peci_mask = 0x07, 321 }, 322 [it8732] = { 323 .name = "it8732", 324 .suffix = "F", 325 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS 326 | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI 327 | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL, 328 .peci_mask = 0x07, 329 .old_peci_mask = 0x02, /* Actually reports PCH */ 330 }, 331 [it8771] = { 332 .name = "it8771", 333 .suffix = "E", 334 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 335 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, 336 /* PECI: guesswork */ 337 /* 12mV ADC (OHM) */ 338 /* 16 bit fans (OHM) */ 339 /* three fans, always 16 bit (guesswork) */ 340 .peci_mask = 0x07, 341 }, 342 [it8772] = { 343 .name = "it8772", 344 .suffix = "E", 345 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 346 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, 347 /* PECI (coreboot) */ 348 /* 12mV ADC (HWSensors4, OHM) */ 349 /* 16 bit fans (HWSensors4, OHM) */ 350 /* three fans, always 16 bit (datasheet) */ 351 .peci_mask = 0x07, 352 }, 353 [it8781] = { 354 .name = "it8781", 355 .suffix = "F", 356 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET 357 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, 358 .old_peci_mask = 0x4, 359 }, 360 [it8782] = { 361 .name = "it8782", 362 .suffix = "F", 363 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET 364 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, 365 .old_peci_mask = 0x4, 366 }, 367 [it8783] = { 368 .name = "it8783", 369 .suffix = "E/F", 370 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET 371 | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG, 372 .old_peci_mask = 0x4, 373 }, 374 [it8786] = { 375 .name = "it8786", 376 .suffix = "E", 377 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 378 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, 379 .peci_mask = 0x07, 380 }, 381 [it8790] = { 382 .name = "it8790", 383 .suffix = "E", 384 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 385 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, 386 .peci_mask = 0x07, 387 }, 388 [it8603] = { 389 .name = "it8603", 390 .suffix = "E", 391 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 392 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL, 393 .peci_mask = 0x07, 394 }, 395 [it8620] = { 396 .name = "it8620", 397 .suffix = "E", 398 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS 399 | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS 400 | FEAT_IN7_INTERNAL, 401 .peci_mask = 0x07, 402 }, 403 }; 404 405 #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS) 406 #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC) 407 #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC) 408 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM) 409 #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM) 410 #define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET) 411 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \ 412 ((data)->peci_mask & (1 << nr))) 413 #define has_temp_old_peci(data, nr) \ 414 (((data)->features & FEAT_TEMP_OLD_PECI) && \ 415 ((data)->old_peci_mask & (1 << nr))) 416 #define has_fan16_config(data) ((data)->features & FEAT_FAN16_CONFIG) 417 #define has_five_fans(data) ((data)->features & (FEAT_FIVE_FANS | \ 418 FEAT_SIX_FANS)) 419 #define has_vid(data) ((data)->features & FEAT_VID) 420 #define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL) 421 #define has_six_fans(data) ((data)->features & FEAT_SIX_FANS) 422 423 struct it87_sio_data { 424 enum chips type; 425 /* Values read from Super-I/O config space */ 426 u8 revision; 427 u8 vid_value; 428 u8 beep_pin; 429 u8 internal; /* Internal sensors can be labeled */ 430 /* Features skipped based on config or DMI */ 431 u16 skip_in; 432 u8 skip_vid; 433 u8 skip_fan; 434 u8 skip_pwm; 435 u8 skip_temp; 436 }; 437 438 /* 439 * For each registered chip, we need to keep some data in memory. 440 * The structure is dynamically allocated. 441 */ 442 struct it87_data { 443 struct device *hwmon_dev; 444 enum chips type; 445 u16 features; 446 u8 peci_mask; 447 u8 old_peci_mask; 448 449 unsigned short addr; 450 const char *name; 451 struct mutex update_lock; 452 char valid; /* !=0 if following fields are valid */ 453 unsigned long last_updated; /* In jiffies */ 454 455 u16 in_scaled; /* Internal voltage sensors are scaled */ 456 u8 in[10][3]; /* [nr][0]=in, [1]=min, [2]=max */ 457 u8 has_fan; /* Bitfield, fans enabled */ 458 u16 fan[6][2]; /* Register values, [nr][0]=fan, [1]=min */ 459 u8 has_temp; /* Bitfield, temp sensors enabled */ 460 s8 temp[3][4]; /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */ 461 u8 sensor; /* Register value (IT87_REG_TEMP_ENABLE) */ 462 u8 extra; /* Register value (IT87_REG_TEMP_EXTRA) */ 463 u8 fan_div[3]; /* Register encoding, shifted right */ 464 u8 vid; /* Register encoding, combined */ 465 u8 vrm; 466 u32 alarms; /* Register encoding, combined */ 467 u8 beeps; /* Register encoding */ 468 u8 fan_main_ctrl; /* Register value */ 469 u8 fan_ctl; /* Register value */ 470 471 /* 472 * The following 3 arrays correspond to the same registers up to 473 * the IT8720F. The meaning of bits 6-0 depends on the value of bit 474 * 7, and we want to preserve settings on mode changes, so we have 475 * to track all values separately. 476 * Starting with the IT8721F, the manual PWM duty cycles are stored 477 * in separate registers (8-bit values), so the separate tracking 478 * is no longer needed, but it is still done to keep the driver 479 * simple. 480 */ 481 u8 pwm_ctrl[3]; /* Register value */ 482 u8 pwm_duty[3]; /* Manual PWM value set by user */ 483 u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */ 484 485 /* Automatic fan speed control registers */ 486 u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */ 487 s8 auto_temp[3][5]; /* [nr][0] is point1_temp_hyst */ 488 }; 489 490 static int adc_lsb(const struct it87_data *data, int nr) 491 { 492 int lsb; 493 494 if (has_12mv_adc(data)) 495 lsb = 120; 496 else if (has_10_9mv_adc(data)) 497 lsb = 109; 498 else 499 lsb = 160; 500 if (data->in_scaled & (1 << nr)) 501 lsb <<= 1; 502 return lsb; 503 } 504 505 static u8 in_to_reg(const struct it87_data *data, int nr, long val) 506 { 507 val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr)); 508 return clamp_val(val, 0, 255); 509 } 510 511 static int in_from_reg(const struct it87_data *data, int nr, int val) 512 { 513 return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10); 514 } 515 516 static inline u8 FAN_TO_REG(long rpm, int div) 517 { 518 if (rpm == 0) 519 return 255; 520 rpm = clamp_val(rpm, 1, 1000000); 521 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254); 522 } 523 524 static inline u16 FAN16_TO_REG(long rpm) 525 { 526 if (rpm == 0) 527 return 0xffff; 528 return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe); 529 } 530 531 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \ 532 1350000 / ((val) * (div))) 533 /* The divider is fixed to 2 in 16-bit mode */ 534 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \ 535 1350000 / ((val) * 2)) 536 537 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \ 538 ((val) + 500) / 1000), -128, 127)) 539 #define TEMP_FROM_REG(val) ((val) * 1000) 540 541 static u8 pwm_to_reg(const struct it87_data *data, long val) 542 { 543 if (has_newer_autopwm(data)) 544 return val; 545 else 546 return val >> 1; 547 } 548 549 static int pwm_from_reg(const struct it87_data *data, u8 reg) 550 { 551 if (has_newer_autopwm(data)) 552 return reg; 553 else 554 return (reg & 0x7f) << 1; 555 } 556 557 558 static int DIV_TO_REG(int val) 559 { 560 int answer = 0; 561 while (answer < 7 && (val >>= 1)) 562 answer++; 563 return answer; 564 } 565 #define DIV_FROM_REG(val) (1 << (val)) 566 567 /* 568 * PWM base frequencies. The frequency has to be divided by either 128 or 256, 569 * depending on the chip type, to calculate the actual PWM frequency. 570 * 571 * Some of the chip datasheets suggest a base frequency of 51 kHz instead 572 * of 750 kHz for the slowest base frequency, resulting in a PWM frequency 573 * of 200 Hz. Sometimes both PWM frequency select registers are affected, 574 * sometimes just one. It is unknown if this is a datasheet error or real, 575 * so this is ignored for now. 576 */ 577 static const unsigned int pwm_freq[8] = { 578 48000000, 579 24000000, 580 12000000, 581 8000000, 582 6000000, 583 3000000, 584 1500000, 585 750000, 586 }; 587 588 static int it87_probe(struct platform_device *pdev); 589 static int it87_remove(struct platform_device *pdev); 590 591 static int it87_read_value(struct it87_data *data, u8 reg); 592 static void it87_write_value(struct it87_data *data, u8 reg, u8 value); 593 static struct it87_data *it87_update_device(struct device *dev); 594 static int it87_check_pwm(struct device *dev); 595 static void it87_init_device(struct platform_device *pdev); 596 597 598 static struct platform_driver it87_driver = { 599 .driver = { 600 .name = DRVNAME, 601 }, 602 .probe = it87_probe, 603 .remove = it87_remove, 604 }; 605 606 static ssize_t show_in(struct device *dev, struct device_attribute *attr, 607 char *buf) 608 { 609 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 610 int nr = sattr->nr; 611 int index = sattr->index; 612 613 struct it87_data *data = it87_update_device(dev); 614 return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index])); 615 } 616 617 static ssize_t set_in(struct device *dev, struct device_attribute *attr, 618 const char *buf, size_t count) 619 { 620 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 621 int nr = sattr->nr; 622 int index = sattr->index; 623 624 struct it87_data *data = dev_get_drvdata(dev); 625 unsigned long val; 626 627 if (kstrtoul(buf, 10, &val) < 0) 628 return -EINVAL; 629 630 mutex_lock(&data->update_lock); 631 data->in[nr][index] = in_to_reg(data, nr, val); 632 it87_write_value(data, 633 index == 1 ? IT87_REG_VIN_MIN(nr) 634 : IT87_REG_VIN_MAX(nr), 635 data->in[nr][index]); 636 mutex_unlock(&data->update_lock); 637 return count; 638 } 639 640 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0); 641 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in, 642 0, 1); 643 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in, 644 0, 2); 645 646 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0); 647 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in, 648 1, 1); 649 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in, 650 1, 2); 651 652 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0); 653 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in, 654 2, 1); 655 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in, 656 2, 2); 657 658 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0); 659 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in, 660 3, 1); 661 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in, 662 3, 2); 663 664 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0); 665 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in, 666 4, 1); 667 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in, 668 4, 2); 669 670 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0); 671 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in, 672 5, 1); 673 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in, 674 5, 2); 675 676 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0); 677 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in, 678 6, 1); 679 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in, 680 6, 2); 681 682 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0); 683 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in, 684 7, 1); 685 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in, 686 7, 2); 687 688 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0); 689 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0); 690 691 /* 3 temperatures */ 692 static ssize_t show_temp(struct device *dev, struct device_attribute *attr, 693 char *buf) 694 { 695 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 696 int nr = sattr->nr; 697 int index = sattr->index; 698 struct it87_data *data = it87_update_device(dev); 699 700 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index])); 701 } 702 703 static ssize_t set_temp(struct device *dev, struct device_attribute *attr, 704 const char *buf, size_t count) 705 { 706 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 707 int nr = sattr->nr; 708 int index = sattr->index; 709 struct it87_data *data = dev_get_drvdata(dev); 710 long val; 711 u8 reg, regval; 712 713 if (kstrtol(buf, 10, &val) < 0) 714 return -EINVAL; 715 716 mutex_lock(&data->update_lock); 717 718 switch (index) { 719 default: 720 case 1: 721 reg = IT87_REG_TEMP_LOW(nr); 722 break; 723 case 2: 724 reg = IT87_REG_TEMP_HIGH(nr); 725 break; 726 case 3: 727 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE); 728 if (!(regval & 0x80)) { 729 regval |= 0x80; 730 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval); 731 } 732 data->valid = 0; 733 reg = IT87_REG_TEMP_OFFSET[nr]; 734 break; 735 } 736 737 data->temp[nr][index] = TEMP_TO_REG(val); 738 it87_write_value(data, reg, data->temp[nr][index]); 739 mutex_unlock(&data->update_lock); 740 return count; 741 } 742 743 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0); 744 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp, 745 0, 1); 746 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp, 747 0, 2); 748 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp, 749 set_temp, 0, 3); 750 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0); 751 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp, 752 1, 1); 753 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp, 754 1, 2); 755 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp, 756 set_temp, 1, 3); 757 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0); 758 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp, 759 2, 1); 760 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp, 761 2, 2); 762 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp, 763 set_temp, 2, 3); 764 765 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr, 766 char *buf) 767 { 768 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 769 int nr = sensor_attr->index; 770 struct it87_data *data = it87_update_device(dev); 771 u8 reg = data->sensor; /* In case value is updated while used */ 772 u8 extra = data->extra; 773 774 if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) 775 || (has_temp_old_peci(data, nr) && (extra & 0x80))) 776 return sprintf(buf, "6\n"); /* Intel PECI */ 777 if (reg & (1 << nr)) 778 return sprintf(buf, "3\n"); /* thermal diode */ 779 if (reg & (8 << nr)) 780 return sprintf(buf, "4\n"); /* thermistor */ 781 return sprintf(buf, "0\n"); /* disabled */ 782 } 783 784 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr, 785 const char *buf, size_t count) 786 { 787 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 788 int nr = sensor_attr->index; 789 790 struct it87_data *data = dev_get_drvdata(dev); 791 long val; 792 u8 reg, extra; 793 794 if (kstrtol(buf, 10, &val) < 0) 795 return -EINVAL; 796 797 reg = it87_read_value(data, IT87_REG_TEMP_ENABLE); 798 reg &= ~(1 << nr); 799 reg &= ~(8 << nr); 800 if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6)) 801 reg &= 0x3f; 802 extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); 803 if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6)) 804 extra &= 0x7f; 805 if (val == 2) { /* backwards compatibility */ 806 dev_warn(dev, 807 "Sensor type 2 is deprecated, please use 4 instead\n"); 808 val = 4; 809 } 810 /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */ 811 if (val == 3) 812 reg |= 1 << nr; 813 else if (val == 4) 814 reg |= 8 << nr; 815 else if (has_temp_peci(data, nr) && val == 6) 816 reg |= (nr + 1) << 6; 817 else if (has_temp_old_peci(data, nr) && val == 6) 818 extra |= 0x80; 819 else if (val != 0) 820 return -EINVAL; 821 822 mutex_lock(&data->update_lock); 823 data->sensor = reg; 824 data->extra = extra; 825 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor); 826 if (has_temp_old_peci(data, nr)) 827 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra); 828 data->valid = 0; /* Force cache refresh */ 829 mutex_unlock(&data->update_lock); 830 return count; 831 } 832 833 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type, 834 set_temp_type, 0); 835 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type, 836 set_temp_type, 1); 837 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type, 838 set_temp_type, 2); 839 840 /* 3 Fans */ 841 842 static int pwm_mode(const struct it87_data *data, int nr) 843 { 844 int ctrl = data->fan_main_ctrl & (1 << nr); 845 846 if (ctrl == 0 && data->type != it8603) /* Full speed */ 847 return 0; 848 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ 849 return 2; 850 else /* Manual mode */ 851 return 1; 852 } 853 854 static ssize_t show_fan(struct device *dev, struct device_attribute *attr, 855 char *buf) 856 { 857 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 858 int nr = sattr->nr; 859 int index = sattr->index; 860 int speed; 861 struct it87_data *data = it87_update_device(dev); 862 863 speed = has_16bit_fans(data) ? 864 FAN16_FROM_REG(data->fan[nr][index]) : 865 FAN_FROM_REG(data->fan[nr][index], 866 DIV_FROM_REG(data->fan_div[nr])); 867 return sprintf(buf, "%d\n", speed); 868 } 869 870 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr, 871 char *buf) 872 { 873 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 874 int nr = sensor_attr->index; 875 876 struct it87_data *data = it87_update_device(dev); 877 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr])); 878 } 879 static ssize_t show_pwm_enable(struct device *dev, 880 struct device_attribute *attr, char *buf) 881 { 882 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 883 int nr = sensor_attr->index; 884 885 struct it87_data *data = it87_update_device(dev); 886 return sprintf(buf, "%d\n", pwm_mode(data, nr)); 887 } 888 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, 889 char *buf) 890 { 891 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 892 int nr = sensor_attr->index; 893 894 struct it87_data *data = it87_update_device(dev); 895 return sprintf(buf, "%d\n", 896 pwm_from_reg(data, data->pwm_duty[nr])); 897 } 898 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr, 899 char *buf) 900 { 901 struct it87_data *data = it87_update_device(dev); 902 int index = (data->fan_ctl >> 4) & 0x07; 903 unsigned int freq; 904 905 freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128); 906 907 return sprintf(buf, "%u\n", freq); 908 } 909 910 static ssize_t set_fan(struct device *dev, struct device_attribute *attr, 911 const char *buf, size_t count) 912 { 913 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 914 int nr = sattr->nr; 915 int index = sattr->index; 916 917 struct it87_data *data = dev_get_drvdata(dev); 918 long val; 919 u8 reg; 920 921 if (kstrtol(buf, 10, &val) < 0) 922 return -EINVAL; 923 924 mutex_lock(&data->update_lock); 925 926 if (has_16bit_fans(data)) { 927 data->fan[nr][index] = FAN16_TO_REG(val); 928 it87_write_value(data, IT87_REG_FAN_MIN[nr], 929 data->fan[nr][index] & 0xff); 930 it87_write_value(data, IT87_REG_FANX_MIN[nr], 931 data->fan[nr][index] >> 8); 932 } else { 933 reg = it87_read_value(data, IT87_REG_FAN_DIV); 934 switch (nr) { 935 case 0: 936 data->fan_div[nr] = reg & 0x07; 937 break; 938 case 1: 939 data->fan_div[nr] = (reg >> 3) & 0x07; 940 break; 941 case 2: 942 data->fan_div[nr] = (reg & 0x40) ? 3 : 1; 943 break; 944 } 945 data->fan[nr][index] = 946 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); 947 it87_write_value(data, IT87_REG_FAN_MIN[nr], 948 data->fan[nr][index]); 949 } 950 951 mutex_unlock(&data->update_lock); 952 return count; 953 } 954 955 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr, 956 const char *buf, size_t count) 957 { 958 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 959 int nr = sensor_attr->index; 960 961 struct it87_data *data = dev_get_drvdata(dev); 962 unsigned long val; 963 int min; 964 u8 old; 965 966 if (kstrtoul(buf, 10, &val) < 0) 967 return -EINVAL; 968 969 mutex_lock(&data->update_lock); 970 old = it87_read_value(data, IT87_REG_FAN_DIV); 971 972 /* Save fan min limit */ 973 min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr])); 974 975 switch (nr) { 976 case 0: 977 case 1: 978 data->fan_div[nr] = DIV_TO_REG(val); 979 break; 980 case 2: 981 if (val < 8) 982 data->fan_div[nr] = 1; 983 else 984 data->fan_div[nr] = 3; 985 } 986 val = old & 0x80; 987 val |= (data->fan_div[0] & 0x07); 988 val |= (data->fan_div[1] & 0x07) << 3; 989 if (data->fan_div[2] == 3) 990 val |= 0x1 << 6; 991 it87_write_value(data, IT87_REG_FAN_DIV, val); 992 993 /* Restore fan min limit */ 994 data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 995 it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]); 996 997 mutex_unlock(&data->update_lock); 998 return count; 999 } 1000 1001 /* Returns 0 if OK, -EINVAL otherwise */ 1002 static int check_trip_points(struct device *dev, int nr) 1003 { 1004 const struct it87_data *data = dev_get_drvdata(dev); 1005 int i, err = 0; 1006 1007 if (has_old_autopwm(data)) { 1008 for (i = 0; i < 3; i++) { 1009 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) 1010 err = -EINVAL; 1011 } 1012 for (i = 0; i < 2; i++) { 1013 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) 1014 err = -EINVAL; 1015 } 1016 } 1017 1018 if (err) { 1019 dev_err(dev, 1020 "Inconsistent trip points, not switching to automatic mode\n"); 1021 dev_err(dev, "Adjust the trip points and try again\n"); 1022 } 1023 return err; 1024 } 1025 1026 static ssize_t set_pwm_enable(struct device *dev, 1027 struct device_attribute *attr, const char *buf, size_t count) 1028 { 1029 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 1030 int nr = sensor_attr->index; 1031 1032 struct it87_data *data = dev_get_drvdata(dev); 1033 long val; 1034 1035 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2) 1036 return -EINVAL; 1037 1038 /* Check trip points before switching to automatic mode */ 1039 if (val == 2) { 1040 if (check_trip_points(dev, nr) < 0) 1041 return -EINVAL; 1042 } 1043 1044 /* IT8603E does not have on/off mode */ 1045 if (val == 0 && data->type == it8603) 1046 return -EINVAL; 1047 1048 mutex_lock(&data->update_lock); 1049 1050 if (val == 0) { 1051 int tmp; 1052 /* make sure the fan is on when in on/off mode */ 1053 tmp = it87_read_value(data, IT87_REG_FAN_CTL); 1054 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr)); 1055 /* set on/off mode */ 1056 data->fan_main_ctrl &= ~(1 << nr); 1057 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, 1058 data->fan_main_ctrl); 1059 } else { 1060 if (val == 1) /* Manual mode */ 1061 data->pwm_ctrl[nr] = has_newer_autopwm(data) ? 1062 data->pwm_temp_map[nr] : 1063 data->pwm_duty[nr]; 1064 else /* Automatic mode */ 1065 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; 1066 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); 1067 1068 if (data->type != it8603) { 1069 /* set SmartGuardian mode */ 1070 data->fan_main_ctrl |= (1 << nr); 1071 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, 1072 data->fan_main_ctrl); 1073 } 1074 } 1075 1076 mutex_unlock(&data->update_lock); 1077 return count; 1078 } 1079 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, 1080 const char *buf, size_t count) 1081 { 1082 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 1083 int nr = sensor_attr->index; 1084 1085 struct it87_data *data = dev_get_drvdata(dev); 1086 long val; 1087 1088 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) 1089 return -EINVAL; 1090 1091 mutex_lock(&data->update_lock); 1092 if (has_newer_autopwm(data)) { 1093 /* 1094 * If we are in automatic mode, the PWM duty cycle register 1095 * is read-only so we can't write the value. 1096 */ 1097 if (data->pwm_ctrl[nr] & 0x80) { 1098 mutex_unlock(&data->update_lock); 1099 return -EBUSY; 1100 } 1101 data->pwm_duty[nr] = pwm_to_reg(data, val); 1102 it87_write_value(data, IT87_REG_PWM_DUTY(nr), 1103 data->pwm_duty[nr]); 1104 } else { 1105 data->pwm_duty[nr] = pwm_to_reg(data, val); 1106 /* 1107 * If we are in manual mode, write the duty cycle immediately; 1108 * otherwise, just store it for later use. 1109 */ 1110 if (!(data->pwm_ctrl[nr] & 0x80)) { 1111 data->pwm_ctrl[nr] = data->pwm_duty[nr]; 1112 it87_write_value(data, IT87_REG_PWM(nr), 1113 data->pwm_ctrl[nr]); 1114 } 1115 } 1116 mutex_unlock(&data->update_lock); 1117 return count; 1118 } 1119 static ssize_t set_pwm_freq(struct device *dev, 1120 struct device_attribute *attr, const char *buf, size_t count) 1121 { 1122 struct it87_data *data = dev_get_drvdata(dev); 1123 unsigned long val; 1124 int i; 1125 1126 if (kstrtoul(buf, 10, &val) < 0) 1127 return -EINVAL; 1128 1129 val = clamp_val(val, 0, 1000000); 1130 val *= has_newer_autopwm(data) ? 256 : 128; 1131 1132 /* Search for the nearest available frequency */ 1133 for (i = 0; i < 7; i++) { 1134 if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2) 1135 break; 1136 } 1137 1138 mutex_lock(&data->update_lock); 1139 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f; 1140 data->fan_ctl |= i << 4; 1141 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl); 1142 mutex_unlock(&data->update_lock); 1143 1144 return count; 1145 } 1146 static ssize_t show_pwm_temp_map(struct device *dev, 1147 struct device_attribute *attr, char *buf) 1148 { 1149 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 1150 int nr = sensor_attr->index; 1151 1152 struct it87_data *data = it87_update_device(dev); 1153 int map; 1154 1155 if (data->pwm_temp_map[nr] < 3) 1156 map = 1 << data->pwm_temp_map[nr]; 1157 else 1158 map = 0; /* Should never happen */ 1159 return sprintf(buf, "%d\n", map); 1160 } 1161 static ssize_t set_pwm_temp_map(struct device *dev, 1162 struct device_attribute *attr, const char *buf, size_t count) 1163 { 1164 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 1165 int nr = sensor_attr->index; 1166 1167 struct it87_data *data = dev_get_drvdata(dev); 1168 long val; 1169 u8 reg; 1170 1171 /* 1172 * This check can go away if we ever support automatic fan speed 1173 * control on newer chips. 1174 */ 1175 if (!has_old_autopwm(data)) { 1176 dev_notice(dev, "Mapping change disabled for safety reasons\n"); 1177 return -EINVAL; 1178 } 1179 1180 if (kstrtol(buf, 10, &val) < 0) 1181 return -EINVAL; 1182 1183 switch (val) { 1184 case (1 << 0): 1185 reg = 0x00; 1186 break; 1187 case (1 << 1): 1188 reg = 0x01; 1189 break; 1190 case (1 << 2): 1191 reg = 0x02; 1192 break; 1193 default: 1194 return -EINVAL; 1195 } 1196 1197 mutex_lock(&data->update_lock); 1198 data->pwm_temp_map[nr] = reg; 1199 /* 1200 * If we are in automatic mode, write the temp mapping immediately; 1201 * otherwise, just store it for later use. 1202 */ 1203 if (data->pwm_ctrl[nr] & 0x80) { 1204 data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr]; 1205 it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]); 1206 } 1207 mutex_unlock(&data->update_lock); 1208 return count; 1209 } 1210 1211 static ssize_t show_auto_pwm(struct device *dev, 1212 struct device_attribute *attr, char *buf) 1213 { 1214 struct it87_data *data = it87_update_device(dev); 1215 struct sensor_device_attribute_2 *sensor_attr = 1216 to_sensor_dev_attr_2(attr); 1217 int nr = sensor_attr->nr; 1218 int point = sensor_attr->index; 1219 1220 return sprintf(buf, "%d\n", 1221 pwm_from_reg(data, data->auto_pwm[nr][point])); 1222 } 1223 1224 static ssize_t set_auto_pwm(struct device *dev, 1225 struct device_attribute *attr, const char *buf, size_t count) 1226 { 1227 struct it87_data *data = dev_get_drvdata(dev); 1228 struct sensor_device_attribute_2 *sensor_attr = 1229 to_sensor_dev_attr_2(attr); 1230 int nr = sensor_attr->nr; 1231 int point = sensor_attr->index; 1232 long val; 1233 1234 if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255) 1235 return -EINVAL; 1236 1237 mutex_lock(&data->update_lock); 1238 data->auto_pwm[nr][point] = pwm_to_reg(data, val); 1239 it87_write_value(data, IT87_REG_AUTO_PWM(nr, point), 1240 data->auto_pwm[nr][point]); 1241 mutex_unlock(&data->update_lock); 1242 return count; 1243 } 1244 1245 static ssize_t show_auto_temp(struct device *dev, 1246 struct device_attribute *attr, char *buf) 1247 { 1248 struct it87_data *data = it87_update_device(dev); 1249 struct sensor_device_attribute_2 *sensor_attr = 1250 to_sensor_dev_attr_2(attr); 1251 int nr = sensor_attr->nr; 1252 int point = sensor_attr->index; 1253 1254 return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point])); 1255 } 1256 1257 static ssize_t set_auto_temp(struct device *dev, 1258 struct device_attribute *attr, const char *buf, size_t count) 1259 { 1260 struct it87_data *data = dev_get_drvdata(dev); 1261 struct sensor_device_attribute_2 *sensor_attr = 1262 to_sensor_dev_attr_2(attr); 1263 int nr = sensor_attr->nr; 1264 int point = sensor_attr->index; 1265 long val; 1266 1267 if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000) 1268 return -EINVAL; 1269 1270 mutex_lock(&data->update_lock); 1271 data->auto_temp[nr][point] = TEMP_TO_REG(val); 1272 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), 1273 data->auto_temp[nr][point]); 1274 mutex_unlock(&data->update_lock); 1275 return count; 1276 } 1277 1278 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0); 1279 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan, 1280 0, 1); 1281 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div, 1282 set_fan_div, 0); 1283 1284 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0); 1285 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan, 1286 1, 1); 1287 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div, 1288 set_fan_div, 1); 1289 1290 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0); 1291 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan, 1292 2, 1); 1293 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div, 1294 set_fan_div, 2); 1295 1296 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0); 1297 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan, 1298 3, 1); 1299 1300 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0); 1301 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan, 1302 4, 1); 1303 1304 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0); 1305 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan, 1306 5, 1); 1307 1308 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, 1309 show_pwm_enable, set_pwm_enable, 0); 1310 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0); 1311 static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq); 1312 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR, 1313 show_pwm_temp_map, set_pwm_temp_map, 0); 1314 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, 1315 show_auto_pwm, set_auto_pwm, 0, 0); 1316 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR, 1317 show_auto_pwm, set_auto_pwm, 0, 1); 1318 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR, 1319 show_auto_pwm, set_auto_pwm, 0, 2); 1320 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO, 1321 show_auto_pwm, NULL, 0, 3); 1322 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR, 1323 show_auto_temp, set_auto_temp, 0, 1); 1324 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, 1325 show_auto_temp, set_auto_temp, 0, 0); 1326 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR, 1327 show_auto_temp, set_auto_temp, 0, 2); 1328 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR, 1329 show_auto_temp, set_auto_temp, 0, 3); 1330 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR, 1331 show_auto_temp, set_auto_temp, 0, 4); 1332 1333 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, 1334 show_pwm_enable, set_pwm_enable, 1); 1335 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1); 1336 static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL); 1337 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR, 1338 show_pwm_temp_map, set_pwm_temp_map, 1); 1339 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, 1340 show_auto_pwm, set_auto_pwm, 1, 0); 1341 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR, 1342 show_auto_pwm, set_auto_pwm, 1, 1); 1343 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR, 1344 show_auto_pwm, set_auto_pwm, 1, 2); 1345 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO, 1346 show_auto_pwm, NULL, 1, 3); 1347 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR, 1348 show_auto_temp, set_auto_temp, 1, 1); 1349 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, 1350 show_auto_temp, set_auto_temp, 1, 0); 1351 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR, 1352 show_auto_temp, set_auto_temp, 1, 2); 1353 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR, 1354 show_auto_temp, set_auto_temp, 1, 3); 1355 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR, 1356 show_auto_temp, set_auto_temp, 1, 4); 1357 1358 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, 1359 show_pwm_enable, set_pwm_enable, 2); 1360 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2); 1361 static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL); 1362 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR, 1363 show_pwm_temp_map, set_pwm_temp_map, 2); 1364 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, 1365 show_auto_pwm, set_auto_pwm, 2, 0); 1366 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR, 1367 show_auto_pwm, set_auto_pwm, 2, 1); 1368 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR, 1369 show_auto_pwm, set_auto_pwm, 2, 2); 1370 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO, 1371 show_auto_pwm, NULL, 2, 3); 1372 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR, 1373 show_auto_temp, set_auto_temp, 2, 1); 1374 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR, 1375 show_auto_temp, set_auto_temp, 2, 0); 1376 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR, 1377 show_auto_temp, set_auto_temp, 2, 2); 1378 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, 1379 show_auto_temp, set_auto_temp, 2, 3); 1380 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR, 1381 show_auto_temp, set_auto_temp, 2, 4); 1382 1383 /* Alarms */ 1384 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, 1385 char *buf) 1386 { 1387 struct it87_data *data = it87_update_device(dev); 1388 return sprintf(buf, "%u\n", data->alarms); 1389 } 1390 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); 1391 1392 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, 1393 char *buf) 1394 { 1395 int bitnr = to_sensor_dev_attr(attr)->index; 1396 struct it87_data *data = it87_update_device(dev); 1397 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1); 1398 } 1399 1400 static ssize_t clear_intrusion(struct device *dev, struct device_attribute 1401 *attr, const char *buf, size_t count) 1402 { 1403 struct it87_data *data = dev_get_drvdata(dev); 1404 long val; 1405 int config; 1406 1407 if (kstrtol(buf, 10, &val) < 0 || val != 0) 1408 return -EINVAL; 1409 1410 mutex_lock(&data->update_lock); 1411 config = it87_read_value(data, IT87_REG_CONFIG); 1412 if (config < 0) { 1413 count = config; 1414 } else { 1415 config |= 1 << 5; 1416 it87_write_value(data, IT87_REG_CONFIG, config); 1417 /* Invalidate cache to force re-read */ 1418 data->valid = 0; 1419 } 1420 mutex_unlock(&data->update_lock); 1421 1422 return count; 1423 } 1424 1425 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8); 1426 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9); 1427 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10); 1428 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11); 1429 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12); 1430 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13); 1431 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14); 1432 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15); 1433 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0); 1434 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1); 1435 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2); 1436 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3); 1437 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6); 1438 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7); 1439 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16); 1440 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17); 1441 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18); 1442 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR, 1443 show_alarm, clear_intrusion, 4); 1444 1445 static ssize_t show_beep(struct device *dev, struct device_attribute *attr, 1446 char *buf) 1447 { 1448 int bitnr = to_sensor_dev_attr(attr)->index; 1449 struct it87_data *data = it87_update_device(dev); 1450 return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1); 1451 } 1452 static ssize_t set_beep(struct device *dev, struct device_attribute *attr, 1453 const char *buf, size_t count) 1454 { 1455 int bitnr = to_sensor_dev_attr(attr)->index; 1456 struct it87_data *data = dev_get_drvdata(dev); 1457 long val; 1458 1459 if (kstrtol(buf, 10, &val) < 0 1460 || (val != 0 && val != 1)) 1461 return -EINVAL; 1462 1463 mutex_lock(&data->update_lock); 1464 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); 1465 if (val) 1466 data->beeps |= (1 << bitnr); 1467 else 1468 data->beeps &= ~(1 << bitnr); 1469 it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps); 1470 mutex_unlock(&data->update_lock); 1471 return count; 1472 } 1473 1474 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR, 1475 show_beep, set_beep, 1); 1476 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1); 1477 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1); 1478 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1); 1479 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1); 1480 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1); 1481 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1); 1482 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1); 1483 /* fanX_beep writability is set later */ 1484 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0); 1485 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0); 1486 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0); 1487 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0); 1488 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0); 1489 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0); 1490 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR, 1491 show_beep, set_beep, 2); 1492 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2); 1493 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2); 1494 1495 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr, 1496 char *buf) 1497 { 1498 struct it87_data *data = dev_get_drvdata(dev); 1499 return sprintf(buf, "%u\n", data->vrm); 1500 } 1501 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr, 1502 const char *buf, size_t count) 1503 { 1504 struct it87_data *data = dev_get_drvdata(dev); 1505 unsigned long val; 1506 1507 if (kstrtoul(buf, 10, &val) < 0) 1508 return -EINVAL; 1509 1510 data->vrm = val; 1511 1512 return count; 1513 } 1514 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); 1515 1516 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr, 1517 char *buf) 1518 { 1519 struct it87_data *data = it87_update_device(dev); 1520 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); 1521 } 1522 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); 1523 1524 static ssize_t show_label(struct device *dev, struct device_attribute *attr, 1525 char *buf) 1526 { 1527 static const char * const labels[] = { 1528 "+5V", 1529 "5VSB", 1530 "Vbat", 1531 }; 1532 static const char * const labels_it8721[] = { 1533 "+3.3V", 1534 "3VSB", 1535 "Vbat", 1536 }; 1537 struct it87_data *data = dev_get_drvdata(dev); 1538 int nr = to_sensor_dev_attr(attr)->index; 1539 const char *label; 1540 1541 if (has_12mv_adc(data) || has_10_9mv_adc(data)) 1542 label = labels_it8721[nr]; 1543 else 1544 label = labels[nr]; 1545 1546 return sprintf(buf, "%s\n", label); 1547 } 1548 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0); 1549 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1); 1550 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2); 1551 /* special AVCC3 IT8603E in9 */ 1552 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0); 1553 1554 static ssize_t show_name(struct device *dev, struct device_attribute 1555 *devattr, char *buf) 1556 { 1557 struct it87_data *data = dev_get_drvdata(dev); 1558 return sprintf(buf, "%s\n", data->name); 1559 } 1560 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); 1561 1562 static struct attribute *it87_attributes_in[10][5] = { 1563 { 1564 &sensor_dev_attr_in0_input.dev_attr.attr, 1565 &sensor_dev_attr_in0_min.dev_attr.attr, 1566 &sensor_dev_attr_in0_max.dev_attr.attr, 1567 &sensor_dev_attr_in0_alarm.dev_attr.attr, 1568 NULL 1569 }, { 1570 &sensor_dev_attr_in1_input.dev_attr.attr, 1571 &sensor_dev_attr_in1_min.dev_attr.attr, 1572 &sensor_dev_attr_in1_max.dev_attr.attr, 1573 &sensor_dev_attr_in1_alarm.dev_attr.attr, 1574 NULL 1575 }, { 1576 &sensor_dev_attr_in2_input.dev_attr.attr, 1577 &sensor_dev_attr_in2_min.dev_attr.attr, 1578 &sensor_dev_attr_in2_max.dev_attr.attr, 1579 &sensor_dev_attr_in2_alarm.dev_attr.attr, 1580 NULL 1581 }, { 1582 &sensor_dev_attr_in3_input.dev_attr.attr, 1583 &sensor_dev_attr_in3_min.dev_attr.attr, 1584 &sensor_dev_attr_in3_max.dev_attr.attr, 1585 &sensor_dev_attr_in3_alarm.dev_attr.attr, 1586 NULL 1587 }, { 1588 &sensor_dev_attr_in4_input.dev_attr.attr, 1589 &sensor_dev_attr_in4_min.dev_attr.attr, 1590 &sensor_dev_attr_in4_max.dev_attr.attr, 1591 &sensor_dev_attr_in4_alarm.dev_attr.attr, 1592 NULL 1593 }, { 1594 &sensor_dev_attr_in5_input.dev_attr.attr, 1595 &sensor_dev_attr_in5_min.dev_attr.attr, 1596 &sensor_dev_attr_in5_max.dev_attr.attr, 1597 &sensor_dev_attr_in5_alarm.dev_attr.attr, 1598 NULL 1599 }, { 1600 &sensor_dev_attr_in6_input.dev_attr.attr, 1601 &sensor_dev_attr_in6_min.dev_attr.attr, 1602 &sensor_dev_attr_in6_max.dev_attr.attr, 1603 &sensor_dev_attr_in6_alarm.dev_attr.attr, 1604 NULL 1605 }, { 1606 &sensor_dev_attr_in7_input.dev_attr.attr, 1607 &sensor_dev_attr_in7_min.dev_attr.attr, 1608 &sensor_dev_attr_in7_max.dev_attr.attr, 1609 &sensor_dev_attr_in7_alarm.dev_attr.attr, 1610 NULL 1611 }, { 1612 &sensor_dev_attr_in8_input.dev_attr.attr, 1613 NULL 1614 }, { 1615 &sensor_dev_attr_in9_input.dev_attr.attr, 1616 NULL 1617 } }; 1618 1619 static const struct attribute_group it87_group_in[10] = { 1620 { .attrs = it87_attributes_in[0] }, 1621 { .attrs = it87_attributes_in[1] }, 1622 { .attrs = it87_attributes_in[2] }, 1623 { .attrs = it87_attributes_in[3] }, 1624 { .attrs = it87_attributes_in[4] }, 1625 { .attrs = it87_attributes_in[5] }, 1626 { .attrs = it87_attributes_in[6] }, 1627 { .attrs = it87_attributes_in[7] }, 1628 { .attrs = it87_attributes_in[8] }, 1629 { .attrs = it87_attributes_in[9] }, 1630 }; 1631 1632 static struct attribute *it87_attributes_temp[3][6] = { 1633 { 1634 &sensor_dev_attr_temp1_input.dev_attr.attr, 1635 &sensor_dev_attr_temp1_max.dev_attr.attr, 1636 &sensor_dev_attr_temp1_min.dev_attr.attr, 1637 &sensor_dev_attr_temp1_type.dev_attr.attr, 1638 &sensor_dev_attr_temp1_alarm.dev_attr.attr, 1639 NULL 1640 } , { 1641 &sensor_dev_attr_temp2_input.dev_attr.attr, 1642 &sensor_dev_attr_temp2_max.dev_attr.attr, 1643 &sensor_dev_attr_temp2_min.dev_attr.attr, 1644 &sensor_dev_attr_temp2_type.dev_attr.attr, 1645 &sensor_dev_attr_temp2_alarm.dev_attr.attr, 1646 NULL 1647 } , { 1648 &sensor_dev_attr_temp3_input.dev_attr.attr, 1649 &sensor_dev_attr_temp3_max.dev_attr.attr, 1650 &sensor_dev_attr_temp3_min.dev_attr.attr, 1651 &sensor_dev_attr_temp3_type.dev_attr.attr, 1652 &sensor_dev_attr_temp3_alarm.dev_attr.attr, 1653 NULL 1654 } }; 1655 1656 static const struct attribute_group it87_group_temp[3] = { 1657 { .attrs = it87_attributes_temp[0] }, 1658 { .attrs = it87_attributes_temp[1] }, 1659 { .attrs = it87_attributes_temp[2] }, 1660 }; 1661 1662 static struct attribute *it87_attributes_temp_offset[] = { 1663 &sensor_dev_attr_temp1_offset.dev_attr.attr, 1664 &sensor_dev_attr_temp2_offset.dev_attr.attr, 1665 &sensor_dev_attr_temp3_offset.dev_attr.attr, 1666 }; 1667 1668 static struct attribute *it87_attributes[] = { 1669 &dev_attr_alarms.attr, 1670 &sensor_dev_attr_intrusion0_alarm.dev_attr.attr, 1671 &dev_attr_name.attr, 1672 NULL 1673 }; 1674 1675 static const struct attribute_group it87_group = { 1676 .attrs = it87_attributes, 1677 }; 1678 1679 static struct attribute *it87_attributes_in_beep[] = { 1680 &sensor_dev_attr_in0_beep.dev_attr.attr, 1681 &sensor_dev_attr_in1_beep.dev_attr.attr, 1682 &sensor_dev_attr_in2_beep.dev_attr.attr, 1683 &sensor_dev_attr_in3_beep.dev_attr.attr, 1684 &sensor_dev_attr_in4_beep.dev_attr.attr, 1685 &sensor_dev_attr_in5_beep.dev_attr.attr, 1686 &sensor_dev_attr_in6_beep.dev_attr.attr, 1687 &sensor_dev_attr_in7_beep.dev_attr.attr, 1688 NULL, 1689 NULL, 1690 }; 1691 1692 static struct attribute *it87_attributes_temp_beep[] = { 1693 &sensor_dev_attr_temp1_beep.dev_attr.attr, 1694 &sensor_dev_attr_temp2_beep.dev_attr.attr, 1695 &sensor_dev_attr_temp3_beep.dev_attr.attr, 1696 }; 1697 1698 static struct attribute *it87_attributes_fan[6][3+1] = { { 1699 &sensor_dev_attr_fan1_input.dev_attr.attr, 1700 &sensor_dev_attr_fan1_min.dev_attr.attr, 1701 &sensor_dev_attr_fan1_alarm.dev_attr.attr, 1702 NULL 1703 }, { 1704 &sensor_dev_attr_fan2_input.dev_attr.attr, 1705 &sensor_dev_attr_fan2_min.dev_attr.attr, 1706 &sensor_dev_attr_fan2_alarm.dev_attr.attr, 1707 NULL 1708 }, { 1709 &sensor_dev_attr_fan3_input.dev_attr.attr, 1710 &sensor_dev_attr_fan3_min.dev_attr.attr, 1711 &sensor_dev_attr_fan3_alarm.dev_attr.attr, 1712 NULL 1713 }, { 1714 &sensor_dev_attr_fan4_input.dev_attr.attr, 1715 &sensor_dev_attr_fan4_min.dev_attr.attr, 1716 &sensor_dev_attr_fan4_alarm.dev_attr.attr, 1717 NULL 1718 }, { 1719 &sensor_dev_attr_fan5_input.dev_attr.attr, 1720 &sensor_dev_attr_fan5_min.dev_attr.attr, 1721 &sensor_dev_attr_fan5_alarm.dev_attr.attr, 1722 NULL 1723 }, { 1724 &sensor_dev_attr_fan6_input.dev_attr.attr, 1725 &sensor_dev_attr_fan6_min.dev_attr.attr, 1726 &sensor_dev_attr_fan6_alarm.dev_attr.attr, 1727 NULL 1728 } }; 1729 1730 static const struct attribute_group it87_group_fan[6] = { 1731 { .attrs = it87_attributes_fan[0] }, 1732 { .attrs = it87_attributes_fan[1] }, 1733 { .attrs = it87_attributes_fan[2] }, 1734 { .attrs = it87_attributes_fan[3] }, 1735 { .attrs = it87_attributes_fan[4] }, 1736 { .attrs = it87_attributes_fan[5] }, 1737 }; 1738 1739 static const struct attribute *it87_attributes_fan_div[] = { 1740 &sensor_dev_attr_fan1_div.dev_attr.attr, 1741 &sensor_dev_attr_fan2_div.dev_attr.attr, 1742 &sensor_dev_attr_fan3_div.dev_attr.attr, 1743 }; 1744 1745 static struct attribute *it87_attributes_pwm[3][4+1] = { { 1746 &sensor_dev_attr_pwm1_enable.dev_attr.attr, 1747 &sensor_dev_attr_pwm1.dev_attr.attr, 1748 &dev_attr_pwm1_freq.attr, 1749 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr, 1750 NULL 1751 }, { 1752 &sensor_dev_attr_pwm2_enable.dev_attr.attr, 1753 &sensor_dev_attr_pwm2.dev_attr.attr, 1754 &dev_attr_pwm2_freq.attr, 1755 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr, 1756 NULL 1757 }, { 1758 &sensor_dev_attr_pwm3_enable.dev_attr.attr, 1759 &sensor_dev_attr_pwm3.dev_attr.attr, 1760 &dev_attr_pwm3_freq.attr, 1761 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr, 1762 NULL 1763 } }; 1764 1765 static const struct attribute_group it87_group_pwm[3] = { 1766 { .attrs = it87_attributes_pwm[0] }, 1767 { .attrs = it87_attributes_pwm[1] }, 1768 { .attrs = it87_attributes_pwm[2] }, 1769 }; 1770 1771 static struct attribute *it87_attributes_autopwm[3][9+1] = { { 1772 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, 1773 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, 1774 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr, 1775 &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr, 1776 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, 1777 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr, 1778 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, 1779 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, 1780 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr, 1781 NULL 1782 }, { 1783 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, 1784 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, 1785 &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr, 1786 &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr, 1787 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr, 1788 &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr, 1789 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr, 1790 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr, 1791 &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr, 1792 NULL 1793 }, { 1794 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, 1795 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, 1796 &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr, 1797 &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr, 1798 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr, 1799 &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr, 1800 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr, 1801 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr, 1802 &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr, 1803 NULL 1804 } }; 1805 1806 static const struct attribute_group it87_group_autopwm[3] = { 1807 { .attrs = it87_attributes_autopwm[0] }, 1808 { .attrs = it87_attributes_autopwm[1] }, 1809 { .attrs = it87_attributes_autopwm[2] }, 1810 }; 1811 1812 static struct attribute *it87_attributes_fan_beep[] = { 1813 &sensor_dev_attr_fan1_beep.dev_attr.attr, 1814 &sensor_dev_attr_fan2_beep.dev_attr.attr, 1815 &sensor_dev_attr_fan3_beep.dev_attr.attr, 1816 &sensor_dev_attr_fan4_beep.dev_attr.attr, 1817 &sensor_dev_attr_fan5_beep.dev_attr.attr, 1818 &sensor_dev_attr_fan6_beep.dev_attr.attr, 1819 }; 1820 1821 static struct attribute *it87_attributes_vid[] = { 1822 &dev_attr_vrm.attr, 1823 &dev_attr_cpu0_vid.attr, 1824 NULL 1825 }; 1826 1827 static const struct attribute_group it87_group_vid = { 1828 .attrs = it87_attributes_vid, 1829 }; 1830 1831 static struct attribute *it87_attributes_label[] = { 1832 &sensor_dev_attr_in3_label.dev_attr.attr, 1833 &sensor_dev_attr_in7_label.dev_attr.attr, 1834 &sensor_dev_attr_in8_label.dev_attr.attr, 1835 &sensor_dev_attr_in9_label.dev_attr.attr, 1836 NULL 1837 }; 1838 1839 static const struct attribute_group it87_group_label = { 1840 .attrs = it87_attributes_label, 1841 }; 1842 1843 /* SuperIO detection - will change isa_address if a chip is found */ 1844 static int __init it87_find(unsigned short *address, 1845 struct it87_sio_data *sio_data) 1846 { 1847 int err; 1848 u16 chip_type; 1849 const char *board_vendor, *board_name; 1850 const struct it87_devices *config; 1851 1852 err = superio_enter(); 1853 if (err) 1854 return err; 1855 1856 err = -ENODEV; 1857 chip_type = force_id ? force_id : superio_inw(DEVID); 1858 1859 switch (chip_type) { 1860 case IT8705F_DEVID: 1861 sio_data->type = it87; 1862 break; 1863 case IT8712F_DEVID: 1864 sio_data->type = it8712; 1865 break; 1866 case IT8716F_DEVID: 1867 case IT8726F_DEVID: 1868 sio_data->type = it8716; 1869 break; 1870 case IT8718F_DEVID: 1871 sio_data->type = it8718; 1872 break; 1873 case IT8720F_DEVID: 1874 sio_data->type = it8720; 1875 break; 1876 case IT8721F_DEVID: 1877 sio_data->type = it8721; 1878 break; 1879 case IT8728F_DEVID: 1880 sio_data->type = it8728; 1881 break; 1882 case IT8732F_DEVID: 1883 sio_data->type = it8732; 1884 break; 1885 case IT8771E_DEVID: 1886 sio_data->type = it8771; 1887 break; 1888 case IT8772E_DEVID: 1889 sio_data->type = it8772; 1890 break; 1891 case IT8781F_DEVID: 1892 sio_data->type = it8781; 1893 break; 1894 case IT8782F_DEVID: 1895 sio_data->type = it8782; 1896 break; 1897 case IT8783E_DEVID: 1898 sio_data->type = it8783; 1899 break; 1900 case IT8786E_DEVID: 1901 sio_data->type = it8786; 1902 break; 1903 case IT8790E_DEVID: 1904 sio_data->type = it8790; 1905 break; 1906 case IT8603E_DEVID: 1907 case IT8623E_DEVID: 1908 sio_data->type = it8603; 1909 break; 1910 case IT8620E_DEVID: 1911 sio_data->type = it8620; 1912 break; 1913 case 0xffff: /* No device at all */ 1914 goto exit; 1915 default: 1916 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type); 1917 goto exit; 1918 } 1919 1920 superio_select(PME); 1921 if (!(superio_inb(IT87_ACT_REG) & 0x01)) { 1922 pr_info("Device not activated, skipping\n"); 1923 goto exit; 1924 } 1925 1926 *address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1); 1927 if (*address == 0) { 1928 pr_info("Base address not set, skipping\n"); 1929 goto exit; 1930 } 1931 1932 err = 0; 1933 sio_data->revision = superio_inb(DEVREV) & 0x0f; 1934 pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type, 1935 it87_devices[sio_data->type].suffix, 1936 *address, sio_data->revision); 1937 1938 config = &it87_devices[sio_data->type]; 1939 1940 /* in7 (VSB or VCCH5V) is always internal on some chips */ 1941 if (has_in7_internal(config)) 1942 sio_data->internal |= (1 << 1); 1943 1944 /* in8 (Vbat) is always internal */ 1945 sio_data->internal |= (1 << 2); 1946 1947 /* Only the IT8603E has in9 */ 1948 if (sio_data->type != it8603) 1949 sio_data->skip_in |= (1 << 9); 1950 1951 if (!has_vid(config)) 1952 sio_data->skip_vid = 1; 1953 1954 /* Read GPIO config and VID value from LDN 7 (GPIO) */ 1955 if (sio_data->type == it87) { 1956 /* The IT8705F has a different LD number for GPIO */ 1957 superio_select(5); 1958 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; 1959 } else if (sio_data->type == it8783) { 1960 int reg25, reg27, reg2a, reg2c, regef; 1961 1962 superio_select(GPIO); 1963 1964 reg25 = superio_inb(IT87_SIO_GPIO1_REG); 1965 reg27 = superio_inb(IT87_SIO_GPIO3_REG); 1966 reg2a = superio_inb(IT87_SIO_PINX1_REG); 1967 reg2c = superio_inb(IT87_SIO_PINX2_REG); 1968 regef = superio_inb(IT87_SIO_SPI_REG); 1969 1970 /* Check if fan3 is there or not */ 1971 if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2))) 1972 sio_data->skip_fan |= (1 << 2); 1973 if ((reg25 & (1 << 4)) 1974 || (!(reg2a & (1 << 1)) && (regef & (1 << 0)))) 1975 sio_data->skip_pwm |= (1 << 2); 1976 1977 /* Check if fan2 is there or not */ 1978 if (reg27 & (1 << 7)) 1979 sio_data->skip_fan |= (1 << 1); 1980 if (reg27 & (1 << 3)) 1981 sio_data->skip_pwm |= (1 << 1); 1982 1983 /* VIN5 */ 1984 if ((reg27 & (1 << 0)) || (reg2c & (1 << 2))) 1985 sio_data->skip_in |= (1 << 5); /* No VIN5 */ 1986 1987 /* VIN6 */ 1988 if (reg27 & (1 << 1)) 1989 sio_data->skip_in |= (1 << 6); /* No VIN6 */ 1990 1991 /* 1992 * VIN7 1993 * Does not depend on bit 2 of Reg2C, contrary to datasheet. 1994 */ 1995 if (reg27 & (1 << 2)) { 1996 /* 1997 * The data sheet is a bit unclear regarding the 1998 * internal voltage divider for VCCH5V. It says 1999 * "This bit enables and switches VIN7 (pin 91) to the 2000 * internal voltage divider for VCCH5V". 2001 * This is different to other chips, where the internal 2002 * voltage divider would connect VIN7 to an internal 2003 * voltage source. Maybe that is the case here as well. 2004 * 2005 * Since we don't know for sure, re-route it if that is 2006 * not the case, and ask the user to report if the 2007 * resulting voltage is sane. 2008 */ 2009 if (!(reg2c & (1 << 1))) { 2010 reg2c |= (1 << 1); 2011 superio_outb(IT87_SIO_PINX2_REG, reg2c); 2012 pr_notice("Routing internal VCCH5V to in7.\n"); 2013 } 2014 pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n"); 2015 pr_notice("Please report if it displays a reasonable voltage.\n"); 2016 } 2017 2018 if (reg2c & (1 << 0)) 2019 sio_data->internal |= (1 << 0); 2020 if (reg2c & (1 << 1)) 2021 sio_data->internal |= (1 << 1); 2022 2023 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; 2024 } else if (sio_data->type == it8603) { 2025 int reg27, reg29; 2026 2027 superio_select(GPIO); 2028 2029 reg27 = superio_inb(IT87_SIO_GPIO3_REG); 2030 2031 /* Check if fan3 is there or not */ 2032 if (reg27 & (1 << 6)) 2033 sio_data->skip_pwm |= (1 << 2); 2034 if (reg27 & (1 << 7)) 2035 sio_data->skip_fan |= (1 << 2); 2036 2037 /* Check if fan2 is there or not */ 2038 reg29 = superio_inb(IT87_SIO_GPIO5_REG); 2039 if (reg29 & (1 << 1)) 2040 sio_data->skip_pwm |= (1 << 1); 2041 if (reg29 & (1 << 2)) 2042 sio_data->skip_fan |= (1 << 1); 2043 2044 sio_data->skip_in |= (1 << 5); /* No VIN5 */ 2045 sio_data->skip_in |= (1 << 6); /* No VIN6 */ 2046 2047 sio_data->internal |= (1 << 3); /* in9 is AVCC */ 2048 2049 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; 2050 } else if (sio_data->type == it8620) { 2051 int reg; 2052 2053 superio_select(GPIO); 2054 2055 /* Check for fan4, fan5 */ 2056 reg = superio_inb(IT87_SIO_GPIO2_REG); 2057 if (!(reg & (1 << 5))) 2058 sio_data->skip_fan |= (1 << 3); 2059 if (!(reg & (1 << 4))) 2060 sio_data->skip_fan |= (1 << 4); 2061 2062 /* Check for pwm3, fan3 */ 2063 reg = superio_inb(IT87_SIO_GPIO3_REG); 2064 if (reg & (1 << 6)) 2065 sio_data->skip_pwm |= (1 << 2); 2066 if (reg & (1 << 7)) 2067 sio_data->skip_fan |= (1 << 2); 2068 2069 /* Check for pwm2, fan2 */ 2070 reg = superio_inb(IT87_SIO_GPIO5_REG); 2071 if (reg & (1 << 1)) 2072 sio_data->skip_pwm |= (1 << 1); 2073 if (reg & (1 << 2)) 2074 sio_data->skip_fan |= (1 << 1); 2075 2076 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; 2077 } else { 2078 int reg; 2079 bool uart6; 2080 2081 superio_select(GPIO); 2082 2083 reg = superio_inb(IT87_SIO_GPIO3_REG); 2084 if (!sio_data->skip_vid) { 2085 /* We need at least 4 VID pins */ 2086 if (reg & 0x0f) { 2087 pr_info("VID is disabled (pins used for GPIO)\n"); 2088 sio_data->skip_vid = 1; 2089 } 2090 } 2091 2092 /* Check if fan3 is there or not */ 2093 if (reg & (1 << 6)) 2094 sio_data->skip_pwm |= (1 << 2); 2095 if (reg & (1 << 7)) 2096 sio_data->skip_fan |= (1 << 2); 2097 2098 /* Check if fan2 is there or not */ 2099 reg = superio_inb(IT87_SIO_GPIO5_REG); 2100 if (reg & (1 << 1)) 2101 sio_data->skip_pwm |= (1 << 1); 2102 if (reg & (1 << 2)) 2103 sio_data->skip_fan |= (1 << 1); 2104 2105 if ((sio_data->type == it8718 || sio_data->type == it8720) 2106 && !(sio_data->skip_vid)) 2107 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); 2108 2109 reg = superio_inb(IT87_SIO_PINX2_REG); 2110 2111 uart6 = sio_data->type == it8782 && (reg & (1 << 2)); 2112 2113 /* 2114 * The IT8720F has no VIN7 pin, so VCCH should always be 2115 * routed internally to VIN7 with an internal divider. 2116 * Curiously, there still is a configuration bit to control 2117 * this, which means it can be set incorrectly. And even 2118 * more curiously, many boards out there are improperly 2119 * configured, even though the IT8720F datasheet claims 2120 * that the internal routing of VCCH to VIN7 is the default 2121 * setting. So we force the internal routing in this case. 2122 * 2123 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins. 2124 * If UART6 is enabled, re-route VIN7 to the internal divider 2125 * if that is not already the case. 2126 */ 2127 if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) { 2128 reg |= (1 << 1); 2129 superio_outb(IT87_SIO_PINX2_REG, reg); 2130 pr_notice("Routing internal VCCH to in7\n"); 2131 } 2132 if (reg & (1 << 0)) 2133 sio_data->internal |= (1 << 0); 2134 if (reg & (1 << 1)) 2135 sio_data->internal |= (1 << 1); 2136 2137 /* 2138 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7. 2139 * While VIN7 can be routed to the internal voltage divider, 2140 * VIN5 and VIN6 are not available if UART6 is enabled. 2141 * 2142 * Also, temp3 is not available if UART6 is enabled and TEMPIN3 2143 * is the temperature source. Since we can not read the 2144 * temperature source here, skip_temp is preliminary. 2145 */ 2146 if (uart6) { 2147 sio_data->skip_in |= (1 << 5) | (1 << 6); 2148 sio_data->skip_temp |= (1 << 2); 2149 } 2150 2151 sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f; 2152 } 2153 if (sio_data->beep_pin) 2154 pr_info("Beeping is supported\n"); 2155 2156 /* Disable specific features based on DMI strings */ 2157 board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR); 2158 board_name = dmi_get_system_info(DMI_BOARD_NAME); 2159 if (board_vendor && board_name) { 2160 if (strcmp(board_vendor, "nVIDIA") == 0 2161 && strcmp(board_name, "FN68PT") == 0) { 2162 /* 2163 * On the Shuttle SN68PT, FAN_CTL2 is apparently not 2164 * connected to a fan, but to something else. One user 2165 * has reported instant system power-off when changing 2166 * the PWM2 duty cycle, so we disable it. 2167 * I use the board name string as the trigger in case 2168 * the same board is ever used in other systems. 2169 */ 2170 pr_info("Disabling pwm2 due to hardware constraints\n"); 2171 sio_data->skip_pwm = (1 << 1); 2172 } 2173 } 2174 2175 exit: 2176 superio_exit(); 2177 return err; 2178 } 2179 2180 static void it87_remove_files(struct device *dev) 2181 { 2182 struct it87_data *data = platform_get_drvdata(pdev); 2183 struct it87_sio_data *sio_data = dev_get_platdata(dev); 2184 int i; 2185 2186 sysfs_remove_group(&dev->kobj, &it87_group); 2187 for (i = 0; i < 10; i++) { 2188 if (sio_data->skip_in & (1 << i)) 2189 continue; 2190 sysfs_remove_group(&dev->kobj, &it87_group_in[i]); 2191 if (it87_attributes_in_beep[i]) 2192 sysfs_remove_file(&dev->kobj, 2193 it87_attributes_in_beep[i]); 2194 } 2195 for (i = 0; i < 3; i++) { 2196 if (!(data->has_temp & (1 << i))) 2197 continue; 2198 sysfs_remove_group(&dev->kobj, &it87_group_temp[i]); 2199 if (has_temp_offset(data)) 2200 sysfs_remove_file(&dev->kobj, 2201 it87_attributes_temp_offset[i]); 2202 if (sio_data->beep_pin) 2203 sysfs_remove_file(&dev->kobj, 2204 it87_attributes_temp_beep[i]); 2205 } 2206 for (i = 0; i < 6; i++) { 2207 if (!(data->has_fan & (1 << i))) 2208 continue; 2209 sysfs_remove_group(&dev->kobj, &it87_group_fan[i]); 2210 if (sio_data->beep_pin) 2211 sysfs_remove_file(&dev->kobj, 2212 it87_attributes_fan_beep[i]); 2213 if (i < 3 && !has_16bit_fans(data)) 2214 sysfs_remove_file(&dev->kobj, 2215 it87_attributes_fan_div[i]); 2216 } 2217 for (i = 0; i < 3; i++) { 2218 if (sio_data->skip_pwm & (1 << i)) 2219 continue; 2220 sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]); 2221 if (has_old_autopwm(data)) 2222 sysfs_remove_group(&dev->kobj, 2223 &it87_group_autopwm[i]); 2224 } 2225 if (!sio_data->skip_vid) 2226 sysfs_remove_group(&dev->kobj, &it87_group_vid); 2227 sysfs_remove_group(&dev->kobj, &it87_group_label); 2228 } 2229 2230 static int it87_probe(struct platform_device *pdev) 2231 { 2232 struct it87_data *data; 2233 struct resource *res; 2234 struct device *dev = &pdev->dev; 2235 struct it87_sio_data *sio_data = dev_get_platdata(dev); 2236 int err = 0, i; 2237 int enable_pwm_interface; 2238 int fan_beep_need_rw; 2239 2240 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 2241 if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT, 2242 DRVNAME)) { 2243 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", 2244 (unsigned long)res->start, 2245 (unsigned long)(res->start + IT87_EC_EXTENT - 1)); 2246 return -EBUSY; 2247 } 2248 2249 data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL); 2250 if (!data) 2251 return -ENOMEM; 2252 2253 data->addr = res->start; 2254 data->type = sio_data->type; 2255 data->features = it87_devices[sio_data->type].features; 2256 data->peci_mask = it87_devices[sio_data->type].peci_mask; 2257 data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask; 2258 data->name = it87_devices[sio_data->type].name; 2259 /* 2260 * IT8705F Datasheet 0.4.1, 3h == Version G. 2261 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J. 2262 * These are the first revisions with 16-bit tachometer support. 2263 */ 2264 switch (data->type) { 2265 case it87: 2266 if (sio_data->revision >= 0x03) { 2267 data->features &= ~FEAT_OLD_AUTOPWM; 2268 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS; 2269 } 2270 break; 2271 case it8712: 2272 if (sio_data->revision >= 0x08) { 2273 data->features &= ~FEAT_OLD_AUTOPWM; 2274 data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS | 2275 FEAT_FIVE_FANS; 2276 } 2277 break; 2278 default: 2279 break; 2280 } 2281 2282 /* Now, we do the remaining detection. */ 2283 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) 2284 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) 2285 return -ENODEV; 2286 2287 platform_set_drvdata(pdev, data); 2288 2289 mutex_init(&data->update_lock); 2290 2291 /* Check PWM configuration */ 2292 enable_pwm_interface = it87_check_pwm(dev); 2293 2294 /* Starting with IT8721F, we handle scaling of internal voltages */ 2295 if (has_12mv_adc(data)) { 2296 if (sio_data->internal & (1 << 0)) 2297 data->in_scaled |= (1 << 3); /* in3 is AVCC */ 2298 if (sio_data->internal & (1 << 1)) 2299 data->in_scaled |= (1 << 7); /* in7 is VSB */ 2300 if (sio_data->internal & (1 << 2)) 2301 data->in_scaled |= (1 << 8); /* in8 is Vbat */ 2302 if (sio_data->internal & (1 << 3)) 2303 data->in_scaled |= (1 << 9); /* in9 is AVCC */ 2304 } else if (sio_data->type == it8781 || sio_data->type == it8782 || 2305 sio_data->type == it8783) { 2306 if (sio_data->internal & (1 << 0)) 2307 data->in_scaled |= (1 << 3); /* in3 is VCC5V */ 2308 if (sio_data->internal & (1 << 1)) 2309 data->in_scaled |= (1 << 7); /* in7 is VCCH5V */ 2310 } 2311 2312 data->has_temp = 0x07; 2313 if (sio_data->skip_temp & (1 << 2)) { 2314 if (sio_data->type == it8782 2315 && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80)) 2316 data->has_temp &= ~(1 << 2); 2317 } 2318 2319 /* Initialize the IT87 chip */ 2320 it87_init_device(pdev); 2321 2322 /* Register sysfs hooks */ 2323 err = sysfs_create_group(&dev->kobj, &it87_group); 2324 if (err) 2325 return err; 2326 2327 for (i = 0; i < 10; i++) { 2328 if (sio_data->skip_in & (1 << i)) 2329 continue; 2330 err = sysfs_create_group(&dev->kobj, &it87_group_in[i]); 2331 if (err) 2332 goto error; 2333 if (sio_data->beep_pin && it87_attributes_in_beep[i]) { 2334 err = sysfs_create_file(&dev->kobj, 2335 it87_attributes_in_beep[i]); 2336 if (err) 2337 goto error; 2338 } 2339 } 2340 2341 for (i = 0; i < 3; i++) { 2342 if (!(data->has_temp & (1 << i))) 2343 continue; 2344 err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]); 2345 if (err) 2346 goto error; 2347 if (has_temp_offset(data)) { 2348 err = sysfs_create_file(&dev->kobj, 2349 it87_attributes_temp_offset[i]); 2350 if (err) 2351 goto error; 2352 } 2353 if (sio_data->beep_pin) { 2354 err = sysfs_create_file(&dev->kobj, 2355 it87_attributes_temp_beep[i]); 2356 if (err) 2357 goto error; 2358 } 2359 } 2360 2361 /* Do not create fan files for disabled fans */ 2362 fan_beep_need_rw = 1; 2363 for (i = 0; i < 6; i++) { 2364 if (!(data->has_fan & (1 << i))) 2365 continue; 2366 err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]); 2367 if (err) 2368 goto error; 2369 2370 if (i < 3 && !has_16bit_fans(data)) { 2371 err = sysfs_create_file(&dev->kobj, 2372 it87_attributes_fan_div[i]); 2373 if (err) 2374 goto error; 2375 } 2376 2377 if (sio_data->beep_pin) { 2378 err = sysfs_create_file(&dev->kobj, 2379 it87_attributes_fan_beep[i]); 2380 if (err) 2381 goto error; 2382 if (!fan_beep_need_rw) 2383 continue; 2384 2385 /* 2386 * As we have a single beep enable bit for all fans, 2387 * only the first enabled fan has a writable attribute 2388 * for it. 2389 */ 2390 if (sysfs_chmod_file(&dev->kobj, 2391 it87_attributes_fan_beep[i], 2392 S_IRUGO | S_IWUSR)) 2393 dev_dbg(dev, "chmod +w fan%d_beep failed\n", 2394 i + 1); 2395 fan_beep_need_rw = 0; 2396 } 2397 } 2398 2399 if (enable_pwm_interface) { 2400 for (i = 0; i < 3; i++) { 2401 if (sio_data->skip_pwm & (1 << i)) 2402 continue; 2403 err = sysfs_create_group(&dev->kobj, 2404 &it87_group_pwm[i]); 2405 if (err) 2406 goto error; 2407 2408 if (!has_old_autopwm(data)) 2409 continue; 2410 err = sysfs_create_group(&dev->kobj, 2411 &it87_group_autopwm[i]); 2412 if (err) 2413 goto error; 2414 } 2415 } 2416 2417 if (!sio_data->skip_vid) { 2418 data->vrm = vid_which_vrm(); 2419 /* VID reading from Super-I/O config space if available */ 2420 data->vid = sio_data->vid_value; 2421 err = sysfs_create_group(&dev->kobj, &it87_group_vid); 2422 if (err) 2423 goto error; 2424 } 2425 2426 /* Export labels for internal sensors */ 2427 for (i = 0; i < 4; i++) { 2428 if (!(sio_data->internal & (1 << i))) 2429 continue; 2430 err = sysfs_create_file(&dev->kobj, 2431 it87_attributes_label[i]); 2432 if (err) 2433 goto error; 2434 } 2435 2436 data->hwmon_dev = hwmon_device_register(dev); 2437 if (IS_ERR(data->hwmon_dev)) { 2438 err = PTR_ERR(data->hwmon_dev); 2439 goto error; 2440 } 2441 2442 return 0; 2443 2444 error: 2445 it87_remove_files(dev); 2446 return err; 2447 } 2448 2449 static int it87_remove(struct platform_device *pdev) 2450 { 2451 struct it87_data *data = platform_get_drvdata(pdev); 2452 2453 hwmon_device_unregister(data->hwmon_dev); 2454 it87_remove_files(&pdev->dev); 2455 2456 return 0; 2457 } 2458 2459 /* 2460 * Must be called with data->update_lock held, except during initialization. 2461 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, 2462 * would slow down the IT87 access and should not be necessary. 2463 */ 2464 static int it87_read_value(struct it87_data *data, u8 reg) 2465 { 2466 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); 2467 return inb_p(data->addr + IT87_DATA_REG_OFFSET); 2468 } 2469 2470 /* 2471 * Must be called with data->update_lock held, except during initialization. 2472 * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, 2473 * would slow down the IT87 access and should not be necessary. 2474 */ 2475 static void it87_write_value(struct it87_data *data, u8 reg, u8 value) 2476 { 2477 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET); 2478 outb_p(value, data->addr + IT87_DATA_REG_OFFSET); 2479 } 2480 2481 /* Return 1 if and only if the PWM interface is safe to use */ 2482 static int it87_check_pwm(struct device *dev) 2483 { 2484 struct it87_data *data = dev_get_drvdata(dev); 2485 /* 2486 * Some BIOSes fail to correctly configure the IT87 fans. All fans off 2487 * and polarity set to active low is sign that this is the case so we 2488 * disable pwm control to protect the user. 2489 */ 2490 int tmp = it87_read_value(data, IT87_REG_FAN_CTL); 2491 if ((tmp & 0x87) == 0) { 2492 if (fix_pwm_polarity) { 2493 /* 2494 * The user asks us to attempt a chip reconfiguration. 2495 * This means switching to active high polarity and 2496 * inverting all fan speed values. 2497 */ 2498 int i; 2499 u8 pwm[3]; 2500 2501 for (i = 0; i < 3; i++) 2502 pwm[i] = it87_read_value(data, 2503 IT87_REG_PWM(i)); 2504 2505 /* 2506 * If any fan is in automatic pwm mode, the polarity 2507 * might be correct, as suspicious as it seems, so we 2508 * better don't change anything (but still disable the 2509 * PWM interface). 2510 */ 2511 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) { 2512 dev_info(dev, 2513 "Reconfiguring PWM to active high polarity\n"); 2514 it87_write_value(data, IT87_REG_FAN_CTL, 2515 tmp | 0x87); 2516 for (i = 0; i < 3; i++) 2517 it87_write_value(data, 2518 IT87_REG_PWM(i), 2519 0x7f & ~pwm[i]); 2520 return 1; 2521 } 2522 2523 dev_info(dev, 2524 "PWM configuration is too broken to be fixed\n"); 2525 } 2526 2527 dev_info(dev, 2528 "Detected broken BIOS defaults, disabling PWM interface\n"); 2529 return 0; 2530 } else if (fix_pwm_polarity) { 2531 dev_info(dev, 2532 "PWM configuration looks sane, won't touch\n"); 2533 } 2534 2535 return 1; 2536 } 2537 2538 /* Called when we have found a new IT87. */ 2539 static void it87_init_device(struct platform_device *pdev) 2540 { 2541 struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev); 2542 struct it87_data *data = platform_get_drvdata(pdev); 2543 int tmp, i; 2544 u8 mask; 2545 2546 /* 2547 * For each PWM channel: 2548 * - If it is in automatic mode, setting to manual mode should set 2549 * the fan to full speed by default. 2550 * - If it is in manual mode, we need a mapping to temperature 2551 * channels to use when later setting to automatic mode later. 2552 * Use a 1:1 mapping by default (we are clueless.) 2553 * In both cases, the value can (and should) be changed by the user 2554 * prior to switching to a different mode. 2555 * Note that this is no longer needed for the IT8721F and later, as 2556 * these have separate registers for the temperature mapping and the 2557 * manual duty cycle. 2558 */ 2559 for (i = 0; i < 3; i++) { 2560 data->pwm_temp_map[i] = i; 2561 data->pwm_duty[i] = 0x7f; /* Full speed */ 2562 data->auto_pwm[i][3] = 0x7f; /* Full speed, hard-coded */ 2563 } 2564 2565 /* 2566 * Some chips seem to have default value 0xff for all limit 2567 * registers. For low voltage limits it makes no sense and triggers 2568 * alarms, so change to 0 instead. For high temperature limits, it 2569 * means -1 degree C, which surprisingly doesn't trigger an alarm, 2570 * but is still confusing, so change to 127 degrees C. 2571 */ 2572 for (i = 0; i < 8; i++) { 2573 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i)); 2574 if (tmp == 0xff) 2575 it87_write_value(data, IT87_REG_VIN_MIN(i), 0); 2576 } 2577 for (i = 0; i < 3; i++) { 2578 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i)); 2579 if (tmp == 0xff) 2580 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127); 2581 } 2582 2583 /* 2584 * Temperature channels are not forcibly enabled, as they can be 2585 * set to two different sensor types and we can't guess which one 2586 * is correct for a given system. These channels can be enabled at 2587 * run-time through the temp{1-3}_type sysfs accessors if needed. 2588 */ 2589 2590 /* Check if voltage monitors are reset manually or by some reason */ 2591 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE); 2592 if ((tmp & 0xff) == 0) { 2593 /* Enable all voltage monitors */ 2594 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff); 2595 } 2596 2597 /* Check if tachometers are reset manually or by some reason */ 2598 mask = 0x70 & ~(sio_data->skip_fan << 4); 2599 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL); 2600 if ((data->fan_main_ctrl & mask) == 0) { 2601 /* Enable all fan tachometers */ 2602 data->fan_main_ctrl |= mask; 2603 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, 2604 data->fan_main_ctrl); 2605 } 2606 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07; 2607 2608 tmp = it87_read_value(data, IT87_REG_FAN_16BIT); 2609 2610 /* Set tachometers to 16-bit mode if needed */ 2611 if (has_fan16_config(data)) { 2612 if (~tmp & 0x07 & data->has_fan) { 2613 dev_dbg(&pdev->dev, 2614 "Setting fan1-3 to 16-bit mode\n"); 2615 it87_write_value(data, IT87_REG_FAN_16BIT, 2616 tmp | 0x07); 2617 } 2618 } 2619 2620 /* Check for additional fans */ 2621 if (has_five_fans(data)) { 2622 if (tmp & (1 << 4)) 2623 data->has_fan |= (1 << 3); /* fan4 enabled */ 2624 if (tmp & (1 << 5)) 2625 data->has_fan |= (1 << 4); /* fan5 enabled */ 2626 if (has_six_fans(data) && (tmp & (1 << 2))) 2627 data->has_fan |= (1 << 5); /* fan6 enabled */ 2628 } 2629 2630 /* Fan input pins may be used for alternative functions */ 2631 data->has_fan &= ~sio_data->skip_fan; 2632 2633 /* Start monitoring */ 2634 it87_write_value(data, IT87_REG_CONFIG, 2635 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e) 2636 | (update_vbat ? 0x41 : 0x01)); 2637 } 2638 2639 static void it87_update_pwm_ctrl(struct it87_data *data, int nr) 2640 { 2641 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr)); 2642 if (has_newer_autopwm(data)) { 2643 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; 2644 data->pwm_duty[nr] = it87_read_value(data, 2645 IT87_REG_PWM_DUTY(nr)); 2646 } else { 2647 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ 2648 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; 2649 else /* Manual mode */ 2650 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f; 2651 } 2652 2653 if (has_old_autopwm(data)) { 2654 int i; 2655 2656 for (i = 0; i < 5 ; i++) 2657 data->auto_temp[nr][i] = it87_read_value(data, 2658 IT87_REG_AUTO_TEMP(nr, i)); 2659 for (i = 0; i < 3 ; i++) 2660 data->auto_pwm[nr][i] = it87_read_value(data, 2661 IT87_REG_AUTO_PWM(nr, i)); 2662 } 2663 } 2664 2665 static struct it87_data *it87_update_device(struct device *dev) 2666 { 2667 struct it87_data *data = dev_get_drvdata(dev); 2668 int i; 2669 2670 mutex_lock(&data->update_lock); 2671 2672 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 2673 || !data->valid) { 2674 if (update_vbat) { 2675 /* 2676 * Cleared after each update, so reenable. Value 2677 * returned by this read will be previous value 2678 */ 2679 it87_write_value(data, IT87_REG_CONFIG, 2680 it87_read_value(data, IT87_REG_CONFIG) | 0x40); 2681 } 2682 for (i = 0; i <= 7; i++) { 2683 data->in[i][0] = 2684 it87_read_value(data, IT87_REG_VIN(i)); 2685 data->in[i][1] = 2686 it87_read_value(data, IT87_REG_VIN_MIN(i)); 2687 data->in[i][2] = 2688 it87_read_value(data, IT87_REG_VIN_MAX(i)); 2689 } 2690 /* in8 (battery) has no limit registers */ 2691 data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8)); 2692 if (data->type == it8603) 2693 data->in[9][0] = it87_read_value(data, 0x2f); 2694 2695 for (i = 0; i < 6; i++) { 2696 /* Skip disabled fans */ 2697 if (!(data->has_fan & (1 << i))) 2698 continue; 2699 2700 data->fan[i][1] = 2701 it87_read_value(data, IT87_REG_FAN_MIN[i]); 2702 data->fan[i][0] = it87_read_value(data, 2703 IT87_REG_FAN[i]); 2704 /* Add high byte if in 16-bit mode */ 2705 if (has_16bit_fans(data)) { 2706 data->fan[i][0] |= it87_read_value(data, 2707 IT87_REG_FANX[i]) << 8; 2708 data->fan[i][1] |= it87_read_value(data, 2709 IT87_REG_FANX_MIN[i]) << 8; 2710 } 2711 } 2712 for (i = 0; i < 3; i++) { 2713 if (!(data->has_temp & (1 << i))) 2714 continue; 2715 data->temp[i][0] = 2716 it87_read_value(data, IT87_REG_TEMP(i)); 2717 data->temp[i][1] = 2718 it87_read_value(data, IT87_REG_TEMP_LOW(i)); 2719 data->temp[i][2] = 2720 it87_read_value(data, IT87_REG_TEMP_HIGH(i)); 2721 if (has_temp_offset(data)) 2722 data->temp[i][3] = 2723 it87_read_value(data, 2724 IT87_REG_TEMP_OFFSET[i]); 2725 } 2726 2727 /* Newer chips don't have clock dividers */ 2728 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) { 2729 i = it87_read_value(data, IT87_REG_FAN_DIV); 2730 data->fan_div[0] = i & 0x07; 2731 data->fan_div[1] = (i >> 3) & 0x07; 2732 data->fan_div[2] = (i & 0x40) ? 3 : 1; 2733 } 2734 2735 data->alarms = 2736 it87_read_value(data, IT87_REG_ALARM1) | 2737 (it87_read_value(data, IT87_REG_ALARM2) << 8) | 2738 (it87_read_value(data, IT87_REG_ALARM3) << 16); 2739 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE); 2740 2741 data->fan_main_ctrl = it87_read_value(data, 2742 IT87_REG_FAN_MAIN_CTRL); 2743 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL); 2744 for (i = 0; i < 3; i++) 2745 it87_update_pwm_ctrl(data, i); 2746 2747 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE); 2748 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA); 2749 /* 2750 * The IT8705F does not have VID capability. 2751 * The IT8718F and later don't use IT87_REG_VID for the 2752 * same purpose. 2753 */ 2754 if (data->type == it8712 || data->type == it8716) { 2755 data->vid = it87_read_value(data, IT87_REG_VID); 2756 /* 2757 * The older IT8712F revisions had only 5 VID pins, 2758 * but we assume it is always safe to read 6 bits. 2759 */ 2760 data->vid &= 0x3f; 2761 } 2762 data->last_updated = jiffies; 2763 data->valid = 1; 2764 } 2765 2766 mutex_unlock(&data->update_lock); 2767 2768 return data; 2769 } 2770 2771 static int __init it87_device_add(unsigned short address, 2772 const struct it87_sio_data *sio_data) 2773 { 2774 struct resource res = { 2775 .start = address + IT87_EC_OFFSET, 2776 .end = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1, 2777 .name = DRVNAME, 2778 .flags = IORESOURCE_IO, 2779 }; 2780 int err; 2781 2782 err = acpi_check_resource_conflict(&res); 2783 if (err) 2784 goto exit; 2785 2786 pdev = platform_device_alloc(DRVNAME, address); 2787 if (!pdev) { 2788 err = -ENOMEM; 2789 pr_err("Device allocation failed\n"); 2790 goto exit; 2791 } 2792 2793 err = platform_device_add_resources(pdev, &res, 1); 2794 if (err) { 2795 pr_err("Device resource addition failed (%d)\n", err); 2796 goto exit_device_put; 2797 } 2798 2799 err = platform_device_add_data(pdev, sio_data, 2800 sizeof(struct it87_sio_data)); 2801 if (err) { 2802 pr_err("Platform data allocation failed\n"); 2803 goto exit_device_put; 2804 } 2805 2806 err = platform_device_add(pdev); 2807 if (err) { 2808 pr_err("Device addition failed (%d)\n", err); 2809 goto exit_device_put; 2810 } 2811 2812 return 0; 2813 2814 exit_device_put: 2815 platform_device_put(pdev); 2816 exit: 2817 return err; 2818 } 2819 2820 static int __init sm_it87_init(void) 2821 { 2822 int err; 2823 unsigned short isa_address = 0; 2824 struct it87_sio_data sio_data; 2825 2826 memset(&sio_data, 0, sizeof(struct it87_sio_data)); 2827 err = it87_find(&isa_address, &sio_data); 2828 if (err) 2829 return err; 2830 err = platform_driver_register(&it87_driver); 2831 if (err) 2832 return err; 2833 2834 err = it87_device_add(isa_address, &sio_data); 2835 if (err) { 2836 platform_driver_unregister(&it87_driver); 2837 return err; 2838 } 2839 2840 return 0; 2841 } 2842 2843 static void __exit sm_it87_exit(void) 2844 { 2845 platform_device_unregister(pdev); 2846 platform_driver_unregister(&it87_driver); 2847 } 2848 2849 2850 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>"); 2851 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver"); 2852 module_param(update_vbat, bool, 0); 2853 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value"); 2854 module_param(fix_pwm_polarity, bool, 0); 2855 MODULE_PARM_DESC(fix_pwm_polarity, 2856 "Force PWM polarity to active high (DANGEROUS)"); 2857 MODULE_LICENSE("GPL"); 2858 2859 module_init(sm_it87_init); 2860 module_exit(sm_it87_exit); 2861