xref: /openbmc/linux/drivers/hwmon/it87.c (revision 3a0d89d3)
1 /*
2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
3  *           monitoring.
4  *
5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
8  *  Fan Controller)
9  *
10  *  This driver supports only the Environment Controller in the IT8705F and
11  *  similar parts.  The other devices are supported by different drivers.
12  *
13  *  Supports: IT8603E  Super I/O chip w/LPC interface
14  *            IT8623E  Super I/O chip w/LPC interface
15  *            IT8705F  Super I/O chip w/LPC interface
16  *            IT8712F  Super I/O chip w/LPC interface
17  *            IT8716F  Super I/O chip w/LPC interface
18  *            IT8718F  Super I/O chip w/LPC interface
19  *            IT8720F  Super I/O chip w/LPC interface
20  *            IT8721F  Super I/O chip w/LPC interface
21  *            IT8726F  Super I/O chip w/LPC interface
22  *            IT8728F  Super I/O chip w/LPC interface
23  *            IT8758E  Super I/O chip w/LPC interface
24  *            IT8771E  Super I/O chip w/LPC interface
25  *            IT8772E  Super I/O chip w/LPC interface
26  *            IT8782F  Super I/O chip w/LPC interface
27  *            IT8783E/F Super I/O chip w/LPC interface
28  *            Sis950   A clone of the IT8705F
29  *
30  *  Copyright (C) 2001 Chris Gauthron
31  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
32  *
33  *  This program is free software; you can redistribute it and/or modify
34  *  it under the terms of the GNU General Public License as published by
35  *  the Free Software Foundation; either version 2 of the License, or
36  *  (at your option) any later version.
37  *
38  *  This program is distributed in the hope that it will be useful,
39  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
40  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
41  *  GNU General Public License for more details.
42  *
43  *  You should have received a copy of the GNU General Public License
44  *  along with this program; if not, write to the Free Software
45  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
46  */
47 
48 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
49 
50 #include <linux/module.h>
51 #include <linux/init.h>
52 #include <linux/slab.h>
53 #include <linux/jiffies.h>
54 #include <linux/platform_device.h>
55 #include <linux/hwmon.h>
56 #include <linux/hwmon-sysfs.h>
57 #include <linux/hwmon-vid.h>
58 #include <linux/err.h>
59 #include <linux/mutex.h>
60 #include <linux/sysfs.h>
61 #include <linux/string.h>
62 #include <linux/dmi.h>
63 #include <linux/acpi.h>
64 #include <linux/io.h>
65 
66 #define DRVNAME "it87"
67 
68 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8771,
69 	     it8772, it8782, it8783, it8603 };
70 
71 static unsigned short force_id;
72 module_param(force_id, ushort, 0);
73 MODULE_PARM_DESC(force_id, "Override the detected device ID");
74 
75 static struct platform_device *pdev;
76 
77 #define	REG	0x2e	/* The register to read/write */
78 #define	DEV	0x07	/* Register: Logical device select */
79 #define	VAL	0x2f	/* The value to read/write */
80 #define PME	0x04	/* The device with the fan registers in it */
81 
82 /* The device with the IT8718F/IT8720F VID value in it */
83 #define GPIO	0x07
84 
85 #define	DEVID	0x20	/* Register: Device ID */
86 #define	DEVREV	0x22	/* Register: Device Revision */
87 
88 static inline int superio_inb(int reg)
89 {
90 	outb(reg, REG);
91 	return inb(VAL);
92 }
93 
94 static inline void superio_outb(int reg, int val)
95 {
96 	outb(reg, REG);
97 	outb(val, VAL);
98 }
99 
100 static int superio_inw(int reg)
101 {
102 	int val;
103 	outb(reg++, REG);
104 	val = inb(VAL) << 8;
105 	outb(reg, REG);
106 	val |= inb(VAL);
107 	return val;
108 }
109 
110 static inline void superio_select(int ldn)
111 {
112 	outb(DEV, REG);
113 	outb(ldn, VAL);
114 }
115 
116 static inline int superio_enter(void)
117 {
118 	/*
119 	 * Try to reserve REG and REG + 1 for exclusive access.
120 	 */
121 	if (!request_muxed_region(REG, 2, DRVNAME))
122 		return -EBUSY;
123 
124 	outb(0x87, REG);
125 	outb(0x01, REG);
126 	outb(0x55, REG);
127 	outb(0x55, REG);
128 	return 0;
129 }
130 
131 static inline void superio_exit(void)
132 {
133 	outb(0x02, REG);
134 	outb(0x02, VAL);
135 	release_region(REG, 2);
136 }
137 
138 /* Logical device 4 registers */
139 #define IT8712F_DEVID 0x8712
140 #define IT8705F_DEVID 0x8705
141 #define IT8716F_DEVID 0x8716
142 #define IT8718F_DEVID 0x8718
143 #define IT8720F_DEVID 0x8720
144 #define IT8721F_DEVID 0x8721
145 #define IT8726F_DEVID 0x8726
146 #define IT8728F_DEVID 0x8728
147 #define IT8771E_DEVID 0x8771
148 #define IT8772E_DEVID 0x8772
149 #define IT8782F_DEVID 0x8782
150 #define IT8783E_DEVID 0x8783
151 #define IT8603E_DEVID 0x8603
152 #define IT8623E_DEVID 0x8623
153 #define IT87_ACT_REG  0x30
154 #define IT87_BASE_REG 0x60
155 
156 /* Logical device 7 registers (IT8712F and later) */
157 #define IT87_SIO_GPIO1_REG	0x25
158 #define IT87_SIO_GPIO3_REG	0x27
159 #define IT87_SIO_GPIO5_REG	0x29
160 #define IT87_SIO_PINX1_REG	0x2a	/* Pin selection */
161 #define IT87_SIO_PINX2_REG	0x2c	/* Pin selection */
162 #define IT87_SIO_SPI_REG	0xef	/* SPI function pin select */
163 #define IT87_SIO_VID_REG	0xfc	/* VID value */
164 #define IT87_SIO_BEEP_PIN_REG	0xf6	/* Beep pin mapping */
165 
166 /* Update battery voltage after every reading if true */
167 static bool update_vbat;
168 
169 /* Not all BIOSes properly configure the PWM registers */
170 static bool fix_pwm_polarity;
171 
172 /* Many IT87 constants specified below */
173 
174 /* Length of ISA address segment */
175 #define IT87_EXTENT 8
176 
177 /* Length of ISA address segment for Environmental Controller */
178 #define IT87_EC_EXTENT 2
179 
180 /* Offset of EC registers from ISA base address */
181 #define IT87_EC_OFFSET 5
182 
183 /* Where are the ISA address/data registers relative to the EC base address */
184 #define IT87_ADDR_REG_OFFSET 0
185 #define IT87_DATA_REG_OFFSET 1
186 
187 /*----- The IT87 registers -----*/
188 
189 #define IT87_REG_CONFIG        0x00
190 
191 #define IT87_REG_ALARM1        0x01
192 #define IT87_REG_ALARM2        0x02
193 #define IT87_REG_ALARM3        0x03
194 
195 /*
196  * The IT8718F and IT8720F have the VID value in a different register, in
197  * Super-I/O configuration space.
198  */
199 #define IT87_REG_VID           0x0a
200 /*
201  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
202  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
203  * mode.
204  */
205 #define IT87_REG_FAN_DIV       0x0b
206 #define IT87_REG_FAN_16BIT     0x0c
207 
208 /* Monitors: 9 voltage (0 to 7, battery), 3 temp (1 to 3), 3 fan (1 to 3) */
209 
210 static const u8 IT87_REG_FAN[]		= { 0x0d, 0x0e, 0x0f, 0x80, 0x82 };
211 static const u8 IT87_REG_FAN_MIN[]	= { 0x10, 0x11, 0x12, 0x84, 0x86 };
212 static const u8 IT87_REG_FANX[]		= { 0x18, 0x19, 0x1a, 0x81, 0x83 };
213 static const u8 IT87_REG_FANX_MIN[]	= { 0x1b, 0x1c, 0x1d, 0x85, 0x87 };
214 static const u8 IT87_REG_TEMP_OFFSET[]	= { 0x56, 0x57, 0x59 };
215 
216 #define IT87_REG_FAN_MAIN_CTRL 0x13
217 #define IT87_REG_FAN_CTL       0x14
218 #define IT87_REG_PWM(nr)       (0x15 + (nr))
219 #define IT87_REG_PWM_DUTY(nr)  (0x63 + (nr) * 8)
220 
221 #define IT87_REG_VIN(nr)       (0x20 + (nr))
222 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
223 
224 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
225 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
226 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
227 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
228 
229 #define IT87_REG_VIN_ENABLE    0x50
230 #define IT87_REG_TEMP_ENABLE   0x51
231 #define IT87_REG_TEMP_EXTRA    0x55
232 #define IT87_REG_BEEP_ENABLE   0x5c
233 
234 #define IT87_REG_CHIPID        0x58
235 
236 #define IT87_REG_AUTO_TEMP(nr, i) (0x60 + (nr) * 8 + (i))
237 #define IT87_REG_AUTO_PWM(nr, i)  (0x65 + (nr) * 8 + (i))
238 
239 struct it87_devices {
240 	const char *name;
241 	u16 features;
242 	u8 peci_mask;
243 	u8 old_peci_mask;
244 };
245 
246 #define FEAT_12MV_ADC		(1 << 0)
247 #define FEAT_NEWER_AUTOPWM	(1 << 1)
248 #define FEAT_OLD_AUTOPWM	(1 << 2)
249 #define FEAT_16BIT_FANS		(1 << 3)
250 #define FEAT_TEMP_OFFSET	(1 << 4)
251 #define FEAT_TEMP_PECI		(1 << 5)
252 #define FEAT_TEMP_OLD_PECI	(1 << 6)
253 
254 static const struct it87_devices it87_devices[] = {
255 	[it87] = {
256 		.name = "it87",
257 		.features = FEAT_OLD_AUTOPWM,	/* may need to overwrite */
258 	},
259 	[it8712] = {
260 		.name = "it8712",
261 		.features = FEAT_OLD_AUTOPWM,	/* may need to overwrite */
262 	},
263 	[it8716] = {
264 		.name = "it8716",
265 		.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET,
266 	},
267 	[it8718] = {
268 		.name = "it8718",
269 		.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
270 		  | FEAT_TEMP_OLD_PECI,
271 		.old_peci_mask = 0x4,
272 	},
273 	[it8720] = {
274 		.name = "it8720",
275 		.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
276 		  | FEAT_TEMP_OLD_PECI,
277 		.old_peci_mask = 0x4,
278 	},
279 	[it8721] = {
280 		.name = "it8721",
281 		.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
282 		  | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI,
283 		.peci_mask = 0x05,
284 		.old_peci_mask = 0x02,	/* Actually reports PCH */
285 	},
286 	[it8728] = {
287 		.name = "it8728",
288 		.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
289 		  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI,
290 		.peci_mask = 0x07,
291 	},
292 	[it8771] = {
293 		.name = "it8771",
294 		.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
295 		  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI,
296 					/* PECI: guesswork */
297 					/* 12mV ADC (OHM) */
298 					/* 16 bit fans (OHM) */
299 		.peci_mask = 0x07,
300 	},
301 	[it8772] = {
302 		.name = "it8772",
303 		.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
304 		  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI,
305 					/* PECI (coreboot) */
306 					/* 12mV ADC (HWSensors4, OHM) */
307 					/* 16 bit fans (HWSensors4, OHM) */
308 		.peci_mask = 0x07,
309 	},
310 	[it8782] = {
311 		.name = "it8782",
312 		.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
313 		  | FEAT_TEMP_OLD_PECI,
314 		.old_peci_mask = 0x4,
315 	},
316 	[it8783] = {
317 		.name = "it8783",
318 		.features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
319 		  | FEAT_TEMP_OLD_PECI,
320 		.old_peci_mask = 0x4,
321 	},
322 	[it8603] = {
323 		.name = "it8603",
324 		.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
325 		  | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI,
326 		.peci_mask = 0x07,
327 	},
328 };
329 
330 #define has_16bit_fans(data)	((data)->features & FEAT_16BIT_FANS)
331 #define has_12mv_adc(data)	((data)->features & FEAT_12MV_ADC)
332 #define has_newer_autopwm(data)	((data)->features & FEAT_NEWER_AUTOPWM)
333 #define has_old_autopwm(data)	((data)->features & FEAT_OLD_AUTOPWM)
334 #define has_temp_offset(data)	((data)->features & FEAT_TEMP_OFFSET)
335 #define has_temp_peci(data, nr)	(((data)->features & FEAT_TEMP_PECI) && \
336 				 ((data)->peci_mask & (1 << nr)))
337 #define has_temp_old_peci(data, nr) \
338 				(((data)->features & FEAT_TEMP_OLD_PECI) && \
339 				 ((data)->old_peci_mask & (1 << nr)))
340 
341 struct it87_sio_data {
342 	enum chips type;
343 	/* Values read from Super-I/O config space */
344 	u8 revision;
345 	u8 vid_value;
346 	u8 beep_pin;
347 	u8 internal;	/* Internal sensors can be labeled */
348 	/* Features skipped based on config or DMI */
349 	u16 skip_in;
350 	u8 skip_vid;
351 	u8 skip_fan;
352 	u8 skip_pwm;
353 	u8 skip_temp;
354 };
355 
356 /*
357  * For each registered chip, we need to keep some data in memory.
358  * The structure is dynamically allocated.
359  */
360 struct it87_data {
361 	struct device *hwmon_dev;
362 	enum chips type;
363 	u16 features;
364 	u8 peci_mask;
365 	u8 old_peci_mask;
366 
367 	unsigned short addr;
368 	const char *name;
369 	struct mutex update_lock;
370 	char valid;		/* !=0 if following fields are valid */
371 	unsigned long last_updated;	/* In jiffies */
372 
373 	u16 in_scaled;		/* Internal voltage sensors are scaled */
374 	u8 in[10][3];		/* [nr][0]=in, [1]=min, [2]=max */
375 	u8 has_fan;		/* Bitfield, fans enabled */
376 	u16 fan[5][2];		/* Register values, [nr][0]=fan, [1]=min */
377 	u8 has_temp;		/* Bitfield, temp sensors enabled */
378 	s8 temp[3][4];		/* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
379 	u8 sensor;		/* Register value (IT87_REG_TEMP_ENABLE) */
380 	u8 extra;		/* Register value (IT87_REG_TEMP_EXTRA) */
381 	u8 fan_div[3];		/* Register encoding, shifted right */
382 	u8 vid;			/* Register encoding, combined */
383 	u8 vrm;
384 	u32 alarms;		/* Register encoding, combined */
385 	u8 beeps;		/* Register encoding */
386 	u8 fan_main_ctrl;	/* Register value */
387 	u8 fan_ctl;		/* Register value */
388 
389 	/*
390 	 * The following 3 arrays correspond to the same registers up to
391 	 * the IT8720F. The meaning of bits 6-0 depends on the value of bit
392 	 * 7, and we want to preserve settings on mode changes, so we have
393 	 * to track all values separately.
394 	 * Starting with the IT8721F, the manual PWM duty cycles are stored
395 	 * in separate registers (8-bit values), so the separate tracking
396 	 * is no longer needed, but it is still done to keep the driver
397 	 * simple.
398 	 */
399 	u8 pwm_ctrl[3];		/* Register value */
400 	u8 pwm_duty[3];		/* Manual PWM value set by user */
401 	u8 pwm_temp_map[3];	/* PWM to temp. chan. mapping (bits 1-0) */
402 
403 	/* Automatic fan speed control registers */
404 	u8 auto_pwm[3][4];	/* [nr][3] is hard-coded */
405 	s8 auto_temp[3][5];	/* [nr][0] is point1_temp_hyst */
406 };
407 
408 static int adc_lsb(const struct it87_data *data, int nr)
409 {
410 	int lsb = has_12mv_adc(data) ? 12 : 16;
411 	if (data->in_scaled & (1 << nr))
412 		lsb <<= 1;
413 	return lsb;
414 }
415 
416 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
417 {
418 	val = DIV_ROUND_CLOSEST(val, adc_lsb(data, nr));
419 	return clamp_val(val, 0, 255);
420 }
421 
422 static int in_from_reg(const struct it87_data *data, int nr, int val)
423 {
424 	return val * adc_lsb(data, nr);
425 }
426 
427 static inline u8 FAN_TO_REG(long rpm, int div)
428 {
429 	if (rpm == 0)
430 		return 255;
431 	rpm = clamp_val(rpm, 1, 1000000);
432 	return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
433 }
434 
435 static inline u16 FAN16_TO_REG(long rpm)
436 {
437 	if (rpm == 0)
438 		return 0xffff;
439 	return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
440 }
441 
442 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
443 				1350000 / ((val) * (div)))
444 /* The divider is fixed to 2 in 16-bit mode */
445 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
446 			     1350000 / ((val) * 2))
447 
448 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
449 				    ((val) + 500) / 1000), -128, 127))
450 #define TEMP_FROM_REG(val) ((val) * 1000)
451 
452 static u8 pwm_to_reg(const struct it87_data *data, long val)
453 {
454 	if (has_newer_autopwm(data))
455 		return val;
456 	else
457 		return val >> 1;
458 }
459 
460 static int pwm_from_reg(const struct it87_data *data, u8 reg)
461 {
462 	if (has_newer_autopwm(data))
463 		return reg;
464 	else
465 		return (reg & 0x7f) << 1;
466 }
467 
468 
469 static int DIV_TO_REG(int val)
470 {
471 	int answer = 0;
472 	while (answer < 7 && (val >>= 1))
473 		answer++;
474 	return answer;
475 }
476 #define DIV_FROM_REG(val) (1 << (val))
477 
478 static const unsigned int pwm_freq[8] = {
479 	48000000 / 128,
480 	24000000 / 128,
481 	12000000 / 128,
482 	8000000 / 128,
483 	6000000 / 128,
484 	3000000 / 128,
485 	1500000 / 128,
486 	750000 / 128,
487 };
488 
489 static int it87_probe(struct platform_device *pdev);
490 static int it87_remove(struct platform_device *pdev);
491 
492 static int it87_read_value(struct it87_data *data, u8 reg);
493 static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
494 static struct it87_data *it87_update_device(struct device *dev);
495 static int it87_check_pwm(struct device *dev);
496 static void it87_init_device(struct platform_device *pdev);
497 
498 
499 static struct platform_driver it87_driver = {
500 	.driver = {
501 		.owner	= THIS_MODULE,
502 		.name	= DRVNAME,
503 	},
504 	.probe	= it87_probe,
505 	.remove	= it87_remove,
506 };
507 
508 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
509 		       char *buf)
510 {
511 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
512 	int nr = sattr->nr;
513 	int index = sattr->index;
514 
515 	struct it87_data *data = it87_update_device(dev);
516 	return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
517 }
518 
519 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
520 		      const char *buf, size_t count)
521 {
522 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
523 	int nr = sattr->nr;
524 	int index = sattr->index;
525 
526 	struct it87_data *data = dev_get_drvdata(dev);
527 	unsigned long val;
528 
529 	if (kstrtoul(buf, 10, &val) < 0)
530 		return -EINVAL;
531 
532 	mutex_lock(&data->update_lock);
533 	data->in[nr][index] = in_to_reg(data, nr, val);
534 	it87_write_value(data,
535 			 index == 1 ? IT87_REG_VIN_MIN(nr)
536 				    : IT87_REG_VIN_MAX(nr),
537 			 data->in[nr][index]);
538 	mutex_unlock(&data->update_lock);
539 	return count;
540 }
541 
542 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
543 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
544 			    0, 1);
545 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
546 			    0, 2);
547 
548 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
549 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
550 			    1, 1);
551 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
552 			    1, 2);
553 
554 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
555 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
556 			    2, 1);
557 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
558 			    2, 2);
559 
560 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
561 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
562 			    3, 1);
563 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
564 			    3, 2);
565 
566 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
567 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
568 			    4, 1);
569 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
570 			    4, 2);
571 
572 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
573 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
574 			    5, 1);
575 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
576 			    5, 2);
577 
578 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
579 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
580 			    6, 1);
581 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
582 			    6, 2);
583 
584 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
585 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
586 			    7, 1);
587 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
588 			    7, 2);
589 
590 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
591 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
592 
593 /* 3 temperatures */
594 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
595 			 char *buf)
596 {
597 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
598 	int nr = sattr->nr;
599 	int index = sattr->index;
600 	struct it87_data *data = it87_update_device(dev);
601 
602 	return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
603 }
604 
605 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
606 			const char *buf, size_t count)
607 {
608 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
609 	int nr = sattr->nr;
610 	int index = sattr->index;
611 	struct it87_data *data = dev_get_drvdata(dev);
612 	long val;
613 	u8 reg, regval;
614 
615 	if (kstrtol(buf, 10, &val) < 0)
616 		return -EINVAL;
617 
618 	mutex_lock(&data->update_lock);
619 
620 	switch (index) {
621 	default:
622 	case 1:
623 		reg = IT87_REG_TEMP_LOW(nr);
624 		break;
625 	case 2:
626 		reg = IT87_REG_TEMP_HIGH(nr);
627 		break;
628 	case 3:
629 		regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
630 		if (!(regval & 0x80)) {
631 			regval |= 0x80;
632 			it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
633 		}
634 		data->valid = 0;
635 		reg = IT87_REG_TEMP_OFFSET[nr];
636 		break;
637 	}
638 
639 	data->temp[nr][index] = TEMP_TO_REG(val);
640 	it87_write_value(data, reg, data->temp[nr][index]);
641 	mutex_unlock(&data->update_lock);
642 	return count;
643 }
644 
645 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
646 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
647 			    0, 1);
648 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
649 			    0, 2);
650 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
651 			    set_temp, 0, 3);
652 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
653 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
654 			    1, 1);
655 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
656 			    1, 2);
657 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
658 			    set_temp, 1, 3);
659 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
660 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
661 			    2, 1);
662 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
663 			    2, 2);
664 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
665 			    set_temp, 2, 3);
666 
667 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
668 			      char *buf)
669 {
670 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
671 	int nr = sensor_attr->index;
672 	struct it87_data *data = it87_update_device(dev);
673 	u8 reg = data->sensor;	    /* In case value is updated while used */
674 	u8 extra = data->extra;
675 
676 	if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1))
677 	    || (has_temp_old_peci(data, nr) && (extra & 0x80)))
678 		return sprintf(buf, "6\n");  /* Intel PECI */
679 	if (reg & (1 << nr))
680 		return sprintf(buf, "3\n");  /* thermal diode */
681 	if (reg & (8 << nr))
682 		return sprintf(buf, "4\n");  /* thermistor */
683 	return sprintf(buf, "0\n");      /* disabled */
684 }
685 
686 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
687 			     const char *buf, size_t count)
688 {
689 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
690 	int nr = sensor_attr->index;
691 
692 	struct it87_data *data = dev_get_drvdata(dev);
693 	long val;
694 	u8 reg, extra;
695 
696 	if (kstrtol(buf, 10, &val) < 0)
697 		return -EINVAL;
698 
699 	reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
700 	reg &= ~(1 << nr);
701 	reg &= ~(8 << nr);
702 	if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
703 		reg &= 0x3f;
704 	extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
705 	if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
706 		extra &= 0x7f;
707 	if (val == 2) {	/* backwards compatibility */
708 		dev_warn(dev,
709 			 "Sensor type 2 is deprecated, please use 4 instead\n");
710 		val = 4;
711 	}
712 	/* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
713 	if (val == 3)
714 		reg |= 1 << nr;
715 	else if (val == 4)
716 		reg |= 8 << nr;
717 	else if (has_temp_peci(data, nr) && val == 6)
718 		reg |= (nr + 1) << 6;
719 	else if (has_temp_old_peci(data, nr) && val == 6)
720 		extra |= 0x80;
721 	else if (val != 0)
722 		return -EINVAL;
723 
724 	mutex_lock(&data->update_lock);
725 	data->sensor = reg;
726 	data->extra = extra;
727 	it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
728 	if (has_temp_old_peci(data, nr))
729 		it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
730 	data->valid = 0;	/* Force cache refresh */
731 	mutex_unlock(&data->update_lock);
732 	return count;
733 }
734 
735 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
736 			  set_temp_type, 0);
737 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
738 			  set_temp_type, 1);
739 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
740 			  set_temp_type, 2);
741 
742 /* 3 Fans */
743 
744 static int pwm_mode(const struct it87_data *data, int nr)
745 {
746 	int ctrl = data->fan_main_ctrl & (1 << nr);
747 
748 	if (ctrl == 0 && data->type != it8603)		/* Full speed */
749 		return 0;
750 	if (data->pwm_ctrl[nr] & 0x80)			/* Automatic mode */
751 		return 2;
752 	else						/* Manual mode */
753 		return 1;
754 }
755 
756 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
757 			char *buf)
758 {
759 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
760 	int nr = sattr->nr;
761 	int index = sattr->index;
762 	int speed;
763 	struct it87_data *data = it87_update_device(dev);
764 
765 	speed = has_16bit_fans(data) ?
766 		FAN16_FROM_REG(data->fan[nr][index]) :
767 		FAN_FROM_REG(data->fan[nr][index],
768 			     DIV_FROM_REG(data->fan_div[nr]));
769 	return sprintf(buf, "%d\n", speed);
770 }
771 
772 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
773 		char *buf)
774 {
775 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
776 	int nr = sensor_attr->index;
777 
778 	struct it87_data *data = it87_update_device(dev);
779 	return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]));
780 }
781 static ssize_t show_pwm_enable(struct device *dev,
782 		struct device_attribute *attr, char *buf)
783 {
784 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
785 	int nr = sensor_attr->index;
786 
787 	struct it87_data *data = it87_update_device(dev);
788 	return sprintf(buf, "%d\n", pwm_mode(data, nr));
789 }
790 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
791 		char *buf)
792 {
793 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
794 	int nr = sensor_attr->index;
795 
796 	struct it87_data *data = it87_update_device(dev);
797 	return sprintf(buf, "%d\n",
798 		       pwm_from_reg(data, data->pwm_duty[nr]));
799 }
800 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
801 		char *buf)
802 {
803 	struct it87_data *data = it87_update_device(dev);
804 	int index = (data->fan_ctl >> 4) & 0x07;
805 
806 	return sprintf(buf, "%u\n", pwm_freq[index]);
807 }
808 
809 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
810 		       const char *buf, size_t count)
811 {
812 	struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
813 	int nr = sattr->nr;
814 	int index = sattr->index;
815 
816 	struct it87_data *data = dev_get_drvdata(dev);
817 	long val;
818 	u8 reg;
819 
820 	if (kstrtol(buf, 10, &val) < 0)
821 		return -EINVAL;
822 
823 	mutex_lock(&data->update_lock);
824 
825 	if (has_16bit_fans(data)) {
826 		data->fan[nr][index] = FAN16_TO_REG(val);
827 		it87_write_value(data, IT87_REG_FAN_MIN[nr],
828 				 data->fan[nr][index] & 0xff);
829 		it87_write_value(data, IT87_REG_FANX_MIN[nr],
830 				 data->fan[nr][index] >> 8);
831 	} else {
832 		reg = it87_read_value(data, IT87_REG_FAN_DIV);
833 		switch (nr) {
834 		case 0:
835 			data->fan_div[nr] = reg & 0x07;
836 			break;
837 		case 1:
838 			data->fan_div[nr] = (reg >> 3) & 0x07;
839 			break;
840 		case 2:
841 			data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
842 			break;
843 		}
844 		data->fan[nr][index] =
845 		  FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
846 		it87_write_value(data, IT87_REG_FAN_MIN[nr],
847 				 data->fan[nr][index]);
848 	}
849 
850 	mutex_unlock(&data->update_lock);
851 	return count;
852 }
853 
854 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
855 		const char *buf, size_t count)
856 {
857 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
858 	int nr = sensor_attr->index;
859 
860 	struct it87_data *data = dev_get_drvdata(dev);
861 	unsigned long val;
862 	int min;
863 	u8 old;
864 
865 	if (kstrtoul(buf, 10, &val) < 0)
866 		return -EINVAL;
867 
868 	mutex_lock(&data->update_lock);
869 	old = it87_read_value(data, IT87_REG_FAN_DIV);
870 
871 	/* Save fan min limit */
872 	min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
873 
874 	switch (nr) {
875 	case 0:
876 	case 1:
877 		data->fan_div[nr] = DIV_TO_REG(val);
878 		break;
879 	case 2:
880 		if (val < 8)
881 			data->fan_div[nr] = 1;
882 		else
883 			data->fan_div[nr] = 3;
884 	}
885 	val = old & 0x80;
886 	val |= (data->fan_div[0] & 0x07);
887 	val |= (data->fan_div[1] & 0x07) << 3;
888 	if (data->fan_div[2] == 3)
889 		val |= 0x1 << 6;
890 	it87_write_value(data, IT87_REG_FAN_DIV, val);
891 
892 	/* Restore fan min limit */
893 	data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
894 	it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
895 
896 	mutex_unlock(&data->update_lock);
897 	return count;
898 }
899 
900 /* Returns 0 if OK, -EINVAL otherwise */
901 static int check_trip_points(struct device *dev, int nr)
902 {
903 	const struct it87_data *data = dev_get_drvdata(dev);
904 	int i, err = 0;
905 
906 	if (has_old_autopwm(data)) {
907 		for (i = 0; i < 3; i++) {
908 			if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
909 				err = -EINVAL;
910 		}
911 		for (i = 0; i < 2; i++) {
912 			if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
913 				err = -EINVAL;
914 		}
915 	}
916 
917 	if (err) {
918 		dev_err(dev,
919 			"Inconsistent trip points, not switching to automatic mode\n");
920 		dev_err(dev, "Adjust the trip points and try again\n");
921 	}
922 	return err;
923 }
924 
925 static ssize_t set_pwm_enable(struct device *dev,
926 		struct device_attribute *attr, const char *buf, size_t count)
927 {
928 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
929 	int nr = sensor_attr->index;
930 
931 	struct it87_data *data = dev_get_drvdata(dev);
932 	long val;
933 
934 	if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
935 		return -EINVAL;
936 
937 	/* Check trip points before switching to automatic mode */
938 	if (val == 2) {
939 		if (check_trip_points(dev, nr) < 0)
940 			return -EINVAL;
941 	}
942 
943 	/* IT8603E does not have on/off mode */
944 	if (val == 0 && data->type == it8603)
945 		return -EINVAL;
946 
947 	mutex_lock(&data->update_lock);
948 
949 	if (val == 0) {
950 		int tmp;
951 		/* make sure the fan is on when in on/off mode */
952 		tmp = it87_read_value(data, IT87_REG_FAN_CTL);
953 		it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
954 		/* set on/off mode */
955 		data->fan_main_ctrl &= ~(1 << nr);
956 		it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
957 				 data->fan_main_ctrl);
958 	} else {
959 		if (val == 1)				/* Manual mode */
960 			data->pwm_ctrl[nr] = has_newer_autopwm(data) ?
961 					     data->pwm_temp_map[nr] :
962 					     data->pwm_duty[nr];
963 		else					/* Automatic mode */
964 			data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
965 		it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
966 
967 		if (data->type != it8603) {
968 			/* set SmartGuardian mode */
969 			data->fan_main_ctrl |= (1 << nr);
970 			it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
971 					 data->fan_main_ctrl);
972 		}
973 	}
974 
975 	mutex_unlock(&data->update_lock);
976 	return count;
977 }
978 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
979 		const char *buf, size_t count)
980 {
981 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
982 	int nr = sensor_attr->index;
983 
984 	struct it87_data *data = dev_get_drvdata(dev);
985 	long val;
986 
987 	if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
988 		return -EINVAL;
989 
990 	mutex_lock(&data->update_lock);
991 	if (has_newer_autopwm(data)) {
992 		/*
993 		 * If we are in automatic mode, the PWM duty cycle register
994 		 * is read-only so we can't write the value.
995 		 */
996 		if (data->pwm_ctrl[nr] & 0x80) {
997 			mutex_unlock(&data->update_lock);
998 			return -EBUSY;
999 		}
1000 		data->pwm_duty[nr] = pwm_to_reg(data, val);
1001 		it87_write_value(data, IT87_REG_PWM_DUTY(nr),
1002 				 data->pwm_duty[nr]);
1003 	} else {
1004 		data->pwm_duty[nr] = pwm_to_reg(data, val);
1005 		/*
1006 		 * If we are in manual mode, write the duty cycle immediately;
1007 		 * otherwise, just store it for later use.
1008 		 */
1009 		if (!(data->pwm_ctrl[nr] & 0x80)) {
1010 			data->pwm_ctrl[nr] = data->pwm_duty[nr];
1011 			it87_write_value(data, IT87_REG_PWM(nr),
1012 					 data->pwm_ctrl[nr]);
1013 		}
1014 	}
1015 	mutex_unlock(&data->update_lock);
1016 	return count;
1017 }
1018 static ssize_t set_pwm_freq(struct device *dev,
1019 		struct device_attribute *attr, const char *buf, size_t count)
1020 {
1021 	struct it87_data *data = dev_get_drvdata(dev);
1022 	unsigned long val;
1023 	int i;
1024 
1025 	if (kstrtoul(buf, 10, &val) < 0)
1026 		return -EINVAL;
1027 
1028 	/* Search for the nearest available frequency */
1029 	for (i = 0; i < 7; i++) {
1030 		if (val > (pwm_freq[i] + pwm_freq[i+1]) / 2)
1031 			break;
1032 	}
1033 
1034 	mutex_lock(&data->update_lock);
1035 	data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1036 	data->fan_ctl |= i << 4;
1037 	it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1038 	mutex_unlock(&data->update_lock);
1039 
1040 	return count;
1041 }
1042 static ssize_t show_pwm_temp_map(struct device *dev,
1043 		struct device_attribute *attr, char *buf)
1044 {
1045 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1046 	int nr = sensor_attr->index;
1047 
1048 	struct it87_data *data = it87_update_device(dev);
1049 	int map;
1050 
1051 	if (data->pwm_temp_map[nr] < 3)
1052 		map = 1 << data->pwm_temp_map[nr];
1053 	else
1054 		map = 0;			/* Should never happen */
1055 	return sprintf(buf, "%d\n", map);
1056 }
1057 static ssize_t set_pwm_temp_map(struct device *dev,
1058 		struct device_attribute *attr, const char *buf, size_t count)
1059 {
1060 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1061 	int nr = sensor_attr->index;
1062 
1063 	struct it87_data *data = dev_get_drvdata(dev);
1064 	long val;
1065 	u8 reg;
1066 
1067 	/*
1068 	 * This check can go away if we ever support automatic fan speed
1069 	 * control on newer chips.
1070 	 */
1071 	if (!has_old_autopwm(data)) {
1072 		dev_notice(dev, "Mapping change disabled for safety reasons\n");
1073 		return -EINVAL;
1074 	}
1075 
1076 	if (kstrtol(buf, 10, &val) < 0)
1077 		return -EINVAL;
1078 
1079 	switch (val) {
1080 	case (1 << 0):
1081 		reg = 0x00;
1082 		break;
1083 	case (1 << 1):
1084 		reg = 0x01;
1085 		break;
1086 	case (1 << 2):
1087 		reg = 0x02;
1088 		break;
1089 	default:
1090 		return -EINVAL;
1091 	}
1092 
1093 	mutex_lock(&data->update_lock);
1094 	data->pwm_temp_map[nr] = reg;
1095 	/*
1096 	 * If we are in automatic mode, write the temp mapping immediately;
1097 	 * otherwise, just store it for later use.
1098 	 */
1099 	if (data->pwm_ctrl[nr] & 0x80) {
1100 		data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
1101 		it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
1102 	}
1103 	mutex_unlock(&data->update_lock);
1104 	return count;
1105 }
1106 
1107 static ssize_t show_auto_pwm(struct device *dev,
1108 		struct device_attribute *attr, char *buf)
1109 {
1110 	struct it87_data *data = it87_update_device(dev);
1111 	struct sensor_device_attribute_2 *sensor_attr =
1112 			to_sensor_dev_attr_2(attr);
1113 	int nr = sensor_attr->nr;
1114 	int point = sensor_attr->index;
1115 
1116 	return sprintf(buf, "%d\n",
1117 		       pwm_from_reg(data, data->auto_pwm[nr][point]));
1118 }
1119 
1120 static ssize_t set_auto_pwm(struct device *dev,
1121 		struct device_attribute *attr, const char *buf, size_t count)
1122 {
1123 	struct it87_data *data = dev_get_drvdata(dev);
1124 	struct sensor_device_attribute_2 *sensor_attr =
1125 			to_sensor_dev_attr_2(attr);
1126 	int nr = sensor_attr->nr;
1127 	int point = sensor_attr->index;
1128 	long val;
1129 
1130 	if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1131 		return -EINVAL;
1132 
1133 	mutex_lock(&data->update_lock);
1134 	data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1135 	it87_write_value(data, IT87_REG_AUTO_PWM(nr, point),
1136 			 data->auto_pwm[nr][point]);
1137 	mutex_unlock(&data->update_lock);
1138 	return count;
1139 }
1140 
1141 static ssize_t show_auto_temp(struct device *dev,
1142 		struct device_attribute *attr, char *buf)
1143 {
1144 	struct it87_data *data = it87_update_device(dev);
1145 	struct sensor_device_attribute_2 *sensor_attr =
1146 			to_sensor_dev_attr_2(attr);
1147 	int nr = sensor_attr->nr;
1148 	int point = sensor_attr->index;
1149 
1150 	return sprintf(buf, "%d\n", TEMP_FROM_REG(data->auto_temp[nr][point]));
1151 }
1152 
1153 static ssize_t set_auto_temp(struct device *dev,
1154 		struct device_attribute *attr, const char *buf, size_t count)
1155 {
1156 	struct it87_data *data = dev_get_drvdata(dev);
1157 	struct sensor_device_attribute_2 *sensor_attr =
1158 			to_sensor_dev_attr_2(attr);
1159 	int nr = sensor_attr->nr;
1160 	int point = sensor_attr->index;
1161 	long val;
1162 
1163 	if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1164 		return -EINVAL;
1165 
1166 	mutex_lock(&data->update_lock);
1167 	data->auto_temp[nr][point] = TEMP_TO_REG(val);
1168 	it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point),
1169 			 data->auto_temp[nr][point]);
1170 	mutex_unlock(&data->update_lock);
1171 	return count;
1172 }
1173 
1174 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1175 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1176 			    0, 1);
1177 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1178 			  set_fan_div, 0);
1179 
1180 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1181 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1182 			    1, 1);
1183 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1184 			  set_fan_div, 1);
1185 
1186 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1187 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1188 			    2, 1);
1189 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1190 			  set_fan_div, 2);
1191 
1192 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1193 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1194 			    3, 1);
1195 
1196 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1197 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1198 			    4, 1);
1199 
1200 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1201 			  show_pwm_enable, set_pwm_enable, 0);
1202 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1203 static DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
1204 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR,
1205 			  show_pwm_temp_map, set_pwm_temp_map, 0);
1206 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1207 			    show_auto_pwm, set_auto_pwm, 0, 0);
1208 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1209 			    show_auto_pwm, set_auto_pwm, 0, 1);
1210 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1211 			    show_auto_pwm, set_auto_pwm, 0, 2);
1212 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1213 			    show_auto_pwm, NULL, 0, 3);
1214 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1215 			    show_auto_temp, set_auto_temp, 0, 1);
1216 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1217 			    show_auto_temp, set_auto_temp, 0, 0);
1218 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1219 			    show_auto_temp, set_auto_temp, 0, 2);
1220 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1221 			    show_auto_temp, set_auto_temp, 0, 3);
1222 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1223 			    show_auto_temp, set_auto_temp, 0, 4);
1224 
1225 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1226 			  show_pwm_enable, set_pwm_enable, 1);
1227 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1228 static DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, NULL);
1229 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR,
1230 			  show_pwm_temp_map, set_pwm_temp_map, 1);
1231 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1232 			    show_auto_pwm, set_auto_pwm, 1, 0);
1233 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1234 			    show_auto_pwm, set_auto_pwm, 1, 1);
1235 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1236 			    show_auto_pwm, set_auto_pwm, 1, 2);
1237 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1238 			    show_auto_pwm, NULL, 1, 3);
1239 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1240 			    show_auto_temp, set_auto_temp, 1, 1);
1241 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1242 			    show_auto_temp, set_auto_temp, 1, 0);
1243 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1244 			    show_auto_temp, set_auto_temp, 1, 2);
1245 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1246 			    show_auto_temp, set_auto_temp, 1, 3);
1247 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1248 			    show_auto_temp, set_auto_temp, 1, 4);
1249 
1250 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1251 			  show_pwm_enable, set_pwm_enable, 2);
1252 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1253 static DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL);
1254 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR,
1255 			  show_pwm_temp_map, set_pwm_temp_map, 2);
1256 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1257 			    show_auto_pwm, set_auto_pwm, 2, 0);
1258 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1259 			    show_auto_pwm, set_auto_pwm, 2, 1);
1260 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1261 			    show_auto_pwm, set_auto_pwm, 2, 2);
1262 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1263 			    show_auto_pwm, NULL, 2, 3);
1264 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1265 			    show_auto_temp, set_auto_temp, 2, 1);
1266 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1267 			    show_auto_temp, set_auto_temp, 2, 0);
1268 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1269 			    show_auto_temp, set_auto_temp, 2, 2);
1270 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1271 			    show_auto_temp, set_auto_temp, 2, 3);
1272 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1273 			    show_auto_temp, set_auto_temp, 2, 4);
1274 
1275 /* Alarms */
1276 static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
1277 		char *buf)
1278 {
1279 	struct it87_data *data = it87_update_device(dev);
1280 	return sprintf(buf, "%u\n", data->alarms);
1281 }
1282 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
1283 
1284 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1285 		char *buf)
1286 {
1287 	int bitnr = to_sensor_dev_attr(attr)->index;
1288 	struct it87_data *data = it87_update_device(dev);
1289 	return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1290 }
1291 
1292 static ssize_t clear_intrusion(struct device *dev, struct device_attribute
1293 		*attr, const char *buf, size_t count)
1294 {
1295 	struct it87_data *data = dev_get_drvdata(dev);
1296 	long val;
1297 	int config;
1298 
1299 	if (kstrtol(buf, 10, &val) < 0 || val != 0)
1300 		return -EINVAL;
1301 
1302 	mutex_lock(&data->update_lock);
1303 	config = it87_read_value(data, IT87_REG_CONFIG);
1304 	if (config < 0) {
1305 		count = config;
1306 	} else {
1307 		config |= 1 << 5;
1308 		it87_write_value(data, IT87_REG_CONFIG, config);
1309 		/* Invalidate cache to force re-read */
1310 		data->valid = 0;
1311 	}
1312 	mutex_unlock(&data->update_lock);
1313 
1314 	return count;
1315 }
1316 
1317 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1318 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1319 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1320 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1321 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1322 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1323 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1324 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1325 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1326 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1327 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1328 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1329 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1330 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1331 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1332 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1333 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1334 			  show_alarm, clear_intrusion, 4);
1335 
1336 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1337 		char *buf)
1338 {
1339 	int bitnr = to_sensor_dev_attr(attr)->index;
1340 	struct it87_data *data = it87_update_device(dev);
1341 	return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1342 }
1343 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1344 		const char *buf, size_t count)
1345 {
1346 	int bitnr = to_sensor_dev_attr(attr)->index;
1347 	struct it87_data *data = dev_get_drvdata(dev);
1348 	long val;
1349 
1350 	if (kstrtol(buf, 10, &val) < 0
1351 	 || (val != 0 && val != 1))
1352 		return -EINVAL;
1353 
1354 	mutex_lock(&data->update_lock);
1355 	data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1356 	if (val)
1357 		data->beeps |= (1 << bitnr);
1358 	else
1359 		data->beeps &= ~(1 << bitnr);
1360 	it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1361 	mutex_unlock(&data->update_lock);
1362 	return count;
1363 }
1364 
1365 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1366 			  show_beep, set_beep, 1);
1367 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1368 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1369 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1370 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1371 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1372 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1373 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1374 /* fanX_beep writability is set later */
1375 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1376 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1377 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1378 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1379 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1380 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1381 			  show_beep, set_beep, 2);
1382 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1383 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1384 
1385 static ssize_t show_vrm_reg(struct device *dev, struct device_attribute *attr,
1386 		char *buf)
1387 {
1388 	struct it87_data *data = dev_get_drvdata(dev);
1389 	return sprintf(buf, "%u\n", data->vrm);
1390 }
1391 static ssize_t store_vrm_reg(struct device *dev, struct device_attribute *attr,
1392 		const char *buf, size_t count)
1393 {
1394 	struct it87_data *data = dev_get_drvdata(dev);
1395 	unsigned long val;
1396 
1397 	if (kstrtoul(buf, 10, &val) < 0)
1398 		return -EINVAL;
1399 
1400 	data->vrm = val;
1401 
1402 	return count;
1403 }
1404 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
1405 
1406 static ssize_t show_vid_reg(struct device *dev, struct device_attribute *attr,
1407 		char *buf)
1408 {
1409 	struct it87_data *data = it87_update_device(dev);
1410 	return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
1411 }
1412 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
1413 
1414 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1415 		char *buf)
1416 {
1417 	static const char * const labels[] = {
1418 		"+5V",
1419 		"5VSB",
1420 		"Vbat",
1421 	};
1422 	static const char * const labels_it8721[] = {
1423 		"+3.3V",
1424 		"3VSB",
1425 		"Vbat",
1426 	};
1427 	struct it87_data *data = dev_get_drvdata(dev);
1428 	int nr = to_sensor_dev_attr(attr)->index;
1429 
1430 	return sprintf(buf, "%s\n", has_12mv_adc(data) ? labels_it8721[nr]
1431 						       : labels[nr]);
1432 }
1433 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1434 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1435 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1436 /* special AVCC3 IT8603E in9 */
1437 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 0);
1438 
1439 static ssize_t show_name(struct device *dev, struct device_attribute
1440 			 *devattr, char *buf)
1441 {
1442 	struct it87_data *data = dev_get_drvdata(dev);
1443 	return sprintf(buf, "%s\n", data->name);
1444 }
1445 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1446 
1447 static struct attribute *it87_attributes_in[10][5] = {
1448 {
1449 	&sensor_dev_attr_in0_input.dev_attr.attr,
1450 	&sensor_dev_attr_in0_min.dev_attr.attr,
1451 	&sensor_dev_attr_in0_max.dev_attr.attr,
1452 	&sensor_dev_attr_in0_alarm.dev_attr.attr,
1453 	NULL
1454 }, {
1455 	&sensor_dev_attr_in1_input.dev_attr.attr,
1456 	&sensor_dev_attr_in1_min.dev_attr.attr,
1457 	&sensor_dev_attr_in1_max.dev_attr.attr,
1458 	&sensor_dev_attr_in1_alarm.dev_attr.attr,
1459 	NULL
1460 }, {
1461 	&sensor_dev_attr_in2_input.dev_attr.attr,
1462 	&sensor_dev_attr_in2_min.dev_attr.attr,
1463 	&sensor_dev_attr_in2_max.dev_attr.attr,
1464 	&sensor_dev_attr_in2_alarm.dev_attr.attr,
1465 	NULL
1466 }, {
1467 	&sensor_dev_attr_in3_input.dev_attr.attr,
1468 	&sensor_dev_attr_in3_min.dev_attr.attr,
1469 	&sensor_dev_attr_in3_max.dev_attr.attr,
1470 	&sensor_dev_attr_in3_alarm.dev_attr.attr,
1471 	NULL
1472 }, {
1473 	&sensor_dev_attr_in4_input.dev_attr.attr,
1474 	&sensor_dev_attr_in4_min.dev_attr.attr,
1475 	&sensor_dev_attr_in4_max.dev_attr.attr,
1476 	&sensor_dev_attr_in4_alarm.dev_attr.attr,
1477 	NULL
1478 }, {
1479 	&sensor_dev_attr_in5_input.dev_attr.attr,
1480 	&sensor_dev_attr_in5_min.dev_attr.attr,
1481 	&sensor_dev_attr_in5_max.dev_attr.attr,
1482 	&sensor_dev_attr_in5_alarm.dev_attr.attr,
1483 	NULL
1484 }, {
1485 	&sensor_dev_attr_in6_input.dev_attr.attr,
1486 	&sensor_dev_attr_in6_min.dev_attr.attr,
1487 	&sensor_dev_attr_in6_max.dev_attr.attr,
1488 	&sensor_dev_attr_in6_alarm.dev_attr.attr,
1489 	NULL
1490 }, {
1491 	&sensor_dev_attr_in7_input.dev_attr.attr,
1492 	&sensor_dev_attr_in7_min.dev_attr.attr,
1493 	&sensor_dev_attr_in7_max.dev_attr.attr,
1494 	&sensor_dev_attr_in7_alarm.dev_attr.attr,
1495 	NULL
1496 }, {
1497 	&sensor_dev_attr_in8_input.dev_attr.attr,
1498 	NULL
1499 }, {
1500 	&sensor_dev_attr_in9_input.dev_attr.attr,
1501 	NULL
1502 } };
1503 
1504 static const struct attribute_group it87_group_in[10] = {
1505 	{ .attrs = it87_attributes_in[0] },
1506 	{ .attrs = it87_attributes_in[1] },
1507 	{ .attrs = it87_attributes_in[2] },
1508 	{ .attrs = it87_attributes_in[3] },
1509 	{ .attrs = it87_attributes_in[4] },
1510 	{ .attrs = it87_attributes_in[5] },
1511 	{ .attrs = it87_attributes_in[6] },
1512 	{ .attrs = it87_attributes_in[7] },
1513 	{ .attrs = it87_attributes_in[8] },
1514 	{ .attrs = it87_attributes_in[9] },
1515 };
1516 
1517 static struct attribute *it87_attributes_temp[3][6] = {
1518 {
1519 	&sensor_dev_attr_temp1_input.dev_attr.attr,
1520 	&sensor_dev_attr_temp1_max.dev_attr.attr,
1521 	&sensor_dev_attr_temp1_min.dev_attr.attr,
1522 	&sensor_dev_attr_temp1_type.dev_attr.attr,
1523 	&sensor_dev_attr_temp1_alarm.dev_attr.attr,
1524 	NULL
1525 } , {
1526 	&sensor_dev_attr_temp2_input.dev_attr.attr,
1527 	&sensor_dev_attr_temp2_max.dev_attr.attr,
1528 	&sensor_dev_attr_temp2_min.dev_attr.attr,
1529 	&sensor_dev_attr_temp2_type.dev_attr.attr,
1530 	&sensor_dev_attr_temp2_alarm.dev_attr.attr,
1531 	NULL
1532 } , {
1533 	&sensor_dev_attr_temp3_input.dev_attr.attr,
1534 	&sensor_dev_attr_temp3_max.dev_attr.attr,
1535 	&sensor_dev_attr_temp3_min.dev_attr.attr,
1536 	&sensor_dev_attr_temp3_type.dev_attr.attr,
1537 	&sensor_dev_attr_temp3_alarm.dev_attr.attr,
1538 	NULL
1539 } };
1540 
1541 static const struct attribute_group it87_group_temp[3] = {
1542 	{ .attrs = it87_attributes_temp[0] },
1543 	{ .attrs = it87_attributes_temp[1] },
1544 	{ .attrs = it87_attributes_temp[2] },
1545 };
1546 
1547 static struct attribute *it87_attributes_temp_offset[] = {
1548 	&sensor_dev_attr_temp1_offset.dev_attr.attr,
1549 	&sensor_dev_attr_temp2_offset.dev_attr.attr,
1550 	&sensor_dev_attr_temp3_offset.dev_attr.attr,
1551 };
1552 
1553 static struct attribute *it87_attributes[] = {
1554 	&dev_attr_alarms.attr,
1555 	&sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
1556 	&dev_attr_name.attr,
1557 	NULL
1558 };
1559 
1560 static const struct attribute_group it87_group = {
1561 	.attrs = it87_attributes,
1562 };
1563 
1564 static struct attribute *it87_attributes_in_beep[] = {
1565 	&sensor_dev_attr_in0_beep.dev_attr.attr,
1566 	&sensor_dev_attr_in1_beep.dev_attr.attr,
1567 	&sensor_dev_attr_in2_beep.dev_attr.attr,
1568 	&sensor_dev_attr_in3_beep.dev_attr.attr,
1569 	&sensor_dev_attr_in4_beep.dev_attr.attr,
1570 	&sensor_dev_attr_in5_beep.dev_attr.attr,
1571 	&sensor_dev_attr_in6_beep.dev_attr.attr,
1572 	&sensor_dev_attr_in7_beep.dev_attr.attr,
1573 	NULL,
1574 	NULL,
1575 };
1576 
1577 static struct attribute *it87_attributes_temp_beep[] = {
1578 	&sensor_dev_attr_temp1_beep.dev_attr.attr,
1579 	&sensor_dev_attr_temp2_beep.dev_attr.attr,
1580 	&sensor_dev_attr_temp3_beep.dev_attr.attr,
1581 };
1582 
1583 static struct attribute *it87_attributes_fan[5][3+1] = { {
1584 	&sensor_dev_attr_fan1_input.dev_attr.attr,
1585 	&sensor_dev_attr_fan1_min.dev_attr.attr,
1586 	&sensor_dev_attr_fan1_alarm.dev_attr.attr,
1587 	NULL
1588 }, {
1589 	&sensor_dev_attr_fan2_input.dev_attr.attr,
1590 	&sensor_dev_attr_fan2_min.dev_attr.attr,
1591 	&sensor_dev_attr_fan2_alarm.dev_attr.attr,
1592 	NULL
1593 }, {
1594 	&sensor_dev_attr_fan3_input.dev_attr.attr,
1595 	&sensor_dev_attr_fan3_min.dev_attr.attr,
1596 	&sensor_dev_attr_fan3_alarm.dev_attr.attr,
1597 	NULL
1598 }, {
1599 	&sensor_dev_attr_fan4_input.dev_attr.attr,
1600 	&sensor_dev_attr_fan4_min.dev_attr.attr,
1601 	&sensor_dev_attr_fan4_alarm.dev_attr.attr,
1602 	NULL
1603 }, {
1604 	&sensor_dev_attr_fan5_input.dev_attr.attr,
1605 	&sensor_dev_attr_fan5_min.dev_attr.attr,
1606 	&sensor_dev_attr_fan5_alarm.dev_attr.attr,
1607 	NULL
1608 } };
1609 
1610 static const struct attribute_group it87_group_fan[5] = {
1611 	{ .attrs = it87_attributes_fan[0] },
1612 	{ .attrs = it87_attributes_fan[1] },
1613 	{ .attrs = it87_attributes_fan[2] },
1614 	{ .attrs = it87_attributes_fan[3] },
1615 	{ .attrs = it87_attributes_fan[4] },
1616 };
1617 
1618 static const struct attribute *it87_attributes_fan_div[] = {
1619 	&sensor_dev_attr_fan1_div.dev_attr.attr,
1620 	&sensor_dev_attr_fan2_div.dev_attr.attr,
1621 	&sensor_dev_attr_fan3_div.dev_attr.attr,
1622 };
1623 
1624 static struct attribute *it87_attributes_pwm[3][4+1] = { {
1625 	&sensor_dev_attr_pwm1_enable.dev_attr.attr,
1626 	&sensor_dev_attr_pwm1.dev_attr.attr,
1627 	&dev_attr_pwm1_freq.attr,
1628 	&sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
1629 	NULL
1630 }, {
1631 	&sensor_dev_attr_pwm2_enable.dev_attr.attr,
1632 	&sensor_dev_attr_pwm2.dev_attr.attr,
1633 	&dev_attr_pwm2_freq.attr,
1634 	&sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
1635 	NULL
1636 }, {
1637 	&sensor_dev_attr_pwm3_enable.dev_attr.attr,
1638 	&sensor_dev_attr_pwm3.dev_attr.attr,
1639 	&dev_attr_pwm3_freq.attr,
1640 	&sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
1641 	NULL
1642 } };
1643 
1644 static const struct attribute_group it87_group_pwm[3] = {
1645 	{ .attrs = it87_attributes_pwm[0] },
1646 	{ .attrs = it87_attributes_pwm[1] },
1647 	{ .attrs = it87_attributes_pwm[2] },
1648 };
1649 
1650 static struct attribute *it87_attributes_autopwm[3][9+1] = { {
1651 	&sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
1652 	&sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
1653 	&sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
1654 	&sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
1655 	&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1656 	&sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
1657 	&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1658 	&sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1659 	&sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
1660 	NULL
1661 }, {
1662 	&sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
1663 	&sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
1664 	&sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
1665 	&sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
1666 	&sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1667 	&sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
1668 	&sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1669 	&sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1670 	&sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
1671 	NULL
1672 }, {
1673 	&sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
1674 	&sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
1675 	&sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
1676 	&sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
1677 	&sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1678 	&sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
1679 	&sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1680 	&sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1681 	&sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
1682 	NULL
1683 } };
1684 
1685 static const struct attribute_group it87_group_autopwm[3] = {
1686 	{ .attrs = it87_attributes_autopwm[0] },
1687 	{ .attrs = it87_attributes_autopwm[1] },
1688 	{ .attrs = it87_attributes_autopwm[2] },
1689 };
1690 
1691 static struct attribute *it87_attributes_fan_beep[] = {
1692 	&sensor_dev_attr_fan1_beep.dev_attr.attr,
1693 	&sensor_dev_attr_fan2_beep.dev_attr.attr,
1694 	&sensor_dev_attr_fan3_beep.dev_attr.attr,
1695 	&sensor_dev_attr_fan4_beep.dev_attr.attr,
1696 	&sensor_dev_attr_fan5_beep.dev_attr.attr,
1697 };
1698 
1699 static struct attribute *it87_attributes_vid[] = {
1700 	&dev_attr_vrm.attr,
1701 	&dev_attr_cpu0_vid.attr,
1702 	NULL
1703 };
1704 
1705 static const struct attribute_group it87_group_vid = {
1706 	.attrs = it87_attributes_vid,
1707 };
1708 
1709 static struct attribute *it87_attributes_label[] = {
1710 	&sensor_dev_attr_in3_label.dev_attr.attr,
1711 	&sensor_dev_attr_in7_label.dev_attr.attr,
1712 	&sensor_dev_attr_in8_label.dev_attr.attr,
1713 	&sensor_dev_attr_in9_label.dev_attr.attr,
1714 	NULL
1715 };
1716 
1717 static const struct attribute_group it87_group_label = {
1718 	.attrs = it87_attributes_label,
1719 };
1720 
1721 /* SuperIO detection - will change isa_address if a chip is found */
1722 static int __init it87_find(unsigned short *address,
1723 	struct it87_sio_data *sio_data)
1724 {
1725 	int err;
1726 	u16 chip_type;
1727 	const char *board_vendor, *board_name;
1728 
1729 	err = superio_enter();
1730 	if (err)
1731 		return err;
1732 
1733 	err = -ENODEV;
1734 	chip_type = force_id ? force_id : superio_inw(DEVID);
1735 
1736 	switch (chip_type) {
1737 	case IT8705F_DEVID:
1738 		sio_data->type = it87;
1739 		break;
1740 	case IT8712F_DEVID:
1741 		sio_data->type = it8712;
1742 		break;
1743 	case IT8716F_DEVID:
1744 	case IT8726F_DEVID:
1745 		sio_data->type = it8716;
1746 		break;
1747 	case IT8718F_DEVID:
1748 		sio_data->type = it8718;
1749 		break;
1750 	case IT8720F_DEVID:
1751 		sio_data->type = it8720;
1752 		break;
1753 	case IT8721F_DEVID:
1754 		sio_data->type = it8721;
1755 		break;
1756 	case IT8728F_DEVID:
1757 		sio_data->type = it8728;
1758 		break;
1759 	case IT8771E_DEVID:
1760 		sio_data->type = it8771;
1761 		break;
1762 	case IT8772E_DEVID:
1763 		sio_data->type = it8772;
1764 		break;
1765 	case IT8782F_DEVID:
1766 		sio_data->type = it8782;
1767 		break;
1768 	case IT8783E_DEVID:
1769 		sio_data->type = it8783;
1770 		break;
1771 	case IT8603E_DEVID:
1772 	case IT8623E_DEVID:
1773 		sio_data->type = it8603;
1774 		break;
1775 	case 0xffff:	/* No device at all */
1776 		goto exit;
1777 	default:
1778 		pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
1779 		goto exit;
1780 	}
1781 
1782 	superio_select(PME);
1783 	if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
1784 		pr_info("Device not activated, skipping\n");
1785 		goto exit;
1786 	}
1787 
1788 	*address = superio_inw(IT87_BASE_REG) & ~(IT87_EXTENT - 1);
1789 	if (*address == 0) {
1790 		pr_info("Base address not set, skipping\n");
1791 		goto exit;
1792 	}
1793 
1794 	err = 0;
1795 	sio_data->revision = superio_inb(DEVREV) & 0x0f;
1796 	pr_info("Found IT%04x%c chip at 0x%x, revision %d\n", chip_type,
1797 		chip_type == 0x8771 || chip_type == 0x8772 ||
1798 		chip_type == 0x8603 ? 'E' : 'F', *address,
1799 		sio_data->revision);
1800 
1801 	/* in8 (Vbat) is always internal */
1802 	sio_data->internal = (1 << 2);
1803 	/* Only the IT8603E has in9 */
1804 	if (sio_data->type != it8603)
1805 		sio_data->skip_in |= (1 << 9);
1806 
1807 	/* Read GPIO config and VID value from LDN 7 (GPIO) */
1808 	if (sio_data->type == it87) {
1809 		/* The IT8705F doesn't have VID pins at all */
1810 		sio_data->skip_vid = 1;
1811 
1812 		/* The IT8705F has a different LD number for GPIO */
1813 		superio_select(5);
1814 		sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1815 	} else if (sio_data->type == it8783) {
1816 		int reg25, reg27, reg2a, reg2c, regef;
1817 
1818 		sio_data->skip_vid = 1;	/* No VID */
1819 
1820 		superio_select(GPIO);
1821 
1822 		reg25 = superio_inb(IT87_SIO_GPIO1_REG);
1823 		reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1824 		reg2a = superio_inb(IT87_SIO_PINX1_REG);
1825 		reg2c = superio_inb(IT87_SIO_PINX2_REG);
1826 		regef = superio_inb(IT87_SIO_SPI_REG);
1827 
1828 		/* Check if fan3 is there or not */
1829 		if ((reg27 & (1 << 0)) || !(reg2c & (1 << 2)))
1830 			sio_data->skip_fan |= (1 << 2);
1831 		if ((reg25 & (1 << 4))
1832 		    || (!(reg2a & (1 << 1)) && (regef & (1 << 0))))
1833 			sio_data->skip_pwm |= (1 << 2);
1834 
1835 		/* Check if fan2 is there or not */
1836 		if (reg27 & (1 << 7))
1837 			sio_data->skip_fan |= (1 << 1);
1838 		if (reg27 & (1 << 3))
1839 			sio_data->skip_pwm |= (1 << 1);
1840 
1841 		/* VIN5 */
1842 		if ((reg27 & (1 << 0)) || (reg2c & (1 << 2)))
1843 			sio_data->skip_in |= (1 << 5); /* No VIN5 */
1844 
1845 		/* VIN6 */
1846 		if (reg27 & (1 << 1))
1847 			sio_data->skip_in |= (1 << 6); /* No VIN6 */
1848 
1849 		/*
1850 		 * VIN7
1851 		 * Does not depend on bit 2 of Reg2C, contrary to datasheet.
1852 		 */
1853 		if (reg27 & (1 << 2)) {
1854 			/*
1855 			 * The data sheet is a bit unclear regarding the
1856 			 * internal voltage divider for VCCH5V. It says
1857 			 * "This bit enables and switches VIN7 (pin 91) to the
1858 			 * internal voltage divider for VCCH5V".
1859 			 * This is different to other chips, where the internal
1860 			 * voltage divider would connect VIN7 to an internal
1861 			 * voltage source. Maybe that is the case here as well.
1862 			 *
1863 			 * Since we don't know for sure, re-route it if that is
1864 			 * not the case, and ask the user to report if the
1865 			 * resulting voltage is sane.
1866 			 */
1867 			if (!(reg2c & (1 << 1))) {
1868 				reg2c |= (1 << 1);
1869 				superio_outb(IT87_SIO_PINX2_REG, reg2c);
1870 				pr_notice("Routing internal VCCH5V to in7.\n");
1871 			}
1872 			pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
1873 			pr_notice("Please report if it displays a reasonable voltage.\n");
1874 		}
1875 
1876 		if (reg2c & (1 << 0))
1877 			sio_data->internal |= (1 << 0);
1878 		if (reg2c & (1 << 1))
1879 			sio_data->internal |= (1 << 1);
1880 
1881 		sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1882 	} else if (sio_data->type == it8603) {
1883 		int reg27, reg29;
1884 
1885 		sio_data->skip_vid = 1;	/* No VID */
1886 		superio_select(GPIO);
1887 
1888 		reg27 = superio_inb(IT87_SIO_GPIO3_REG);
1889 
1890 		/* Check if fan3 is there or not */
1891 		if (reg27 & (1 << 6))
1892 			sio_data->skip_pwm |= (1 << 2);
1893 		if (reg27 & (1 << 7))
1894 			sio_data->skip_fan |= (1 << 2);
1895 
1896 		/* Check if fan2 is there or not */
1897 		reg29 = superio_inb(IT87_SIO_GPIO5_REG);
1898 		if (reg29 & (1 << 1))
1899 			sio_data->skip_pwm |= (1 << 1);
1900 		if (reg29 & (1 << 2))
1901 			sio_data->skip_fan |= (1 << 1);
1902 
1903 		sio_data->skip_in |= (1 << 5); /* No VIN5 */
1904 		sio_data->skip_in |= (1 << 6); /* No VIN6 */
1905 
1906 		/* no fan4 */
1907 		sio_data->skip_pwm |= (1 << 3);
1908 		sio_data->skip_fan |= (1 << 3);
1909 
1910 		sio_data->internal |= (1 << 1); /* in7 is VSB */
1911 		sio_data->internal |= (1 << 3); /* in9 is AVCC */
1912 
1913 		sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
1914 	} else {
1915 		int reg;
1916 		bool uart6;
1917 
1918 		superio_select(GPIO);
1919 
1920 		reg = superio_inb(IT87_SIO_GPIO3_REG);
1921 		if (sio_data->type == it8721 || sio_data->type == it8728 ||
1922 		    sio_data->type == it8771 || sio_data->type == it8772 ||
1923 		    sio_data->type == it8782) {
1924 			/*
1925 			 * IT8721F/IT8758E, and IT8782F don't have VID pins
1926 			 * at all, not sure about the IT8728F and compatibles.
1927 			 */
1928 			sio_data->skip_vid = 1;
1929 		} else {
1930 			/* We need at least 4 VID pins */
1931 			if (reg & 0x0f) {
1932 				pr_info("VID is disabled (pins used for GPIO)\n");
1933 				sio_data->skip_vid = 1;
1934 			}
1935 		}
1936 
1937 		/* Check if fan3 is there or not */
1938 		if (reg & (1 << 6))
1939 			sio_data->skip_pwm |= (1 << 2);
1940 		if (reg & (1 << 7))
1941 			sio_data->skip_fan |= (1 << 2);
1942 
1943 		/* Check if fan2 is there or not */
1944 		reg = superio_inb(IT87_SIO_GPIO5_REG);
1945 		if (reg & (1 << 1))
1946 			sio_data->skip_pwm |= (1 << 1);
1947 		if (reg & (1 << 2))
1948 			sio_data->skip_fan |= (1 << 1);
1949 
1950 		if ((sio_data->type == it8718 || sio_data->type == it8720)
1951 		 && !(sio_data->skip_vid))
1952 			sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
1953 
1954 		reg = superio_inb(IT87_SIO_PINX2_REG);
1955 
1956 		uart6 = sio_data->type == it8782 && (reg & (1 << 2));
1957 
1958 		/*
1959 		 * The IT8720F has no VIN7 pin, so VCCH should always be
1960 		 * routed internally to VIN7 with an internal divider.
1961 		 * Curiously, there still is a configuration bit to control
1962 		 * this, which means it can be set incorrectly. And even
1963 		 * more curiously, many boards out there are improperly
1964 		 * configured, even though the IT8720F datasheet claims
1965 		 * that the internal routing of VCCH to VIN7 is the default
1966 		 * setting. So we force the internal routing in this case.
1967 		 *
1968 		 * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
1969 		 * If UART6 is enabled, re-route VIN7 to the internal divider
1970 		 * if that is not already the case.
1971 		 */
1972 		if ((sio_data->type == it8720 || uart6) && !(reg & (1 << 1))) {
1973 			reg |= (1 << 1);
1974 			superio_outb(IT87_SIO_PINX2_REG, reg);
1975 			pr_notice("Routing internal VCCH to in7\n");
1976 		}
1977 		if (reg & (1 << 0))
1978 			sio_data->internal |= (1 << 0);
1979 		if ((reg & (1 << 1)) || sio_data->type == it8721 ||
1980 		    sio_data->type == it8728 ||
1981 		    sio_data->type == it8771 ||
1982 		    sio_data->type == it8772)
1983 			sio_data->internal |= (1 << 1);
1984 
1985 		/*
1986 		 * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
1987 		 * While VIN7 can be routed to the internal voltage divider,
1988 		 * VIN5 and VIN6 are not available if UART6 is enabled.
1989 		 *
1990 		 * Also, temp3 is not available if UART6 is enabled and TEMPIN3
1991 		 * is the temperature source. Since we can not read the
1992 		 * temperature source here, skip_temp is preliminary.
1993 		 */
1994 		if (uart6) {
1995 			sio_data->skip_in |= (1 << 5) | (1 << 6);
1996 			sio_data->skip_temp |= (1 << 2);
1997 		}
1998 
1999 		sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
2000 	}
2001 	if (sio_data->beep_pin)
2002 		pr_info("Beeping is supported\n");
2003 
2004 	/* Disable specific features based on DMI strings */
2005 	board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2006 	board_name = dmi_get_system_info(DMI_BOARD_NAME);
2007 	if (board_vendor && board_name) {
2008 		if (strcmp(board_vendor, "nVIDIA") == 0
2009 		 && strcmp(board_name, "FN68PT") == 0) {
2010 			/*
2011 			 * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2012 			 * connected to a fan, but to something else. One user
2013 			 * has reported instant system power-off when changing
2014 			 * the PWM2 duty cycle, so we disable it.
2015 			 * I use the board name string as the trigger in case
2016 			 * the same board is ever used in other systems.
2017 			 */
2018 			pr_info("Disabling pwm2 due to hardware constraints\n");
2019 			sio_data->skip_pwm = (1 << 1);
2020 		}
2021 	}
2022 
2023 exit:
2024 	superio_exit();
2025 	return err;
2026 }
2027 
2028 static void it87_remove_files(struct device *dev)
2029 {
2030 	struct it87_data *data = platform_get_drvdata(pdev);
2031 	struct it87_sio_data *sio_data = dev_get_platdata(dev);
2032 	int i;
2033 
2034 	sysfs_remove_group(&dev->kobj, &it87_group);
2035 	for (i = 0; i < 10; i++) {
2036 		if (sio_data->skip_in & (1 << i))
2037 			continue;
2038 		sysfs_remove_group(&dev->kobj, &it87_group_in[i]);
2039 		if (it87_attributes_in_beep[i])
2040 			sysfs_remove_file(&dev->kobj,
2041 					  it87_attributes_in_beep[i]);
2042 	}
2043 	for (i = 0; i < 3; i++) {
2044 		if (!(data->has_temp & (1 << i)))
2045 			continue;
2046 		sysfs_remove_group(&dev->kobj, &it87_group_temp[i]);
2047 		if (has_temp_offset(data))
2048 			sysfs_remove_file(&dev->kobj,
2049 					  it87_attributes_temp_offset[i]);
2050 		if (sio_data->beep_pin)
2051 			sysfs_remove_file(&dev->kobj,
2052 					  it87_attributes_temp_beep[i]);
2053 	}
2054 	for (i = 0; i < 5; i++) {
2055 		if (!(data->has_fan & (1 << i)))
2056 			continue;
2057 		sysfs_remove_group(&dev->kobj, &it87_group_fan[i]);
2058 		if (sio_data->beep_pin)
2059 			sysfs_remove_file(&dev->kobj,
2060 					  it87_attributes_fan_beep[i]);
2061 		if (i < 3 && !has_16bit_fans(data))
2062 			sysfs_remove_file(&dev->kobj,
2063 					  it87_attributes_fan_div[i]);
2064 	}
2065 	for (i = 0; i < 3; i++) {
2066 		if (sio_data->skip_pwm & (1 << 0))
2067 			continue;
2068 		sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
2069 		if (has_old_autopwm(data))
2070 			sysfs_remove_group(&dev->kobj,
2071 					   &it87_group_autopwm[i]);
2072 	}
2073 	if (!sio_data->skip_vid)
2074 		sysfs_remove_group(&dev->kobj, &it87_group_vid);
2075 	sysfs_remove_group(&dev->kobj, &it87_group_label);
2076 }
2077 
2078 static int it87_probe(struct platform_device *pdev)
2079 {
2080 	struct it87_data *data;
2081 	struct resource *res;
2082 	struct device *dev = &pdev->dev;
2083 	struct it87_sio_data *sio_data = dev_get_platdata(dev);
2084 	int err = 0, i;
2085 	int enable_pwm_interface;
2086 	int fan_beep_need_rw;
2087 
2088 	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2089 	if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
2090 				 DRVNAME)) {
2091 		dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
2092 			(unsigned long)res->start,
2093 			(unsigned long)(res->start + IT87_EC_EXTENT - 1));
2094 		return -EBUSY;
2095 	}
2096 
2097 	data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
2098 	if (!data)
2099 		return -ENOMEM;
2100 
2101 	data->addr = res->start;
2102 	data->type = sio_data->type;
2103 	data->features = it87_devices[sio_data->type].features;
2104 	data->peci_mask = it87_devices[sio_data->type].peci_mask;
2105 	data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
2106 	data->name = it87_devices[sio_data->type].name;
2107 	/*
2108 	 * IT8705F Datasheet 0.4.1, 3h == Version G.
2109 	 * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
2110 	 * These are the first revisions with 16-bit tachometer support.
2111 	 */
2112 	switch (data->type) {
2113 	case it87:
2114 		if (sio_data->revision >= 0x03) {
2115 			data->features &= ~FEAT_OLD_AUTOPWM;
2116 			data->features |= FEAT_16BIT_FANS;
2117 		}
2118 		break;
2119 	case it8712:
2120 		if (sio_data->revision >= 0x08) {
2121 			data->features &= ~FEAT_OLD_AUTOPWM;
2122 			data->features |= FEAT_16BIT_FANS;
2123 		}
2124 		break;
2125 	default:
2126 		break;
2127 	}
2128 
2129 	/* Now, we do the remaining detection. */
2130 	if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
2131 	 || it87_read_value(data, IT87_REG_CHIPID) != 0x90)
2132 		return -ENODEV;
2133 
2134 	platform_set_drvdata(pdev, data);
2135 
2136 	mutex_init(&data->update_lock);
2137 
2138 	/* Check PWM configuration */
2139 	enable_pwm_interface = it87_check_pwm(dev);
2140 
2141 	/* Starting with IT8721F, we handle scaling of internal voltages */
2142 	if (has_12mv_adc(data)) {
2143 		if (sio_data->internal & (1 << 0))
2144 			data->in_scaled |= (1 << 3);	/* in3 is AVCC */
2145 		if (sio_data->internal & (1 << 1))
2146 			data->in_scaled |= (1 << 7);	/* in7 is VSB */
2147 		if (sio_data->internal & (1 << 2))
2148 			data->in_scaled |= (1 << 8);	/* in8 is Vbat */
2149 		if (sio_data->internal & (1 << 3))
2150 			data->in_scaled |= (1 << 9);	/* in9 is AVCC */
2151 	} else if (sio_data->type == it8782 || sio_data->type == it8783) {
2152 		if (sio_data->internal & (1 << 0))
2153 			data->in_scaled |= (1 << 3);	/* in3 is VCC5V */
2154 		if (sio_data->internal & (1 << 1))
2155 			data->in_scaled |= (1 << 7);	/* in7 is VCCH5V */
2156 	}
2157 
2158 	data->has_temp = 0x07;
2159 	if (sio_data->skip_temp & (1 << 2)) {
2160 		if (sio_data->type == it8782
2161 		    && !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
2162 			data->has_temp &= ~(1 << 2);
2163 	}
2164 
2165 	/* Initialize the IT87 chip */
2166 	it87_init_device(pdev);
2167 
2168 	/* Register sysfs hooks */
2169 	err = sysfs_create_group(&dev->kobj, &it87_group);
2170 	if (err)
2171 		return err;
2172 
2173 	for (i = 0; i < 10; i++) {
2174 		if (sio_data->skip_in & (1 << i))
2175 			continue;
2176 		err = sysfs_create_group(&dev->kobj, &it87_group_in[i]);
2177 		if (err)
2178 			goto error;
2179 		if (sio_data->beep_pin && it87_attributes_in_beep[i]) {
2180 			err = sysfs_create_file(&dev->kobj,
2181 						it87_attributes_in_beep[i]);
2182 			if (err)
2183 				goto error;
2184 		}
2185 	}
2186 
2187 	for (i = 0; i < 3; i++) {
2188 		if (!(data->has_temp & (1 << i)))
2189 			continue;
2190 		err = sysfs_create_group(&dev->kobj, &it87_group_temp[i]);
2191 		if (err)
2192 			goto error;
2193 		if (has_temp_offset(data)) {
2194 			err = sysfs_create_file(&dev->kobj,
2195 						it87_attributes_temp_offset[i]);
2196 			if (err)
2197 				goto error;
2198 		}
2199 		if (sio_data->beep_pin) {
2200 			err = sysfs_create_file(&dev->kobj,
2201 						it87_attributes_temp_beep[i]);
2202 			if (err)
2203 				goto error;
2204 		}
2205 	}
2206 
2207 	/* Do not create fan files for disabled fans */
2208 	fan_beep_need_rw = 1;
2209 	for (i = 0; i < 5; i++) {
2210 		if (!(data->has_fan & (1 << i)))
2211 			continue;
2212 		err = sysfs_create_group(&dev->kobj, &it87_group_fan[i]);
2213 		if (err)
2214 			goto error;
2215 
2216 		if (i < 3 && !has_16bit_fans(data)) {
2217 			err = sysfs_create_file(&dev->kobj,
2218 						it87_attributes_fan_div[i]);
2219 			if (err)
2220 				goto error;
2221 		}
2222 
2223 		if (sio_data->beep_pin) {
2224 			err = sysfs_create_file(&dev->kobj,
2225 						it87_attributes_fan_beep[i]);
2226 			if (err)
2227 				goto error;
2228 			if (!fan_beep_need_rw)
2229 				continue;
2230 
2231 			/*
2232 			 * As we have a single beep enable bit for all fans,
2233 			 * only the first enabled fan has a writable attribute
2234 			 * for it.
2235 			 */
2236 			if (sysfs_chmod_file(&dev->kobj,
2237 					     it87_attributes_fan_beep[i],
2238 					     S_IRUGO | S_IWUSR))
2239 				dev_dbg(dev, "chmod +w fan%d_beep failed\n",
2240 					i + 1);
2241 			fan_beep_need_rw = 0;
2242 		}
2243 	}
2244 
2245 	if (enable_pwm_interface) {
2246 		for (i = 0; i < 3; i++) {
2247 			if (sio_data->skip_pwm & (1 << i))
2248 				continue;
2249 			err = sysfs_create_group(&dev->kobj,
2250 						 &it87_group_pwm[i]);
2251 			if (err)
2252 				goto error;
2253 
2254 			if (!has_old_autopwm(data))
2255 				continue;
2256 			err = sysfs_create_group(&dev->kobj,
2257 						 &it87_group_autopwm[i]);
2258 			if (err)
2259 				goto error;
2260 		}
2261 	}
2262 
2263 	if (!sio_data->skip_vid) {
2264 		data->vrm = vid_which_vrm();
2265 		/* VID reading from Super-I/O config space if available */
2266 		data->vid = sio_data->vid_value;
2267 		err = sysfs_create_group(&dev->kobj, &it87_group_vid);
2268 		if (err)
2269 			goto error;
2270 	}
2271 
2272 	/* Export labels for internal sensors */
2273 	for (i = 0; i < 4; i++) {
2274 		if (!(sio_data->internal & (1 << i)))
2275 			continue;
2276 		err = sysfs_create_file(&dev->kobj,
2277 					it87_attributes_label[i]);
2278 		if (err)
2279 			goto error;
2280 	}
2281 
2282 	data->hwmon_dev = hwmon_device_register(dev);
2283 	if (IS_ERR(data->hwmon_dev)) {
2284 		err = PTR_ERR(data->hwmon_dev);
2285 		goto error;
2286 	}
2287 
2288 	return 0;
2289 
2290 error:
2291 	it87_remove_files(dev);
2292 	return err;
2293 }
2294 
2295 static int it87_remove(struct platform_device *pdev)
2296 {
2297 	struct it87_data *data = platform_get_drvdata(pdev);
2298 
2299 	hwmon_device_unregister(data->hwmon_dev);
2300 	it87_remove_files(&pdev->dev);
2301 
2302 	return 0;
2303 }
2304 
2305 /*
2306  * Must be called with data->update_lock held, except during initialization.
2307  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2308  * would slow down the IT87 access and should not be necessary.
2309  */
2310 static int it87_read_value(struct it87_data *data, u8 reg)
2311 {
2312 	outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2313 	return inb_p(data->addr + IT87_DATA_REG_OFFSET);
2314 }
2315 
2316 /*
2317  * Must be called with data->update_lock held, except during initialization.
2318  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
2319  * would slow down the IT87 access and should not be necessary.
2320  */
2321 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
2322 {
2323 	outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
2324 	outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
2325 }
2326 
2327 /* Return 1 if and only if the PWM interface is safe to use */
2328 static int it87_check_pwm(struct device *dev)
2329 {
2330 	struct it87_data *data = dev_get_drvdata(dev);
2331 	/*
2332 	 * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2333 	 * and polarity set to active low is sign that this is the case so we
2334 	 * disable pwm control to protect the user.
2335 	 */
2336 	int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2337 	if ((tmp & 0x87) == 0) {
2338 		if (fix_pwm_polarity) {
2339 			/*
2340 			 * The user asks us to attempt a chip reconfiguration.
2341 			 * This means switching to active high polarity and
2342 			 * inverting all fan speed values.
2343 			 */
2344 			int i;
2345 			u8 pwm[3];
2346 
2347 			for (i = 0; i < 3; i++)
2348 				pwm[i] = it87_read_value(data,
2349 							 IT87_REG_PWM(i));
2350 
2351 			/*
2352 			 * If any fan is in automatic pwm mode, the polarity
2353 			 * might be correct, as suspicious as it seems, so we
2354 			 * better don't change anything (but still disable the
2355 			 * PWM interface).
2356 			 */
2357 			if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
2358 				dev_info(dev,
2359 					 "Reconfiguring PWM to active high polarity\n");
2360 				it87_write_value(data, IT87_REG_FAN_CTL,
2361 						 tmp | 0x87);
2362 				for (i = 0; i < 3; i++)
2363 					it87_write_value(data,
2364 							 IT87_REG_PWM(i),
2365 							 0x7f & ~pwm[i]);
2366 				return 1;
2367 			}
2368 
2369 			dev_info(dev,
2370 				 "PWM configuration is too broken to be fixed\n");
2371 		}
2372 
2373 		dev_info(dev,
2374 			 "Detected broken BIOS defaults, disabling PWM interface\n");
2375 		return 0;
2376 	} else if (fix_pwm_polarity) {
2377 		dev_info(dev,
2378 			 "PWM configuration looks sane, won't touch\n");
2379 	}
2380 
2381 	return 1;
2382 }
2383 
2384 /* Called when we have found a new IT87. */
2385 static void it87_init_device(struct platform_device *pdev)
2386 {
2387 	struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2388 	struct it87_data *data = platform_get_drvdata(pdev);
2389 	int tmp, i;
2390 	u8 mask;
2391 
2392 	/*
2393 	 * For each PWM channel:
2394 	 * - If it is in automatic mode, setting to manual mode should set
2395 	 *   the fan to full speed by default.
2396 	 * - If it is in manual mode, we need a mapping to temperature
2397 	 *   channels to use when later setting to automatic mode later.
2398 	 *   Use a 1:1 mapping by default (we are clueless.)
2399 	 * In both cases, the value can (and should) be changed by the user
2400 	 * prior to switching to a different mode.
2401 	 * Note that this is no longer needed for the IT8721F and later, as
2402 	 * these have separate registers for the temperature mapping and the
2403 	 * manual duty cycle.
2404 	 */
2405 	for (i = 0; i < 3; i++) {
2406 		data->pwm_temp_map[i] = i;
2407 		data->pwm_duty[i] = 0x7f;	/* Full speed */
2408 		data->auto_pwm[i][3] = 0x7f;	/* Full speed, hard-coded */
2409 	}
2410 
2411 	/*
2412 	 * Some chips seem to have default value 0xff for all limit
2413 	 * registers. For low voltage limits it makes no sense and triggers
2414 	 * alarms, so change to 0 instead. For high temperature limits, it
2415 	 * means -1 degree C, which surprisingly doesn't trigger an alarm,
2416 	 * but is still confusing, so change to 127 degrees C.
2417 	 */
2418 	for (i = 0; i < 8; i++) {
2419 		tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
2420 		if (tmp == 0xff)
2421 			it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2422 	}
2423 	for (i = 0; i < 3; i++) {
2424 		tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2425 		if (tmp == 0xff)
2426 			it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2427 	}
2428 
2429 	/*
2430 	 * Temperature channels are not forcibly enabled, as they can be
2431 	 * set to two different sensor types and we can't guess which one
2432 	 * is correct for a given system. These channels can be enabled at
2433 	 * run-time through the temp{1-3}_type sysfs accessors if needed.
2434 	 */
2435 
2436 	/* Check if voltage monitors are reset manually or by some reason */
2437 	tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
2438 	if ((tmp & 0xff) == 0) {
2439 		/* Enable all voltage monitors */
2440 		it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2441 	}
2442 
2443 	/* Check if tachometers are reset manually or by some reason */
2444 	mask = 0x70 & ~(sio_data->skip_fan << 4);
2445 	data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2446 	if ((data->fan_main_ctrl & mask) == 0) {
2447 		/* Enable all fan tachometers */
2448 		data->fan_main_ctrl |= mask;
2449 		it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2450 				 data->fan_main_ctrl);
2451 	}
2452 	data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2453 
2454 	/* Set tachometers to 16-bit mode if needed, IT8603E (and IT8728F?)
2455 	 * has it by default */
2456 	if (has_16bit_fans(data) && data->type != it8603) {
2457 		tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2458 		if (~tmp & 0x07 & data->has_fan) {
2459 			dev_dbg(&pdev->dev,
2460 				"Setting fan1-3 to 16-bit mode\n");
2461 			it87_write_value(data, IT87_REG_FAN_16BIT,
2462 					 tmp | 0x07);
2463 		}
2464 		/* IT8705F, IT8782F, and IT8783E/F only support three fans. */
2465 		if (data->type != it87 && data->type != it8782 &&
2466 		    data->type != it8783) {
2467 			if (tmp & (1 << 4))
2468 				data->has_fan |= (1 << 3); /* fan4 enabled */
2469 			if (tmp & (1 << 5))
2470 				data->has_fan |= (1 << 4); /* fan5 enabled */
2471 		}
2472 	}
2473 
2474 	/* Fan input pins may be used for alternative functions */
2475 	data->has_fan &= ~sio_data->skip_fan;
2476 
2477 	/* Start monitoring */
2478 	it87_write_value(data, IT87_REG_CONFIG,
2479 			 (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2480 			 | (update_vbat ? 0x41 : 0x01));
2481 }
2482 
2483 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
2484 {
2485 	data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
2486 	if (has_newer_autopwm(data)) {
2487 		data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2488 		data->pwm_duty[nr] = it87_read_value(data,
2489 						     IT87_REG_PWM_DUTY(nr));
2490 	} else {
2491 		if (data->pwm_ctrl[nr] & 0x80)	/* Automatic mode */
2492 			data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
2493 		else				/* Manual mode */
2494 			data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
2495 	}
2496 
2497 	if (has_old_autopwm(data)) {
2498 		int i;
2499 
2500 		for (i = 0; i < 5 ; i++)
2501 			data->auto_temp[nr][i] = it87_read_value(data,
2502 						IT87_REG_AUTO_TEMP(nr, i));
2503 		for (i = 0; i < 3 ; i++)
2504 			data->auto_pwm[nr][i] = it87_read_value(data,
2505 						IT87_REG_AUTO_PWM(nr, i));
2506 	}
2507 }
2508 
2509 static struct it87_data *it87_update_device(struct device *dev)
2510 {
2511 	struct it87_data *data = dev_get_drvdata(dev);
2512 	int i;
2513 
2514 	mutex_lock(&data->update_lock);
2515 
2516 	if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
2517 	    || !data->valid) {
2518 		if (update_vbat) {
2519 			/*
2520 			 * Cleared after each update, so reenable.  Value
2521 			 * returned by this read will be previous value
2522 			 */
2523 			it87_write_value(data, IT87_REG_CONFIG,
2524 				it87_read_value(data, IT87_REG_CONFIG) | 0x40);
2525 		}
2526 		for (i = 0; i <= 7; i++) {
2527 			data->in[i][0] =
2528 				it87_read_value(data, IT87_REG_VIN(i));
2529 			data->in[i][1] =
2530 				it87_read_value(data, IT87_REG_VIN_MIN(i));
2531 			data->in[i][2] =
2532 				it87_read_value(data, IT87_REG_VIN_MAX(i));
2533 		}
2534 		/* in8 (battery) has no limit registers */
2535 		data->in[8][0] = it87_read_value(data, IT87_REG_VIN(8));
2536 		if (data->type == it8603)
2537 			data->in[9][0] = it87_read_value(data, 0x2f);
2538 
2539 		for (i = 0; i < 5; i++) {
2540 			/* Skip disabled fans */
2541 			if (!(data->has_fan & (1 << i)))
2542 				continue;
2543 
2544 			data->fan[i][1] =
2545 				it87_read_value(data, IT87_REG_FAN_MIN[i]);
2546 			data->fan[i][0] = it87_read_value(data,
2547 				       IT87_REG_FAN[i]);
2548 			/* Add high byte if in 16-bit mode */
2549 			if (has_16bit_fans(data)) {
2550 				data->fan[i][0] |= it87_read_value(data,
2551 						IT87_REG_FANX[i]) << 8;
2552 				data->fan[i][1] |= it87_read_value(data,
2553 						IT87_REG_FANX_MIN[i]) << 8;
2554 			}
2555 		}
2556 		for (i = 0; i < 3; i++) {
2557 			if (!(data->has_temp & (1 << i)))
2558 				continue;
2559 			data->temp[i][0] =
2560 				it87_read_value(data, IT87_REG_TEMP(i));
2561 			data->temp[i][1] =
2562 				it87_read_value(data, IT87_REG_TEMP_LOW(i));
2563 			data->temp[i][2] =
2564 				it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2565 			if (has_temp_offset(data))
2566 				data->temp[i][3] =
2567 				  it87_read_value(data,
2568 						  IT87_REG_TEMP_OFFSET[i]);
2569 		}
2570 
2571 		/* Newer chips don't have clock dividers */
2572 		if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
2573 			i = it87_read_value(data, IT87_REG_FAN_DIV);
2574 			data->fan_div[0] = i & 0x07;
2575 			data->fan_div[1] = (i >> 3) & 0x07;
2576 			data->fan_div[2] = (i & 0x40) ? 3 : 1;
2577 		}
2578 
2579 		data->alarms =
2580 			it87_read_value(data, IT87_REG_ALARM1) |
2581 			(it87_read_value(data, IT87_REG_ALARM2) << 8) |
2582 			(it87_read_value(data, IT87_REG_ALARM3) << 16);
2583 		data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2584 
2585 		data->fan_main_ctrl = it87_read_value(data,
2586 				IT87_REG_FAN_MAIN_CTRL);
2587 		data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
2588 		for (i = 0; i < 3; i++)
2589 			it87_update_pwm_ctrl(data, i);
2590 
2591 		data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
2592 		data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
2593 		/*
2594 		 * The IT8705F does not have VID capability.
2595 		 * The IT8718F and later don't use IT87_REG_VID for the
2596 		 * same purpose.
2597 		 */
2598 		if (data->type == it8712 || data->type == it8716) {
2599 			data->vid = it87_read_value(data, IT87_REG_VID);
2600 			/*
2601 			 * The older IT8712F revisions had only 5 VID pins,
2602 			 * but we assume it is always safe to read 6 bits.
2603 			 */
2604 			data->vid &= 0x3f;
2605 		}
2606 		data->last_updated = jiffies;
2607 		data->valid = 1;
2608 	}
2609 
2610 	mutex_unlock(&data->update_lock);
2611 
2612 	return data;
2613 }
2614 
2615 static int __init it87_device_add(unsigned short address,
2616 				  const struct it87_sio_data *sio_data)
2617 {
2618 	struct resource res = {
2619 		.start	= address + IT87_EC_OFFSET,
2620 		.end	= address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
2621 		.name	= DRVNAME,
2622 		.flags	= IORESOURCE_IO,
2623 	};
2624 	int err;
2625 
2626 	err = acpi_check_resource_conflict(&res);
2627 	if (err)
2628 		goto exit;
2629 
2630 	pdev = platform_device_alloc(DRVNAME, address);
2631 	if (!pdev) {
2632 		err = -ENOMEM;
2633 		pr_err("Device allocation failed\n");
2634 		goto exit;
2635 	}
2636 
2637 	err = platform_device_add_resources(pdev, &res, 1);
2638 	if (err) {
2639 		pr_err("Device resource addition failed (%d)\n", err);
2640 		goto exit_device_put;
2641 	}
2642 
2643 	err = platform_device_add_data(pdev, sio_data,
2644 				       sizeof(struct it87_sio_data));
2645 	if (err) {
2646 		pr_err("Platform data allocation failed\n");
2647 		goto exit_device_put;
2648 	}
2649 
2650 	err = platform_device_add(pdev);
2651 	if (err) {
2652 		pr_err("Device addition failed (%d)\n", err);
2653 		goto exit_device_put;
2654 	}
2655 
2656 	return 0;
2657 
2658 exit_device_put:
2659 	platform_device_put(pdev);
2660 exit:
2661 	return err;
2662 }
2663 
2664 static int __init sm_it87_init(void)
2665 {
2666 	int err;
2667 	unsigned short isa_address = 0;
2668 	struct it87_sio_data sio_data;
2669 
2670 	memset(&sio_data, 0, sizeof(struct it87_sio_data));
2671 	err = it87_find(&isa_address, &sio_data);
2672 	if (err)
2673 		return err;
2674 	err = platform_driver_register(&it87_driver);
2675 	if (err)
2676 		return err;
2677 
2678 	err = it87_device_add(isa_address, &sio_data);
2679 	if (err) {
2680 		platform_driver_unregister(&it87_driver);
2681 		return err;
2682 	}
2683 
2684 	return 0;
2685 }
2686 
2687 static void __exit sm_it87_exit(void)
2688 {
2689 	platform_device_unregister(pdev);
2690 	platform_driver_unregister(&it87_driver);
2691 }
2692 
2693 
2694 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
2695 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
2696 module_param(update_vbat, bool, 0);
2697 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
2698 module_param(fix_pwm_polarity, bool, 0);
2699 MODULE_PARM_DESC(fix_pwm_polarity,
2700 		 "Force PWM polarity to active high (DANGEROUS)");
2701 MODULE_LICENSE("GPL");
2702 
2703 module_init(sm_it87_init);
2704 module_exit(sm_it87_exit);
2705