1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /*************************************************************************** 3 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> * 4 * Copyright (C) 2007-2011 Hans de Goede <hdegoede@redhat.com> * 5 * * 6 ***************************************************************************/ 7 8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 9 10 #include <linux/module.h> 11 #include <linux/init.h> 12 #include <linux/slab.h> 13 #include <linux/jiffies.h> 14 #include <linux/platform_device.h> 15 #include <linux/hwmon.h> 16 #include <linux/hwmon-sysfs.h> 17 #include <linux/err.h> 18 #include <linux/mutex.h> 19 #include <linux/io.h> 20 #include <linux/acpi.h> 21 22 #define DRVNAME "f71882fg" 23 24 #define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */ 25 #define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */ 26 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */ 27 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */ 28 29 #define SIO_REG_LDSEL 0x07 /* Logical device select */ 30 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ 31 #define SIO_REG_DEVREV 0x22 /* Device revision */ 32 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ 33 #define SIO_REG_ENABLE 0x30 /* Logical device enable */ 34 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ 35 36 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ 37 #define SIO_F71808E_ID 0x0901 /* Chipset ID */ 38 #define SIO_F71808A_ID 0x1001 /* Chipset ID */ 39 #define SIO_F71858_ID 0x0507 /* Chipset ID */ 40 #define SIO_F71862_ID 0x0601 /* Chipset ID */ 41 #define SIO_F71868_ID 0x1106 /* Chipset ID */ 42 #define SIO_F71869_ID 0x0814 /* Chipset ID */ 43 #define SIO_F71869A_ID 0x1007 /* Chipset ID */ 44 #define SIO_F71882_ID 0x0541 /* Chipset ID */ 45 #define SIO_F71889_ID 0x0723 /* Chipset ID */ 46 #define SIO_F71889E_ID 0x0909 /* Chipset ID */ 47 #define SIO_F71889A_ID 0x1005 /* Chipset ID */ 48 #define SIO_F8000_ID 0x0581 /* Chipset ID */ 49 #define SIO_F81768D_ID 0x1210 /* Chipset ID */ 50 #define SIO_F81865_ID 0x0704 /* Chipset ID */ 51 #define SIO_F81866_ID 0x1010 /* Chipset ID */ 52 53 #define REGION_LENGTH 8 54 #define ADDR_REG_OFFSET 5 55 #define DATA_REG_OFFSET 6 56 57 #define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */ 58 #define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */ 59 #define F71882FG_REG_IN(nr) (0x20 + (nr)) 60 #define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */ 61 62 #define F81866_REG_IN_STATUS 0x16 /* F81866 only */ 63 #define F81866_REG_IN_BEEP 0x17 /* F81866 only */ 64 #define F81866_REG_IN1_HIGH 0x3a /* F81866 only */ 65 66 #define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr))) 67 #define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr))) 68 #define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr))) 69 #define F71882FG_REG_FAN_STATUS 0x92 70 #define F71882FG_REG_FAN_BEEP 0x93 71 72 #define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr)) 73 #define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr)) 74 #define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr)) 75 #define F71882FG_REG_TEMP_STATUS 0x62 76 #define F71882FG_REG_TEMP_BEEP 0x63 77 #define F71882FG_REG_TEMP_CONFIG 0x69 78 #define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr)) 79 #define F71882FG_REG_TEMP_TYPE 0x6B 80 #define F71882FG_REG_TEMP_DIODE_OPEN 0x6F 81 82 #define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr))) 83 #define F71882FG_REG_PWM_TYPE 0x94 84 #define F71882FG_REG_PWM_ENABLE 0x96 85 86 #define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr)) 87 88 #define F71882FG_REG_FAN_FAULT_T 0x9F 89 #define F71882FG_FAN_NEG_TEMP_EN 0x20 90 #define F71882FG_FAN_PROG_SEL 0x80 91 92 #define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm))) 93 #define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm))) 94 #define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr)) 95 96 #define F71882FG_REG_START 0x01 97 98 #define F71882FG_MAX_INS 11 99 100 #define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */ 101 102 static unsigned short force_id; 103 module_param(force_id, ushort, 0); 104 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 105 106 enum chips { f71808e, f71808a, f71858fg, f71862fg, f71868a, f71869, f71869a, 107 f71882fg, f71889fg, f71889ed, f71889a, f8000, f81768d, f81865f, 108 f81866a}; 109 110 static const char *const f71882fg_names[] = { 111 "f71808e", 112 "f71808a", 113 "f71858fg", 114 "f71862fg", 115 "f71868a", 116 "f71869", /* Both f71869f and f71869e, reg. compatible and same id */ 117 "f71869a", 118 "f71882fg", 119 "f71889fg", /* f81801u too, same id */ 120 "f71889ed", 121 "f71889a", 122 "f8000", 123 "f81768d", 124 "f81865f", 125 "f81866a", 126 }; 127 128 static const char f71882fg_has_in[][F71882FG_MAX_INS] = { 129 [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0 }, 130 [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0 }, 131 [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, 132 [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 133 [f71868a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0 }, 134 [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 135 [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 136 [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 137 [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 138 [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 139 [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 140 [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, 141 [f81768d] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 142 [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 }, 143 [f81866a] = { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 }, 144 }; 145 146 static const char f71882fg_has_in1_alarm[] = { 147 [f71808e] = 0, 148 [f71808a] = 0, 149 [f71858fg] = 0, 150 [f71862fg] = 0, 151 [f71868a] = 0, 152 [f71869] = 0, 153 [f71869a] = 0, 154 [f71882fg] = 1, 155 [f71889fg] = 1, 156 [f71889ed] = 1, 157 [f71889a] = 1, 158 [f8000] = 0, 159 [f81768d] = 1, 160 [f81865f] = 1, 161 [f81866a] = 1, 162 }; 163 164 static const char f71882fg_fan_has_beep[] = { 165 [f71808e] = 0, 166 [f71808a] = 0, 167 [f71858fg] = 0, 168 [f71862fg] = 1, 169 [f71868a] = 1, 170 [f71869] = 1, 171 [f71869a] = 1, 172 [f71882fg] = 1, 173 [f71889fg] = 1, 174 [f71889ed] = 1, 175 [f71889a] = 1, 176 [f8000] = 0, 177 [f81768d] = 1, 178 [f81865f] = 1, 179 [f81866a] = 1, 180 }; 181 182 static const char f71882fg_nr_fans[] = { 183 [f71808e] = 3, 184 [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */ 185 [f71858fg] = 3, 186 [f71862fg] = 3, 187 [f71868a] = 3, 188 [f71869] = 3, 189 [f71869a] = 3, 190 [f71882fg] = 4, 191 [f71889fg] = 3, 192 [f71889ed] = 3, 193 [f71889a] = 3, 194 [f8000] = 3, /* +1 fan which is monitor only */ 195 [f81768d] = 3, 196 [f81865f] = 2, 197 [f81866a] = 3, 198 }; 199 200 static const char f71882fg_temp_has_beep[] = { 201 [f71808e] = 0, 202 [f71808a] = 1, 203 [f71858fg] = 0, 204 [f71862fg] = 1, 205 [f71868a] = 1, 206 [f71869] = 1, 207 [f71869a] = 1, 208 [f71882fg] = 1, 209 [f71889fg] = 1, 210 [f71889ed] = 1, 211 [f71889a] = 1, 212 [f8000] = 0, 213 [f81768d] = 1, 214 [f81865f] = 1, 215 [f81866a] = 1, 216 }; 217 218 static const char f71882fg_nr_temps[] = { 219 [f71808e] = 2, 220 [f71808a] = 2, 221 [f71858fg] = 3, 222 [f71862fg] = 3, 223 [f71868a] = 3, 224 [f71869] = 3, 225 [f71869a] = 3, 226 [f71882fg] = 3, 227 [f71889fg] = 3, 228 [f71889ed] = 3, 229 [f71889a] = 3, 230 [f8000] = 3, 231 [f81768d] = 3, 232 [f81865f] = 2, 233 [f81866a] = 3, 234 }; 235 236 static struct platform_device *f71882fg_pdev; 237 238 /* Super-I/O Function prototypes */ 239 static inline int superio_inb(int base, int reg); 240 static inline int superio_inw(int base, int reg); 241 static inline int superio_enter(int base); 242 static inline void superio_select(int base, int ld); 243 static inline void superio_exit(int base); 244 245 struct f71882fg_sio_data { 246 enum chips type; 247 }; 248 249 struct f71882fg_data { 250 unsigned short addr; 251 enum chips type; 252 struct device *hwmon_dev; 253 254 struct mutex update_lock; 255 int temp_start; /* temp numbering start (0 or 1) */ 256 bool valid; /* true if following fields are valid */ 257 char auto_point_temp_signed; 258 unsigned long last_updated; /* In jiffies */ 259 unsigned long last_limits; /* In jiffies */ 260 261 /* Register Values */ 262 u8 in[F71882FG_MAX_INS]; 263 u8 in1_max; 264 u8 in_status; 265 u8 in_beep; 266 u16 fan[4]; 267 u16 fan_target[4]; 268 u16 fan_full_speed[4]; 269 u8 fan_status; 270 u8 fan_beep; 271 /* 272 * Note: all models have max 3 temperature channels, but on some 273 * they are addressed as 0-2 and on others as 1-3, so for coding 274 * convenience we reserve space for 4 channels 275 */ 276 u16 temp[4]; 277 u8 temp_ovt[4]; 278 u8 temp_high[4]; 279 u8 temp_hyst[2]; /* 2 hysts stored per reg */ 280 u8 temp_type[4]; 281 u8 temp_status; 282 u8 temp_beep; 283 u8 temp_diode_open; 284 u8 temp_config; 285 u8 pwm[4]; 286 u8 pwm_enable; 287 u8 pwm_auto_point_hyst[2]; 288 u8 pwm_auto_point_mapping[4]; 289 u8 pwm_auto_point_pwm[4][5]; 290 s8 pwm_auto_point_temp[4][4]; 291 }; 292 293 /* Sysfs in */ 294 static ssize_t show_in(struct device *dev, struct device_attribute *devattr, 295 char *buf); 296 static ssize_t show_in_max(struct device *dev, struct device_attribute 297 *devattr, char *buf); 298 static ssize_t store_in_max(struct device *dev, struct device_attribute 299 *devattr, const char *buf, size_t count); 300 static ssize_t show_in_beep(struct device *dev, struct device_attribute 301 *devattr, char *buf); 302 static ssize_t store_in_beep(struct device *dev, struct device_attribute 303 *devattr, const char *buf, size_t count); 304 static ssize_t show_in_alarm(struct device *dev, struct device_attribute 305 *devattr, char *buf); 306 /* Sysfs Fan */ 307 static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, 308 char *buf); 309 static ssize_t show_fan_full_speed(struct device *dev, 310 struct device_attribute *devattr, char *buf); 311 static ssize_t store_fan_full_speed(struct device *dev, 312 struct device_attribute *devattr, const char *buf, size_t count); 313 static ssize_t show_fan_beep(struct device *dev, struct device_attribute 314 *devattr, char *buf); 315 static ssize_t store_fan_beep(struct device *dev, struct device_attribute 316 *devattr, const char *buf, size_t count); 317 static ssize_t show_fan_alarm(struct device *dev, struct device_attribute 318 *devattr, char *buf); 319 /* Sysfs Temp */ 320 static ssize_t show_temp(struct device *dev, struct device_attribute 321 *devattr, char *buf); 322 static ssize_t show_temp_max(struct device *dev, struct device_attribute 323 *devattr, char *buf); 324 static ssize_t store_temp_max(struct device *dev, struct device_attribute 325 *devattr, const char *buf, size_t count); 326 static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute 327 *devattr, char *buf); 328 static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute 329 *devattr, const char *buf, size_t count); 330 static ssize_t show_temp_crit(struct device *dev, struct device_attribute 331 *devattr, char *buf); 332 static ssize_t store_temp_crit(struct device *dev, struct device_attribute 333 *devattr, const char *buf, size_t count); 334 static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute 335 *devattr, char *buf); 336 static ssize_t show_temp_type(struct device *dev, struct device_attribute 337 *devattr, char *buf); 338 static ssize_t show_temp_beep(struct device *dev, struct device_attribute 339 *devattr, char *buf); 340 static ssize_t store_temp_beep(struct device *dev, struct device_attribute 341 *devattr, const char *buf, size_t count); 342 static ssize_t show_temp_alarm(struct device *dev, struct device_attribute 343 *devattr, char *buf); 344 static ssize_t show_temp_fault(struct device *dev, struct device_attribute 345 *devattr, char *buf); 346 /* PWM and Auto point control */ 347 static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, 348 char *buf); 349 static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr, 350 const char *buf, size_t count); 351 static ssize_t show_simple_pwm(struct device *dev, 352 struct device_attribute *devattr, char *buf); 353 static ssize_t store_simple_pwm(struct device *dev, 354 struct device_attribute *devattr, const char *buf, size_t count); 355 static ssize_t show_pwm_enable(struct device *dev, 356 struct device_attribute *devattr, char *buf); 357 static ssize_t store_pwm_enable(struct device *dev, 358 struct device_attribute *devattr, const char *buf, size_t count); 359 static ssize_t show_pwm_interpolate(struct device *dev, 360 struct device_attribute *devattr, char *buf); 361 static ssize_t store_pwm_interpolate(struct device *dev, 362 struct device_attribute *devattr, const char *buf, size_t count); 363 static ssize_t show_pwm_auto_point_channel(struct device *dev, 364 struct device_attribute *devattr, char *buf); 365 static ssize_t store_pwm_auto_point_channel(struct device *dev, 366 struct device_attribute *devattr, const char *buf, size_t count); 367 static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev, 368 struct device_attribute *devattr, char *buf); 369 static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev, 370 struct device_attribute *devattr, const char *buf, size_t count); 371 static ssize_t show_pwm_auto_point_pwm(struct device *dev, 372 struct device_attribute *devattr, char *buf); 373 static ssize_t store_pwm_auto_point_pwm(struct device *dev, 374 struct device_attribute *devattr, const char *buf, size_t count); 375 static ssize_t show_pwm_auto_point_temp(struct device *dev, 376 struct device_attribute *devattr, char *buf); 377 static ssize_t store_pwm_auto_point_temp(struct device *dev, 378 struct device_attribute *devattr, const char *buf, size_t count); 379 /* Sysfs misc */ 380 static ssize_t name_show(struct device *dev, struct device_attribute *devattr, 381 char *buf); 382 383 static int f71882fg_probe(struct platform_device *pdev); 384 static int f71882fg_remove(struct platform_device *pdev); 385 386 static struct platform_driver f71882fg_driver = { 387 .driver = { 388 .name = DRVNAME, 389 }, 390 .probe = f71882fg_probe, 391 .remove = f71882fg_remove, 392 }; 393 394 static DEVICE_ATTR_RO(name); 395 396 /* 397 * Temp attr for the f71858fg, the f71858fg is special as it has its 398 * temperature indexes start at 0 (the others start at 1) 399 */ 400 static struct sensor_device_attribute_2 f71858fg_temp_attr[] = { 401 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0), 402 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max, 403 store_temp_max, 0, 0), 404 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 405 store_temp_max_hyst, 0, 0), 406 SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0), 407 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit, 408 store_temp_crit, 0, 0), 409 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 410 0, 0), 411 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4), 412 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0), 413 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1), 414 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max, 415 store_temp_max, 0, 1), 416 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 417 store_temp_max_hyst, 0, 1), 418 SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1), 419 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit, 420 store_temp_crit, 0, 1), 421 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 422 0, 1), 423 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5), 424 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1), 425 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2), 426 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max, 427 store_temp_max, 0, 2), 428 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 429 store_temp_max_hyst, 0, 2), 430 SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2), 431 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit, 432 store_temp_crit, 0, 2), 433 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 434 0, 2), 435 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6), 436 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2), 437 }; 438 439 /* Temp attr for the standard models */ 440 static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { { 441 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1), 442 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max, 443 store_temp_max, 0, 1), 444 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 445 store_temp_max_hyst, 0, 1), 446 /* 447 * Should really be temp1_max_alarm, but older versions did not handle 448 * the max and crit alarms separately and lm_sensors v2 depends on the 449 * presence of temp#_alarm files. The same goes for temp2/3 _alarm. 450 */ 451 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1), 452 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit, 453 store_temp_crit, 0, 1), 454 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 455 0, 1), 456 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5), 457 SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1), 458 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1), 459 }, { 460 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2), 461 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max, 462 store_temp_max, 0, 2), 463 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 464 store_temp_max_hyst, 0, 2), 465 /* Should be temp2_max_alarm, see temp1_alarm note */ 466 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2), 467 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit, 468 store_temp_crit, 0, 2), 469 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 470 0, 2), 471 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6), 472 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2), 473 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2), 474 }, { 475 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3), 476 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max, 477 store_temp_max, 0, 3), 478 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 479 store_temp_max_hyst, 0, 3), 480 /* Should be temp3_max_alarm, see temp1_alarm note */ 481 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3), 482 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit, 483 store_temp_crit, 0, 3), 484 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 485 0, 3), 486 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7), 487 SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3), 488 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3), 489 } }; 490 491 /* Temp attr for models which can beep on temp alarm */ 492 static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { { 493 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 494 store_temp_beep, 0, 1), 495 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 496 store_temp_beep, 0, 5), 497 }, { 498 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 499 store_temp_beep, 0, 2), 500 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 501 store_temp_beep, 0, 6), 502 }, { 503 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 504 store_temp_beep, 0, 3), 505 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 506 store_temp_beep, 0, 7), 507 } }; 508 509 static struct sensor_device_attribute_2 f81866_temp_beep_attr[3][2] = { { 510 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 511 store_temp_beep, 0, 0), 512 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 513 store_temp_beep, 0, 4), 514 }, { 515 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 516 store_temp_beep, 0, 1), 517 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 518 store_temp_beep, 0, 5), 519 }, { 520 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 521 store_temp_beep, 0, 2), 522 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 523 store_temp_beep, 0, 6), 524 } }; 525 526 /* 527 * Temp attr for the f8000 528 * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max) 529 * is used as hysteresis value to clear alarms 530 * Also like the f71858fg its temperature indexes start at 0 531 */ 532 static struct sensor_device_attribute_2 f8000_temp_attr[] = { 533 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0), 534 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit, 535 store_temp_crit, 0, 0), 536 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max, 537 store_temp_max, 0, 0), 538 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4), 539 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0), 540 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1), 541 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit, 542 store_temp_crit, 0, 1), 543 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max, 544 store_temp_max, 0, 1), 545 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5), 546 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1), 547 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2), 548 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit, 549 store_temp_crit, 0, 2), 550 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max, 551 store_temp_max, 0, 2), 552 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6), 553 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2), 554 }; 555 556 /* in attr for all models */ 557 static struct sensor_device_attribute_2 fxxxx_in_attr[] = { 558 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0), 559 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1), 560 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2), 561 SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3), 562 SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4), 563 SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5), 564 SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6), 565 SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7), 566 SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8), 567 SENSOR_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 0, 9), 568 SENSOR_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 0, 10), 569 }; 570 571 /* For models with in1 alarm capability */ 572 static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = { 573 SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max, 574 0, 1), 575 SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep, 576 0, 1), 577 SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1), 578 }; 579 580 /* Fan / PWM attr common to all models */ 581 static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { { 582 SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0), 583 SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR, 584 show_fan_full_speed, 585 store_fan_full_speed, 0, 0), 586 SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0), 587 SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0), 588 SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 589 store_pwm_enable, 0, 0), 590 SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR, 591 show_pwm_interpolate, store_pwm_interpolate, 0, 0), 592 }, { 593 SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1), 594 SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR, 595 show_fan_full_speed, 596 store_fan_full_speed, 0, 1), 597 SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1), 598 SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1), 599 SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 600 store_pwm_enable, 0, 1), 601 SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR, 602 show_pwm_interpolate, store_pwm_interpolate, 0, 1), 603 }, { 604 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2), 605 SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR, 606 show_fan_full_speed, 607 store_fan_full_speed, 0, 2), 608 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2), 609 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2), 610 SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 611 store_pwm_enable, 0, 2), 612 SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR, 613 show_pwm_interpolate, store_pwm_interpolate, 0, 2), 614 }, { 615 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3), 616 SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR, 617 show_fan_full_speed, 618 store_fan_full_speed, 0, 3), 619 SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3), 620 SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3), 621 SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 622 store_pwm_enable, 0, 3), 623 SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR, 624 show_pwm_interpolate, store_pwm_interpolate, 0, 3), 625 } }; 626 627 /* Attr for the third fan of the f71808a, which only has manual pwm */ 628 static struct sensor_device_attribute_2 f71808a_fan3_attr[] = { 629 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2), 630 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2), 631 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, 632 show_simple_pwm, store_simple_pwm, 0, 2), 633 }; 634 635 /* Attr for models which can beep on Fan alarm */ 636 static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = { 637 SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep, 638 store_fan_beep, 0, 0), 639 SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep, 640 store_fan_beep, 0, 1), 641 SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep, 642 store_fan_beep, 0, 2), 643 SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep, 644 store_fan_beep, 0, 3), 645 }; 646 647 /* 648 * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the 649 * standard models 650 */ 651 static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { { 652 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 653 show_pwm_auto_point_channel, 654 store_pwm_auto_point_channel, 0, 0), 655 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR, 656 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 657 1, 0), 658 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR, 659 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 660 4, 0), 661 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR, 662 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 663 0, 0), 664 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR, 665 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 666 3, 0), 667 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 668 show_pwm_auto_point_temp_hyst, 669 store_pwm_auto_point_temp_hyst, 670 0, 0), 671 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO, 672 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 673 }, { 674 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 675 show_pwm_auto_point_channel, 676 store_pwm_auto_point_channel, 0, 1), 677 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR, 678 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 679 1, 1), 680 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR, 681 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 682 4, 1), 683 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR, 684 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 685 0, 1), 686 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR, 687 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 688 3, 1), 689 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 690 show_pwm_auto_point_temp_hyst, 691 store_pwm_auto_point_temp_hyst, 692 0, 1), 693 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO, 694 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 695 }, { 696 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 697 show_pwm_auto_point_channel, 698 store_pwm_auto_point_channel, 0, 2), 699 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR, 700 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 701 1, 2), 702 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR, 703 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 704 4, 2), 705 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR, 706 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 707 0, 2), 708 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR, 709 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 710 3, 2), 711 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 712 show_pwm_auto_point_temp_hyst, 713 store_pwm_auto_point_temp_hyst, 714 0, 2), 715 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO, 716 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 717 } }; 718 719 /* 720 * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the 721 * pwm setting when the temperature is above the pwmX_auto_point1_temp can be 722 * programmed instead of being hardcoded to 0xff 723 */ 724 static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { { 725 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 726 show_pwm_auto_point_channel, 727 store_pwm_auto_point_channel, 0, 0), 728 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR, 729 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 730 0, 0), 731 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR, 732 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 733 1, 0), 734 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR, 735 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 736 4, 0), 737 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR, 738 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 739 0, 0), 740 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR, 741 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 742 3, 0), 743 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 744 show_pwm_auto_point_temp_hyst, 745 store_pwm_auto_point_temp_hyst, 746 0, 0), 747 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO, 748 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 749 }, { 750 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 751 show_pwm_auto_point_channel, 752 store_pwm_auto_point_channel, 0, 1), 753 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR, 754 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 755 0, 1), 756 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR, 757 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 758 1, 1), 759 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR, 760 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 761 4, 1), 762 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR, 763 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 764 0, 1), 765 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR, 766 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 767 3, 1), 768 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 769 show_pwm_auto_point_temp_hyst, 770 store_pwm_auto_point_temp_hyst, 771 0, 1), 772 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO, 773 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 774 }, { 775 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 776 show_pwm_auto_point_channel, 777 store_pwm_auto_point_channel, 0, 2), 778 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR, 779 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 780 0, 2), 781 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR, 782 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 783 1, 2), 784 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR, 785 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 786 4, 2), 787 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR, 788 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 789 0, 2), 790 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR, 791 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 792 3, 2), 793 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 794 show_pwm_auto_point_temp_hyst, 795 store_pwm_auto_point_temp_hyst, 796 0, 2), 797 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO, 798 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 799 } }; 800 801 /* PWM attr for the standard models */ 802 static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { { 803 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 804 show_pwm_auto_point_channel, 805 store_pwm_auto_point_channel, 0, 0), 806 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR, 807 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 808 0, 0), 809 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR, 810 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 811 1, 0), 812 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR, 813 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 814 2, 0), 815 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR, 816 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 817 3, 0), 818 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR, 819 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 820 4, 0), 821 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR, 822 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 823 0, 0), 824 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR, 825 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 826 1, 0), 827 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR, 828 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 829 2, 0), 830 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR, 831 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 832 3, 0), 833 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 834 show_pwm_auto_point_temp_hyst, 835 store_pwm_auto_point_temp_hyst, 836 0, 0), 837 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO, 838 show_pwm_auto_point_temp_hyst, NULL, 1, 0), 839 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO, 840 show_pwm_auto_point_temp_hyst, NULL, 2, 0), 841 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO, 842 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 843 }, { 844 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 845 show_pwm_auto_point_channel, 846 store_pwm_auto_point_channel, 0, 1), 847 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR, 848 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 849 0, 1), 850 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR, 851 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 852 1, 1), 853 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR, 854 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 855 2, 1), 856 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR, 857 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 858 3, 1), 859 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR, 860 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 861 4, 1), 862 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR, 863 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 864 0, 1), 865 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR, 866 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 867 1, 1), 868 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR, 869 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 870 2, 1), 871 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR, 872 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 873 3, 1), 874 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 875 show_pwm_auto_point_temp_hyst, 876 store_pwm_auto_point_temp_hyst, 877 0, 1), 878 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO, 879 show_pwm_auto_point_temp_hyst, NULL, 1, 1), 880 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO, 881 show_pwm_auto_point_temp_hyst, NULL, 2, 1), 882 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO, 883 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 884 }, { 885 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 886 show_pwm_auto_point_channel, 887 store_pwm_auto_point_channel, 0, 2), 888 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR, 889 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 890 0, 2), 891 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR, 892 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 893 1, 2), 894 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR, 895 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 896 2, 2), 897 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR, 898 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 899 3, 2), 900 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR, 901 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 902 4, 2), 903 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR, 904 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 905 0, 2), 906 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR, 907 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 908 1, 2), 909 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR, 910 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 911 2, 2), 912 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR, 913 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 914 3, 2), 915 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 916 show_pwm_auto_point_temp_hyst, 917 store_pwm_auto_point_temp_hyst, 918 0, 2), 919 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO, 920 show_pwm_auto_point_temp_hyst, NULL, 1, 2), 921 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO, 922 show_pwm_auto_point_temp_hyst, NULL, 2, 2), 923 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO, 924 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 925 }, { 926 SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR, 927 show_pwm_auto_point_channel, 928 store_pwm_auto_point_channel, 0, 3), 929 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR, 930 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 931 0, 3), 932 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR, 933 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 934 1, 3), 935 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR, 936 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 937 2, 3), 938 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR, 939 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 940 3, 3), 941 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR, 942 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 943 4, 3), 944 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR, 945 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 946 0, 3), 947 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR, 948 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 949 1, 3), 950 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR, 951 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 952 2, 3), 953 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR, 954 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 955 3, 3), 956 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 957 show_pwm_auto_point_temp_hyst, 958 store_pwm_auto_point_temp_hyst, 959 0, 3), 960 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO, 961 show_pwm_auto_point_temp_hyst, NULL, 1, 3), 962 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO, 963 show_pwm_auto_point_temp_hyst, NULL, 2, 3), 964 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO, 965 show_pwm_auto_point_temp_hyst, NULL, 3, 3), 966 } }; 967 968 /* Fan attr specific to the f8000 (4th fan input can only measure speed) */ 969 static struct sensor_device_attribute_2 f8000_fan_attr[] = { 970 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3), 971 }; 972 973 /* 974 * PWM attr for the f8000, zones mapped to temp instead of to pwm! 975 * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the 976 * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0 977 */ 978 static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { { 979 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 980 show_pwm_auto_point_channel, 981 store_pwm_auto_point_channel, 0, 0), 982 SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR, 983 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 984 0, 2), 985 SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR, 986 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 987 1, 2), 988 SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR, 989 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 990 2, 2), 991 SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR, 992 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 993 3, 2), 994 SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR, 995 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 996 4, 2), 997 SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR, 998 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 999 0, 2), 1000 SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR, 1001 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1002 1, 2), 1003 SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR, 1004 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1005 2, 2), 1006 SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR, 1007 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1008 3, 2), 1009 SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 1010 show_pwm_auto_point_temp_hyst, 1011 store_pwm_auto_point_temp_hyst, 1012 0, 2), 1013 SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO, 1014 show_pwm_auto_point_temp_hyst, NULL, 1, 2), 1015 SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO, 1016 show_pwm_auto_point_temp_hyst, NULL, 2, 2), 1017 SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO, 1018 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 1019 }, { 1020 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 1021 show_pwm_auto_point_channel, 1022 store_pwm_auto_point_channel, 0, 1), 1023 SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR, 1024 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1025 0, 0), 1026 SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR, 1027 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1028 1, 0), 1029 SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR, 1030 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1031 2, 0), 1032 SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR, 1033 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1034 3, 0), 1035 SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR, 1036 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1037 4, 0), 1038 SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR, 1039 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1040 0, 0), 1041 SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR, 1042 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1043 1, 0), 1044 SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR, 1045 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1046 2, 0), 1047 SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR, 1048 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1049 3, 0), 1050 SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 1051 show_pwm_auto_point_temp_hyst, 1052 store_pwm_auto_point_temp_hyst, 1053 0, 0), 1054 SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO, 1055 show_pwm_auto_point_temp_hyst, NULL, 1, 0), 1056 SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO, 1057 show_pwm_auto_point_temp_hyst, NULL, 2, 0), 1058 SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO, 1059 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 1060 }, { 1061 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 1062 show_pwm_auto_point_channel, 1063 store_pwm_auto_point_channel, 0, 2), 1064 SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR, 1065 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1066 0, 1), 1067 SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR, 1068 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1069 1, 1), 1070 SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR, 1071 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1072 2, 1), 1073 SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR, 1074 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1075 3, 1), 1076 SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR, 1077 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1078 4, 1), 1079 SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR, 1080 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1081 0, 1), 1082 SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR, 1083 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1084 1, 1), 1085 SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR, 1086 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1087 2, 1), 1088 SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR, 1089 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1090 3, 1), 1091 SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 1092 show_pwm_auto_point_temp_hyst, 1093 store_pwm_auto_point_temp_hyst, 1094 0, 1), 1095 SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO, 1096 show_pwm_auto_point_temp_hyst, NULL, 1, 1), 1097 SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO, 1098 show_pwm_auto_point_temp_hyst, NULL, 2, 1), 1099 SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO, 1100 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 1101 } }; 1102 1103 /* Super I/O functions */ 1104 static inline int superio_inb(int base, int reg) 1105 { 1106 outb(reg, base); 1107 return inb(base + 1); 1108 } 1109 1110 static int superio_inw(int base, int reg) 1111 { 1112 int val; 1113 val = superio_inb(base, reg) << 8; 1114 val |= superio_inb(base, reg + 1); 1115 return val; 1116 } 1117 1118 static inline int superio_enter(int base) 1119 { 1120 /* Don't step on other drivers' I/O space by accident */ 1121 if (!request_muxed_region(base, 2, DRVNAME)) { 1122 pr_err("I/O address 0x%04x already in use\n", base); 1123 return -EBUSY; 1124 } 1125 1126 /* according to the datasheet the key must be send twice! */ 1127 outb(SIO_UNLOCK_KEY, base); 1128 outb(SIO_UNLOCK_KEY, base); 1129 1130 return 0; 1131 } 1132 1133 static inline void superio_select(int base, int ld) 1134 { 1135 outb(SIO_REG_LDSEL, base); 1136 outb(ld, base + 1); 1137 } 1138 1139 static inline void superio_exit(int base) 1140 { 1141 outb(SIO_LOCK_KEY, base); 1142 release_region(base, 2); 1143 } 1144 1145 static inline int fan_from_reg(u16 reg) 1146 { 1147 return reg ? (1500000 / reg) : 0; 1148 } 1149 1150 static inline u16 fan_to_reg(int fan) 1151 { 1152 return fan ? (1500000 / fan) : 0; 1153 } 1154 1155 static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg) 1156 { 1157 u8 val; 1158 1159 outb(reg, data->addr + ADDR_REG_OFFSET); 1160 val = inb(data->addr + DATA_REG_OFFSET); 1161 1162 return val; 1163 } 1164 1165 static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg) 1166 { 1167 u16 val; 1168 1169 val = f71882fg_read8(data, reg) << 8; 1170 val |= f71882fg_read8(data, reg + 1); 1171 1172 return val; 1173 } 1174 1175 static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val) 1176 { 1177 outb(reg, data->addr + ADDR_REG_OFFSET); 1178 outb(val, data->addr + DATA_REG_OFFSET); 1179 } 1180 1181 static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val) 1182 { 1183 f71882fg_write8(data, reg, val >> 8); 1184 f71882fg_write8(data, reg + 1, val & 0xff); 1185 } 1186 1187 static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr) 1188 { 1189 if (data->type == f71858fg) 1190 return f71882fg_read16(data, F71882FG_REG_TEMP(nr)); 1191 else 1192 return f71882fg_read8(data, F71882FG_REG_TEMP(nr)); 1193 } 1194 1195 static struct f71882fg_data *f71882fg_update_device(struct device *dev) 1196 { 1197 struct f71882fg_data *data = dev_get_drvdata(dev); 1198 int nr_fans = f71882fg_nr_fans[data->type]; 1199 int nr_temps = f71882fg_nr_temps[data->type]; 1200 int nr, reg, point; 1201 1202 mutex_lock(&data->update_lock); 1203 1204 /* Update once every 60 seconds */ 1205 if (time_after(jiffies, data->last_limits + 60 * HZ) || 1206 !data->valid) { 1207 if (f71882fg_has_in1_alarm[data->type]) { 1208 if (data->type == f81866a) { 1209 data->in1_max = 1210 f71882fg_read8(data, 1211 F81866_REG_IN1_HIGH); 1212 data->in_beep = 1213 f71882fg_read8(data, 1214 F81866_REG_IN_BEEP); 1215 } else { 1216 data->in1_max = 1217 f71882fg_read8(data, 1218 F71882FG_REG_IN1_HIGH); 1219 data->in_beep = 1220 f71882fg_read8(data, 1221 F71882FG_REG_IN_BEEP); 1222 } 1223 } 1224 1225 /* Get High & boundary temps*/ 1226 for (nr = data->temp_start; nr < nr_temps + data->temp_start; 1227 nr++) { 1228 data->temp_ovt[nr] = f71882fg_read8(data, 1229 F71882FG_REG_TEMP_OVT(nr)); 1230 data->temp_high[nr] = f71882fg_read8(data, 1231 F71882FG_REG_TEMP_HIGH(nr)); 1232 } 1233 1234 if (data->type != f8000) { 1235 data->temp_hyst[0] = f71882fg_read8(data, 1236 F71882FG_REG_TEMP_HYST(0)); 1237 data->temp_hyst[1] = f71882fg_read8(data, 1238 F71882FG_REG_TEMP_HYST(1)); 1239 } 1240 /* All but the f71858fg / f8000 have this register */ 1241 if ((data->type != f71858fg) && (data->type != f8000)) { 1242 reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE); 1243 data->temp_type[1] = (reg & 0x02) ? 2 : 4; 1244 data->temp_type[2] = (reg & 0x04) ? 2 : 4; 1245 data->temp_type[3] = (reg & 0x08) ? 2 : 4; 1246 } 1247 1248 if (f71882fg_fan_has_beep[data->type]) 1249 data->fan_beep = f71882fg_read8(data, 1250 F71882FG_REG_FAN_BEEP); 1251 1252 if (f71882fg_temp_has_beep[data->type]) 1253 data->temp_beep = f71882fg_read8(data, 1254 F71882FG_REG_TEMP_BEEP); 1255 1256 data->pwm_enable = f71882fg_read8(data, 1257 F71882FG_REG_PWM_ENABLE); 1258 data->pwm_auto_point_hyst[0] = 1259 f71882fg_read8(data, F71882FG_REG_FAN_HYST(0)); 1260 data->pwm_auto_point_hyst[1] = 1261 f71882fg_read8(data, F71882FG_REG_FAN_HYST(1)); 1262 1263 for (nr = 0; nr < nr_fans; nr++) { 1264 data->pwm_auto_point_mapping[nr] = 1265 f71882fg_read8(data, 1266 F71882FG_REG_POINT_MAPPING(nr)); 1267 1268 switch (data->type) { 1269 default: 1270 for (point = 0; point < 5; point++) { 1271 data->pwm_auto_point_pwm[nr][point] = 1272 f71882fg_read8(data, 1273 F71882FG_REG_POINT_PWM 1274 (nr, point)); 1275 } 1276 for (point = 0; point < 4; point++) { 1277 data->pwm_auto_point_temp[nr][point] = 1278 f71882fg_read8(data, 1279 F71882FG_REG_POINT_TEMP 1280 (nr, point)); 1281 } 1282 break; 1283 case f71808e: 1284 case f71869: 1285 data->pwm_auto_point_pwm[nr][0] = 1286 f71882fg_read8(data, 1287 F71882FG_REG_POINT_PWM(nr, 0)); 1288 fallthrough; 1289 case f71862fg: 1290 data->pwm_auto_point_pwm[nr][1] = 1291 f71882fg_read8(data, 1292 F71882FG_REG_POINT_PWM 1293 (nr, 1)); 1294 data->pwm_auto_point_pwm[nr][4] = 1295 f71882fg_read8(data, 1296 F71882FG_REG_POINT_PWM 1297 (nr, 4)); 1298 data->pwm_auto_point_temp[nr][0] = 1299 f71882fg_read8(data, 1300 F71882FG_REG_POINT_TEMP 1301 (nr, 0)); 1302 data->pwm_auto_point_temp[nr][3] = 1303 f71882fg_read8(data, 1304 F71882FG_REG_POINT_TEMP 1305 (nr, 3)); 1306 break; 1307 } 1308 } 1309 data->last_limits = jiffies; 1310 } 1311 1312 /* Update every second */ 1313 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { 1314 data->temp_status = f71882fg_read8(data, 1315 F71882FG_REG_TEMP_STATUS); 1316 data->temp_diode_open = f71882fg_read8(data, 1317 F71882FG_REG_TEMP_DIODE_OPEN); 1318 for (nr = data->temp_start; nr < nr_temps + data->temp_start; 1319 nr++) 1320 data->temp[nr] = f71882fg_read_temp(data, nr); 1321 1322 data->fan_status = f71882fg_read8(data, 1323 F71882FG_REG_FAN_STATUS); 1324 for (nr = 0; nr < nr_fans; nr++) { 1325 data->fan[nr] = f71882fg_read16(data, 1326 F71882FG_REG_FAN(nr)); 1327 data->fan_target[nr] = 1328 f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr)); 1329 data->fan_full_speed[nr] = 1330 f71882fg_read16(data, 1331 F71882FG_REG_FAN_FULL_SPEED(nr)); 1332 data->pwm[nr] = 1333 f71882fg_read8(data, F71882FG_REG_PWM(nr)); 1334 } 1335 /* Some models have 1 more fan with limited capabilities */ 1336 if (data->type == f71808a) { 1337 data->fan[2] = f71882fg_read16(data, 1338 F71882FG_REG_FAN(2)); 1339 data->pwm[2] = f71882fg_read8(data, 1340 F71882FG_REG_PWM(2)); 1341 } 1342 if (data->type == f8000) 1343 data->fan[3] = f71882fg_read16(data, 1344 F71882FG_REG_FAN(3)); 1345 1346 if (f71882fg_has_in1_alarm[data->type]) { 1347 if (data->type == f81866a) 1348 data->in_status = f71882fg_read8(data, 1349 F81866_REG_IN_STATUS); 1350 1351 else 1352 data->in_status = f71882fg_read8(data, 1353 F71882FG_REG_IN_STATUS); 1354 } 1355 1356 for (nr = 0; nr < F71882FG_MAX_INS; nr++) 1357 if (f71882fg_has_in[data->type][nr]) 1358 data->in[nr] = f71882fg_read8(data, 1359 F71882FG_REG_IN(nr)); 1360 1361 data->last_updated = jiffies; 1362 data->valid = true; 1363 } 1364 1365 mutex_unlock(&data->update_lock); 1366 1367 return data; 1368 } 1369 1370 /* Sysfs Interface */ 1371 static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, 1372 char *buf) 1373 { 1374 struct f71882fg_data *data = f71882fg_update_device(dev); 1375 int nr = to_sensor_dev_attr_2(devattr)->index; 1376 int speed = fan_from_reg(data->fan[nr]); 1377 1378 if (speed == FAN_MIN_DETECT) 1379 speed = 0; 1380 1381 return sprintf(buf, "%d\n", speed); 1382 } 1383 1384 static ssize_t show_fan_full_speed(struct device *dev, 1385 struct device_attribute *devattr, char *buf) 1386 { 1387 struct f71882fg_data *data = f71882fg_update_device(dev); 1388 int nr = to_sensor_dev_attr_2(devattr)->index; 1389 int speed = fan_from_reg(data->fan_full_speed[nr]); 1390 return sprintf(buf, "%d\n", speed); 1391 } 1392 1393 static ssize_t store_fan_full_speed(struct device *dev, 1394 struct device_attribute *devattr, 1395 const char *buf, size_t count) 1396 { 1397 struct f71882fg_data *data = dev_get_drvdata(dev); 1398 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1399 long val; 1400 1401 err = kstrtol(buf, 10, &val); 1402 if (err) 1403 return err; 1404 1405 val = clamp_val(val, 23, 1500000); 1406 val = fan_to_reg(val); 1407 1408 mutex_lock(&data->update_lock); 1409 f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val); 1410 data->fan_full_speed[nr] = val; 1411 mutex_unlock(&data->update_lock); 1412 1413 return count; 1414 } 1415 1416 static ssize_t show_fan_beep(struct device *dev, struct device_attribute 1417 *devattr, char *buf) 1418 { 1419 struct f71882fg_data *data = f71882fg_update_device(dev); 1420 int nr = to_sensor_dev_attr_2(devattr)->index; 1421 1422 if (data->fan_beep & (1 << nr)) 1423 return sprintf(buf, "1\n"); 1424 else 1425 return sprintf(buf, "0\n"); 1426 } 1427 1428 static ssize_t store_fan_beep(struct device *dev, struct device_attribute 1429 *devattr, const char *buf, size_t count) 1430 { 1431 struct f71882fg_data *data = dev_get_drvdata(dev); 1432 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1433 unsigned long val; 1434 1435 err = kstrtoul(buf, 10, &val); 1436 if (err) 1437 return err; 1438 1439 mutex_lock(&data->update_lock); 1440 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP); 1441 if (val) 1442 data->fan_beep |= 1 << nr; 1443 else 1444 data->fan_beep &= ~(1 << nr); 1445 1446 f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep); 1447 mutex_unlock(&data->update_lock); 1448 1449 return count; 1450 } 1451 1452 static ssize_t show_fan_alarm(struct device *dev, struct device_attribute 1453 *devattr, char *buf) 1454 { 1455 struct f71882fg_data *data = f71882fg_update_device(dev); 1456 int nr = to_sensor_dev_attr_2(devattr)->index; 1457 1458 if (data->fan_status & (1 << nr)) 1459 return sprintf(buf, "1\n"); 1460 else 1461 return sprintf(buf, "0\n"); 1462 } 1463 1464 static ssize_t show_in(struct device *dev, struct device_attribute *devattr, 1465 char *buf) 1466 { 1467 struct f71882fg_data *data = f71882fg_update_device(dev); 1468 int nr = to_sensor_dev_attr_2(devattr)->index; 1469 1470 return sprintf(buf, "%d\n", data->in[nr] * 8); 1471 } 1472 1473 static ssize_t show_in_max(struct device *dev, struct device_attribute 1474 *devattr, char *buf) 1475 { 1476 struct f71882fg_data *data = f71882fg_update_device(dev); 1477 1478 return sprintf(buf, "%d\n", data->in1_max * 8); 1479 } 1480 1481 static ssize_t store_in_max(struct device *dev, struct device_attribute 1482 *devattr, const char *buf, size_t count) 1483 { 1484 struct f71882fg_data *data = dev_get_drvdata(dev); 1485 int err; 1486 long val; 1487 1488 err = kstrtol(buf, 10, &val); 1489 if (err) 1490 return err; 1491 1492 val /= 8; 1493 val = clamp_val(val, 0, 255); 1494 1495 mutex_lock(&data->update_lock); 1496 if (data->type == f81866a) 1497 f71882fg_write8(data, F81866_REG_IN1_HIGH, val); 1498 else 1499 f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val); 1500 data->in1_max = val; 1501 mutex_unlock(&data->update_lock); 1502 1503 return count; 1504 } 1505 1506 static ssize_t show_in_beep(struct device *dev, struct device_attribute 1507 *devattr, char *buf) 1508 { 1509 struct f71882fg_data *data = f71882fg_update_device(dev); 1510 int nr = to_sensor_dev_attr_2(devattr)->index; 1511 1512 if (data->in_beep & (1 << nr)) 1513 return sprintf(buf, "1\n"); 1514 else 1515 return sprintf(buf, "0\n"); 1516 } 1517 1518 static ssize_t store_in_beep(struct device *dev, struct device_attribute 1519 *devattr, const char *buf, size_t count) 1520 { 1521 struct f71882fg_data *data = dev_get_drvdata(dev); 1522 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1523 unsigned long val; 1524 1525 err = kstrtoul(buf, 10, &val); 1526 if (err) 1527 return err; 1528 1529 mutex_lock(&data->update_lock); 1530 if (data->type == f81866a) 1531 data->in_beep = f71882fg_read8(data, F81866_REG_IN_BEEP); 1532 else 1533 data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP); 1534 1535 if (val) 1536 data->in_beep |= 1 << nr; 1537 else 1538 data->in_beep &= ~(1 << nr); 1539 1540 if (data->type == f81866a) 1541 f71882fg_write8(data, F81866_REG_IN_BEEP, data->in_beep); 1542 else 1543 f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep); 1544 mutex_unlock(&data->update_lock); 1545 1546 return count; 1547 } 1548 1549 static ssize_t show_in_alarm(struct device *dev, struct device_attribute 1550 *devattr, char *buf) 1551 { 1552 struct f71882fg_data *data = f71882fg_update_device(dev); 1553 int nr = to_sensor_dev_attr_2(devattr)->index; 1554 1555 if (data->in_status & (1 << nr)) 1556 return sprintf(buf, "1\n"); 1557 else 1558 return sprintf(buf, "0\n"); 1559 } 1560 1561 static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, 1562 char *buf) 1563 { 1564 struct f71882fg_data *data = f71882fg_update_device(dev); 1565 int nr = to_sensor_dev_attr_2(devattr)->index; 1566 int sign, temp; 1567 1568 if (data->type == f71858fg) { 1569 /* TEMP_TABLE_SEL 1 or 3 ? */ 1570 if (data->temp_config & 1) { 1571 sign = data->temp[nr] & 0x0001; 1572 temp = (data->temp[nr] >> 5) & 0x7ff; 1573 } else { 1574 sign = data->temp[nr] & 0x8000; 1575 temp = (data->temp[nr] >> 5) & 0x3ff; 1576 } 1577 temp *= 125; 1578 if (sign) 1579 temp -= 128000; 1580 } else 1581 temp = data->temp[nr] * 1000; 1582 1583 return sprintf(buf, "%d\n", temp); 1584 } 1585 1586 static ssize_t show_temp_max(struct device *dev, struct device_attribute 1587 *devattr, char *buf) 1588 { 1589 struct f71882fg_data *data = f71882fg_update_device(dev); 1590 int nr = to_sensor_dev_attr_2(devattr)->index; 1591 1592 return sprintf(buf, "%d\n", data->temp_high[nr] * 1000); 1593 } 1594 1595 static ssize_t store_temp_max(struct device *dev, struct device_attribute 1596 *devattr, const char *buf, size_t count) 1597 { 1598 struct f71882fg_data *data = dev_get_drvdata(dev); 1599 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1600 long val; 1601 1602 err = kstrtol(buf, 10, &val); 1603 if (err) 1604 return err; 1605 1606 val /= 1000; 1607 val = clamp_val(val, 0, 255); 1608 1609 mutex_lock(&data->update_lock); 1610 f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val); 1611 data->temp_high[nr] = val; 1612 mutex_unlock(&data->update_lock); 1613 1614 return count; 1615 } 1616 1617 static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute 1618 *devattr, char *buf) 1619 { 1620 struct f71882fg_data *data = f71882fg_update_device(dev); 1621 int nr = to_sensor_dev_attr_2(devattr)->index; 1622 int temp_max_hyst; 1623 1624 mutex_lock(&data->update_lock); 1625 if (nr & 1) 1626 temp_max_hyst = data->temp_hyst[nr / 2] >> 4; 1627 else 1628 temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f; 1629 temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000; 1630 mutex_unlock(&data->update_lock); 1631 1632 return sprintf(buf, "%d\n", temp_max_hyst); 1633 } 1634 1635 static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute 1636 *devattr, const char *buf, size_t count) 1637 { 1638 struct f71882fg_data *data = dev_get_drvdata(dev); 1639 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1640 ssize_t ret = count; 1641 u8 reg; 1642 long val; 1643 1644 err = kstrtol(buf, 10, &val); 1645 if (err) 1646 return err; 1647 1648 val /= 1000; 1649 1650 mutex_lock(&data->update_lock); 1651 1652 /* convert abs to relative and check */ 1653 data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr)); 1654 val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]); 1655 val = data->temp_high[nr] - val; 1656 1657 /* convert value to register contents */ 1658 reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2)); 1659 if (nr & 1) 1660 reg = (reg & 0x0f) | (val << 4); 1661 else 1662 reg = (reg & 0xf0) | val; 1663 f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg); 1664 data->temp_hyst[nr / 2] = reg; 1665 1666 mutex_unlock(&data->update_lock); 1667 return ret; 1668 } 1669 1670 static ssize_t show_temp_crit(struct device *dev, struct device_attribute 1671 *devattr, char *buf) 1672 { 1673 struct f71882fg_data *data = f71882fg_update_device(dev); 1674 int nr = to_sensor_dev_attr_2(devattr)->index; 1675 1676 return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000); 1677 } 1678 1679 static ssize_t store_temp_crit(struct device *dev, struct device_attribute 1680 *devattr, const char *buf, size_t count) 1681 { 1682 struct f71882fg_data *data = dev_get_drvdata(dev); 1683 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1684 long val; 1685 1686 err = kstrtol(buf, 10, &val); 1687 if (err) 1688 return err; 1689 1690 val /= 1000; 1691 val = clamp_val(val, 0, 255); 1692 1693 mutex_lock(&data->update_lock); 1694 f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val); 1695 data->temp_ovt[nr] = val; 1696 mutex_unlock(&data->update_lock); 1697 1698 return count; 1699 } 1700 1701 static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute 1702 *devattr, char *buf) 1703 { 1704 struct f71882fg_data *data = f71882fg_update_device(dev); 1705 int nr = to_sensor_dev_attr_2(devattr)->index; 1706 int temp_crit_hyst; 1707 1708 mutex_lock(&data->update_lock); 1709 if (nr & 1) 1710 temp_crit_hyst = data->temp_hyst[nr / 2] >> 4; 1711 else 1712 temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f; 1713 temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000; 1714 mutex_unlock(&data->update_lock); 1715 1716 return sprintf(buf, "%d\n", temp_crit_hyst); 1717 } 1718 1719 static ssize_t show_temp_type(struct device *dev, struct device_attribute 1720 *devattr, char *buf) 1721 { 1722 struct f71882fg_data *data = f71882fg_update_device(dev); 1723 int nr = to_sensor_dev_attr_2(devattr)->index; 1724 1725 return sprintf(buf, "%d\n", data->temp_type[nr]); 1726 } 1727 1728 static ssize_t show_temp_beep(struct device *dev, struct device_attribute 1729 *devattr, char *buf) 1730 { 1731 struct f71882fg_data *data = f71882fg_update_device(dev); 1732 int nr = to_sensor_dev_attr_2(devattr)->index; 1733 1734 if (data->temp_beep & (1 << nr)) 1735 return sprintf(buf, "1\n"); 1736 else 1737 return sprintf(buf, "0\n"); 1738 } 1739 1740 static ssize_t store_temp_beep(struct device *dev, struct device_attribute 1741 *devattr, const char *buf, size_t count) 1742 { 1743 struct f71882fg_data *data = dev_get_drvdata(dev); 1744 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1745 unsigned long val; 1746 1747 err = kstrtoul(buf, 10, &val); 1748 if (err) 1749 return err; 1750 1751 mutex_lock(&data->update_lock); 1752 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP); 1753 if (val) 1754 data->temp_beep |= 1 << nr; 1755 else 1756 data->temp_beep &= ~(1 << nr); 1757 1758 f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep); 1759 mutex_unlock(&data->update_lock); 1760 1761 return count; 1762 } 1763 1764 static ssize_t show_temp_alarm(struct device *dev, struct device_attribute 1765 *devattr, char *buf) 1766 { 1767 struct f71882fg_data *data = f71882fg_update_device(dev); 1768 int nr = to_sensor_dev_attr_2(devattr)->index; 1769 1770 if (data->temp_status & (1 << nr)) 1771 return sprintf(buf, "1\n"); 1772 else 1773 return sprintf(buf, "0\n"); 1774 } 1775 1776 static ssize_t show_temp_fault(struct device *dev, struct device_attribute 1777 *devattr, char *buf) 1778 { 1779 struct f71882fg_data *data = f71882fg_update_device(dev); 1780 int nr = to_sensor_dev_attr_2(devattr)->index; 1781 1782 if (data->temp_diode_open & (1 << nr)) 1783 return sprintf(buf, "1\n"); 1784 else 1785 return sprintf(buf, "0\n"); 1786 } 1787 1788 static ssize_t show_pwm(struct device *dev, 1789 struct device_attribute *devattr, char *buf) 1790 { 1791 struct f71882fg_data *data = f71882fg_update_device(dev); 1792 int val, nr = to_sensor_dev_attr_2(devattr)->index; 1793 mutex_lock(&data->update_lock); 1794 if (data->pwm_enable & (1 << (2 * nr))) 1795 /* PWM mode */ 1796 val = data->pwm[nr]; 1797 else { 1798 /* RPM mode */ 1799 val = 255 * fan_from_reg(data->fan_target[nr]) 1800 / fan_from_reg(data->fan_full_speed[nr]); 1801 } 1802 mutex_unlock(&data->update_lock); 1803 return sprintf(buf, "%d\n", val); 1804 } 1805 1806 static ssize_t store_pwm(struct device *dev, 1807 struct device_attribute *devattr, const char *buf, 1808 size_t count) 1809 { 1810 struct f71882fg_data *data = dev_get_drvdata(dev); 1811 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1812 long val; 1813 1814 err = kstrtol(buf, 10, &val); 1815 if (err) 1816 return err; 1817 1818 val = clamp_val(val, 0, 255); 1819 1820 mutex_lock(&data->update_lock); 1821 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 1822 if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) || 1823 (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) { 1824 count = -EROFS; 1825 goto leave; 1826 } 1827 if (data->pwm_enable & (1 << (2 * nr))) { 1828 /* PWM mode */ 1829 f71882fg_write8(data, F71882FG_REG_PWM(nr), val); 1830 data->pwm[nr] = val; 1831 } else { 1832 /* RPM mode */ 1833 int target, full_speed; 1834 full_speed = f71882fg_read16(data, 1835 F71882FG_REG_FAN_FULL_SPEED(nr)); 1836 target = fan_to_reg(val * fan_from_reg(full_speed) / 255); 1837 f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target); 1838 data->fan_target[nr] = target; 1839 data->fan_full_speed[nr] = full_speed; 1840 } 1841 leave: 1842 mutex_unlock(&data->update_lock); 1843 1844 return count; 1845 } 1846 1847 static ssize_t show_simple_pwm(struct device *dev, 1848 struct device_attribute *devattr, char *buf) 1849 { 1850 struct f71882fg_data *data = f71882fg_update_device(dev); 1851 int val, nr = to_sensor_dev_attr_2(devattr)->index; 1852 1853 val = data->pwm[nr]; 1854 return sprintf(buf, "%d\n", val); 1855 } 1856 1857 static ssize_t store_simple_pwm(struct device *dev, 1858 struct device_attribute *devattr, 1859 const char *buf, size_t count) 1860 { 1861 struct f71882fg_data *data = dev_get_drvdata(dev); 1862 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1863 long val; 1864 1865 err = kstrtol(buf, 10, &val); 1866 if (err) 1867 return err; 1868 1869 val = clamp_val(val, 0, 255); 1870 1871 mutex_lock(&data->update_lock); 1872 f71882fg_write8(data, F71882FG_REG_PWM(nr), val); 1873 data->pwm[nr] = val; 1874 mutex_unlock(&data->update_lock); 1875 1876 return count; 1877 } 1878 1879 static ssize_t show_pwm_enable(struct device *dev, 1880 struct device_attribute *devattr, char *buf) 1881 { 1882 int result = 0; 1883 struct f71882fg_data *data = f71882fg_update_device(dev); 1884 int nr = to_sensor_dev_attr_2(devattr)->index; 1885 1886 switch ((data->pwm_enable >> 2 * nr) & 3) { 1887 case 0: 1888 case 1: 1889 result = 2; /* Normal auto mode */ 1890 break; 1891 case 2: 1892 result = 1; /* Manual mode */ 1893 break; 1894 case 3: 1895 if (data->type == f8000) 1896 result = 3; /* Thermostat mode */ 1897 else 1898 result = 1; /* Manual mode */ 1899 break; 1900 } 1901 1902 return sprintf(buf, "%d\n", result); 1903 } 1904 1905 static ssize_t store_pwm_enable(struct device *dev, struct device_attribute 1906 *devattr, const char *buf, size_t count) 1907 { 1908 struct f71882fg_data *data = dev_get_drvdata(dev); 1909 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1910 long val; 1911 1912 err = kstrtol(buf, 10, &val); 1913 if (err) 1914 return err; 1915 1916 /* Special case for F8000 pwm channel 3 which only does auto mode */ 1917 if (data->type == f8000 && nr == 2 && val != 2) 1918 return -EINVAL; 1919 1920 mutex_lock(&data->update_lock); 1921 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 1922 /* Special case for F8000 auto PWM mode / Thermostat mode */ 1923 if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) { 1924 switch (val) { 1925 case 2: 1926 data->pwm_enable &= ~(2 << (2 * nr)); 1927 break; /* Normal auto mode */ 1928 case 3: 1929 data->pwm_enable |= 2 << (2 * nr); 1930 break; /* Thermostat mode */ 1931 default: 1932 count = -EINVAL; 1933 goto leave; 1934 } 1935 } else { 1936 switch (val) { 1937 case 1: 1938 /* The f71858fg does not support manual RPM mode */ 1939 if (data->type == f71858fg && 1940 ((data->pwm_enable >> (2 * nr)) & 1)) { 1941 count = -EINVAL; 1942 goto leave; 1943 } 1944 data->pwm_enable |= 2 << (2 * nr); 1945 break; /* Manual */ 1946 case 2: 1947 data->pwm_enable &= ~(2 << (2 * nr)); 1948 break; /* Normal auto mode */ 1949 default: 1950 count = -EINVAL; 1951 goto leave; 1952 } 1953 } 1954 f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable); 1955 leave: 1956 mutex_unlock(&data->update_lock); 1957 1958 return count; 1959 } 1960 1961 static ssize_t show_pwm_auto_point_pwm(struct device *dev, 1962 struct device_attribute *devattr, 1963 char *buf) 1964 { 1965 int result; 1966 struct f71882fg_data *data = f71882fg_update_device(dev); 1967 int pwm = to_sensor_dev_attr_2(devattr)->index; 1968 int point = to_sensor_dev_attr_2(devattr)->nr; 1969 1970 mutex_lock(&data->update_lock); 1971 if (data->pwm_enable & (1 << (2 * pwm))) { 1972 /* PWM mode */ 1973 result = data->pwm_auto_point_pwm[pwm][point]; 1974 } else { 1975 /* RPM mode */ 1976 result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]); 1977 } 1978 mutex_unlock(&data->update_lock); 1979 1980 return sprintf(buf, "%d\n", result); 1981 } 1982 1983 static ssize_t store_pwm_auto_point_pwm(struct device *dev, 1984 struct device_attribute *devattr, 1985 const char *buf, size_t count) 1986 { 1987 struct f71882fg_data *data = dev_get_drvdata(dev); 1988 int err, pwm = to_sensor_dev_attr_2(devattr)->index; 1989 int point = to_sensor_dev_attr_2(devattr)->nr; 1990 long val; 1991 1992 err = kstrtol(buf, 10, &val); 1993 if (err) 1994 return err; 1995 1996 val = clamp_val(val, 0, 255); 1997 1998 mutex_lock(&data->update_lock); 1999 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 2000 if (data->pwm_enable & (1 << (2 * pwm))) { 2001 /* PWM mode */ 2002 } else { 2003 /* RPM mode */ 2004 if (val < 29) /* Prevent negative numbers */ 2005 val = 255; 2006 else 2007 val = (255 - val) * 32 / val; 2008 } 2009 f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val); 2010 data->pwm_auto_point_pwm[pwm][point] = val; 2011 mutex_unlock(&data->update_lock); 2012 2013 return count; 2014 } 2015 2016 static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev, 2017 struct device_attribute *devattr, 2018 char *buf) 2019 { 2020 int result = 0; 2021 struct f71882fg_data *data = f71882fg_update_device(dev); 2022 int nr = to_sensor_dev_attr_2(devattr)->index; 2023 int point = to_sensor_dev_attr_2(devattr)->nr; 2024 2025 mutex_lock(&data->update_lock); 2026 if (nr & 1) 2027 result = data->pwm_auto_point_hyst[nr / 2] >> 4; 2028 else 2029 result = data->pwm_auto_point_hyst[nr / 2] & 0x0f; 2030 result = 1000 * (data->pwm_auto_point_temp[nr][point] - result); 2031 mutex_unlock(&data->update_lock); 2032 2033 return sprintf(buf, "%d\n", result); 2034 } 2035 2036 static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev, 2037 struct device_attribute *devattr, 2038 const char *buf, size_t count) 2039 { 2040 struct f71882fg_data *data = dev_get_drvdata(dev); 2041 int err, nr = to_sensor_dev_attr_2(devattr)->index; 2042 int point = to_sensor_dev_attr_2(devattr)->nr; 2043 u8 reg; 2044 long val; 2045 2046 err = kstrtol(buf, 10, &val); 2047 if (err) 2048 return err; 2049 2050 val /= 1000; 2051 2052 mutex_lock(&data->update_lock); 2053 data->pwm_auto_point_temp[nr][point] = 2054 f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point)); 2055 val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15, 2056 data->pwm_auto_point_temp[nr][point]); 2057 val = data->pwm_auto_point_temp[nr][point] - val; 2058 2059 reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2)); 2060 if (nr & 1) 2061 reg = (reg & 0x0f) | (val << 4); 2062 else 2063 reg = (reg & 0xf0) | val; 2064 2065 f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg); 2066 data->pwm_auto_point_hyst[nr / 2] = reg; 2067 mutex_unlock(&data->update_lock); 2068 2069 return count; 2070 } 2071 2072 static ssize_t show_pwm_interpolate(struct device *dev, 2073 struct device_attribute *devattr, char *buf) 2074 { 2075 int result; 2076 struct f71882fg_data *data = f71882fg_update_device(dev); 2077 int nr = to_sensor_dev_attr_2(devattr)->index; 2078 2079 result = (data->pwm_auto_point_mapping[nr] >> 4) & 1; 2080 2081 return sprintf(buf, "%d\n", result); 2082 } 2083 2084 static ssize_t store_pwm_interpolate(struct device *dev, 2085 struct device_attribute *devattr, 2086 const char *buf, size_t count) 2087 { 2088 struct f71882fg_data *data = dev_get_drvdata(dev); 2089 int err, nr = to_sensor_dev_attr_2(devattr)->index; 2090 unsigned long val; 2091 2092 err = kstrtoul(buf, 10, &val); 2093 if (err) 2094 return err; 2095 2096 mutex_lock(&data->update_lock); 2097 data->pwm_auto_point_mapping[nr] = 2098 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr)); 2099 if (val) 2100 val = data->pwm_auto_point_mapping[nr] | (1 << 4); 2101 else 2102 val = data->pwm_auto_point_mapping[nr] & (~(1 << 4)); 2103 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val); 2104 data->pwm_auto_point_mapping[nr] = val; 2105 mutex_unlock(&data->update_lock); 2106 2107 return count; 2108 } 2109 2110 static ssize_t show_pwm_auto_point_channel(struct device *dev, 2111 struct device_attribute *devattr, 2112 char *buf) 2113 { 2114 int result; 2115 struct f71882fg_data *data = f71882fg_update_device(dev); 2116 int nr = to_sensor_dev_attr_2(devattr)->index; 2117 2118 result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) - 2119 data->temp_start); 2120 2121 return sprintf(buf, "%d\n", result); 2122 } 2123 2124 static ssize_t store_pwm_auto_point_channel(struct device *dev, 2125 struct device_attribute *devattr, 2126 const char *buf, size_t count) 2127 { 2128 struct f71882fg_data *data = dev_get_drvdata(dev); 2129 int err, nr = to_sensor_dev_attr_2(devattr)->index; 2130 long val; 2131 2132 err = kstrtol(buf, 10, &val); 2133 if (err) 2134 return err; 2135 2136 switch (val) { 2137 case 1: 2138 val = 0; 2139 break; 2140 case 2: 2141 val = 1; 2142 break; 2143 case 4: 2144 val = 2; 2145 break; 2146 default: 2147 return -EINVAL; 2148 } 2149 val += data->temp_start; 2150 mutex_lock(&data->update_lock); 2151 data->pwm_auto_point_mapping[nr] = 2152 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr)); 2153 val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val; 2154 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val); 2155 data->pwm_auto_point_mapping[nr] = val; 2156 mutex_unlock(&data->update_lock); 2157 2158 return count; 2159 } 2160 2161 static ssize_t show_pwm_auto_point_temp(struct device *dev, 2162 struct device_attribute *devattr, 2163 char *buf) 2164 { 2165 int result; 2166 struct f71882fg_data *data = f71882fg_update_device(dev); 2167 int pwm = to_sensor_dev_attr_2(devattr)->index; 2168 int point = to_sensor_dev_attr_2(devattr)->nr; 2169 2170 result = data->pwm_auto_point_temp[pwm][point]; 2171 return sprintf(buf, "%d\n", 1000 * result); 2172 } 2173 2174 static ssize_t store_pwm_auto_point_temp(struct device *dev, 2175 struct device_attribute *devattr, 2176 const char *buf, size_t count) 2177 { 2178 struct f71882fg_data *data = dev_get_drvdata(dev); 2179 int err, pwm = to_sensor_dev_attr_2(devattr)->index; 2180 int point = to_sensor_dev_attr_2(devattr)->nr; 2181 long val; 2182 2183 err = kstrtol(buf, 10, &val); 2184 if (err) 2185 return err; 2186 2187 val /= 1000; 2188 2189 if (data->auto_point_temp_signed) 2190 val = clamp_val(val, -128, 127); 2191 else 2192 val = clamp_val(val, 0, 127); 2193 2194 mutex_lock(&data->update_lock); 2195 f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val); 2196 data->pwm_auto_point_temp[pwm][point] = val; 2197 mutex_unlock(&data->update_lock); 2198 2199 return count; 2200 } 2201 2202 static ssize_t name_show(struct device *dev, struct device_attribute *devattr, 2203 char *buf) 2204 { 2205 struct f71882fg_data *data = dev_get_drvdata(dev); 2206 return sprintf(buf, "%s\n", f71882fg_names[data->type]); 2207 } 2208 2209 static int f71882fg_create_sysfs_files(struct platform_device *pdev, 2210 struct sensor_device_attribute_2 *attr, int count) 2211 { 2212 int err, i; 2213 2214 for (i = 0; i < count; i++) { 2215 err = device_create_file(&pdev->dev, &attr[i].dev_attr); 2216 if (err) 2217 return err; 2218 } 2219 return 0; 2220 } 2221 2222 static void f71882fg_remove_sysfs_files(struct platform_device *pdev, 2223 struct sensor_device_attribute_2 *attr, int count) 2224 { 2225 int i; 2226 2227 for (i = 0; i < count; i++) 2228 device_remove_file(&pdev->dev, &attr[i].dev_attr); 2229 } 2230 2231 static int f71882fg_create_fan_sysfs_files( 2232 struct platform_device *pdev, int idx) 2233 { 2234 struct f71882fg_data *data = platform_get_drvdata(pdev); 2235 int err; 2236 2237 /* Sanity check the pwm setting */ 2238 err = 0; 2239 switch (data->type) { 2240 case f71858fg: 2241 if (((data->pwm_enable >> (idx * 2)) & 3) == 3) 2242 err = 1; 2243 break; 2244 case f71862fg: 2245 if (((data->pwm_enable >> (idx * 2)) & 1) != 1) 2246 err = 1; 2247 break; 2248 case f8000: 2249 if (idx == 2) 2250 err = data->pwm_enable & 0x20; 2251 break; 2252 default: 2253 break; 2254 } 2255 if (err) { 2256 dev_err(&pdev->dev, 2257 "Invalid (reserved) pwm settings: 0x%02x, " 2258 "skipping fan %d\n", 2259 (data->pwm_enable >> (idx * 2)) & 3, idx + 1); 2260 return 0; /* This is a non fatal condition */ 2261 } 2262 2263 err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0], 2264 ARRAY_SIZE(fxxxx_fan_attr[0])); 2265 if (err) 2266 return err; 2267 2268 if (f71882fg_fan_has_beep[data->type]) { 2269 err = f71882fg_create_sysfs_files(pdev, 2270 &fxxxx_fan_beep_attr[idx], 2271 1); 2272 if (err) 2273 return err; 2274 } 2275 2276 dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1, 2277 (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM"); 2278 2279 /* Check for unsupported auto pwm settings */ 2280 switch (data->type) { 2281 case f71808e: 2282 case f71808a: 2283 case f71869: 2284 case f71869a: 2285 case f71889fg: 2286 case f71889ed: 2287 case f71889a: 2288 data->pwm_auto_point_mapping[idx] = 2289 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx)); 2290 if ((data->pwm_auto_point_mapping[idx] & 0x80) || 2291 (data->pwm_auto_point_mapping[idx] & 3) == 0) { 2292 dev_warn(&pdev->dev, 2293 "Auto pwm controlled by raw digital " 2294 "data, disabling pwm auto_point " 2295 "sysfs attributes for fan %d\n", idx + 1); 2296 return 0; /* This is a non fatal condition */ 2297 } 2298 break; 2299 default: 2300 break; 2301 } 2302 2303 switch (data->type) { 2304 case f71862fg: 2305 err = f71882fg_create_sysfs_files(pdev, 2306 &f71862fg_auto_pwm_attr[idx][0], 2307 ARRAY_SIZE(f71862fg_auto_pwm_attr[0])); 2308 break; 2309 case f71808e: 2310 case f71869: 2311 err = f71882fg_create_sysfs_files(pdev, 2312 &f71869_auto_pwm_attr[idx][0], 2313 ARRAY_SIZE(f71869_auto_pwm_attr[0])); 2314 break; 2315 case f8000: 2316 err = f71882fg_create_sysfs_files(pdev, 2317 &f8000_auto_pwm_attr[idx][0], 2318 ARRAY_SIZE(f8000_auto_pwm_attr[0])); 2319 break; 2320 default: 2321 err = f71882fg_create_sysfs_files(pdev, 2322 &fxxxx_auto_pwm_attr[idx][0], 2323 ARRAY_SIZE(fxxxx_auto_pwm_attr[0])); 2324 } 2325 2326 return err; 2327 } 2328 2329 static int f71882fg_probe(struct platform_device *pdev) 2330 { 2331 struct f71882fg_data *data; 2332 struct f71882fg_sio_data *sio_data = dev_get_platdata(&pdev->dev); 2333 int nr_fans = f71882fg_nr_fans[sio_data->type]; 2334 int nr_temps = f71882fg_nr_temps[sio_data->type]; 2335 int err, i; 2336 int size; 2337 u8 start_reg, reg; 2338 2339 data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data), 2340 GFP_KERNEL); 2341 if (!data) 2342 return -ENOMEM; 2343 2344 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start; 2345 data->type = sio_data->type; 2346 data->temp_start = 2347 (data->type == f71858fg || data->type == f8000 || 2348 data->type == f81866a) ? 0 : 1; 2349 mutex_init(&data->update_lock); 2350 platform_set_drvdata(pdev, data); 2351 2352 start_reg = f71882fg_read8(data, F71882FG_REG_START); 2353 if (start_reg & 0x04) { 2354 dev_warn(&pdev->dev, "Hardware monitor is powered down\n"); 2355 return -ENODEV; 2356 } 2357 if (!(start_reg & 0x03)) { 2358 dev_warn(&pdev->dev, "Hardware monitoring not activated\n"); 2359 return -ENODEV; 2360 } 2361 2362 /* Register sysfs interface files */ 2363 err = device_create_file(&pdev->dev, &dev_attr_name); 2364 if (err) 2365 goto exit_unregister_sysfs; 2366 2367 if (start_reg & 0x01) { 2368 switch (data->type) { 2369 case f71858fg: 2370 data->temp_config = 2371 f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG); 2372 if (data->temp_config & 0x10) 2373 /* 2374 * The f71858fg temperature alarms behave as 2375 * the f8000 alarms in this mode 2376 */ 2377 err = f71882fg_create_sysfs_files(pdev, 2378 f8000_temp_attr, 2379 ARRAY_SIZE(f8000_temp_attr)); 2380 else 2381 err = f71882fg_create_sysfs_files(pdev, 2382 f71858fg_temp_attr, 2383 ARRAY_SIZE(f71858fg_temp_attr)); 2384 break; 2385 case f8000: 2386 err = f71882fg_create_sysfs_files(pdev, 2387 f8000_temp_attr, 2388 ARRAY_SIZE(f8000_temp_attr)); 2389 break; 2390 case f81866a: 2391 err = f71882fg_create_sysfs_files(pdev, 2392 f71858fg_temp_attr, 2393 ARRAY_SIZE(f71858fg_temp_attr)); 2394 break; 2395 default: 2396 err = f71882fg_create_sysfs_files(pdev, 2397 &fxxxx_temp_attr[0][0], 2398 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps); 2399 } 2400 if (err) 2401 goto exit_unregister_sysfs; 2402 2403 if (f71882fg_temp_has_beep[data->type]) { 2404 if (data->type == f81866a) { 2405 size = ARRAY_SIZE(f81866_temp_beep_attr[0]); 2406 err = f71882fg_create_sysfs_files(pdev, 2407 &f81866_temp_beep_attr[0][0], 2408 size * nr_temps); 2409 2410 } else { 2411 size = ARRAY_SIZE(fxxxx_temp_beep_attr[0]); 2412 err = f71882fg_create_sysfs_files(pdev, 2413 &fxxxx_temp_beep_attr[0][0], 2414 size * nr_temps); 2415 } 2416 if (err) 2417 goto exit_unregister_sysfs; 2418 } 2419 2420 for (i = 0; i < F71882FG_MAX_INS; i++) { 2421 if (f71882fg_has_in[data->type][i]) { 2422 err = device_create_file(&pdev->dev, 2423 &fxxxx_in_attr[i].dev_attr); 2424 if (err) 2425 goto exit_unregister_sysfs; 2426 } 2427 } 2428 if (f71882fg_has_in1_alarm[data->type]) { 2429 err = f71882fg_create_sysfs_files(pdev, 2430 fxxxx_in1_alarm_attr, 2431 ARRAY_SIZE(fxxxx_in1_alarm_attr)); 2432 if (err) 2433 goto exit_unregister_sysfs; 2434 } 2435 } 2436 2437 if (start_reg & 0x02) { 2438 switch (data->type) { 2439 case f71808e: 2440 case f71808a: 2441 case f71869: 2442 case f71869a: 2443 /* These always have signed auto point temps */ 2444 data->auto_point_temp_signed = 1; 2445 fallthrough; /* to select correct fan/pwm reg bank! */ 2446 case f71889fg: 2447 case f71889ed: 2448 case f71889a: 2449 reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T); 2450 if (reg & F71882FG_FAN_NEG_TEMP_EN) 2451 data->auto_point_temp_signed = 1; 2452 /* Ensure banked pwm registers point to right bank */ 2453 reg &= ~F71882FG_FAN_PROG_SEL; 2454 f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg); 2455 break; 2456 default: 2457 break; 2458 } 2459 2460 data->pwm_enable = 2461 f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 2462 2463 for (i = 0; i < nr_fans; i++) { 2464 err = f71882fg_create_fan_sysfs_files(pdev, i); 2465 if (err) 2466 goto exit_unregister_sysfs; 2467 } 2468 2469 /* Some types have 1 extra fan with limited functionality */ 2470 switch (data->type) { 2471 case f71808a: 2472 err = f71882fg_create_sysfs_files(pdev, 2473 f71808a_fan3_attr, 2474 ARRAY_SIZE(f71808a_fan3_attr)); 2475 break; 2476 case f8000: 2477 err = f71882fg_create_sysfs_files(pdev, 2478 f8000_fan_attr, 2479 ARRAY_SIZE(f8000_fan_attr)); 2480 break; 2481 default: 2482 break; 2483 } 2484 if (err) 2485 goto exit_unregister_sysfs; 2486 } 2487 2488 data->hwmon_dev = hwmon_device_register(&pdev->dev); 2489 if (IS_ERR(data->hwmon_dev)) { 2490 err = PTR_ERR(data->hwmon_dev); 2491 data->hwmon_dev = NULL; 2492 goto exit_unregister_sysfs; 2493 } 2494 2495 return 0; 2496 2497 exit_unregister_sysfs: 2498 f71882fg_remove(pdev); /* Will unregister the sysfs files for us */ 2499 return err; /* f71882fg_remove() also frees our data */ 2500 } 2501 2502 static int f71882fg_remove(struct platform_device *pdev) 2503 { 2504 struct f71882fg_data *data = platform_get_drvdata(pdev); 2505 int nr_fans = f71882fg_nr_fans[data->type]; 2506 int nr_temps = f71882fg_nr_temps[data->type]; 2507 int i; 2508 u8 start_reg = f71882fg_read8(data, F71882FG_REG_START); 2509 2510 if (data->hwmon_dev) 2511 hwmon_device_unregister(data->hwmon_dev); 2512 2513 device_remove_file(&pdev->dev, &dev_attr_name); 2514 2515 if (start_reg & 0x01) { 2516 switch (data->type) { 2517 case f71858fg: 2518 if (data->temp_config & 0x10) 2519 f71882fg_remove_sysfs_files(pdev, 2520 f8000_temp_attr, 2521 ARRAY_SIZE(f8000_temp_attr)); 2522 else 2523 f71882fg_remove_sysfs_files(pdev, 2524 f71858fg_temp_attr, 2525 ARRAY_SIZE(f71858fg_temp_attr)); 2526 break; 2527 case f8000: 2528 f71882fg_remove_sysfs_files(pdev, 2529 f8000_temp_attr, 2530 ARRAY_SIZE(f8000_temp_attr)); 2531 break; 2532 case f81866a: 2533 f71882fg_remove_sysfs_files(pdev, 2534 f71858fg_temp_attr, 2535 ARRAY_SIZE(f71858fg_temp_attr)); 2536 break; 2537 default: 2538 f71882fg_remove_sysfs_files(pdev, 2539 &fxxxx_temp_attr[0][0], 2540 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps); 2541 } 2542 if (f71882fg_temp_has_beep[data->type]) { 2543 if (data->type == f81866a) 2544 f71882fg_remove_sysfs_files(pdev, 2545 &f81866_temp_beep_attr[0][0], 2546 ARRAY_SIZE(f81866_temp_beep_attr[0]) 2547 * nr_temps); 2548 else 2549 f71882fg_remove_sysfs_files(pdev, 2550 &fxxxx_temp_beep_attr[0][0], 2551 ARRAY_SIZE(fxxxx_temp_beep_attr[0]) 2552 * nr_temps); 2553 } 2554 2555 for (i = 0; i < F71882FG_MAX_INS; i++) { 2556 if (f71882fg_has_in[data->type][i]) { 2557 device_remove_file(&pdev->dev, 2558 &fxxxx_in_attr[i].dev_attr); 2559 } 2560 } 2561 if (f71882fg_has_in1_alarm[data->type]) { 2562 f71882fg_remove_sysfs_files(pdev, 2563 fxxxx_in1_alarm_attr, 2564 ARRAY_SIZE(fxxxx_in1_alarm_attr)); 2565 } 2566 } 2567 2568 if (start_reg & 0x02) { 2569 f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0], 2570 ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans); 2571 2572 if (f71882fg_fan_has_beep[data->type]) { 2573 f71882fg_remove_sysfs_files(pdev, 2574 fxxxx_fan_beep_attr, nr_fans); 2575 } 2576 2577 switch (data->type) { 2578 case f71808a: 2579 f71882fg_remove_sysfs_files(pdev, 2580 &fxxxx_auto_pwm_attr[0][0], 2581 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans); 2582 f71882fg_remove_sysfs_files(pdev, 2583 f71808a_fan3_attr, 2584 ARRAY_SIZE(f71808a_fan3_attr)); 2585 break; 2586 case f71862fg: 2587 f71882fg_remove_sysfs_files(pdev, 2588 &f71862fg_auto_pwm_attr[0][0], 2589 ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) * 2590 nr_fans); 2591 break; 2592 case f71808e: 2593 case f71869: 2594 f71882fg_remove_sysfs_files(pdev, 2595 &f71869_auto_pwm_attr[0][0], 2596 ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans); 2597 break; 2598 case f8000: 2599 f71882fg_remove_sysfs_files(pdev, 2600 f8000_fan_attr, 2601 ARRAY_SIZE(f8000_fan_attr)); 2602 f71882fg_remove_sysfs_files(pdev, 2603 &f8000_auto_pwm_attr[0][0], 2604 ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans); 2605 break; 2606 default: 2607 f71882fg_remove_sysfs_files(pdev, 2608 &fxxxx_auto_pwm_attr[0][0], 2609 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans); 2610 } 2611 } 2612 return 0; 2613 } 2614 2615 static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data) 2616 { 2617 u16 devid; 2618 unsigned short address; 2619 int err = superio_enter(sioaddr); 2620 if (err) 2621 return err; 2622 2623 devid = superio_inw(sioaddr, SIO_REG_MANID); 2624 if (devid != SIO_FINTEK_ID) { 2625 pr_debug("Not a Fintek device\n"); 2626 err = -ENODEV; 2627 goto exit; 2628 } 2629 2630 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID); 2631 switch (devid) { 2632 case SIO_F71808E_ID: 2633 sio_data->type = f71808e; 2634 break; 2635 case SIO_F71808A_ID: 2636 sio_data->type = f71808a; 2637 break; 2638 case SIO_F71858_ID: 2639 sio_data->type = f71858fg; 2640 break; 2641 case SIO_F71862_ID: 2642 sio_data->type = f71862fg; 2643 break; 2644 case SIO_F71868_ID: 2645 sio_data->type = f71868a; 2646 break; 2647 case SIO_F71869_ID: 2648 sio_data->type = f71869; 2649 break; 2650 case SIO_F71869A_ID: 2651 sio_data->type = f71869a; 2652 break; 2653 case SIO_F71882_ID: 2654 sio_data->type = f71882fg; 2655 break; 2656 case SIO_F71889_ID: 2657 sio_data->type = f71889fg; 2658 break; 2659 case SIO_F71889E_ID: 2660 sio_data->type = f71889ed; 2661 break; 2662 case SIO_F71889A_ID: 2663 sio_data->type = f71889a; 2664 break; 2665 case SIO_F8000_ID: 2666 sio_data->type = f8000; 2667 break; 2668 case SIO_F81768D_ID: 2669 sio_data->type = f81768d; 2670 break; 2671 case SIO_F81865_ID: 2672 sio_data->type = f81865f; 2673 break; 2674 case SIO_F81866_ID: 2675 sio_data->type = f81866a; 2676 break; 2677 default: 2678 pr_info("Unsupported Fintek device: %04x\n", 2679 (unsigned int)devid); 2680 err = -ENODEV; 2681 goto exit; 2682 } 2683 2684 if (sio_data->type == f71858fg) 2685 superio_select(sioaddr, SIO_F71858FG_LD_HWM); 2686 else 2687 superio_select(sioaddr, SIO_F71882FG_LD_HWM); 2688 2689 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { 2690 pr_warn("Device not activated\n"); 2691 err = -ENODEV; 2692 goto exit; 2693 } 2694 2695 address = superio_inw(sioaddr, SIO_REG_ADDR); 2696 if (address == 0) { 2697 pr_warn("Base address not set\n"); 2698 err = -ENODEV; 2699 goto exit; 2700 } 2701 address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */ 2702 2703 err = address; 2704 pr_info("Found %s chip at %#x, revision %d\n", 2705 f71882fg_names[sio_data->type], (unsigned int)address, 2706 (int)superio_inb(sioaddr, SIO_REG_DEVREV)); 2707 exit: 2708 superio_exit(sioaddr); 2709 return err; 2710 } 2711 2712 static int __init f71882fg_device_add(int address, 2713 const struct f71882fg_sio_data *sio_data) 2714 { 2715 struct resource res = { 2716 .start = address, 2717 .end = address + REGION_LENGTH - 1, 2718 .flags = IORESOURCE_IO, 2719 }; 2720 int err; 2721 2722 f71882fg_pdev = platform_device_alloc(DRVNAME, address); 2723 if (!f71882fg_pdev) 2724 return -ENOMEM; 2725 2726 res.name = f71882fg_pdev->name; 2727 err = acpi_check_resource_conflict(&res); 2728 if (err) 2729 goto exit_device_put; 2730 2731 err = platform_device_add_resources(f71882fg_pdev, &res, 1); 2732 if (err) { 2733 pr_err("Device resource addition failed\n"); 2734 goto exit_device_put; 2735 } 2736 2737 err = platform_device_add_data(f71882fg_pdev, sio_data, 2738 sizeof(struct f71882fg_sio_data)); 2739 if (err) { 2740 pr_err("Platform data allocation failed\n"); 2741 goto exit_device_put; 2742 } 2743 2744 err = platform_device_add(f71882fg_pdev); 2745 if (err) { 2746 pr_err("Device addition failed\n"); 2747 goto exit_device_put; 2748 } 2749 2750 return 0; 2751 2752 exit_device_put: 2753 platform_device_put(f71882fg_pdev); 2754 2755 return err; 2756 } 2757 2758 static int __init f71882fg_init(void) 2759 { 2760 int err; 2761 int address; 2762 struct f71882fg_sio_data sio_data; 2763 2764 memset(&sio_data, 0, sizeof(sio_data)); 2765 2766 address = f71882fg_find(0x2e, &sio_data); 2767 if (address < 0) 2768 address = f71882fg_find(0x4e, &sio_data); 2769 if (address < 0) 2770 return address; 2771 2772 err = platform_driver_register(&f71882fg_driver); 2773 if (err) 2774 return err; 2775 2776 err = f71882fg_device_add(address, &sio_data); 2777 if (err) 2778 goto exit_driver; 2779 2780 return 0; 2781 2782 exit_driver: 2783 platform_driver_unregister(&f71882fg_driver); 2784 return err; 2785 } 2786 2787 static void __exit f71882fg_exit(void) 2788 { 2789 platform_device_unregister(f71882fg_pdev); 2790 platform_driver_unregister(&f71882fg_driver); 2791 } 2792 2793 MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver"); 2794 MODULE_AUTHOR("Hans Edgington, Hans de Goede <hdegoede@redhat.com>"); 2795 MODULE_LICENSE("GPL"); 2796 2797 module_init(f71882fg_init); 2798 module_exit(f71882fg_exit); 2799