xref: /openbmc/linux/drivers/hwmon/f71805f.c (revision 82e6fdd6)
1 /*
2  * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
3  *             chips integrated hardware monitoring features
4  * Copyright (C) 2005-2006  Jean Delvare <jdelvare@suse.de>
5  *
6  * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
7  * complete hardware monitoring features: voltage, fan and temperature
8  * sensors, and manual and automatic fan speed control.
9  *
10  * The F71872F/FG is almost the same, with two more voltages monitored,
11  * and 6 VID inputs.
12  *
13  * The F71806F/FG is essentially the same as the F71872F/FG. It even has
14  * the same chip ID, so the driver can't differentiate between.
15  *
16  * This program is free software; you can redistribute it and/or modify
17  * it under the terms of the GNU General Public License as published by
18  * the Free Software Foundation; either version 2 of the License, or
19  * (at your option) any later version.
20  *
21  * This program is distributed in the hope that it will be useful,
22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
24  * GNU General Public License for more details.
25  *
26  * You should have received a copy of the GNU General Public License
27  * along with this program; if not, write to the Free Software
28  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29  */
30 
31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/slab.h>
36 #include <linux/jiffies.h>
37 #include <linux/platform_device.h>
38 #include <linux/hwmon.h>
39 #include <linux/hwmon-sysfs.h>
40 #include <linux/err.h>
41 #include <linux/mutex.h>
42 #include <linux/sysfs.h>
43 #include <linux/ioport.h>
44 #include <linux/acpi.h>
45 #include <linux/io.h>
46 
47 static unsigned short force_id;
48 module_param(force_id, ushort, 0);
49 MODULE_PARM_DESC(force_id, "Override the detected device ID");
50 
51 static struct platform_device *pdev;
52 
53 #define DRVNAME "f71805f"
54 enum kinds { f71805f, f71872f };
55 
56 /*
57  * Super-I/O constants and functions
58  */
59 
60 #define F71805F_LD_HWM		0x04
61 
62 #define SIO_REG_LDSEL		0x07	/* Logical device select */
63 #define SIO_REG_DEVID		0x20	/* Device ID (2 bytes) */
64 #define SIO_REG_DEVREV		0x22	/* Device revision */
65 #define SIO_REG_MANID		0x23	/* Fintek ID (2 bytes) */
66 #define SIO_REG_FNSEL1		0x29	/* Multi Function Select 1 (F71872F) */
67 #define SIO_REG_ENABLE		0x30	/* Logical device enable */
68 #define SIO_REG_ADDR		0x60	/* Logical device address (2 bytes) */
69 
70 #define SIO_FINTEK_ID		0x1934
71 #define SIO_F71805F_ID		0x0406
72 #define SIO_F71872F_ID		0x0341
73 
74 static inline int
75 superio_inb(int base, int reg)
76 {
77 	outb(reg, base);
78 	return inb(base + 1);
79 }
80 
81 static int
82 superio_inw(int base, int reg)
83 {
84 	int val;
85 	outb(reg++, base);
86 	val = inb(base + 1) << 8;
87 	outb(reg, base);
88 	val |= inb(base + 1);
89 	return val;
90 }
91 
92 static inline void
93 superio_select(int base, int ld)
94 {
95 	outb(SIO_REG_LDSEL, base);
96 	outb(ld, base + 1);
97 }
98 
99 static inline void
100 superio_enter(int base)
101 {
102 	outb(0x87, base);
103 	outb(0x87, base);
104 }
105 
106 static inline void
107 superio_exit(int base)
108 {
109 	outb(0xaa, base);
110 }
111 
112 /*
113  * ISA constants
114  */
115 
116 #define REGION_LENGTH		8
117 #define ADDR_REG_OFFSET		5
118 #define DATA_REG_OFFSET		6
119 
120 /*
121  * Registers
122  */
123 
124 /* in nr from 0 to 10 (8-bit values) */
125 #define F71805F_REG_IN(nr)		(0x10 + (nr))
126 #define F71805F_REG_IN_HIGH(nr)		((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
127 #define F71805F_REG_IN_LOW(nr)		((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
128 /* fan nr from 0 to 2 (12-bit values, two registers) */
129 #define F71805F_REG_FAN(nr)		(0x20 + 2 * (nr))
130 #define F71805F_REG_FAN_LOW(nr)		(0x28 + 2 * (nr))
131 #define F71805F_REG_FAN_TARGET(nr)	(0x69 + 16 * (nr))
132 #define F71805F_REG_FAN_CTRL(nr)	(0x60 + 16 * (nr))
133 #define F71805F_REG_PWM_FREQ(nr)	(0x63 + 16 * (nr))
134 #define F71805F_REG_PWM_DUTY(nr)	(0x6B + 16 * (nr))
135 /* temp nr from 0 to 2 (8-bit values) */
136 #define F71805F_REG_TEMP(nr)		(0x1B + (nr))
137 #define F71805F_REG_TEMP_HIGH(nr)	(0x54 + 2 * (nr))
138 #define F71805F_REG_TEMP_HYST(nr)	(0x55 + 2 * (nr))
139 #define F71805F_REG_TEMP_MODE		0x01
140 /* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
141 /* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
142 #define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
143 					(0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
144 #define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
145 					(0xA4 + 0x10 * (pwmnr) + \
146 						2 * (2 - (apnr)))
147 
148 #define F71805F_REG_START		0x00
149 /* status nr from 0 to 2 */
150 #define F71805F_REG_STATUS(nr)		(0x36 + (nr))
151 
152 /* individual register bits */
153 #define FAN_CTRL_DC_MODE		0x10
154 #define FAN_CTRL_LATCH_FULL		0x08
155 #define FAN_CTRL_MODE_MASK		0x03
156 #define FAN_CTRL_MODE_SPEED		0x00
157 #define FAN_CTRL_MODE_TEMPERATURE	0x01
158 #define FAN_CTRL_MODE_MANUAL		0x02
159 
160 /*
161  * Data structures and manipulation thereof
162  */
163 
164 struct f71805f_auto_point {
165 	u8 temp[3];
166 	u16 fan[3];
167 };
168 
169 struct f71805f_data {
170 	unsigned short addr;
171 	const char *name;
172 	struct device *hwmon_dev;
173 
174 	struct mutex update_lock;
175 	char valid;		/* !=0 if following fields are valid */
176 	unsigned long last_updated;	/* In jiffies */
177 	unsigned long last_limits;	/* In jiffies */
178 
179 	/* Register values */
180 	u8 in[11];
181 	u8 in_high[11];
182 	u8 in_low[11];
183 	u16 has_in;
184 	u16 fan[3];
185 	u16 fan_low[3];
186 	u16 fan_target[3];
187 	u8 fan_ctrl[3];
188 	u8 pwm[3];
189 	u8 pwm_freq[3];
190 	u8 temp[3];
191 	u8 temp_high[3];
192 	u8 temp_hyst[3];
193 	u8 temp_mode;
194 	unsigned long alarms;
195 	struct f71805f_auto_point auto_points[3];
196 };
197 
198 struct f71805f_sio_data {
199 	enum kinds kind;
200 	u8 fnsel1;
201 };
202 
203 static inline long in_from_reg(u8 reg)
204 {
205 	return reg * 8;
206 }
207 
208 /* The 2 least significant bits are not used */
209 static inline u8 in_to_reg(long val)
210 {
211 	if (val <= 0)
212 		return 0;
213 	if (val >= 2016)
214 		return 0xfc;
215 	return ((val + 16) / 32) << 2;
216 }
217 
218 /* in0 is downscaled by a factor 2 internally */
219 static inline long in0_from_reg(u8 reg)
220 {
221 	return reg * 16;
222 }
223 
224 static inline u8 in0_to_reg(long val)
225 {
226 	if (val <= 0)
227 		return 0;
228 	if (val >= 4032)
229 		return 0xfc;
230 	return ((val + 32) / 64) << 2;
231 }
232 
233 /* The 4 most significant bits are not used */
234 static inline long fan_from_reg(u16 reg)
235 {
236 	reg &= 0xfff;
237 	if (!reg || reg == 0xfff)
238 		return 0;
239 	return 1500000 / reg;
240 }
241 
242 static inline u16 fan_to_reg(long rpm)
243 {
244 	/*
245 	 * If the low limit is set below what the chip can measure,
246 	 * store the largest possible 12-bit value in the registers,
247 	 * so that no alarm will ever trigger.
248 	 */
249 	if (rpm < 367)
250 		return 0xfff;
251 	return 1500000 / rpm;
252 }
253 
254 static inline unsigned long pwm_freq_from_reg(u8 reg)
255 {
256 	unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
257 
258 	reg &= 0x7f;
259 	if (reg == 0)
260 		reg++;
261 	return clock / (reg << 8);
262 }
263 
264 static inline u8 pwm_freq_to_reg(unsigned long val)
265 {
266 	if (val >= 187500)	/* The highest we can do */
267 		return 0x80;
268 	if (val >= 1475)	/* Use 48 MHz clock */
269 		return 0x80 | (48000000UL / (val << 8));
270 	if (val < 31)		/* The lowest we can do */
271 		return 0x7f;
272 	else			/* Use 1 MHz clock */
273 		return 1000000UL / (val << 8);
274 }
275 
276 static inline int pwm_mode_from_reg(u8 reg)
277 {
278 	return !(reg & FAN_CTRL_DC_MODE);
279 }
280 
281 static inline long temp_from_reg(u8 reg)
282 {
283 	return reg * 1000;
284 }
285 
286 static inline u8 temp_to_reg(long val)
287 {
288 	if (val <= 0)
289 		return 0;
290 	if (val >= 1000 * 0xff)
291 		return 0xff;
292 	return (val + 500) / 1000;
293 }
294 
295 /*
296  * Device I/O access
297  */
298 
299 /* Must be called with data->update_lock held, except during initialization */
300 static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
301 {
302 	outb(reg, data->addr + ADDR_REG_OFFSET);
303 	return inb(data->addr + DATA_REG_OFFSET);
304 }
305 
306 /* Must be called with data->update_lock held, except during initialization */
307 static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
308 {
309 	outb(reg, data->addr + ADDR_REG_OFFSET);
310 	outb(val, data->addr + DATA_REG_OFFSET);
311 }
312 
313 /*
314  * It is important to read the MSB first, because doing so latches the
315  * value of the LSB, so we are sure both bytes belong to the same value.
316  * Must be called with data->update_lock held, except during initialization
317  */
318 static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
319 {
320 	u16 val;
321 
322 	outb(reg, data->addr + ADDR_REG_OFFSET);
323 	val = inb(data->addr + DATA_REG_OFFSET) << 8;
324 	outb(++reg, data->addr + ADDR_REG_OFFSET);
325 	val |= inb(data->addr + DATA_REG_OFFSET);
326 
327 	return val;
328 }
329 
330 /* Must be called with data->update_lock held, except during initialization */
331 static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
332 {
333 	outb(reg, data->addr + ADDR_REG_OFFSET);
334 	outb(val >> 8, data->addr + DATA_REG_OFFSET);
335 	outb(++reg, data->addr + ADDR_REG_OFFSET);
336 	outb(val & 0xff, data->addr + DATA_REG_OFFSET);
337 }
338 
339 static struct f71805f_data *f71805f_update_device(struct device *dev)
340 {
341 	struct f71805f_data *data = dev_get_drvdata(dev);
342 	int nr, apnr;
343 
344 	mutex_lock(&data->update_lock);
345 
346 	/* Limit registers cache is refreshed after 60 seconds */
347 	if (time_after(jiffies, data->last_updated + 60 * HZ)
348 	 || !data->valid) {
349 		for (nr = 0; nr < 11; nr++) {
350 			if (!(data->has_in & (1 << nr)))
351 				continue;
352 			data->in_high[nr] = f71805f_read8(data,
353 					    F71805F_REG_IN_HIGH(nr));
354 			data->in_low[nr] = f71805f_read8(data,
355 					   F71805F_REG_IN_LOW(nr));
356 		}
357 		for (nr = 0; nr < 3; nr++) {
358 			data->fan_low[nr] = f71805f_read16(data,
359 					    F71805F_REG_FAN_LOW(nr));
360 			data->fan_target[nr] = f71805f_read16(data,
361 					       F71805F_REG_FAN_TARGET(nr));
362 			data->pwm_freq[nr] = f71805f_read8(data,
363 					     F71805F_REG_PWM_FREQ(nr));
364 		}
365 		for (nr = 0; nr < 3; nr++) {
366 			data->temp_high[nr] = f71805f_read8(data,
367 					      F71805F_REG_TEMP_HIGH(nr));
368 			data->temp_hyst[nr] = f71805f_read8(data,
369 					      F71805F_REG_TEMP_HYST(nr));
370 		}
371 		data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
372 		for (nr = 0; nr < 3; nr++) {
373 			for (apnr = 0; apnr < 3; apnr++) {
374 				data->auto_points[nr].temp[apnr] =
375 					f71805f_read8(data,
376 					F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
377 									apnr));
378 				data->auto_points[nr].fan[apnr] =
379 					f71805f_read16(data,
380 					F71805F_REG_PWM_AUTO_POINT_FAN(nr,
381 								       apnr));
382 			}
383 		}
384 
385 		data->last_limits = jiffies;
386 	}
387 
388 	/* Measurement registers cache is refreshed after 1 second */
389 	if (time_after(jiffies, data->last_updated + HZ)
390 	 || !data->valid) {
391 		for (nr = 0; nr < 11; nr++) {
392 			if (!(data->has_in & (1 << nr)))
393 				continue;
394 			data->in[nr] = f71805f_read8(data,
395 				       F71805F_REG_IN(nr));
396 		}
397 		for (nr = 0; nr < 3; nr++) {
398 			data->fan[nr] = f71805f_read16(data,
399 					F71805F_REG_FAN(nr));
400 			data->fan_ctrl[nr] = f71805f_read8(data,
401 					     F71805F_REG_FAN_CTRL(nr));
402 			data->pwm[nr] = f71805f_read8(data,
403 					F71805F_REG_PWM_DUTY(nr));
404 		}
405 		for (nr = 0; nr < 3; nr++) {
406 			data->temp[nr] = f71805f_read8(data,
407 					 F71805F_REG_TEMP(nr));
408 		}
409 		data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
410 			+ (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
411 			+ (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
412 
413 		data->last_updated = jiffies;
414 		data->valid = 1;
415 	}
416 
417 	mutex_unlock(&data->update_lock);
418 
419 	return data;
420 }
421 
422 /*
423  * Sysfs interface
424  */
425 
426 static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
427 			char *buf)
428 {
429 	struct f71805f_data *data = f71805f_update_device(dev);
430 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
431 	int nr = attr->index;
432 
433 	return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
434 }
435 
436 static ssize_t show_in0_max(struct device *dev, struct device_attribute
437 			    *devattr, char *buf)
438 {
439 	struct f71805f_data *data = f71805f_update_device(dev);
440 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
441 	int nr = attr->index;
442 
443 	return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
444 }
445 
446 static ssize_t show_in0_min(struct device *dev, struct device_attribute
447 			    *devattr, char *buf)
448 {
449 	struct f71805f_data *data = f71805f_update_device(dev);
450 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
451 	int nr = attr->index;
452 
453 	return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
454 }
455 
456 static ssize_t set_in0_max(struct device *dev, struct device_attribute
457 			   *devattr, const char *buf, size_t count)
458 {
459 	struct f71805f_data *data = dev_get_drvdata(dev);
460 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
461 	int nr = attr->index;
462 	long val;
463 	int err;
464 
465 	err = kstrtol(buf, 10, &val);
466 	if (err)
467 		return err;
468 
469 	mutex_lock(&data->update_lock);
470 	data->in_high[nr] = in0_to_reg(val);
471 	f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
472 	mutex_unlock(&data->update_lock);
473 
474 	return count;
475 }
476 
477 static ssize_t set_in0_min(struct device *dev, struct device_attribute
478 			   *devattr, const char *buf, size_t count)
479 {
480 	struct f71805f_data *data = dev_get_drvdata(dev);
481 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
482 	int nr = attr->index;
483 	long val;
484 	int err;
485 
486 	err = kstrtol(buf, 10, &val);
487 	if (err)
488 		return err;
489 
490 	mutex_lock(&data->update_lock);
491 	data->in_low[nr] = in0_to_reg(val);
492 	f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
493 	mutex_unlock(&data->update_lock);
494 
495 	return count;
496 }
497 
498 static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
499 		       char *buf)
500 {
501 	struct f71805f_data *data = f71805f_update_device(dev);
502 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
503 	int nr = attr->index;
504 
505 	return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
506 }
507 
508 static ssize_t show_in_max(struct device *dev, struct device_attribute
509 			   *devattr, char *buf)
510 {
511 	struct f71805f_data *data = f71805f_update_device(dev);
512 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
513 	int nr = attr->index;
514 
515 	return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
516 }
517 
518 static ssize_t show_in_min(struct device *dev, struct device_attribute
519 			   *devattr, char *buf)
520 {
521 	struct f71805f_data *data = f71805f_update_device(dev);
522 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
523 	int nr = attr->index;
524 
525 	return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
526 }
527 
528 static ssize_t set_in_max(struct device *dev, struct device_attribute
529 			  *devattr, const char *buf, size_t count)
530 {
531 	struct f71805f_data *data = dev_get_drvdata(dev);
532 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
533 	int nr = attr->index;
534 	long val;
535 	int err;
536 
537 	err = kstrtol(buf, 10, &val);
538 	if (err)
539 		return err;
540 
541 	mutex_lock(&data->update_lock);
542 	data->in_high[nr] = in_to_reg(val);
543 	f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
544 	mutex_unlock(&data->update_lock);
545 
546 	return count;
547 }
548 
549 static ssize_t set_in_min(struct device *dev, struct device_attribute
550 			  *devattr, const char *buf, size_t count)
551 {
552 	struct f71805f_data *data = dev_get_drvdata(dev);
553 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
554 	int nr = attr->index;
555 	long val;
556 	int err;
557 
558 	err = kstrtol(buf, 10, &val);
559 	if (err)
560 		return err;
561 
562 	mutex_lock(&data->update_lock);
563 	data->in_low[nr] = in_to_reg(val);
564 	f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
565 	mutex_unlock(&data->update_lock);
566 
567 	return count;
568 }
569 
570 static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
571 			char *buf)
572 {
573 	struct f71805f_data *data = f71805f_update_device(dev);
574 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
575 	int nr = attr->index;
576 
577 	return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
578 }
579 
580 static ssize_t show_fan_min(struct device *dev, struct device_attribute
581 			    *devattr, char *buf)
582 {
583 	struct f71805f_data *data = f71805f_update_device(dev);
584 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
585 	int nr = attr->index;
586 
587 	return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
588 }
589 
590 static ssize_t show_fan_target(struct device *dev, struct device_attribute
591 			       *devattr, char *buf)
592 {
593 	struct f71805f_data *data = f71805f_update_device(dev);
594 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
595 	int nr = attr->index;
596 
597 	return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
598 }
599 
600 static ssize_t set_fan_min(struct device *dev, struct device_attribute
601 			   *devattr, const char *buf, size_t count)
602 {
603 	struct f71805f_data *data = dev_get_drvdata(dev);
604 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
605 	int nr = attr->index;
606 	long val;
607 	int err;
608 
609 	err = kstrtol(buf, 10, &val);
610 	if (err)
611 		return err;
612 
613 	mutex_lock(&data->update_lock);
614 	data->fan_low[nr] = fan_to_reg(val);
615 	f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
616 	mutex_unlock(&data->update_lock);
617 
618 	return count;
619 }
620 
621 static ssize_t set_fan_target(struct device *dev, struct device_attribute
622 			      *devattr, const char *buf, size_t count)
623 {
624 	struct f71805f_data *data = dev_get_drvdata(dev);
625 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
626 	int nr = attr->index;
627 	long val;
628 	int err;
629 
630 	err = kstrtol(buf, 10, &val);
631 	if (err)
632 		return err;
633 
634 	mutex_lock(&data->update_lock);
635 	data->fan_target[nr] = fan_to_reg(val);
636 	f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
637 			data->fan_target[nr]);
638 	mutex_unlock(&data->update_lock);
639 
640 	return count;
641 }
642 
643 static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
644 			char *buf)
645 {
646 	struct f71805f_data *data = f71805f_update_device(dev);
647 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
648 	int nr = attr->index;
649 
650 	return sprintf(buf, "%d\n", (int)data->pwm[nr]);
651 }
652 
653 static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
654 			       *devattr, char *buf)
655 {
656 	struct f71805f_data *data = f71805f_update_device(dev);
657 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
658 	int nr = attr->index;
659 	int mode;
660 
661 	switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
662 	case FAN_CTRL_MODE_SPEED:
663 		mode = 3;
664 		break;
665 	case FAN_CTRL_MODE_TEMPERATURE:
666 		mode = 2;
667 		break;
668 	default: /* MANUAL */
669 		mode = 1;
670 	}
671 
672 	return sprintf(buf, "%d\n", mode);
673 }
674 
675 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
676 			     *devattr, char *buf)
677 {
678 	struct f71805f_data *data = f71805f_update_device(dev);
679 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
680 	int nr = attr->index;
681 
682 	return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
683 }
684 
685 static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
686 			     *devattr, char *buf)
687 {
688 	struct f71805f_data *data = f71805f_update_device(dev);
689 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
690 	int nr = attr->index;
691 
692 	return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
693 }
694 
695 static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
696 		       const char *buf, size_t count)
697 {
698 	struct f71805f_data *data = dev_get_drvdata(dev);
699 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
700 	int nr = attr->index;
701 	unsigned long val;
702 	int err;
703 
704 	err = kstrtoul(buf, 10, &val);
705 	if (err)
706 		return err;
707 
708 	if (val > 255)
709 		return -EINVAL;
710 
711 	mutex_lock(&data->update_lock);
712 	data->pwm[nr] = val;
713 	f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
714 	mutex_unlock(&data->update_lock);
715 
716 	return count;
717 }
718 
719 static struct attribute *f71805f_attr_pwm[];
720 
721 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
722 			      *devattr, const char *buf, size_t count)
723 {
724 	struct f71805f_data *data = dev_get_drvdata(dev);
725 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
726 	int nr = attr->index;
727 	u8 reg;
728 	unsigned long val;
729 	int err;
730 
731 	err = kstrtoul(buf, 10, &val);
732 	if (err)
733 		return err;
734 
735 	if (val < 1 || val > 3)
736 		return -EINVAL;
737 
738 	if (val > 1) { /* Automatic mode, user can't set PWM value */
739 		if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
740 				     S_IRUGO))
741 			dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
742 	}
743 
744 	mutex_lock(&data->update_lock);
745 	reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
746 	    & ~FAN_CTRL_MODE_MASK;
747 	switch (val) {
748 	case 1:
749 		reg |= FAN_CTRL_MODE_MANUAL;
750 		break;
751 	case 2:
752 		reg |= FAN_CTRL_MODE_TEMPERATURE;
753 		break;
754 	case 3:
755 		reg |= FAN_CTRL_MODE_SPEED;
756 		break;
757 	}
758 	data->fan_ctrl[nr] = reg;
759 	f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
760 	mutex_unlock(&data->update_lock);
761 
762 	if (val == 1) { /* Manual mode, user can set PWM value */
763 		if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
764 				     S_IRUGO | S_IWUSR))
765 			dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
766 	}
767 
768 	return count;
769 }
770 
771 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
772 			    *devattr, const char *buf, size_t count)
773 {
774 	struct f71805f_data *data = dev_get_drvdata(dev);
775 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
776 	int nr = attr->index;
777 	unsigned long val;
778 	int err;
779 
780 	err = kstrtoul(buf, 10, &val);
781 	if (err)
782 		return err;
783 
784 	mutex_lock(&data->update_lock);
785 	data->pwm_freq[nr] = pwm_freq_to_reg(val);
786 	f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
787 	mutex_unlock(&data->update_lock);
788 
789 	return count;
790 }
791 
792 static ssize_t show_pwm_auto_point_temp(struct device *dev,
793 					struct device_attribute *devattr,
794 					char *buf)
795 {
796 	struct f71805f_data *data = dev_get_drvdata(dev);
797 	struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
798 	int pwmnr = attr->nr;
799 	int apnr = attr->index;
800 
801 	return sprintf(buf, "%ld\n",
802 		       temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
803 }
804 
805 static ssize_t set_pwm_auto_point_temp(struct device *dev,
806 				       struct device_attribute *devattr,
807 				       const char *buf, size_t count)
808 {
809 	struct f71805f_data *data = dev_get_drvdata(dev);
810 	struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
811 	int pwmnr = attr->nr;
812 	int apnr = attr->index;
813 	unsigned long val;
814 	int err;
815 
816 	err = kstrtoul(buf, 10, &val);
817 	if (err)
818 		return err;
819 
820 	mutex_lock(&data->update_lock);
821 	data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
822 	f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
823 		       data->auto_points[pwmnr].temp[apnr]);
824 	mutex_unlock(&data->update_lock);
825 
826 	return count;
827 }
828 
829 static ssize_t show_pwm_auto_point_fan(struct device *dev,
830 				       struct device_attribute *devattr,
831 				       char *buf)
832 {
833 	struct f71805f_data *data = dev_get_drvdata(dev);
834 	struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
835 	int pwmnr = attr->nr;
836 	int apnr = attr->index;
837 
838 	return sprintf(buf, "%ld\n",
839 		       fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
840 }
841 
842 static ssize_t set_pwm_auto_point_fan(struct device *dev,
843 				      struct device_attribute *devattr,
844 				      const char *buf, size_t count)
845 {
846 	struct f71805f_data *data = dev_get_drvdata(dev);
847 	struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
848 	int pwmnr = attr->nr;
849 	int apnr = attr->index;
850 	unsigned long val;
851 	int err;
852 
853 	err = kstrtoul(buf, 10, &val);
854 	if (err)
855 		return err;
856 
857 	mutex_lock(&data->update_lock);
858 	data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
859 	f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
860 			data->auto_points[pwmnr].fan[apnr]);
861 	mutex_unlock(&data->update_lock);
862 
863 	return count;
864 }
865 
866 static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
867 			 char *buf)
868 {
869 	struct f71805f_data *data = f71805f_update_device(dev);
870 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
871 	int nr = attr->index;
872 
873 	return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
874 }
875 
876 static ssize_t show_temp_max(struct device *dev, struct device_attribute
877 			     *devattr, char *buf)
878 {
879 	struct f71805f_data *data = f71805f_update_device(dev);
880 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
881 	int nr = attr->index;
882 
883 	return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
884 }
885 
886 static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
887 			      *devattr, char *buf)
888 {
889 	struct f71805f_data *data = f71805f_update_device(dev);
890 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
891 	int nr = attr->index;
892 
893 	return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
894 }
895 
896 static ssize_t show_temp_type(struct device *dev, struct device_attribute
897 			      *devattr, char *buf)
898 {
899 	struct f71805f_data *data = f71805f_update_device(dev);
900 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
901 	int nr = attr->index;
902 
903 	/* 3 is diode, 4 is thermistor */
904 	return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
905 }
906 
907 static ssize_t set_temp_max(struct device *dev, struct device_attribute
908 			    *devattr, const char *buf, size_t count)
909 {
910 	struct f71805f_data *data = dev_get_drvdata(dev);
911 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
912 	int nr = attr->index;
913 	long val;
914 	int err;
915 
916 	err = kstrtol(buf, 10, &val);
917 	if (err)
918 		return err;
919 
920 	mutex_lock(&data->update_lock);
921 	data->temp_high[nr] = temp_to_reg(val);
922 	f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
923 	mutex_unlock(&data->update_lock);
924 
925 	return count;
926 }
927 
928 static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
929 			     *devattr, const char *buf, size_t count)
930 {
931 	struct f71805f_data *data = dev_get_drvdata(dev);
932 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
933 	int nr = attr->index;
934 	long val;
935 	int err;
936 
937 	err = kstrtol(buf, 10, &val);
938 	if (err)
939 		return err;
940 
941 	mutex_lock(&data->update_lock);
942 	data->temp_hyst[nr] = temp_to_reg(val);
943 	f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
944 	mutex_unlock(&data->update_lock);
945 
946 	return count;
947 }
948 
949 static ssize_t alarms_in_show(struct device *dev, struct device_attribute
950 			      *devattr, char *buf)
951 {
952 	struct f71805f_data *data = f71805f_update_device(dev);
953 
954 	return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
955 }
956 
957 static ssize_t alarms_fan_show(struct device *dev, struct device_attribute
958 			       *devattr, char *buf)
959 {
960 	struct f71805f_data *data = f71805f_update_device(dev);
961 
962 	return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
963 }
964 
965 static ssize_t alarms_temp_show(struct device *dev, struct device_attribute
966 				*devattr, char *buf)
967 {
968 	struct f71805f_data *data = f71805f_update_device(dev);
969 
970 	return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
971 }
972 
973 static ssize_t show_alarm(struct device *dev, struct device_attribute
974 			  *devattr, char *buf)
975 {
976 	struct f71805f_data *data = f71805f_update_device(dev);
977 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
978 	int bitnr = attr->index;
979 
980 	return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
981 }
982 
983 static ssize_t name_show(struct device *dev, struct device_attribute
984 			 *devattr, char *buf)
985 {
986 	struct f71805f_data *data = dev_get_drvdata(dev);
987 
988 	return sprintf(buf, "%s\n", data->name);
989 }
990 
991 static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
992 static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
993 			  show_in0_max, set_in0_max, 0);
994 static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
995 			  show_in0_min, set_in0_min, 0);
996 static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
997 static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
998 			  show_in_max, set_in_max, 1);
999 static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
1000 			  show_in_min, set_in_min, 1);
1001 static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
1002 static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
1003 			  show_in_max, set_in_max, 2);
1004 static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
1005 			  show_in_min, set_in_min, 2);
1006 static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
1007 static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
1008 			  show_in_max, set_in_max, 3);
1009 static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
1010 			  show_in_min, set_in_min, 3);
1011 static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
1012 static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
1013 			  show_in_max, set_in_max, 4);
1014 static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
1015 			  show_in_min, set_in_min, 4);
1016 static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
1017 static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
1018 			  show_in_max, set_in_max, 5);
1019 static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
1020 			  show_in_min, set_in_min, 5);
1021 static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
1022 static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
1023 			  show_in_max, set_in_max, 6);
1024 static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
1025 			  show_in_min, set_in_min, 6);
1026 static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
1027 static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
1028 			  show_in_max, set_in_max, 7);
1029 static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
1030 			  show_in_min, set_in_min, 7);
1031 static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
1032 static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
1033 			  show_in_max, set_in_max, 8);
1034 static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
1035 			  show_in_min, set_in_min, 8);
1036 static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
1037 static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
1038 			  show_in0_max, set_in0_max, 9);
1039 static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
1040 			  show_in0_min, set_in0_min, 9);
1041 static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
1042 static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
1043 			  show_in0_max, set_in0_max, 10);
1044 static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
1045 			  show_in0_min, set_in0_min, 10);
1046 
1047 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
1048 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
1049 			  show_fan_min, set_fan_min, 0);
1050 static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
1051 			  show_fan_target, set_fan_target, 0);
1052 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
1053 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
1054 			  show_fan_min, set_fan_min, 1);
1055 static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
1056 			  show_fan_target, set_fan_target, 1);
1057 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
1058 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
1059 			  show_fan_min, set_fan_min, 2);
1060 static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
1061 			  show_fan_target, set_fan_target, 2);
1062 
1063 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
1064 static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
1065 		    show_temp_max, set_temp_max, 0);
1066 static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
1067 		    show_temp_hyst, set_temp_hyst, 0);
1068 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
1069 static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
1070 static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
1071 		    show_temp_max, set_temp_max, 1);
1072 static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
1073 		    show_temp_hyst, set_temp_hyst, 1);
1074 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
1075 static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
1076 static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
1077 		    show_temp_max, set_temp_max, 2);
1078 static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
1079 		    show_temp_hyst, set_temp_hyst, 2);
1080 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
1081 
1082 /*
1083  * pwm (value) files are created read-only, write permission is
1084  * then added or removed dynamically as needed
1085  */
1086 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
1087 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1088 			  show_pwm_enable, set_pwm_enable, 0);
1089 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
1090 			  show_pwm_freq, set_pwm_freq, 0);
1091 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
1092 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
1093 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1094 			  show_pwm_enable, set_pwm_enable, 1);
1095 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
1096 			  show_pwm_freq, set_pwm_freq, 1);
1097 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
1098 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
1099 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1100 			  show_pwm_enable, set_pwm_enable, 2);
1101 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
1102 			  show_pwm_freq, set_pwm_freq, 2);
1103 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
1104 
1105 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1106 			    show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1107 			    0, 0);
1108 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
1109 			    show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1110 			    0, 0);
1111 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1112 			    show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1113 			    0, 1);
1114 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
1115 			    show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1116 			    0, 1);
1117 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1118 			    show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1119 			    0, 2);
1120 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
1121 			    show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1122 			    0, 2);
1123 
1124 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1125 			    show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1126 			    1, 0);
1127 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
1128 			    show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1129 			    1, 0);
1130 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1131 			    show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1132 			    1, 1);
1133 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
1134 			    show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1135 			    1, 1);
1136 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1137 			    show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1138 			    1, 2);
1139 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
1140 			    show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1141 			    1, 2);
1142 
1143 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1144 			    show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1145 			    2, 0);
1146 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
1147 			    show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1148 			    2, 0);
1149 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1150 			    show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1151 			    2, 1);
1152 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
1153 			    show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1154 			    2, 1);
1155 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1156 			    show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1157 			    2, 2);
1158 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
1159 			    show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1160 			    2, 2);
1161 
1162 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1163 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1164 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1165 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1166 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1167 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1168 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1169 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1170 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1171 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1172 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1173 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
1174 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
1175 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
1176 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
1177 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
1178 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
1179 static DEVICE_ATTR_RO(alarms_in);
1180 static DEVICE_ATTR_RO(alarms_fan);
1181 static DEVICE_ATTR_RO(alarms_temp);
1182 
1183 static DEVICE_ATTR_RO(name);
1184 
1185 static struct attribute *f71805f_attributes[] = {
1186 	&sensor_dev_attr_in0_input.dev_attr.attr,
1187 	&sensor_dev_attr_in0_max.dev_attr.attr,
1188 	&sensor_dev_attr_in0_min.dev_attr.attr,
1189 	&sensor_dev_attr_in1_input.dev_attr.attr,
1190 	&sensor_dev_attr_in1_max.dev_attr.attr,
1191 	&sensor_dev_attr_in1_min.dev_attr.attr,
1192 	&sensor_dev_attr_in2_input.dev_attr.attr,
1193 	&sensor_dev_attr_in2_max.dev_attr.attr,
1194 	&sensor_dev_attr_in2_min.dev_attr.attr,
1195 	&sensor_dev_attr_in3_input.dev_attr.attr,
1196 	&sensor_dev_attr_in3_max.dev_attr.attr,
1197 	&sensor_dev_attr_in3_min.dev_attr.attr,
1198 	&sensor_dev_attr_in5_input.dev_attr.attr,
1199 	&sensor_dev_attr_in5_max.dev_attr.attr,
1200 	&sensor_dev_attr_in5_min.dev_attr.attr,
1201 	&sensor_dev_attr_in6_input.dev_attr.attr,
1202 	&sensor_dev_attr_in6_max.dev_attr.attr,
1203 	&sensor_dev_attr_in6_min.dev_attr.attr,
1204 	&sensor_dev_attr_in7_input.dev_attr.attr,
1205 	&sensor_dev_attr_in7_max.dev_attr.attr,
1206 	&sensor_dev_attr_in7_min.dev_attr.attr,
1207 
1208 	&sensor_dev_attr_fan1_input.dev_attr.attr,
1209 	&sensor_dev_attr_fan1_min.dev_attr.attr,
1210 	&sensor_dev_attr_fan1_alarm.dev_attr.attr,
1211 	&sensor_dev_attr_fan1_target.dev_attr.attr,
1212 	&sensor_dev_attr_fan2_input.dev_attr.attr,
1213 	&sensor_dev_attr_fan2_min.dev_attr.attr,
1214 	&sensor_dev_attr_fan2_alarm.dev_attr.attr,
1215 	&sensor_dev_attr_fan2_target.dev_attr.attr,
1216 	&sensor_dev_attr_fan3_input.dev_attr.attr,
1217 	&sensor_dev_attr_fan3_min.dev_attr.attr,
1218 	&sensor_dev_attr_fan3_alarm.dev_attr.attr,
1219 	&sensor_dev_attr_fan3_target.dev_attr.attr,
1220 
1221 	&sensor_dev_attr_pwm1.dev_attr.attr,
1222 	&sensor_dev_attr_pwm1_enable.dev_attr.attr,
1223 	&sensor_dev_attr_pwm1_mode.dev_attr.attr,
1224 	&sensor_dev_attr_pwm2.dev_attr.attr,
1225 	&sensor_dev_attr_pwm2_enable.dev_attr.attr,
1226 	&sensor_dev_attr_pwm2_mode.dev_attr.attr,
1227 	&sensor_dev_attr_pwm3.dev_attr.attr,
1228 	&sensor_dev_attr_pwm3_enable.dev_attr.attr,
1229 	&sensor_dev_attr_pwm3_mode.dev_attr.attr,
1230 
1231 	&sensor_dev_attr_temp1_input.dev_attr.attr,
1232 	&sensor_dev_attr_temp1_max.dev_attr.attr,
1233 	&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
1234 	&sensor_dev_attr_temp1_type.dev_attr.attr,
1235 	&sensor_dev_attr_temp2_input.dev_attr.attr,
1236 	&sensor_dev_attr_temp2_max.dev_attr.attr,
1237 	&sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
1238 	&sensor_dev_attr_temp2_type.dev_attr.attr,
1239 	&sensor_dev_attr_temp3_input.dev_attr.attr,
1240 	&sensor_dev_attr_temp3_max.dev_attr.attr,
1241 	&sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
1242 	&sensor_dev_attr_temp3_type.dev_attr.attr,
1243 
1244 	&sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1245 	&sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
1246 	&sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1247 	&sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
1248 	&sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1249 	&sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
1250 	&sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1251 	&sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
1252 	&sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1253 	&sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
1254 	&sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1255 	&sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
1256 	&sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1257 	&sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
1258 	&sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1259 	&sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
1260 	&sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1261 	&sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
1262 
1263 	&sensor_dev_attr_in0_alarm.dev_attr.attr,
1264 	&sensor_dev_attr_in1_alarm.dev_attr.attr,
1265 	&sensor_dev_attr_in2_alarm.dev_attr.attr,
1266 	&sensor_dev_attr_in3_alarm.dev_attr.attr,
1267 	&sensor_dev_attr_in5_alarm.dev_attr.attr,
1268 	&sensor_dev_attr_in6_alarm.dev_attr.attr,
1269 	&sensor_dev_attr_in7_alarm.dev_attr.attr,
1270 	&dev_attr_alarms_in.attr,
1271 	&sensor_dev_attr_temp1_alarm.dev_attr.attr,
1272 	&sensor_dev_attr_temp2_alarm.dev_attr.attr,
1273 	&sensor_dev_attr_temp3_alarm.dev_attr.attr,
1274 	&dev_attr_alarms_temp.attr,
1275 	&dev_attr_alarms_fan.attr,
1276 
1277 	&dev_attr_name.attr,
1278 	NULL
1279 };
1280 
1281 static const struct attribute_group f71805f_group = {
1282 	.attrs = f71805f_attributes,
1283 };
1284 
1285 static struct attribute *f71805f_attributes_optin[4][5] = {
1286 	{
1287 		&sensor_dev_attr_in4_input.dev_attr.attr,
1288 		&sensor_dev_attr_in4_max.dev_attr.attr,
1289 		&sensor_dev_attr_in4_min.dev_attr.attr,
1290 		&sensor_dev_attr_in4_alarm.dev_attr.attr,
1291 		NULL
1292 	}, {
1293 		&sensor_dev_attr_in8_input.dev_attr.attr,
1294 		&sensor_dev_attr_in8_max.dev_attr.attr,
1295 		&sensor_dev_attr_in8_min.dev_attr.attr,
1296 		&sensor_dev_attr_in8_alarm.dev_attr.attr,
1297 		NULL
1298 	}, {
1299 		&sensor_dev_attr_in9_input.dev_attr.attr,
1300 		&sensor_dev_attr_in9_max.dev_attr.attr,
1301 		&sensor_dev_attr_in9_min.dev_attr.attr,
1302 		&sensor_dev_attr_in9_alarm.dev_attr.attr,
1303 		NULL
1304 	}, {
1305 		&sensor_dev_attr_in10_input.dev_attr.attr,
1306 		&sensor_dev_attr_in10_max.dev_attr.attr,
1307 		&sensor_dev_attr_in10_min.dev_attr.attr,
1308 		&sensor_dev_attr_in10_alarm.dev_attr.attr,
1309 		NULL
1310 	}
1311 };
1312 
1313 static const struct attribute_group f71805f_group_optin[4] = {
1314 	{ .attrs = f71805f_attributes_optin[0] },
1315 	{ .attrs = f71805f_attributes_optin[1] },
1316 	{ .attrs = f71805f_attributes_optin[2] },
1317 	{ .attrs = f71805f_attributes_optin[3] },
1318 };
1319 
1320 /*
1321  * We don't include pwm_freq files in the arrays above, because they must be
1322  * created conditionally (only if pwm_mode is 1 == PWM)
1323  */
1324 static struct attribute *f71805f_attributes_pwm_freq[] = {
1325 	&sensor_dev_attr_pwm1_freq.dev_attr.attr,
1326 	&sensor_dev_attr_pwm2_freq.dev_attr.attr,
1327 	&sensor_dev_attr_pwm3_freq.dev_attr.attr,
1328 	NULL
1329 };
1330 
1331 static const struct attribute_group f71805f_group_pwm_freq = {
1332 	.attrs = f71805f_attributes_pwm_freq,
1333 };
1334 
1335 /* We also need an indexed access to pwmN files to toggle writability */
1336 static struct attribute *f71805f_attr_pwm[] = {
1337 	&sensor_dev_attr_pwm1.dev_attr.attr,
1338 	&sensor_dev_attr_pwm2.dev_attr.attr,
1339 	&sensor_dev_attr_pwm3.dev_attr.attr,
1340 };
1341 
1342 /*
1343  * Device registration and initialization
1344  */
1345 
1346 static void f71805f_init_device(struct f71805f_data *data)
1347 {
1348 	u8 reg;
1349 	int i;
1350 
1351 	reg = f71805f_read8(data, F71805F_REG_START);
1352 	if ((reg & 0x41) != 0x01) {
1353 		pr_debug("Starting monitoring operations\n");
1354 		f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
1355 	}
1356 
1357 	/*
1358 	 * Fan monitoring can be disabled. If it is, we won't be polling
1359 	 * the register values, and won't create the related sysfs files.
1360 	 */
1361 	for (i = 0; i < 3; i++) {
1362 		data->fan_ctrl[i] = f71805f_read8(data,
1363 						  F71805F_REG_FAN_CTRL(i));
1364 		/*
1365 		 * Clear latch full bit, else "speed mode" fan speed control
1366 		 * doesn't work
1367 		 */
1368 		if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
1369 			data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
1370 			f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
1371 				       data->fan_ctrl[i]);
1372 		}
1373 	}
1374 }
1375 
1376 static int f71805f_probe(struct platform_device *pdev)
1377 {
1378 	struct f71805f_sio_data *sio_data = dev_get_platdata(&pdev->dev);
1379 	struct f71805f_data *data;
1380 	struct resource *res;
1381 	int i, err;
1382 
1383 	static const char * const names[] = {
1384 		"f71805f",
1385 		"f71872f",
1386 	};
1387 
1388 	data = devm_kzalloc(&pdev->dev, sizeof(struct f71805f_data),
1389 			    GFP_KERNEL);
1390 	if (!data)
1391 		return -ENOMEM;
1392 
1393 	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1394 	if (!devm_request_region(&pdev->dev, res->start + ADDR_REG_OFFSET, 2,
1395 				 DRVNAME)) {
1396 		dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n",
1397 			(unsigned long)(res->start + ADDR_REG_OFFSET),
1398 			(unsigned long)(res->start + ADDR_REG_OFFSET + 1));
1399 		return -EBUSY;
1400 	}
1401 	data->addr = res->start;
1402 	data->name = names[sio_data->kind];
1403 	mutex_init(&data->update_lock);
1404 
1405 	platform_set_drvdata(pdev, data);
1406 
1407 	/* Some voltage inputs depend on chip model and configuration */
1408 	switch (sio_data->kind) {
1409 	case f71805f:
1410 		data->has_in = 0x1ff;
1411 		break;
1412 	case f71872f:
1413 		data->has_in = 0x6ef;
1414 		if (sio_data->fnsel1 & 0x01)
1415 			data->has_in |= (1 << 4); /* in4 */
1416 		if (sio_data->fnsel1 & 0x02)
1417 			data->has_in |= (1 << 8); /* in8 */
1418 		break;
1419 	}
1420 
1421 	/* Initialize the F71805F chip */
1422 	f71805f_init_device(data);
1423 
1424 	/* Register sysfs interface files */
1425 	err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group);
1426 	if (err)
1427 		return err;
1428 	if (data->has_in & (1 << 4)) { /* in4 */
1429 		err = sysfs_create_group(&pdev->dev.kobj,
1430 					 &f71805f_group_optin[0]);
1431 		if (err)
1432 			goto exit_remove_files;
1433 	}
1434 	if (data->has_in & (1 << 8)) { /* in8 */
1435 		err = sysfs_create_group(&pdev->dev.kobj,
1436 					 &f71805f_group_optin[1]);
1437 		if (err)
1438 			goto exit_remove_files;
1439 	}
1440 	if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
1441 		err = sysfs_create_group(&pdev->dev.kobj,
1442 					 &f71805f_group_optin[2]);
1443 		if (err)
1444 			goto exit_remove_files;
1445 	}
1446 	if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
1447 		err = sysfs_create_group(&pdev->dev.kobj,
1448 					 &f71805f_group_optin[3]);
1449 		if (err)
1450 			goto exit_remove_files;
1451 	}
1452 	for (i = 0; i < 3; i++) {
1453 		/* If control mode is PWM, create pwm_freq file */
1454 		if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
1455 			err = sysfs_create_file(&pdev->dev.kobj,
1456 						f71805f_attributes_pwm_freq[i]);
1457 			if (err)
1458 				goto exit_remove_files;
1459 		}
1460 		/* If PWM is in manual mode, add write permission */
1461 		if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
1462 			err = sysfs_chmod_file(&pdev->dev.kobj,
1463 					       f71805f_attr_pwm[i],
1464 					       S_IRUGO | S_IWUSR);
1465 			if (err) {
1466 				dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
1467 					i + 1);
1468 				goto exit_remove_files;
1469 			}
1470 		}
1471 	}
1472 
1473 	data->hwmon_dev = hwmon_device_register(&pdev->dev);
1474 	if (IS_ERR(data->hwmon_dev)) {
1475 		err = PTR_ERR(data->hwmon_dev);
1476 		dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
1477 		goto exit_remove_files;
1478 	}
1479 
1480 	return 0;
1481 
1482 exit_remove_files:
1483 	sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1484 	for (i = 0; i < 4; i++)
1485 		sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
1486 	sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
1487 	return err;
1488 }
1489 
1490 static int f71805f_remove(struct platform_device *pdev)
1491 {
1492 	struct f71805f_data *data = platform_get_drvdata(pdev);
1493 	int i;
1494 
1495 	hwmon_device_unregister(data->hwmon_dev);
1496 	sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1497 	for (i = 0; i < 4; i++)
1498 		sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
1499 	sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
1500 
1501 	return 0;
1502 }
1503 
1504 static struct platform_driver f71805f_driver = {
1505 	.driver = {
1506 		.name	= DRVNAME,
1507 	},
1508 	.probe		= f71805f_probe,
1509 	.remove		= f71805f_remove,
1510 };
1511 
1512 static int __init f71805f_device_add(unsigned short address,
1513 				     const struct f71805f_sio_data *sio_data)
1514 {
1515 	struct resource res = {
1516 		.start	= address,
1517 		.end	= address + REGION_LENGTH - 1,
1518 		.flags	= IORESOURCE_IO,
1519 	};
1520 	int err;
1521 
1522 	pdev = platform_device_alloc(DRVNAME, address);
1523 	if (!pdev) {
1524 		err = -ENOMEM;
1525 		pr_err("Device allocation failed\n");
1526 		goto exit;
1527 	}
1528 
1529 	res.name = pdev->name;
1530 	err = acpi_check_resource_conflict(&res);
1531 	if (err)
1532 		goto exit_device_put;
1533 
1534 	err = platform_device_add_resources(pdev, &res, 1);
1535 	if (err) {
1536 		pr_err("Device resource addition failed (%d)\n", err);
1537 		goto exit_device_put;
1538 	}
1539 
1540 	err = platform_device_add_data(pdev, sio_data,
1541 				       sizeof(struct f71805f_sio_data));
1542 	if (err) {
1543 		pr_err("Platform data allocation failed\n");
1544 		goto exit_device_put;
1545 	}
1546 
1547 	err = platform_device_add(pdev);
1548 	if (err) {
1549 		pr_err("Device addition failed (%d)\n", err);
1550 		goto exit_device_put;
1551 	}
1552 
1553 	return 0;
1554 
1555 exit_device_put:
1556 	platform_device_put(pdev);
1557 exit:
1558 	return err;
1559 }
1560 
1561 static int __init f71805f_find(int sioaddr, unsigned short *address,
1562 			       struct f71805f_sio_data *sio_data)
1563 {
1564 	int err = -ENODEV;
1565 	u16 devid;
1566 
1567 	static const char * const names[] = {
1568 		"F71805F/FG",
1569 		"F71872F/FG or F71806F/FG",
1570 	};
1571 
1572 	superio_enter(sioaddr);
1573 
1574 	devid = superio_inw(sioaddr, SIO_REG_MANID);
1575 	if (devid != SIO_FINTEK_ID)
1576 		goto exit;
1577 
1578 	devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
1579 	switch (devid) {
1580 	case SIO_F71805F_ID:
1581 		sio_data->kind = f71805f;
1582 		break;
1583 	case SIO_F71872F_ID:
1584 		sio_data->kind = f71872f;
1585 		sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
1586 		break;
1587 	default:
1588 		pr_info("Unsupported Fintek device, skipping\n");
1589 		goto exit;
1590 	}
1591 
1592 	superio_select(sioaddr, F71805F_LD_HWM);
1593 	if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
1594 		pr_warn("Device not activated, skipping\n");
1595 		goto exit;
1596 	}
1597 
1598 	*address = superio_inw(sioaddr, SIO_REG_ADDR);
1599 	if (*address == 0) {
1600 		pr_warn("Base address not set, skipping\n");
1601 		goto exit;
1602 	}
1603 	*address &= ~(REGION_LENGTH - 1);	/* Ignore 3 LSB */
1604 
1605 	err = 0;
1606 	pr_info("Found %s chip at %#x, revision %u\n",
1607 		names[sio_data->kind], *address,
1608 		superio_inb(sioaddr, SIO_REG_DEVREV));
1609 
1610 exit:
1611 	superio_exit(sioaddr);
1612 	return err;
1613 }
1614 
1615 static int __init f71805f_init(void)
1616 {
1617 	int err;
1618 	unsigned short address;
1619 	struct f71805f_sio_data sio_data;
1620 
1621 	if (f71805f_find(0x2e, &address, &sio_data)
1622 	 && f71805f_find(0x4e, &address, &sio_data))
1623 		return -ENODEV;
1624 
1625 	err = platform_driver_register(&f71805f_driver);
1626 	if (err)
1627 		goto exit;
1628 
1629 	/* Sets global pdev as a side effect */
1630 	err = f71805f_device_add(address, &sio_data);
1631 	if (err)
1632 		goto exit_driver;
1633 
1634 	return 0;
1635 
1636 exit_driver:
1637 	platform_driver_unregister(&f71805f_driver);
1638 exit:
1639 	return err;
1640 }
1641 
1642 static void __exit f71805f_exit(void)
1643 {
1644 	platform_device_unregister(pdev);
1645 	platform_driver_unregister(&f71805f_driver);
1646 }
1647 
1648 MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1649 MODULE_LICENSE("GPL");
1650 MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
1651 
1652 module_init(f71805f_init);
1653 module_exit(f71805f_exit);
1654