1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O 4 * chips integrated hardware monitoring features 5 * Copyright (C) 2005-2006 Jean Delvare <jdelvare@suse.de> 6 * 7 * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates 8 * complete hardware monitoring features: voltage, fan and temperature 9 * sensors, and manual and automatic fan speed control. 10 * 11 * The F71872F/FG is almost the same, with two more voltages monitored, 12 * and 6 VID inputs. 13 * 14 * The F71806F/FG is essentially the same as the F71872F/FG. It even has 15 * the same chip ID, so the driver can't differentiate between. 16 */ 17 18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 19 20 #include <linux/module.h> 21 #include <linux/init.h> 22 #include <linux/slab.h> 23 #include <linux/jiffies.h> 24 #include <linux/platform_device.h> 25 #include <linux/hwmon.h> 26 #include <linux/hwmon-sysfs.h> 27 #include <linux/err.h> 28 #include <linux/mutex.h> 29 #include <linux/sysfs.h> 30 #include <linux/ioport.h> 31 #include <linux/acpi.h> 32 #include <linux/io.h> 33 34 static unsigned short force_id; 35 module_param(force_id, ushort, 0); 36 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 37 38 static struct platform_device *pdev; 39 40 #define DRVNAME "f71805f" 41 enum kinds { f71805f, f71872f }; 42 43 /* 44 * Super-I/O constants and functions 45 */ 46 47 #define F71805F_LD_HWM 0x04 48 49 #define SIO_REG_LDSEL 0x07 /* Logical device select */ 50 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ 51 #define SIO_REG_DEVREV 0x22 /* Device revision */ 52 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ 53 #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */ 54 #define SIO_REG_ENABLE 0x30 /* Logical device enable */ 55 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ 56 57 #define SIO_FINTEK_ID 0x1934 58 #define SIO_F71805F_ID 0x0406 59 #define SIO_F71872F_ID 0x0341 60 61 static inline int 62 superio_inb(int base, int reg) 63 { 64 outb(reg, base); 65 return inb(base + 1); 66 } 67 68 static int 69 superio_inw(int base, int reg) 70 { 71 int val; 72 outb(reg++, base); 73 val = inb(base + 1) << 8; 74 outb(reg, base); 75 val |= inb(base + 1); 76 return val; 77 } 78 79 static inline void 80 superio_select(int base, int ld) 81 { 82 outb(SIO_REG_LDSEL, base); 83 outb(ld, base + 1); 84 } 85 86 static inline int 87 superio_enter(int base) 88 { 89 if (!request_muxed_region(base, 2, DRVNAME)) 90 return -EBUSY; 91 92 outb(0x87, base); 93 outb(0x87, base); 94 95 return 0; 96 } 97 98 static inline void 99 superio_exit(int base) 100 { 101 outb(0xaa, base); 102 release_region(base, 2); 103 } 104 105 /* 106 * ISA constants 107 */ 108 109 #define REGION_LENGTH 8 110 #define ADDR_REG_OFFSET 5 111 #define DATA_REG_OFFSET 6 112 113 /* 114 * Registers 115 */ 116 117 /* in nr from 0 to 10 (8-bit values) */ 118 #define F71805F_REG_IN(nr) (0x10 + (nr)) 119 #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E) 120 #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F) 121 /* fan nr from 0 to 2 (12-bit values, two registers) */ 122 #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr)) 123 #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr)) 124 #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr)) 125 #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr)) 126 #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr)) 127 #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr)) 128 /* temp nr from 0 to 2 (8-bit values) */ 129 #define F71805F_REG_TEMP(nr) (0x1B + (nr)) 130 #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr)) 131 #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr)) 132 #define F71805F_REG_TEMP_MODE 0x01 133 /* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */ 134 /* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */ 135 #define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \ 136 (0xA0 + 0x10 * (pwmnr) + (2 - (apnr))) 137 #define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \ 138 (0xA4 + 0x10 * (pwmnr) + \ 139 2 * (2 - (apnr))) 140 141 #define F71805F_REG_START 0x00 142 /* status nr from 0 to 2 */ 143 #define F71805F_REG_STATUS(nr) (0x36 + (nr)) 144 145 /* individual register bits */ 146 #define FAN_CTRL_DC_MODE 0x10 147 #define FAN_CTRL_LATCH_FULL 0x08 148 #define FAN_CTRL_MODE_MASK 0x03 149 #define FAN_CTRL_MODE_SPEED 0x00 150 #define FAN_CTRL_MODE_TEMPERATURE 0x01 151 #define FAN_CTRL_MODE_MANUAL 0x02 152 153 /* 154 * Data structures and manipulation thereof 155 */ 156 157 struct f71805f_auto_point { 158 u8 temp[3]; 159 u16 fan[3]; 160 }; 161 162 struct f71805f_data { 163 unsigned short addr; 164 const char *name; 165 struct device *hwmon_dev; 166 167 struct mutex update_lock; 168 bool valid; /* true if following fields are valid */ 169 unsigned long last_updated; /* In jiffies */ 170 unsigned long last_limits; /* In jiffies */ 171 172 /* Register values */ 173 u8 in[11]; 174 u8 in_high[11]; 175 u8 in_low[11]; 176 u16 has_in; 177 u16 fan[3]; 178 u16 fan_low[3]; 179 u16 fan_target[3]; 180 u8 fan_ctrl[3]; 181 u8 pwm[3]; 182 u8 pwm_freq[3]; 183 u8 temp[3]; 184 u8 temp_high[3]; 185 u8 temp_hyst[3]; 186 u8 temp_mode; 187 unsigned long alarms; 188 struct f71805f_auto_point auto_points[3]; 189 }; 190 191 struct f71805f_sio_data { 192 enum kinds kind; 193 u8 fnsel1; 194 }; 195 196 static inline long in_from_reg(u8 reg) 197 { 198 return reg * 8; 199 } 200 201 /* The 2 least significant bits are not used */ 202 static inline u8 in_to_reg(long val) 203 { 204 if (val <= 0) 205 return 0; 206 if (val >= 2016) 207 return 0xfc; 208 return ((val + 16) / 32) << 2; 209 } 210 211 /* in0 is downscaled by a factor 2 internally */ 212 static inline long in0_from_reg(u8 reg) 213 { 214 return reg * 16; 215 } 216 217 static inline u8 in0_to_reg(long val) 218 { 219 if (val <= 0) 220 return 0; 221 if (val >= 4032) 222 return 0xfc; 223 return ((val + 32) / 64) << 2; 224 } 225 226 /* The 4 most significant bits are not used */ 227 static inline long fan_from_reg(u16 reg) 228 { 229 reg &= 0xfff; 230 if (!reg || reg == 0xfff) 231 return 0; 232 return 1500000 / reg; 233 } 234 235 static inline u16 fan_to_reg(long rpm) 236 { 237 /* 238 * If the low limit is set below what the chip can measure, 239 * store the largest possible 12-bit value in the registers, 240 * so that no alarm will ever trigger. 241 */ 242 if (rpm < 367) 243 return 0xfff; 244 return 1500000 / rpm; 245 } 246 247 static inline unsigned long pwm_freq_from_reg(u8 reg) 248 { 249 unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL; 250 251 reg &= 0x7f; 252 if (reg == 0) 253 reg++; 254 return clock / (reg << 8); 255 } 256 257 static inline u8 pwm_freq_to_reg(unsigned long val) 258 { 259 if (val >= 187500) /* The highest we can do */ 260 return 0x80; 261 if (val >= 1475) /* Use 48 MHz clock */ 262 return 0x80 | (48000000UL / (val << 8)); 263 if (val < 31) /* The lowest we can do */ 264 return 0x7f; 265 else /* Use 1 MHz clock */ 266 return 1000000UL / (val << 8); 267 } 268 269 static inline int pwm_mode_from_reg(u8 reg) 270 { 271 return !(reg & FAN_CTRL_DC_MODE); 272 } 273 274 static inline long temp_from_reg(u8 reg) 275 { 276 return reg * 1000; 277 } 278 279 static inline u8 temp_to_reg(long val) 280 { 281 if (val <= 0) 282 return 0; 283 if (val >= 1000 * 0xff) 284 return 0xff; 285 return (val + 500) / 1000; 286 } 287 288 /* 289 * Device I/O access 290 */ 291 292 /* Must be called with data->update_lock held, except during initialization */ 293 static u8 f71805f_read8(struct f71805f_data *data, u8 reg) 294 { 295 outb(reg, data->addr + ADDR_REG_OFFSET); 296 return inb(data->addr + DATA_REG_OFFSET); 297 } 298 299 /* Must be called with data->update_lock held, except during initialization */ 300 static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val) 301 { 302 outb(reg, data->addr + ADDR_REG_OFFSET); 303 outb(val, data->addr + DATA_REG_OFFSET); 304 } 305 306 /* 307 * It is important to read the MSB first, because doing so latches the 308 * value of the LSB, so we are sure both bytes belong to the same value. 309 * Must be called with data->update_lock held, except during initialization 310 */ 311 static u16 f71805f_read16(struct f71805f_data *data, u8 reg) 312 { 313 u16 val; 314 315 outb(reg, data->addr + ADDR_REG_OFFSET); 316 val = inb(data->addr + DATA_REG_OFFSET) << 8; 317 outb(++reg, data->addr + ADDR_REG_OFFSET); 318 val |= inb(data->addr + DATA_REG_OFFSET); 319 320 return val; 321 } 322 323 /* Must be called with data->update_lock held, except during initialization */ 324 static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val) 325 { 326 outb(reg, data->addr + ADDR_REG_OFFSET); 327 outb(val >> 8, data->addr + DATA_REG_OFFSET); 328 outb(++reg, data->addr + ADDR_REG_OFFSET); 329 outb(val & 0xff, data->addr + DATA_REG_OFFSET); 330 } 331 332 static struct f71805f_data *f71805f_update_device(struct device *dev) 333 { 334 struct f71805f_data *data = dev_get_drvdata(dev); 335 int nr, apnr; 336 337 mutex_lock(&data->update_lock); 338 339 /* Limit registers cache is refreshed after 60 seconds */ 340 if (time_after(jiffies, data->last_updated + 60 * HZ) 341 || !data->valid) { 342 for (nr = 0; nr < 11; nr++) { 343 if (!(data->has_in & (1 << nr))) 344 continue; 345 data->in_high[nr] = f71805f_read8(data, 346 F71805F_REG_IN_HIGH(nr)); 347 data->in_low[nr] = f71805f_read8(data, 348 F71805F_REG_IN_LOW(nr)); 349 } 350 for (nr = 0; nr < 3; nr++) { 351 data->fan_low[nr] = f71805f_read16(data, 352 F71805F_REG_FAN_LOW(nr)); 353 data->fan_target[nr] = f71805f_read16(data, 354 F71805F_REG_FAN_TARGET(nr)); 355 data->pwm_freq[nr] = f71805f_read8(data, 356 F71805F_REG_PWM_FREQ(nr)); 357 } 358 for (nr = 0; nr < 3; nr++) { 359 data->temp_high[nr] = f71805f_read8(data, 360 F71805F_REG_TEMP_HIGH(nr)); 361 data->temp_hyst[nr] = f71805f_read8(data, 362 F71805F_REG_TEMP_HYST(nr)); 363 } 364 data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE); 365 for (nr = 0; nr < 3; nr++) { 366 for (apnr = 0; apnr < 3; apnr++) { 367 data->auto_points[nr].temp[apnr] = 368 f71805f_read8(data, 369 F71805F_REG_PWM_AUTO_POINT_TEMP(nr, 370 apnr)); 371 data->auto_points[nr].fan[apnr] = 372 f71805f_read16(data, 373 F71805F_REG_PWM_AUTO_POINT_FAN(nr, 374 apnr)); 375 } 376 } 377 378 data->last_limits = jiffies; 379 } 380 381 /* Measurement registers cache is refreshed after 1 second */ 382 if (time_after(jiffies, data->last_updated + HZ) 383 || !data->valid) { 384 for (nr = 0; nr < 11; nr++) { 385 if (!(data->has_in & (1 << nr))) 386 continue; 387 data->in[nr] = f71805f_read8(data, 388 F71805F_REG_IN(nr)); 389 } 390 for (nr = 0; nr < 3; nr++) { 391 data->fan[nr] = f71805f_read16(data, 392 F71805F_REG_FAN(nr)); 393 data->fan_ctrl[nr] = f71805f_read8(data, 394 F71805F_REG_FAN_CTRL(nr)); 395 data->pwm[nr] = f71805f_read8(data, 396 F71805F_REG_PWM_DUTY(nr)); 397 } 398 for (nr = 0; nr < 3; nr++) { 399 data->temp[nr] = f71805f_read8(data, 400 F71805F_REG_TEMP(nr)); 401 } 402 data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0)) 403 + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8) 404 + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16); 405 406 data->last_updated = jiffies; 407 data->valid = true; 408 } 409 410 mutex_unlock(&data->update_lock); 411 412 return data; 413 } 414 415 /* 416 * Sysfs interface 417 */ 418 419 static ssize_t show_in0(struct device *dev, struct device_attribute *devattr, 420 char *buf) 421 { 422 struct f71805f_data *data = f71805f_update_device(dev); 423 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 424 int nr = attr->index; 425 426 return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr])); 427 } 428 429 static ssize_t show_in0_max(struct device *dev, struct device_attribute 430 *devattr, char *buf) 431 { 432 struct f71805f_data *data = f71805f_update_device(dev); 433 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 434 int nr = attr->index; 435 436 return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr])); 437 } 438 439 static ssize_t show_in0_min(struct device *dev, struct device_attribute 440 *devattr, char *buf) 441 { 442 struct f71805f_data *data = f71805f_update_device(dev); 443 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 444 int nr = attr->index; 445 446 return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr])); 447 } 448 449 static ssize_t set_in0_max(struct device *dev, struct device_attribute 450 *devattr, const char *buf, size_t count) 451 { 452 struct f71805f_data *data = dev_get_drvdata(dev); 453 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 454 int nr = attr->index; 455 long val; 456 int err; 457 458 err = kstrtol(buf, 10, &val); 459 if (err) 460 return err; 461 462 mutex_lock(&data->update_lock); 463 data->in_high[nr] = in0_to_reg(val); 464 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); 465 mutex_unlock(&data->update_lock); 466 467 return count; 468 } 469 470 static ssize_t set_in0_min(struct device *dev, struct device_attribute 471 *devattr, const char *buf, size_t count) 472 { 473 struct f71805f_data *data = dev_get_drvdata(dev); 474 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 475 int nr = attr->index; 476 long val; 477 int err; 478 479 err = kstrtol(buf, 10, &val); 480 if (err) 481 return err; 482 483 mutex_lock(&data->update_lock); 484 data->in_low[nr] = in0_to_reg(val); 485 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); 486 mutex_unlock(&data->update_lock); 487 488 return count; 489 } 490 491 static ssize_t show_in(struct device *dev, struct device_attribute *devattr, 492 char *buf) 493 { 494 struct f71805f_data *data = f71805f_update_device(dev); 495 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 496 int nr = attr->index; 497 498 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr])); 499 } 500 501 static ssize_t show_in_max(struct device *dev, struct device_attribute 502 *devattr, char *buf) 503 { 504 struct f71805f_data *data = f71805f_update_device(dev); 505 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 506 int nr = attr->index; 507 508 return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr])); 509 } 510 511 static ssize_t show_in_min(struct device *dev, struct device_attribute 512 *devattr, char *buf) 513 { 514 struct f71805f_data *data = f71805f_update_device(dev); 515 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 516 int nr = attr->index; 517 518 return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr])); 519 } 520 521 static ssize_t set_in_max(struct device *dev, struct device_attribute 522 *devattr, const char *buf, size_t count) 523 { 524 struct f71805f_data *data = dev_get_drvdata(dev); 525 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 526 int nr = attr->index; 527 long val; 528 int err; 529 530 err = kstrtol(buf, 10, &val); 531 if (err) 532 return err; 533 534 mutex_lock(&data->update_lock); 535 data->in_high[nr] = in_to_reg(val); 536 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); 537 mutex_unlock(&data->update_lock); 538 539 return count; 540 } 541 542 static ssize_t set_in_min(struct device *dev, struct device_attribute 543 *devattr, const char *buf, size_t count) 544 { 545 struct f71805f_data *data = dev_get_drvdata(dev); 546 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 547 int nr = attr->index; 548 long val; 549 int err; 550 551 err = kstrtol(buf, 10, &val); 552 if (err) 553 return err; 554 555 mutex_lock(&data->update_lock); 556 data->in_low[nr] = in_to_reg(val); 557 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); 558 mutex_unlock(&data->update_lock); 559 560 return count; 561 } 562 563 static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, 564 char *buf) 565 { 566 struct f71805f_data *data = f71805f_update_device(dev); 567 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 568 int nr = attr->index; 569 570 return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr])); 571 } 572 573 static ssize_t show_fan_min(struct device *dev, struct device_attribute 574 *devattr, char *buf) 575 { 576 struct f71805f_data *data = f71805f_update_device(dev); 577 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 578 int nr = attr->index; 579 580 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr])); 581 } 582 583 static ssize_t show_fan_target(struct device *dev, struct device_attribute 584 *devattr, char *buf) 585 { 586 struct f71805f_data *data = f71805f_update_device(dev); 587 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 588 int nr = attr->index; 589 590 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr])); 591 } 592 593 static ssize_t set_fan_min(struct device *dev, struct device_attribute 594 *devattr, const char *buf, size_t count) 595 { 596 struct f71805f_data *data = dev_get_drvdata(dev); 597 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 598 int nr = attr->index; 599 long val; 600 int err; 601 602 err = kstrtol(buf, 10, &val); 603 if (err) 604 return err; 605 606 mutex_lock(&data->update_lock); 607 data->fan_low[nr] = fan_to_reg(val); 608 f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]); 609 mutex_unlock(&data->update_lock); 610 611 return count; 612 } 613 614 static ssize_t set_fan_target(struct device *dev, struct device_attribute 615 *devattr, const char *buf, size_t count) 616 { 617 struct f71805f_data *data = dev_get_drvdata(dev); 618 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 619 int nr = attr->index; 620 long val; 621 int err; 622 623 err = kstrtol(buf, 10, &val); 624 if (err) 625 return err; 626 627 mutex_lock(&data->update_lock); 628 data->fan_target[nr] = fan_to_reg(val); 629 f71805f_write16(data, F71805F_REG_FAN_TARGET(nr), 630 data->fan_target[nr]); 631 mutex_unlock(&data->update_lock); 632 633 return count; 634 } 635 636 static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, 637 char *buf) 638 { 639 struct f71805f_data *data = f71805f_update_device(dev); 640 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 641 int nr = attr->index; 642 643 return sprintf(buf, "%d\n", (int)data->pwm[nr]); 644 } 645 646 static ssize_t show_pwm_enable(struct device *dev, struct device_attribute 647 *devattr, char *buf) 648 { 649 struct f71805f_data *data = f71805f_update_device(dev); 650 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 651 int nr = attr->index; 652 int mode; 653 654 switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) { 655 case FAN_CTRL_MODE_SPEED: 656 mode = 3; 657 break; 658 case FAN_CTRL_MODE_TEMPERATURE: 659 mode = 2; 660 break; 661 default: /* MANUAL */ 662 mode = 1; 663 } 664 665 return sprintf(buf, "%d\n", mode); 666 } 667 668 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute 669 *devattr, char *buf) 670 { 671 struct f71805f_data *data = f71805f_update_device(dev); 672 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 673 int nr = attr->index; 674 675 return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr])); 676 } 677 678 static ssize_t show_pwm_mode(struct device *dev, struct device_attribute 679 *devattr, char *buf) 680 { 681 struct f71805f_data *data = f71805f_update_device(dev); 682 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 683 int nr = attr->index; 684 685 return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr])); 686 } 687 688 static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, 689 const char *buf, size_t count) 690 { 691 struct f71805f_data *data = dev_get_drvdata(dev); 692 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 693 int nr = attr->index; 694 unsigned long val; 695 int err; 696 697 err = kstrtoul(buf, 10, &val); 698 if (err) 699 return err; 700 701 if (val > 255) 702 return -EINVAL; 703 704 mutex_lock(&data->update_lock); 705 data->pwm[nr] = val; 706 f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]); 707 mutex_unlock(&data->update_lock); 708 709 return count; 710 } 711 712 static struct attribute *f71805f_attr_pwm[]; 713 714 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute 715 *devattr, const char *buf, size_t count) 716 { 717 struct f71805f_data *data = dev_get_drvdata(dev); 718 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 719 int nr = attr->index; 720 u8 reg; 721 unsigned long val; 722 int err; 723 724 err = kstrtoul(buf, 10, &val); 725 if (err) 726 return err; 727 728 if (val < 1 || val > 3) 729 return -EINVAL; 730 731 if (val > 1) { /* Automatic mode, user can't set PWM value */ 732 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], 733 S_IRUGO)) 734 dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1); 735 } 736 737 mutex_lock(&data->update_lock); 738 reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr)) 739 & ~FAN_CTRL_MODE_MASK; 740 switch (val) { 741 case 1: 742 reg |= FAN_CTRL_MODE_MANUAL; 743 break; 744 case 2: 745 reg |= FAN_CTRL_MODE_TEMPERATURE; 746 break; 747 case 3: 748 reg |= FAN_CTRL_MODE_SPEED; 749 break; 750 } 751 data->fan_ctrl[nr] = reg; 752 f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg); 753 mutex_unlock(&data->update_lock); 754 755 if (val == 1) { /* Manual mode, user can set PWM value */ 756 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], 757 S_IRUGO | S_IWUSR)) 758 dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1); 759 } 760 761 return count; 762 } 763 764 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute 765 *devattr, const char *buf, size_t count) 766 { 767 struct f71805f_data *data = dev_get_drvdata(dev); 768 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 769 int nr = attr->index; 770 unsigned long val; 771 int err; 772 773 err = kstrtoul(buf, 10, &val); 774 if (err) 775 return err; 776 777 mutex_lock(&data->update_lock); 778 data->pwm_freq[nr] = pwm_freq_to_reg(val); 779 f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]); 780 mutex_unlock(&data->update_lock); 781 782 return count; 783 } 784 785 static ssize_t show_pwm_auto_point_temp(struct device *dev, 786 struct device_attribute *devattr, 787 char *buf) 788 { 789 struct f71805f_data *data = dev_get_drvdata(dev); 790 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); 791 int pwmnr = attr->nr; 792 int apnr = attr->index; 793 794 return sprintf(buf, "%ld\n", 795 temp_from_reg(data->auto_points[pwmnr].temp[apnr])); 796 } 797 798 static ssize_t set_pwm_auto_point_temp(struct device *dev, 799 struct device_attribute *devattr, 800 const char *buf, size_t count) 801 { 802 struct f71805f_data *data = dev_get_drvdata(dev); 803 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); 804 int pwmnr = attr->nr; 805 int apnr = attr->index; 806 unsigned long val; 807 int err; 808 809 err = kstrtoul(buf, 10, &val); 810 if (err) 811 return err; 812 813 mutex_lock(&data->update_lock); 814 data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val); 815 f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr), 816 data->auto_points[pwmnr].temp[apnr]); 817 mutex_unlock(&data->update_lock); 818 819 return count; 820 } 821 822 static ssize_t show_pwm_auto_point_fan(struct device *dev, 823 struct device_attribute *devattr, 824 char *buf) 825 { 826 struct f71805f_data *data = dev_get_drvdata(dev); 827 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); 828 int pwmnr = attr->nr; 829 int apnr = attr->index; 830 831 return sprintf(buf, "%ld\n", 832 fan_from_reg(data->auto_points[pwmnr].fan[apnr])); 833 } 834 835 static ssize_t set_pwm_auto_point_fan(struct device *dev, 836 struct device_attribute *devattr, 837 const char *buf, size_t count) 838 { 839 struct f71805f_data *data = dev_get_drvdata(dev); 840 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); 841 int pwmnr = attr->nr; 842 int apnr = attr->index; 843 unsigned long val; 844 int err; 845 846 err = kstrtoul(buf, 10, &val); 847 if (err) 848 return err; 849 850 mutex_lock(&data->update_lock); 851 data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val); 852 f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr), 853 data->auto_points[pwmnr].fan[apnr]); 854 mutex_unlock(&data->update_lock); 855 856 return count; 857 } 858 859 static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, 860 char *buf) 861 { 862 struct f71805f_data *data = f71805f_update_device(dev); 863 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 864 int nr = attr->index; 865 866 return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr])); 867 } 868 869 static ssize_t show_temp_max(struct device *dev, struct device_attribute 870 *devattr, char *buf) 871 { 872 struct f71805f_data *data = f71805f_update_device(dev); 873 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 874 int nr = attr->index; 875 876 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr])); 877 } 878 879 static ssize_t show_temp_hyst(struct device *dev, struct device_attribute 880 *devattr, char *buf) 881 { 882 struct f71805f_data *data = f71805f_update_device(dev); 883 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 884 int nr = attr->index; 885 886 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr])); 887 } 888 889 static ssize_t show_temp_type(struct device *dev, struct device_attribute 890 *devattr, char *buf) 891 { 892 struct f71805f_data *data = f71805f_update_device(dev); 893 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 894 int nr = attr->index; 895 896 /* 3 is diode, 4 is thermistor */ 897 return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4); 898 } 899 900 static ssize_t set_temp_max(struct device *dev, struct device_attribute 901 *devattr, const char *buf, size_t count) 902 { 903 struct f71805f_data *data = dev_get_drvdata(dev); 904 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 905 int nr = attr->index; 906 long val; 907 int err; 908 909 err = kstrtol(buf, 10, &val); 910 if (err) 911 return err; 912 913 mutex_lock(&data->update_lock); 914 data->temp_high[nr] = temp_to_reg(val); 915 f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]); 916 mutex_unlock(&data->update_lock); 917 918 return count; 919 } 920 921 static ssize_t set_temp_hyst(struct device *dev, struct device_attribute 922 *devattr, const char *buf, size_t count) 923 { 924 struct f71805f_data *data = dev_get_drvdata(dev); 925 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 926 int nr = attr->index; 927 long val; 928 int err; 929 930 err = kstrtol(buf, 10, &val); 931 if (err) 932 return err; 933 934 mutex_lock(&data->update_lock); 935 data->temp_hyst[nr] = temp_to_reg(val); 936 f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]); 937 mutex_unlock(&data->update_lock); 938 939 return count; 940 } 941 942 static ssize_t alarms_in_show(struct device *dev, struct device_attribute 943 *devattr, char *buf) 944 { 945 struct f71805f_data *data = f71805f_update_device(dev); 946 947 return sprintf(buf, "%lu\n", data->alarms & 0x7ff); 948 } 949 950 static ssize_t alarms_fan_show(struct device *dev, struct device_attribute 951 *devattr, char *buf) 952 { 953 struct f71805f_data *data = f71805f_update_device(dev); 954 955 return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07); 956 } 957 958 static ssize_t alarms_temp_show(struct device *dev, struct device_attribute 959 *devattr, char *buf) 960 { 961 struct f71805f_data *data = f71805f_update_device(dev); 962 963 return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07); 964 } 965 966 static ssize_t show_alarm(struct device *dev, struct device_attribute 967 *devattr, char *buf) 968 { 969 struct f71805f_data *data = f71805f_update_device(dev); 970 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 971 int bitnr = attr->index; 972 973 return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1); 974 } 975 976 static ssize_t name_show(struct device *dev, struct device_attribute 977 *devattr, char *buf) 978 { 979 struct f71805f_data *data = dev_get_drvdata(dev); 980 981 return sprintf(buf, "%s\n", data->name); 982 } 983 984 static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0); 985 static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR, 986 show_in0_max, set_in0_max, 0); 987 static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR, 988 show_in0_min, set_in0_min, 0); 989 static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1); 990 static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR, 991 show_in_max, set_in_max, 1); 992 static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR, 993 show_in_min, set_in_min, 1); 994 static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2); 995 static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR, 996 show_in_max, set_in_max, 2); 997 static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR, 998 show_in_min, set_in_min, 2); 999 static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3); 1000 static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR, 1001 show_in_max, set_in_max, 3); 1002 static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR, 1003 show_in_min, set_in_min, 3); 1004 static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4); 1005 static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR, 1006 show_in_max, set_in_max, 4); 1007 static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR, 1008 show_in_min, set_in_min, 4); 1009 static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5); 1010 static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR, 1011 show_in_max, set_in_max, 5); 1012 static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR, 1013 show_in_min, set_in_min, 5); 1014 static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6); 1015 static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR, 1016 show_in_max, set_in_max, 6); 1017 static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR, 1018 show_in_min, set_in_min, 6); 1019 static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7); 1020 static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR, 1021 show_in_max, set_in_max, 7); 1022 static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR, 1023 show_in_min, set_in_min, 7); 1024 static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8); 1025 static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR, 1026 show_in_max, set_in_max, 8); 1027 static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR, 1028 show_in_min, set_in_min, 8); 1029 static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9); 1030 static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR, 1031 show_in0_max, set_in0_max, 9); 1032 static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR, 1033 show_in0_min, set_in0_min, 9); 1034 static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10); 1035 static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR, 1036 show_in0_max, set_in0_max, 10); 1037 static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR, 1038 show_in0_min, set_in0_min, 10); 1039 1040 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); 1041 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, 1042 show_fan_min, set_fan_min, 0); 1043 static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR, 1044 show_fan_target, set_fan_target, 0); 1045 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); 1046 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, 1047 show_fan_min, set_fan_min, 1); 1048 static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR, 1049 show_fan_target, set_fan_target, 1); 1050 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); 1051 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, 1052 show_fan_min, set_fan_min, 2); 1053 static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR, 1054 show_fan_target, set_fan_target, 2); 1055 1056 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0); 1057 static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, 1058 show_temp_max, set_temp_max, 0); 1059 static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, 1060 show_temp_hyst, set_temp_hyst, 0); 1061 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0); 1062 static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1); 1063 static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR, 1064 show_temp_max, set_temp_max, 1); 1065 static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, 1066 show_temp_hyst, set_temp_hyst, 1); 1067 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1); 1068 static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2); 1069 static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR, 1070 show_temp_max, set_temp_max, 2); 1071 static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, 1072 show_temp_hyst, set_temp_hyst, 2); 1073 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2); 1074 1075 /* 1076 * pwm (value) files are created read-only, write permission is 1077 * then added or removed dynamically as needed 1078 */ 1079 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0); 1080 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, 1081 show_pwm_enable, set_pwm_enable, 0); 1082 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, 1083 show_pwm_freq, set_pwm_freq, 0); 1084 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0); 1085 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1); 1086 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, 1087 show_pwm_enable, set_pwm_enable, 1); 1088 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR, 1089 show_pwm_freq, set_pwm_freq, 1); 1090 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1); 1091 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2); 1092 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, 1093 show_pwm_enable, set_pwm_enable, 2); 1094 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR, 1095 show_pwm_freq, set_pwm_freq, 2); 1096 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2); 1097 1098 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR, 1099 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1100 0, 0); 1101 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR, 1102 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1103 0, 0); 1104 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR, 1105 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1106 0, 1); 1107 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR, 1108 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1109 0, 1); 1110 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR, 1111 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1112 0, 2); 1113 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR, 1114 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1115 0, 2); 1116 1117 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR, 1118 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1119 1, 0); 1120 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR, 1121 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1122 1, 0); 1123 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR, 1124 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1125 1, 1); 1126 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR, 1127 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1128 1, 1); 1129 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR, 1130 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1131 1, 2); 1132 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR, 1133 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1134 1, 2); 1135 1136 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR, 1137 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1138 2, 0); 1139 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR, 1140 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1141 2, 0); 1142 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR, 1143 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1144 2, 1); 1145 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR, 1146 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1147 2, 1); 1148 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, 1149 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1150 2, 2); 1151 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR, 1152 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1153 2, 2); 1154 1155 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); 1156 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); 1157 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); 1158 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); 1159 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4); 1160 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5); 1161 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6); 1162 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7); 1163 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8); 1164 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9); 1165 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10); 1166 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11); 1167 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12); 1168 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13); 1169 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16); 1170 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17); 1171 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18); 1172 static DEVICE_ATTR_RO(alarms_in); 1173 static DEVICE_ATTR_RO(alarms_fan); 1174 static DEVICE_ATTR_RO(alarms_temp); 1175 1176 static DEVICE_ATTR_RO(name); 1177 1178 static struct attribute *f71805f_attributes[] = { 1179 &sensor_dev_attr_in0_input.dev_attr.attr, 1180 &sensor_dev_attr_in0_max.dev_attr.attr, 1181 &sensor_dev_attr_in0_min.dev_attr.attr, 1182 &sensor_dev_attr_in1_input.dev_attr.attr, 1183 &sensor_dev_attr_in1_max.dev_attr.attr, 1184 &sensor_dev_attr_in1_min.dev_attr.attr, 1185 &sensor_dev_attr_in2_input.dev_attr.attr, 1186 &sensor_dev_attr_in2_max.dev_attr.attr, 1187 &sensor_dev_attr_in2_min.dev_attr.attr, 1188 &sensor_dev_attr_in3_input.dev_attr.attr, 1189 &sensor_dev_attr_in3_max.dev_attr.attr, 1190 &sensor_dev_attr_in3_min.dev_attr.attr, 1191 &sensor_dev_attr_in5_input.dev_attr.attr, 1192 &sensor_dev_attr_in5_max.dev_attr.attr, 1193 &sensor_dev_attr_in5_min.dev_attr.attr, 1194 &sensor_dev_attr_in6_input.dev_attr.attr, 1195 &sensor_dev_attr_in6_max.dev_attr.attr, 1196 &sensor_dev_attr_in6_min.dev_attr.attr, 1197 &sensor_dev_attr_in7_input.dev_attr.attr, 1198 &sensor_dev_attr_in7_max.dev_attr.attr, 1199 &sensor_dev_attr_in7_min.dev_attr.attr, 1200 1201 &sensor_dev_attr_fan1_input.dev_attr.attr, 1202 &sensor_dev_attr_fan1_min.dev_attr.attr, 1203 &sensor_dev_attr_fan1_alarm.dev_attr.attr, 1204 &sensor_dev_attr_fan1_target.dev_attr.attr, 1205 &sensor_dev_attr_fan2_input.dev_attr.attr, 1206 &sensor_dev_attr_fan2_min.dev_attr.attr, 1207 &sensor_dev_attr_fan2_alarm.dev_attr.attr, 1208 &sensor_dev_attr_fan2_target.dev_attr.attr, 1209 &sensor_dev_attr_fan3_input.dev_attr.attr, 1210 &sensor_dev_attr_fan3_min.dev_attr.attr, 1211 &sensor_dev_attr_fan3_alarm.dev_attr.attr, 1212 &sensor_dev_attr_fan3_target.dev_attr.attr, 1213 1214 &sensor_dev_attr_pwm1.dev_attr.attr, 1215 &sensor_dev_attr_pwm1_enable.dev_attr.attr, 1216 &sensor_dev_attr_pwm1_mode.dev_attr.attr, 1217 &sensor_dev_attr_pwm2.dev_attr.attr, 1218 &sensor_dev_attr_pwm2_enable.dev_attr.attr, 1219 &sensor_dev_attr_pwm2_mode.dev_attr.attr, 1220 &sensor_dev_attr_pwm3.dev_attr.attr, 1221 &sensor_dev_attr_pwm3_enable.dev_attr.attr, 1222 &sensor_dev_attr_pwm3_mode.dev_attr.attr, 1223 1224 &sensor_dev_attr_temp1_input.dev_attr.attr, 1225 &sensor_dev_attr_temp1_max.dev_attr.attr, 1226 &sensor_dev_attr_temp1_max_hyst.dev_attr.attr, 1227 &sensor_dev_attr_temp1_type.dev_attr.attr, 1228 &sensor_dev_attr_temp2_input.dev_attr.attr, 1229 &sensor_dev_attr_temp2_max.dev_attr.attr, 1230 &sensor_dev_attr_temp2_max_hyst.dev_attr.attr, 1231 &sensor_dev_attr_temp2_type.dev_attr.attr, 1232 &sensor_dev_attr_temp3_input.dev_attr.attr, 1233 &sensor_dev_attr_temp3_max.dev_attr.attr, 1234 &sensor_dev_attr_temp3_max_hyst.dev_attr.attr, 1235 &sensor_dev_attr_temp3_type.dev_attr.attr, 1236 1237 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, 1238 &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr, 1239 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, 1240 &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr, 1241 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, 1242 &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr, 1243 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr, 1244 &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr, 1245 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr, 1246 &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr, 1247 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr, 1248 &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr, 1249 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr, 1250 &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr, 1251 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr, 1252 &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr, 1253 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr, 1254 &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr, 1255 1256 &sensor_dev_attr_in0_alarm.dev_attr.attr, 1257 &sensor_dev_attr_in1_alarm.dev_attr.attr, 1258 &sensor_dev_attr_in2_alarm.dev_attr.attr, 1259 &sensor_dev_attr_in3_alarm.dev_attr.attr, 1260 &sensor_dev_attr_in5_alarm.dev_attr.attr, 1261 &sensor_dev_attr_in6_alarm.dev_attr.attr, 1262 &sensor_dev_attr_in7_alarm.dev_attr.attr, 1263 &dev_attr_alarms_in.attr, 1264 &sensor_dev_attr_temp1_alarm.dev_attr.attr, 1265 &sensor_dev_attr_temp2_alarm.dev_attr.attr, 1266 &sensor_dev_attr_temp3_alarm.dev_attr.attr, 1267 &dev_attr_alarms_temp.attr, 1268 &dev_attr_alarms_fan.attr, 1269 1270 &dev_attr_name.attr, 1271 NULL 1272 }; 1273 1274 static const struct attribute_group f71805f_group = { 1275 .attrs = f71805f_attributes, 1276 }; 1277 1278 static struct attribute *f71805f_attributes_optin[4][5] = { 1279 { 1280 &sensor_dev_attr_in4_input.dev_attr.attr, 1281 &sensor_dev_attr_in4_max.dev_attr.attr, 1282 &sensor_dev_attr_in4_min.dev_attr.attr, 1283 &sensor_dev_attr_in4_alarm.dev_attr.attr, 1284 NULL 1285 }, { 1286 &sensor_dev_attr_in8_input.dev_attr.attr, 1287 &sensor_dev_attr_in8_max.dev_attr.attr, 1288 &sensor_dev_attr_in8_min.dev_attr.attr, 1289 &sensor_dev_attr_in8_alarm.dev_attr.attr, 1290 NULL 1291 }, { 1292 &sensor_dev_attr_in9_input.dev_attr.attr, 1293 &sensor_dev_attr_in9_max.dev_attr.attr, 1294 &sensor_dev_attr_in9_min.dev_attr.attr, 1295 &sensor_dev_attr_in9_alarm.dev_attr.attr, 1296 NULL 1297 }, { 1298 &sensor_dev_attr_in10_input.dev_attr.attr, 1299 &sensor_dev_attr_in10_max.dev_attr.attr, 1300 &sensor_dev_attr_in10_min.dev_attr.attr, 1301 &sensor_dev_attr_in10_alarm.dev_attr.attr, 1302 NULL 1303 } 1304 }; 1305 1306 static const struct attribute_group f71805f_group_optin[4] = { 1307 { .attrs = f71805f_attributes_optin[0] }, 1308 { .attrs = f71805f_attributes_optin[1] }, 1309 { .attrs = f71805f_attributes_optin[2] }, 1310 { .attrs = f71805f_attributes_optin[3] }, 1311 }; 1312 1313 /* 1314 * We don't include pwm_freq files in the arrays above, because they must be 1315 * created conditionally (only if pwm_mode is 1 == PWM) 1316 */ 1317 static struct attribute *f71805f_attributes_pwm_freq[] = { 1318 &sensor_dev_attr_pwm1_freq.dev_attr.attr, 1319 &sensor_dev_attr_pwm2_freq.dev_attr.attr, 1320 &sensor_dev_attr_pwm3_freq.dev_attr.attr, 1321 NULL 1322 }; 1323 1324 static const struct attribute_group f71805f_group_pwm_freq = { 1325 .attrs = f71805f_attributes_pwm_freq, 1326 }; 1327 1328 /* We also need an indexed access to pwmN files to toggle writability */ 1329 static struct attribute *f71805f_attr_pwm[] = { 1330 &sensor_dev_attr_pwm1.dev_attr.attr, 1331 &sensor_dev_attr_pwm2.dev_attr.attr, 1332 &sensor_dev_attr_pwm3.dev_attr.attr, 1333 }; 1334 1335 /* 1336 * Device registration and initialization 1337 */ 1338 1339 static void f71805f_init_device(struct f71805f_data *data) 1340 { 1341 u8 reg; 1342 int i; 1343 1344 reg = f71805f_read8(data, F71805F_REG_START); 1345 if ((reg & 0x41) != 0x01) { 1346 pr_debug("Starting monitoring operations\n"); 1347 f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40); 1348 } 1349 1350 /* 1351 * Fan monitoring can be disabled. If it is, we won't be polling 1352 * the register values, and won't create the related sysfs files. 1353 */ 1354 for (i = 0; i < 3; i++) { 1355 data->fan_ctrl[i] = f71805f_read8(data, 1356 F71805F_REG_FAN_CTRL(i)); 1357 /* 1358 * Clear latch full bit, else "speed mode" fan speed control 1359 * doesn't work 1360 */ 1361 if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) { 1362 data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL; 1363 f71805f_write8(data, F71805F_REG_FAN_CTRL(i), 1364 data->fan_ctrl[i]); 1365 } 1366 } 1367 } 1368 1369 static int f71805f_probe(struct platform_device *pdev) 1370 { 1371 struct f71805f_sio_data *sio_data = dev_get_platdata(&pdev->dev); 1372 struct f71805f_data *data; 1373 struct resource *res; 1374 int i, err; 1375 1376 static const char * const names[] = { 1377 "f71805f", 1378 "f71872f", 1379 }; 1380 1381 data = devm_kzalloc(&pdev->dev, sizeof(struct f71805f_data), 1382 GFP_KERNEL); 1383 if (!data) 1384 return -ENOMEM; 1385 1386 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1387 if (!devm_request_region(&pdev->dev, res->start + ADDR_REG_OFFSET, 2, 1388 DRVNAME)) { 1389 dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n", 1390 (unsigned long)(res->start + ADDR_REG_OFFSET), 1391 (unsigned long)(res->start + ADDR_REG_OFFSET + 1)); 1392 return -EBUSY; 1393 } 1394 data->addr = res->start; 1395 data->name = names[sio_data->kind]; 1396 mutex_init(&data->update_lock); 1397 1398 platform_set_drvdata(pdev, data); 1399 1400 /* Some voltage inputs depend on chip model and configuration */ 1401 switch (sio_data->kind) { 1402 case f71805f: 1403 data->has_in = 0x1ff; 1404 break; 1405 case f71872f: 1406 data->has_in = 0x6ef; 1407 if (sio_data->fnsel1 & 0x01) 1408 data->has_in |= (1 << 4); /* in4 */ 1409 if (sio_data->fnsel1 & 0x02) 1410 data->has_in |= (1 << 8); /* in8 */ 1411 break; 1412 } 1413 1414 /* Initialize the F71805F chip */ 1415 f71805f_init_device(data); 1416 1417 /* Register sysfs interface files */ 1418 err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group); 1419 if (err) 1420 return err; 1421 if (data->has_in & (1 << 4)) { /* in4 */ 1422 err = sysfs_create_group(&pdev->dev.kobj, 1423 &f71805f_group_optin[0]); 1424 if (err) 1425 goto exit_remove_files; 1426 } 1427 if (data->has_in & (1 << 8)) { /* in8 */ 1428 err = sysfs_create_group(&pdev->dev.kobj, 1429 &f71805f_group_optin[1]); 1430 if (err) 1431 goto exit_remove_files; 1432 } 1433 if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */ 1434 err = sysfs_create_group(&pdev->dev.kobj, 1435 &f71805f_group_optin[2]); 1436 if (err) 1437 goto exit_remove_files; 1438 } 1439 if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */ 1440 err = sysfs_create_group(&pdev->dev.kobj, 1441 &f71805f_group_optin[3]); 1442 if (err) 1443 goto exit_remove_files; 1444 } 1445 for (i = 0; i < 3; i++) { 1446 /* If control mode is PWM, create pwm_freq file */ 1447 if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) { 1448 err = sysfs_create_file(&pdev->dev.kobj, 1449 f71805f_attributes_pwm_freq[i]); 1450 if (err) 1451 goto exit_remove_files; 1452 } 1453 /* If PWM is in manual mode, add write permission */ 1454 if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) { 1455 err = sysfs_chmod_file(&pdev->dev.kobj, 1456 f71805f_attr_pwm[i], 1457 S_IRUGO | S_IWUSR); 1458 if (err) { 1459 dev_err(&pdev->dev, "chmod +w pwm%d failed\n", 1460 i + 1); 1461 goto exit_remove_files; 1462 } 1463 } 1464 } 1465 1466 data->hwmon_dev = hwmon_device_register(&pdev->dev); 1467 if (IS_ERR(data->hwmon_dev)) { 1468 err = PTR_ERR(data->hwmon_dev); 1469 dev_err(&pdev->dev, "Class registration failed (%d)\n", err); 1470 goto exit_remove_files; 1471 } 1472 1473 return 0; 1474 1475 exit_remove_files: 1476 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); 1477 for (i = 0; i < 4; i++) 1478 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); 1479 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); 1480 return err; 1481 } 1482 1483 static int f71805f_remove(struct platform_device *pdev) 1484 { 1485 struct f71805f_data *data = platform_get_drvdata(pdev); 1486 int i; 1487 1488 hwmon_device_unregister(data->hwmon_dev); 1489 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); 1490 for (i = 0; i < 4; i++) 1491 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); 1492 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); 1493 1494 return 0; 1495 } 1496 1497 static struct platform_driver f71805f_driver = { 1498 .driver = { 1499 .name = DRVNAME, 1500 }, 1501 .probe = f71805f_probe, 1502 .remove = f71805f_remove, 1503 }; 1504 1505 static int __init f71805f_device_add(unsigned short address, 1506 const struct f71805f_sio_data *sio_data) 1507 { 1508 struct resource res = { 1509 .start = address, 1510 .end = address + REGION_LENGTH - 1, 1511 .flags = IORESOURCE_IO, 1512 }; 1513 int err; 1514 1515 pdev = platform_device_alloc(DRVNAME, address); 1516 if (!pdev) { 1517 err = -ENOMEM; 1518 pr_err("Device allocation failed\n"); 1519 goto exit; 1520 } 1521 1522 res.name = pdev->name; 1523 err = acpi_check_resource_conflict(&res); 1524 if (err) 1525 goto exit_device_put; 1526 1527 err = platform_device_add_resources(pdev, &res, 1); 1528 if (err) { 1529 pr_err("Device resource addition failed (%d)\n", err); 1530 goto exit_device_put; 1531 } 1532 1533 err = platform_device_add_data(pdev, sio_data, 1534 sizeof(struct f71805f_sio_data)); 1535 if (err) { 1536 pr_err("Platform data allocation failed\n"); 1537 goto exit_device_put; 1538 } 1539 1540 err = platform_device_add(pdev); 1541 if (err) { 1542 pr_err("Device addition failed (%d)\n", err); 1543 goto exit_device_put; 1544 } 1545 1546 return 0; 1547 1548 exit_device_put: 1549 platform_device_put(pdev); 1550 exit: 1551 return err; 1552 } 1553 1554 static int __init f71805f_find(int sioaddr, unsigned short *address, 1555 struct f71805f_sio_data *sio_data) 1556 { 1557 int err; 1558 u16 devid; 1559 1560 static const char * const names[] = { 1561 "F71805F/FG", 1562 "F71872F/FG or F71806F/FG", 1563 }; 1564 1565 err = superio_enter(sioaddr); 1566 if (err) 1567 return err; 1568 1569 err = -ENODEV; 1570 devid = superio_inw(sioaddr, SIO_REG_MANID); 1571 if (devid != SIO_FINTEK_ID) 1572 goto exit; 1573 1574 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID); 1575 switch (devid) { 1576 case SIO_F71805F_ID: 1577 sio_data->kind = f71805f; 1578 break; 1579 case SIO_F71872F_ID: 1580 sio_data->kind = f71872f; 1581 sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1); 1582 break; 1583 default: 1584 pr_info("Unsupported Fintek device, skipping\n"); 1585 goto exit; 1586 } 1587 1588 superio_select(sioaddr, F71805F_LD_HWM); 1589 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { 1590 pr_warn("Device not activated, skipping\n"); 1591 goto exit; 1592 } 1593 1594 *address = superio_inw(sioaddr, SIO_REG_ADDR); 1595 if (*address == 0) { 1596 pr_warn("Base address not set, skipping\n"); 1597 goto exit; 1598 } 1599 *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */ 1600 1601 err = 0; 1602 pr_info("Found %s chip at %#x, revision %u\n", 1603 names[sio_data->kind], *address, 1604 superio_inb(sioaddr, SIO_REG_DEVREV)); 1605 1606 exit: 1607 superio_exit(sioaddr); 1608 return err; 1609 } 1610 1611 static int __init f71805f_init(void) 1612 { 1613 int err; 1614 unsigned short address; 1615 struct f71805f_sio_data sio_data; 1616 1617 if (f71805f_find(0x2e, &address, &sio_data) 1618 && f71805f_find(0x4e, &address, &sio_data)) 1619 return -ENODEV; 1620 1621 err = platform_driver_register(&f71805f_driver); 1622 if (err) 1623 goto exit; 1624 1625 /* Sets global pdev as a side effect */ 1626 err = f71805f_device_add(address, &sio_data); 1627 if (err) 1628 goto exit_driver; 1629 1630 return 0; 1631 1632 exit_driver: 1633 platform_driver_unregister(&f71805f_driver); 1634 exit: 1635 return err; 1636 } 1637 1638 static void __exit f71805f_exit(void) 1639 { 1640 platform_device_unregister(pdev); 1641 platform_driver_unregister(&f71805f_driver); 1642 } 1643 1644 MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>"); 1645 MODULE_LICENSE("GPL"); 1646 MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver"); 1647 1648 module_init(f71805f_init); 1649 module_exit(f71805f_exit); 1650