1 /* 2 * dme1737.c - Driver for the SMSC DME1737, Asus A8000, SMSC SCH311x and 3 * SCH5027 Super-I/O chips integrated hardware monitoring features. 4 * Copyright (c) 2007, 2008 Juerg Haefliger <juergh@gmail.com> 5 * 6 * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access 7 * the chip registers if a DME1737, A8000, or SCH5027 is found and the ISA bus 8 * if a SCH311x chip is found. Both types of chips have very similar hardware 9 * monitoring capabilities but differ in the way they can be accessed. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 */ 25 26 #include <linux/module.h> 27 #include <linux/init.h> 28 #include <linux/slab.h> 29 #include <linux/jiffies.h> 30 #include <linux/i2c.h> 31 #include <linux/platform_device.h> 32 #include <linux/hwmon.h> 33 #include <linux/hwmon-sysfs.h> 34 #include <linux/hwmon-vid.h> 35 #include <linux/err.h> 36 #include <linux/mutex.h> 37 #include <linux/acpi.h> 38 #include <linux/io.h> 39 40 /* ISA device, if found */ 41 static struct platform_device *pdev; 42 43 /* Module load parameters */ 44 static int force_start; 45 module_param(force_start, bool, 0); 46 MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs"); 47 48 static unsigned short force_id; 49 module_param(force_id, ushort, 0); 50 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 51 52 static int probe_all_addr; 53 module_param(probe_all_addr, bool, 0); 54 MODULE_PARM_DESC(probe_all_addr, "Include probing of non-standard LPC " 55 "addresses"); 56 57 /* Addresses to scan */ 58 static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END}; 59 60 enum chips { dme1737, sch5027, sch311x }; 61 62 /* --------------------------------------------------------------------- 63 * Registers 64 * 65 * The sensors are defined as follows: 66 * 67 * Voltages Temperatures 68 * -------- ------------ 69 * in0 +5VTR (+5V stdby) temp1 Remote diode 1 70 * in1 Vccp (proc core) temp2 Internal temp 71 * in2 VCC (internal +3.3V) temp3 Remote diode 2 72 * in3 +5V 73 * in4 +12V 74 * in5 VTR (+3.3V stby) 75 * in6 Vbat 76 * 77 * --------------------------------------------------------------------- */ 78 79 /* Voltages (in) numbered 0-6 (ix) */ 80 #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \ 81 : 0x94 + (ix)) 82 #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \ 83 : 0x91 + (ix) * 2) 84 #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \ 85 : 0x92 + (ix) * 2) 86 87 /* Temperatures (temp) numbered 0-2 (ix) */ 88 #define DME1737_REG_TEMP(ix) (0x25 + (ix)) 89 #define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2) 90 #define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2) 91 #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \ 92 : 0x1c + (ix)) 93 94 /* Voltage and temperature LSBs 95 * The LSBs (4 bits each) are stored in 5 registers with the following layouts: 96 * IN_TEMP_LSB(0) = [in5, in6] 97 * IN_TEMP_LSB(1) = [temp3, temp1] 98 * IN_TEMP_LSB(2) = [in4, temp2] 99 * IN_TEMP_LSB(3) = [in3, in0] 100 * IN_TEMP_LSB(4) = [in2, in1] */ 101 #define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix)) 102 static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0}; 103 static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4}; 104 static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1}; 105 static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0}; 106 107 /* Fans numbered 0-5 (ix) */ 108 #define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \ 109 : 0xa1 + (ix) * 2) 110 #define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \ 111 : 0xa5 + (ix) * 2) 112 #define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \ 113 : 0xb2 + (ix)) 114 #define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */ 115 116 /* PWMs numbered 0-2, 4-5 (ix) */ 117 #define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \ 118 : 0xa1 + (ix)) 119 #define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */ 120 #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */ 121 #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \ 122 : 0xa3 + (ix)) 123 /* The layout of the ramp rate registers is different from the other pwm 124 * registers. The bits for the 3 PWMs are stored in 2 registers: 125 * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0] 126 * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */ 127 #define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */ 128 129 /* Thermal zones 0-2 */ 130 #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix)) 131 #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix)) 132 /* The layout of the hysteresis registers is different from the other zone 133 * registers. The bits for the 3 zones are stored in 2 registers: 134 * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] 135 * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */ 136 #define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix)) 137 138 /* Alarm registers and bit mapping 139 * The 3 8-bit alarm registers will be concatenated to a single 32-bit 140 * alarm value [0, ALARM3, ALARM2, ALARM1]. */ 141 #define DME1737_REG_ALARM1 0x41 142 #define DME1737_REG_ALARM2 0x42 143 #define DME1737_REG_ALARM3 0x83 144 static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17}; 145 static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6}; 146 static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23}; 147 148 /* Miscellaneous registers */ 149 #define DME1737_REG_DEVICE 0x3d 150 #define DME1737_REG_COMPANY 0x3e 151 #define DME1737_REG_VERSTEP 0x3f 152 #define DME1737_REG_CONFIG 0x40 153 #define DME1737_REG_CONFIG2 0x7f 154 #define DME1737_REG_VID 0x43 155 #define DME1737_REG_TACH_PWM 0x81 156 157 /* --------------------------------------------------------------------- 158 * Misc defines 159 * --------------------------------------------------------------------- */ 160 161 /* Chip identification */ 162 #define DME1737_COMPANY_SMSC 0x5c 163 #define DME1737_VERSTEP 0x88 164 #define DME1737_VERSTEP_MASK 0xf8 165 #define SCH311X_DEVICE 0x8c 166 #define SCH5027_VERSTEP 0x69 167 168 /* Length of ISA address segment */ 169 #define DME1737_EXTENT 2 170 171 /* --------------------------------------------------------------------- 172 * Data structures and manipulation thereof 173 * --------------------------------------------------------------------- */ 174 175 struct dme1737_data { 176 struct i2c_client *client; /* for I2C devices only */ 177 struct device *hwmon_dev; 178 const char *name; 179 unsigned int addr; /* for ISA devices only */ 180 181 struct mutex update_lock; 182 int valid; /* !=0 if following fields are valid */ 183 unsigned long last_update; /* in jiffies */ 184 unsigned long last_vbat; /* in jiffies */ 185 enum chips type; 186 const int *in_nominal; /* pointer to IN_NOMINAL array */ 187 188 u8 vid; 189 u8 pwm_rr_en; 190 u8 has_pwm; 191 u8 has_fan; 192 193 /* Register values */ 194 u16 in[7]; 195 u8 in_min[7]; 196 u8 in_max[7]; 197 s16 temp[3]; 198 s8 temp_min[3]; 199 s8 temp_max[3]; 200 s8 temp_offset[3]; 201 u8 config; 202 u8 config2; 203 u8 vrm; 204 u16 fan[6]; 205 u16 fan_min[6]; 206 u8 fan_max[2]; 207 u8 fan_opt[6]; 208 u8 pwm[6]; 209 u8 pwm_min[3]; 210 u8 pwm_config[3]; 211 u8 pwm_acz[3]; 212 u8 pwm_freq[6]; 213 u8 pwm_rr[2]; 214 u8 zone_low[3]; 215 u8 zone_abs[3]; 216 u8 zone_hyst[2]; 217 u32 alarms; 218 }; 219 220 /* Nominal voltage values */ 221 static const int IN_NOMINAL_DME1737[] = {5000, 2250, 3300, 5000, 12000, 3300, 222 3300}; 223 static const int IN_NOMINAL_SCH311x[] = {2500, 1500, 3300, 5000, 12000, 3300, 224 3300}; 225 static const int IN_NOMINAL_SCH5027[] = {5000, 2250, 3300, 1125, 1125, 3300, 226 3300}; 227 #define IN_NOMINAL(type) ((type) == sch311x ? IN_NOMINAL_SCH311x : \ 228 (type) == sch5027 ? IN_NOMINAL_SCH5027 : \ 229 IN_NOMINAL_DME1737) 230 231 /* Voltage input 232 * Voltage inputs have 16 bits resolution, limit values have 8 bits 233 * resolution. */ 234 static inline int IN_FROM_REG(int reg, int nominal, int res) 235 { 236 return (reg * nominal + (3 << (res - 3))) / (3 << (res - 2)); 237 } 238 239 static inline int IN_TO_REG(int val, int nominal) 240 { 241 return SENSORS_LIMIT((val * 192 + nominal / 2) / nominal, 0, 255); 242 } 243 244 /* Temperature input 245 * The register values represent temperatures in 2's complement notation from 246 * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit 247 * values have 8 bits resolution. */ 248 static inline int TEMP_FROM_REG(int reg, int res) 249 { 250 return (reg * 1000) >> (res - 8); 251 } 252 253 static inline int TEMP_TO_REG(int val) 254 { 255 return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000, 256 -128, 127); 257 } 258 259 /* Temperature range */ 260 static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000, 261 10000, 13333, 16000, 20000, 26666, 32000, 262 40000, 53333, 80000}; 263 264 static inline int TEMP_RANGE_FROM_REG(int reg) 265 { 266 return TEMP_RANGE[(reg >> 4) & 0x0f]; 267 } 268 269 static int TEMP_RANGE_TO_REG(int val, int reg) 270 { 271 int i; 272 273 for (i = 15; i > 0; i--) { 274 if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) { 275 break; 276 } 277 } 278 279 return (reg & 0x0f) | (i << 4); 280 } 281 282 /* Temperature hysteresis 283 * Register layout: 284 * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] 285 * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */ 286 static inline int TEMP_HYST_FROM_REG(int reg, int ix) 287 { 288 return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000; 289 } 290 291 static inline int TEMP_HYST_TO_REG(int val, int ix, int reg) 292 { 293 int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15); 294 295 return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4); 296 } 297 298 /* Fan input RPM */ 299 static inline int FAN_FROM_REG(int reg, int tpc) 300 { 301 if (tpc) { 302 return tpc * reg; 303 } else { 304 return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg; 305 } 306 } 307 308 static inline int FAN_TO_REG(int val, int tpc) 309 { 310 if (tpc) { 311 return SENSORS_LIMIT(val / tpc, 0, 0xffff); 312 } else { 313 return (val <= 0) ? 0xffff : 314 SENSORS_LIMIT(90000 * 60 / val, 0, 0xfffe); 315 } 316 } 317 318 /* Fan TPC (tach pulse count) 319 * Converts a register value to a TPC multiplier or returns 0 if the tachometer 320 * is configured in legacy (non-tpc) mode */ 321 static inline int FAN_TPC_FROM_REG(int reg) 322 { 323 return (reg & 0x20) ? 0 : 60 >> (reg & 0x03); 324 } 325 326 /* Fan type 327 * The type of a fan is expressed in number of pulses-per-revolution that it 328 * emits */ 329 static inline int FAN_TYPE_FROM_REG(int reg) 330 { 331 int edge = (reg >> 1) & 0x03; 332 333 return (edge > 0) ? 1 << (edge - 1) : 0; 334 } 335 336 static inline int FAN_TYPE_TO_REG(int val, int reg) 337 { 338 int edge = (val == 4) ? 3 : val; 339 340 return (reg & 0xf9) | (edge << 1); 341 } 342 343 /* Fan max RPM */ 344 static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12, 345 0x11, 0x0f, 0x0e}; 346 347 static int FAN_MAX_FROM_REG(int reg) 348 { 349 int i; 350 351 for (i = 10; i > 0; i--) { 352 if (reg == FAN_MAX[i]) { 353 break; 354 } 355 } 356 357 return 1000 + i * 500; 358 } 359 360 static int FAN_MAX_TO_REG(int val) 361 { 362 int i; 363 364 for (i = 10; i > 0; i--) { 365 if (val > (1000 + (i - 1) * 500)) { 366 break; 367 } 368 } 369 370 return FAN_MAX[i]; 371 } 372 373 /* PWM enable 374 * Register to enable mapping: 375 * 000: 2 fan on zone 1 auto 376 * 001: 2 fan on zone 2 auto 377 * 010: 2 fan on zone 3 auto 378 * 011: 0 fan full on 379 * 100: -1 fan disabled 380 * 101: 2 fan on hottest of zones 2,3 auto 381 * 110: 2 fan on hottest of zones 1,2,3 auto 382 * 111: 1 fan in manual mode */ 383 static inline int PWM_EN_FROM_REG(int reg) 384 { 385 static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1}; 386 387 return en[(reg >> 5) & 0x07]; 388 } 389 390 static inline int PWM_EN_TO_REG(int val, int reg) 391 { 392 int en = (val == 1) ? 7 : 3; 393 394 return (reg & 0x1f) | ((en & 0x07) << 5); 395 } 396 397 /* PWM auto channels zone 398 * Register to auto channels zone mapping (ACZ is a bitfield with bit x 399 * corresponding to zone x+1): 400 * 000: 001 fan on zone 1 auto 401 * 001: 010 fan on zone 2 auto 402 * 010: 100 fan on zone 3 auto 403 * 011: 000 fan full on 404 * 100: 000 fan disabled 405 * 101: 110 fan on hottest of zones 2,3 auto 406 * 110: 111 fan on hottest of zones 1,2,3 auto 407 * 111: 000 fan in manual mode */ 408 static inline int PWM_ACZ_FROM_REG(int reg) 409 { 410 static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0}; 411 412 return acz[(reg >> 5) & 0x07]; 413 } 414 415 static inline int PWM_ACZ_TO_REG(int val, int reg) 416 { 417 int acz = (val == 4) ? 2 : val - 1; 418 419 return (reg & 0x1f) | ((acz & 0x07) << 5); 420 } 421 422 /* PWM frequency */ 423 static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88, 424 15000, 20000, 30000, 25000, 0, 0, 0, 0}; 425 426 static inline int PWM_FREQ_FROM_REG(int reg) 427 { 428 return PWM_FREQ[reg & 0x0f]; 429 } 430 431 static int PWM_FREQ_TO_REG(int val, int reg) 432 { 433 int i; 434 435 /* the first two cases are special - stupid chip design! */ 436 if (val > 27500) { 437 i = 10; 438 } else if (val > 22500) { 439 i = 11; 440 } else { 441 for (i = 9; i > 0; i--) { 442 if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) { 443 break; 444 } 445 } 446 } 447 448 return (reg & 0xf0) | i; 449 } 450 451 /* PWM ramp rate 452 * Register layout: 453 * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0] 454 * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */ 455 static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5}; 456 457 static inline int PWM_RR_FROM_REG(int reg, int ix) 458 { 459 int rr = (ix == 1) ? reg >> 4 : reg; 460 461 return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0; 462 } 463 464 static int PWM_RR_TO_REG(int val, int ix, int reg) 465 { 466 int i; 467 468 for (i = 0; i < 7; i++) { 469 if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) { 470 break; 471 } 472 } 473 474 return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i; 475 } 476 477 /* PWM ramp rate enable */ 478 static inline int PWM_RR_EN_FROM_REG(int reg, int ix) 479 { 480 return PWM_RR_FROM_REG(reg, ix) ? 1 : 0; 481 } 482 483 static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg) 484 { 485 int en = (ix == 1) ? 0x80 : 0x08; 486 487 return val ? reg | en : reg & ~en; 488 } 489 490 /* PWM min/off 491 * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for 492 * the register layout). */ 493 static inline int PWM_OFF_FROM_REG(int reg, int ix) 494 { 495 return (reg >> (ix + 5)) & 0x01; 496 } 497 498 static inline int PWM_OFF_TO_REG(int val, int ix, int reg) 499 { 500 return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5)); 501 } 502 503 /* --------------------------------------------------------------------- 504 * Device I/O access 505 * 506 * ISA access is performed through an index/data register pair and needs to 507 * be protected by a mutex during runtime (not required for initialization). 508 * We use data->update_lock for this and need to ensure that we acquire it 509 * before calling dme1737_read or dme1737_write. 510 * --------------------------------------------------------------------- */ 511 512 static u8 dme1737_read(const struct dme1737_data *data, u8 reg) 513 { 514 struct i2c_client *client = data->client; 515 s32 val; 516 517 if (client) { /* I2C device */ 518 val = i2c_smbus_read_byte_data(client, reg); 519 520 if (val < 0) { 521 dev_warn(&client->dev, "Read from register " 522 "0x%02x failed! Please report to the driver " 523 "maintainer.\n", reg); 524 } 525 } else { /* ISA device */ 526 outb(reg, data->addr); 527 val = inb(data->addr + 1); 528 } 529 530 return val; 531 } 532 533 static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val) 534 { 535 struct i2c_client *client = data->client; 536 s32 res = 0; 537 538 if (client) { /* I2C device */ 539 res = i2c_smbus_write_byte_data(client, reg, val); 540 541 if (res < 0) { 542 dev_warn(&client->dev, "Write to register " 543 "0x%02x failed! Please report to the driver " 544 "maintainer.\n", reg); 545 } 546 } else { /* ISA device */ 547 outb(reg, data->addr); 548 outb(val, data->addr + 1); 549 } 550 551 return res; 552 } 553 554 static struct dme1737_data *dme1737_update_device(struct device *dev) 555 { 556 struct dme1737_data *data = dev_get_drvdata(dev); 557 int ix; 558 u8 lsb[5]; 559 560 mutex_lock(&data->update_lock); 561 562 /* Enable a Vbat monitoring cycle every 10 mins */ 563 if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) { 564 dme1737_write(data, DME1737_REG_CONFIG, dme1737_read(data, 565 DME1737_REG_CONFIG) | 0x10); 566 data->last_vbat = jiffies; 567 } 568 569 /* Sample register contents every 1 sec */ 570 if (time_after(jiffies, data->last_update + HZ) || !data->valid) { 571 if (data->type == dme1737) { 572 data->vid = dme1737_read(data, DME1737_REG_VID) & 573 0x3f; 574 } 575 576 /* In (voltage) registers */ 577 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { 578 /* Voltage inputs are stored as 16 bit values even 579 * though they have only 12 bits resolution. This is 580 * to make it consistent with the temp inputs. */ 581 data->in[ix] = dme1737_read(data, 582 DME1737_REG_IN(ix)) << 8; 583 data->in_min[ix] = dme1737_read(data, 584 DME1737_REG_IN_MIN(ix)); 585 data->in_max[ix] = dme1737_read(data, 586 DME1737_REG_IN_MAX(ix)); 587 } 588 589 /* Temp registers */ 590 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { 591 /* Temp inputs are stored as 16 bit values even 592 * though they have only 12 bits resolution. This is 593 * to take advantage of implicit conversions between 594 * register values (2's complement) and temp values 595 * (signed decimal). */ 596 data->temp[ix] = dme1737_read(data, 597 DME1737_REG_TEMP(ix)) << 8; 598 data->temp_min[ix] = dme1737_read(data, 599 DME1737_REG_TEMP_MIN(ix)); 600 data->temp_max[ix] = dme1737_read(data, 601 DME1737_REG_TEMP_MAX(ix)); 602 if (data->type != sch5027) { 603 data->temp_offset[ix] = dme1737_read(data, 604 DME1737_REG_TEMP_OFFSET(ix)); 605 } 606 } 607 608 /* In and temp LSB registers 609 * The LSBs are latched when the MSBs are read, so the order in 610 * which the registers are read (MSB first, then LSB) is 611 * important! */ 612 for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) { 613 lsb[ix] = dme1737_read(data, 614 DME1737_REG_IN_TEMP_LSB(ix)); 615 } 616 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { 617 data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] << 618 DME1737_REG_IN_LSB_SHL[ix]) & 0xf0; 619 } 620 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { 621 data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] << 622 DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0; 623 } 624 625 /* Fan registers */ 626 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) { 627 /* Skip reading registers if optional fans are not 628 * present */ 629 if (!(data->has_fan & (1 << ix))) { 630 continue; 631 } 632 data->fan[ix] = dme1737_read(data, 633 DME1737_REG_FAN(ix)); 634 data->fan[ix] |= dme1737_read(data, 635 DME1737_REG_FAN(ix) + 1) << 8; 636 data->fan_min[ix] = dme1737_read(data, 637 DME1737_REG_FAN_MIN(ix)); 638 data->fan_min[ix] |= dme1737_read(data, 639 DME1737_REG_FAN_MIN(ix) + 1) << 8; 640 data->fan_opt[ix] = dme1737_read(data, 641 DME1737_REG_FAN_OPT(ix)); 642 /* fan_max exists only for fan[5-6] */ 643 if (ix > 3) { 644 data->fan_max[ix - 4] = dme1737_read(data, 645 DME1737_REG_FAN_MAX(ix)); 646 } 647 } 648 649 /* PWM registers */ 650 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) { 651 /* Skip reading registers if optional PWMs are not 652 * present */ 653 if (!(data->has_pwm & (1 << ix))) { 654 continue; 655 } 656 data->pwm[ix] = dme1737_read(data, 657 DME1737_REG_PWM(ix)); 658 data->pwm_freq[ix] = dme1737_read(data, 659 DME1737_REG_PWM_FREQ(ix)); 660 /* pwm_config and pwm_min exist only for pwm[1-3] */ 661 if (ix < 3) { 662 data->pwm_config[ix] = dme1737_read(data, 663 DME1737_REG_PWM_CONFIG(ix)); 664 data->pwm_min[ix] = dme1737_read(data, 665 DME1737_REG_PWM_MIN(ix)); 666 } 667 } 668 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) { 669 data->pwm_rr[ix] = dme1737_read(data, 670 DME1737_REG_PWM_RR(ix)); 671 } 672 673 /* Thermal zone registers */ 674 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) { 675 data->zone_low[ix] = dme1737_read(data, 676 DME1737_REG_ZONE_LOW(ix)); 677 data->zone_abs[ix] = dme1737_read(data, 678 DME1737_REG_ZONE_ABS(ix)); 679 } 680 if (data->type != sch5027) { 681 for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) { 682 data->zone_hyst[ix] = dme1737_read(data, 683 DME1737_REG_ZONE_HYST(ix)); 684 } 685 } 686 687 /* Alarm registers */ 688 data->alarms = dme1737_read(data, 689 DME1737_REG_ALARM1); 690 /* Bit 7 tells us if the other alarm registers are non-zero and 691 * therefore also need to be read */ 692 if (data->alarms & 0x80) { 693 data->alarms |= dme1737_read(data, 694 DME1737_REG_ALARM2) << 8; 695 data->alarms |= dme1737_read(data, 696 DME1737_REG_ALARM3) << 16; 697 } 698 699 /* The ISA chips require explicit clearing of alarm bits. 700 * Don't worry, an alarm will come back if the condition 701 * that causes it still exists */ 702 if (!data->client) { 703 if (data->alarms & 0xff0000) { 704 dme1737_write(data, DME1737_REG_ALARM3, 705 0xff); 706 } 707 if (data->alarms & 0xff00) { 708 dme1737_write(data, DME1737_REG_ALARM2, 709 0xff); 710 } 711 if (data->alarms & 0xff) { 712 dme1737_write(data, DME1737_REG_ALARM1, 713 0xff); 714 } 715 } 716 717 data->last_update = jiffies; 718 data->valid = 1; 719 } 720 721 mutex_unlock(&data->update_lock); 722 723 return data; 724 } 725 726 /* --------------------------------------------------------------------- 727 * Voltage sysfs attributes 728 * ix = [0-5] 729 * --------------------------------------------------------------------- */ 730 731 #define SYS_IN_INPUT 0 732 #define SYS_IN_MIN 1 733 #define SYS_IN_MAX 2 734 #define SYS_IN_ALARM 3 735 736 static ssize_t show_in(struct device *dev, struct device_attribute *attr, 737 char *buf) 738 { 739 struct dme1737_data *data = dme1737_update_device(dev); 740 struct sensor_device_attribute_2 741 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 742 int ix = sensor_attr_2->index; 743 int fn = sensor_attr_2->nr; 744 int res; 745 746 switch (fn) { 747 case SYS_IN_INPUT: 748 res = IN_FROM_REG(data->in[ix], data->in_nominal[ix], 16); 749 break; 750 case SYS_IN_MIN: 751 res = IN_FROM_REG(data->in_min[ix], data->in_nominal[ix], 8); 752 break; 753 case SYS_IN_MAX: 754 res = IN_FROM_REG(data->in_max[ix], data->in_nominal[ix], 8); 755 break; 756 case SYS_IN_ALARM: 757 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01; 758 break; 759 default: 760 res = 0; 761 dev_dbg(dev, "Unknown function %d.\n", fn); 762 } 763 764 return sprintf(buf, "%d\n", res); 765 } 766 767 static ssize_t set_in(struct device *dev, struct device_attribute *attr, 768 const char *buf, size_t count) 769 { 770 struct dme1737_data *data = dev_get_drvdata(dev); 771 struct sensor_device_attribute_2 772 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 773 int ix = sensor_attr_2->index; 774 int fn = sensor_attr_2->nr; 775 long val = simple_strtol(buf, NULL, 10); 776 777 mutex_lock(&data->update_lock); 778 switch (fn) { 779 case SYS_IN_MIN: 780 data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]); 781 dme1737_write(data, DME1737_REG_IN_MIN(ix), 782 data->in_min[ix]); 783 break; 784 case SYS_IN_MAX: 785 data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]); 786 dme1737_write(data, DME1737_REG_IN_MAX(ix), 787 data->in_max[ix]); 788 break; 789 default: 790 dev_dbg(dev, "Unknown function %d.\n", fn); 791 } 792 mutex_unlock(&data->update_lock); 793 794 return count; 795 } 796 797 /* --------------------------------------------------------------------- 798 * Temperature sysfs attributes 799 * ix = [0-2] 800 * --------------------------------------------------------------------- */ 801 802 #define SYS_TEMP_INPUT 0 803 #define SYS_TEMP_MIN 1 804 #define SYS_TEMP_MAX 2 805 #define SYS_TEMP_OFFSET 3 806 #define SYS_TEMP_ALARM 4 807 #define SYS_TEMP_FAULT 5 808 809 static ssize_t show_temp(struct device *dev, struct device_attribute *attr, 810 char *buf) 811 { 812 struct dme1737_data *data = dme1737_update_device(dev); 813 struct sensor_device_attribute_2 814 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 815 int ix = sensor_attr_2->index; 816 int fn = sensor_attr_2->nr; 817 int res; 818 819 switch (fn) { 820 case SYS_TEMP_INPUT: 821 res = TEMP_FROM_REG(data->temp[ix], 16); 822 break; 823 case SYS_TEMP_MIN: 824 res = TEMP_FROM_REG(data->temp_min[ix], 8); 825 break; 826 case SYS_TEMP_MAX: 827 res = TEMP_FROM_REG(data->temp_max[ix], 8); 828 break; 829 case SYS_TEMP_OFFSET: 830 res = TEMP_FROM_REG(data->temp_offset[ix], 8); 831 break; 832 case SYS_TEMP_ALARM: 833 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01; 834 break; 835 case SYS_TEMP_FAULT: 836 res = (((u16)data->temp[ix] & 0xff00) == 0x8000); 837 break; 838 default: 839 res = 0; 840 dev_dbg(dev, "Unknown function %d.\n", fn); 841 } 842 843 return sprintf(buf, "%d\n", res); 844 } 845 846 static ssize_t set_temp(struct device *dev, struct device_attribute *attr, 847 const char *buf, size_t count) 848 { 849 struct dme1737_data *data = dev_get_drvdata(dev); 850 struct sensor_device_attribute_2 851 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 852 int ix = sensor_attr_2->index; 853 int fn = sensor_attr_2->nr; 854 long val = simple_strtol(buf, NULL, 10); 855 856 mutex_lock(&data->update_lock); 857 switch (fn) { 858 case SYS_TEMP_MIN: 859 data->temp_min[ix] = TEMP_TO_REG(val); 860 dme1737_write(data, DME1737_REG_TEMP_MIN(ix), 861 data->temp_min[ix]); 862 break; 863 case SYS_TEMP_MAX: 864 data->temp_max[ix] = TEMP_TO_REG(val); 865 dme1737_write(data, DME1737_REG_TEMP_MAX(ix), 866 data->temp_max[ix]); 867 break; 868 case SYS_TEMP_OFFSET: 869 data->temp_offset[ix] = TEMP_TO_REG(val); 870 dme1737_write(data, DME1737_REG_TEMP_OFFSET(ix), 871 data->temp_offset[ix]); 872 break; 873 default: 874 dev_dbg(dev, "Unknown function %d.\n", fn); 875 } 876 mutex_unlock(&data->update_lock); 877 878 return count; 879 } 880 881 /* --------------------------------------------------------------------- 882 * Zone sysfs attributes 883 * ix = [0-2] 884 * --------------------------------------------------------------------- */ 885 886 #define SYS_ZONE_AUTO_CHANNELS_TEMP 0 887 #define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1 888 #define SYS_ZONE_AUTO_POINT1_TEMP 2 889 #define SYS_ZONE_AUTO_POINT2_TEMP 3 890 #define SYS_ZONE_AUTO_POINT3_TEMP 4 891 892 static ssize_t show_zone(struct device *dev, struct device_attribute *attr, 893 char *buf) 894 { 895 struct dme1737_data *data = dme1737_update_device(dev); 896 struct sensor_device_attribute_2 897 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 898 int ix = sensor_attr_2->index; 899 int fn = sensor_attr_2->nr; 900 int res; 901 902 switch (fn) { 903 case SYS_ZONE_AUTO_CHANNELS_TEMP: 904 /* check config2 for non-standard temp-to-zone mapping */ 905 if ((ix == 1) && (data->config2 & 0x02)) { 906 res = 4; 907 } else { 908 res = 1 << ix; 909 } 910 break; 911 case SYS_ZONE_AUTO_POINT1_TEMP_HYST: 912 res = TEMP_FROM_REG(data->zone_low[ix], 8) - 913 TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix); 914 break; 915 case SYS_ZONE_AUTO_POINT1_TEMP: 916 res = TEMP_FROM_REG(data->zone_low[ix], 8); 917 break; 918 case SYS_ZONE_AUTO_POINT2_TEMP: 919 /* pwm_freq holds the temp range bits in the upper nibble */ 920 res = TEMP_FROM_REG(data->zone_low[ix], 8) + 921 TEMP_RANGE_FROM_REG(data->pwm_freq[ix]); 922 break; 923 case SYS_ZONE_AUTO_POINT3_TEMP: 924 res = TEMP_FROM_REG(data->zone_abs[ix], 8); 925 break; 926 default: 927 res = 0; 928 dev_dbg(dev, "Unknown function %d.\n", fn); 929 } 930 931 return sprintf(buf, "%d\n", res); 932 } 933 934 static ssize_t set_zone(struct device *dev, struct device_attribute *attr, 935 const char *buf, size_t count) 936 { 937 struct dme1737_data *data = dev_get_drvdata(dev); 938 struct sensor_device_attribute_2 939 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 940 int ix = sensor_attr_2->index; 941 int fn = sensor_attr_2->nr; 942 long val = simple_strtol(buf, NULL, 10); 943 944 mutex_lock(&data->update_lock); 945 switch (fn) { 946 case SYS_ZONE_AUTO_POINT1_TEMP_HYST: 947 /* Refresh the cache */ 948 data->zone_low[ix] = dme1737_read(data, 949 DME1737_REG_ZONE_LOW(ix)); 950 /* Modify the temp hyst value */ 951 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG( 952 TEMP_FROM_REG(data->zone_low[ix], 8) - 953 val, ix, dme1737_read(data, 954 DME1737_REG_ZONE_HYST(ix == 2))); 955 dme1737_write(data, DME1737_REG_ZONE_HYST(ix == 2), 956 data->zone_hyst[ix == 2]); 957 break; 958 case SYS_ZONE_AUTO_POINT1_TEMP: 959 data->zone_low[ix] = TEMP_TO_REG(val); 960 dme1737_write(data, DME1737_REG_ZONE_LOW(ix), 961 data->zone_low[ix]); 962 break; 963 case SYS_ZONE_AUTO_POINT2_TEMP: 964 /* Refresh the cache */ 965 data->zone_low[ix] = dme1737_read(data, 966 DME1737_REG_ZONE_LOW(ix)); 967 /* Modify the temp range value (which is stored in the upper 968 * nibble of the pwm_freq register) */ 969 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - 970 TEMP_FROM_REG(data->zone_low[ix], 8), 971 dme1737_read(data, 972 DME1737_REG_PWM_FREQ(ix))); 973 dme1737_write(data, DME1737_REG_PWM_FREQ(ix), 974 data->pwm_freq[ix]); 975 break; 976 case SYS_ZONE_AUTO_POINT3_TEMP: 977 data->zone_abs[ix] = TEMP_TO_REG(val); 978 dme1737_write(data, DME1737_REG_ZONE_ABS(ix), 979 data->zone_abs[ix]); 980 break; 981 default: 982 dev_dbg(dev, "Unknown function %d.\n", fn); 983 } 984 mutex_unlock(&data->update_lock); 985 986 return count; 987 } 988 989 /* --------------------------------------------------------------------- 990 * Fan sysfs attributes 991 * ix = [0-5] 992 * --------------------------------------------------------------------- */ 993 994 #define SYS_FAN_INPUT 0 995 #define SYS_FAN_MIN 1 996 #define SYS_FAN_MAX 2 997 #define SYS_FAN_ALARM 3 998 #define SYS_FAN_TYPE 4 999 1000 static ssize_t show_fan(struct device *dev, struct device_attribute *attr, 1001 char *buf) 1002 { 1003 struct dme1737_data *data = dme1737_update_device(dev); 1004 struct sensor_device_attribute_2 1005 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 1006 int ix = sensor_attr_2->index; 1007 int fn = sensor_attr_2->nr; 1008 int res; 1009 1010 switch (fn) { 1011 case SYS_FAN_INPUT: 1012 res = FAN_FROM_REG(data->fan[ix], 1013 ix < 4 ? 0 : 1014 FAN_TPC_FROM_REG(data->fan_opt[ix])); 1015 break; 1016 case SYS_FAN_MIN: 1017 res = FAN_FROM_REG(data->fan_min[ix], 1018 ix < 4 ? 0 : 1019 FAN_TPC_FROM_REG(data->fan_opt[ix])); 1020 break; 1021 case SYS_FAN_MAX: 1022 /* only valid for fan[5-6] */ 1023 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]); 1024 break; 1025 case SYS_FAN_ALARM: 1026 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01; 1027 break; 1028 case SYS_FAN_TYPE: 1029 /* only valid for fan[1-4] */ 1030 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]); 1031 break; 1032 default: 1033 res = 0; 1034 dev_dbg(dev, "Unknown function %d.\n", fn); 1035 } 1036 1037 return sprintf(buf, "%d\n", res); 1038 } 1039 1040 static ssize_t set_fan(struct device *dev, struct device_attribute *attr, 1041 const char *buf, size_t count) 1042 { 1043 struct dme1737_data *data = dev_get_drvdata(dev); 1044 struct sensor_device_attribute_2 1045 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 1046 int ix = sensor_attr_2->index; 1047 int fn = sensor_attr_2->nr; 1048 long val = simple_strtol(buf, NULL, 10); 1049 1050 mutex_lock(&data->update_lock); 1051 switch (fn) { 1052 case SYS_FAN_MIN: 1053 if (ix < 4) { 1054 data->fan_min[ix] = FAN_TO_REG(val, 0); 1055 } else { 1056 /* Refresh the cache */ 1057 data->fan_opt[ix] = dme1737_read(data, 1058 DME1737_REG_FAN_OPT(ix)); 1059 /* Modify the fan min value */ 1060 data->fan_min[ix] = FAN_TO_REG(val, 1061 FAN_TPC_FROM_REG(data->fan_opt[ix])); 1062 } 1063 dme1737_write(data, DME1737_REG_FAN_MIN(ix), 1064 data->fan_min[ix] & 0xff); 1065 dme1737_write(data, DME1737_REG_FAN_MIN(ix) + 1, 1066 data->fan_min[ix] >> 8); 1067 break; 1068 case SYS_FAN_MAX: 1069 /* Only valid for fan[5-6] */ 1070 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val); 1071 dme1737_write(data, DME1737_REG_FAN_MAX(ix), 1072 data->fan_max[ix - 4]); 1073 break; 1074 case SYS_FAN_TYPE: 1075 /* Only valid for fan[1-4] */ 1076 if (!(val == 1 || val == 2 || val == 4)) { 1077 count = -EINVAL; 1078 dev_warn(dev, "Fan type value %ld not " 1079 "supported. Choose one of 1, 2, or 4.\n", 1080 val); 1081 goto exit; 1082 } 1083 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(data, 1084 DME1737_REG_FAN_OPT(ix))); 1085 dme1737_write(data, DME1737_REG_FAN_OPT(ix), 1086 data->fan_opt[ix]); 1087 break; 1088 default: 1089 dev_dbg(dev, "Unknown function %d.\n", fn); 1090 } 1091 exit: 1092 mutex_unlock(&data->update_lock); 1093 1094 return count; 1095 } 1096 1097 /* --------------------------------------------------------------------- 1098 * PWM sysfs attributes 1099 * ix = [0-4] 1100 * --------------------------------------------------------------------- */ 1101 1102 #define SYS_PWM 0 1103 #define SYS_PWM_FREQ 1 1104 #define SYS_PWM_ENABLE 2 1105 #define SYS_PWM_RAMP_RATE 3 1106 #define SYS_PWM_AUTO_CHANNELS_ZONE 4 1107 #define SYS_PWM_AUTO_PWM_MIN 5 1108 #define SYS_PWM_AUTO_POINT1_PWM 6 1109 #define SYS_PWM_AUTO_POINT2_PWM 7 1110 1111 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, 1112 char *buf) 1113 { 1114 struct dme1737_data *data = dme1737_update_device(dev); 1115 struct sensor_device_attribute_2 1116 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 1117 int ix = sensor_attr_2->index; 1118 int fn = sensor_attr_2->nr; 1119 int res; 1120 1121 switch (fn) { 1122 case SYS_PWM: 1123 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) { 1124 res = 255; 1125 } else { 1126 res = data->pwm[ix]; 1127 } 1128 break; 1129 case SYS_PWM_FREQ: 1130 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]); 1131 break; 1132 case SYS_PWM_ENABLE: 1133 if (ix >= 3) { 1134 res = 1; /* pwm[5-6] hard-wired to manual mode */ 1135 } else { 1136 res = PWM_EN_FROM_REG(data->pwm_config[ix]); 1137 } 1138 break; 1139 case SYS_PWM_RAMP_RATE: 1140 /* Only valid for pwm[1-3] */ 1141 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix); 1142 break; 1143 case SYS_PWM_AUTO_CHANNELS_ZONE: 1144 /* Only valid for pwm[1-3] */ 1145 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1146 res = PWM_ACZ_FROM_REG(data->pwm_config[ix]); 1147 } else { 1148 res = data->pwm_acz[ix]; 1149 } 1150 break; 1151 case SYS_PWM_AUTO_PWM_MIN: 1152 /* Only valid for pwm[1-3] */ 1153 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) { 1154 res = data->pwm_min[ix]; 1155 } else { 1156 res = 0; 1157 } 1158 break; 1159 case SYS_PWM_AUTO_POINT1_PWM: 1160 /* Only valid for pwm[1-3] */ 1161 res = data->pwm_min[ix]; 1162 break; 1163 case SYS_PWM_AUTO_POINT2_PWM: 1164 /* Only valid for pwm[1-3] */ 1165 res = 255; /* hard-wired */ 1166 break; 1167 default: 1168 res = 0; 1169 dev_dbg(dev, "Unknown function %d.\n", fn); 1170 } 1171 1172 return sprintf(buf, "%d\n", res); 1173 } 1174 1175 static struct attribute *dme1737_pwm_chmod_attr[]; 1176 static void dme1737_chmod_file(struct device*, struct attribute*, mode_t); 1177 1178 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, 1179 const char *buf, size_t count) 1180 { 1181 struct dme1737_data *data = dev_get_drvdata(dev); 1182 struct sensor_device_attribute_2 1183 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 1184 int ix = sensor_attr_2->index; 1185 int fn = sensor_attr_2->nr; 1186 long val = simple_strtol(buf, NULL, 10); 1187 1188 mutex_lock(&data->update_lock); 1189 switch (fn) { 1190 case SYS_PWM: 1191 data->pwm[ix] = SENSORS_LIMIT(val, 0, 255); 1192 dme1737_write(data, DME1737_REG_PWM(ix), data->pwm[ix]); 1193 break; 1194 case SYS_PWM_FREQ: 1195 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(data, 1196 DME1737_REG_PWM_FREQ(ix))); 1197 dme1737_write(data, DME1737_REG_PWM_FREQ(ix), 1198 data->pwm_freq[ix]); 1199 break; 1200 case SYS_PWM_ENABLE: 1201 /* Only valid for pwm[1-3] */ 1202 if (val < 0 || val > 2) { 1203 count = -EINVAL; 1204 dev_warn(dev, "PWM enable %ld not " 1205 "supported. Choose one of 0, 1, or 2.\n", 1206 val); 1207 goto exit; 1208 } 1209 /* Refresh the cache */ 1210 data->pwm_config[ix] = dme1737_read(data, 1211 DME1737_REG_PWM_CONFIG(ix)); 1212 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) { 1213 /* Bail out if no change */ 1214 goto exit; 1215 } 1216 /* Do some housekeeping if we are currently in auto mode */ 1217 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1218 /* Save the current zone channel assignment */ 1219 data->pwm_acz[ix] = PWM_ACZ_FROM_REG( 1220 data->pwm_config[ix]); 1221 /* Save the current ramp rate state and disable it */ 1222 data->pwm_rr[ix > 0] = dme1737_read(data, 1223 DME1737_REG_PWM_RR(ix > 0)); 1224 data->pwm_rr_en &= ~(1 << ix); 1225 if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) { 1226 data->pwm_rr_en |= (1 << ix); 1227 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix, 1228 data->pwm_rr[ix > 0]); 1229 dme1737_write(data, 1230 DME1737_REG_PWM_RR(ix > 0), 1231 data->pwm_rr[ix > 0]); 1232 } 1233 } 1234 /* Set the new PWM mode */ 1235 switch (val) { 1236 case 0: 1237 /* Change permissions of pwm[ix] to read-only */ 1238 dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], 1239 S_IRUGO); 1240 /* Turn fan fully on */ 1241 data->pwm_config[ix] = PWM_EN_TO_REG(0, 1242 data->pwm_config[ix]); 1243 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), 1244 data->pwm_config[ix]); 1245 break; 1246 case 1: 1247 /* Turn on manual mode */ 1248 data->pwm_config[ix] = PWM_EN_TO_REG(1, 1249 data->pwm_config[ix]); 1250 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), 1251 data->pwm_config[ix]); 1252 /* Change permissions of pwm[ix] to read-writeable */ 1253 dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], 1254 S_IRUGO | S_IWUSR); 1255 break; 1256 case 2: 1257 /* Change permissions of pwm[ix] to read-only */ 1258 dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], 1259 S_IRUGO); 1260 /* Turn on auto mode using the saved zone channel 1261 * assignment */ 1262 data->pwm_config[ix] = PWM_ACZ_TO_REG( 1263 data->pwm_acz[ix], 1264 data->pwm_config[ix]); 1265 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), 1266 data->pwm_config[ix]); 1267 /* Enable PWM ramp rate if previously enabled */ 1268 if (data->pwm_rr_en & (1 << ix)) { 1269 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix, 1270 dme1737_read(data, 1271 DME1737_REG_PWM_RR(ix > 0))); 1272 dme1737_write(data, 1273 DME1737_REG_PWM_RR(ix > 0), 1274 data->pwm_rr[ix > 0]); 1275 } 1276 break; 1277 } 1278 break; 1279 case SYS_PWM_RAMP_RATE: 1280 /* Only valid for pwm[1-3] */ 1281 /* Refresh the cache */ 1282 data->pwm_config[ix] = dme1737_read(data, 1283 DME1737_REG_PWM_CONFIG(ix)); 1284 data->pwm_rr[ix > 0] = dme1737_read(data, 1285 DME1737_REG_PWM_RR(ix > 0)); 1286 /* Set the ramp rate value */ 1287 if (val > 0) { 1288 data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix, 1289 data->pwm_rr[ix > 0]); 1290 } 1291 /* Enable/disable the feature only if the associated PWM 1292 * output is in automatic mode. */ 1293 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1294 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix, 1295 data->pwm_rr[ix > 0]); 1296 } 1297 dme1737_write(data, DME1737_REG_PWM_RR(ix > 0), 1298 data->pwm_rr[ix > 0]); 1299 break; 1300 case SYS_PWM_AUTO_CHANNELS_ZONE: 1301 /* Only valid for pwm[1-3] */ 1302 if (!(val == 1 || val == 2 || val == 4 || 1303 val == 6 || val == 7)) { 1304 count = -EINVAL; 1305 dev_warn(dev, "PWM auto channels zone %ld " 1306 "not supported. Choose one of 1, 2, 4, 6, " 1307 "or 7.\n", val); 1308 goto exit; 1309 } 1310 /* Refresh the cache */ 1311 data->pwm_config[ix] = dme1737_read(data, 1312 DME1737_REG_PWM_CONFIG(ix)); 1313 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1314 /* PWM is already in auto mode so update the temp 1315 * channel assignment */ 1316 data->pwm_config[ix] = PWM_ACZ_TO_REG(val, 1317 data->pwm_config[ix]); 1318 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), 1319 data->pwm_config[ix]); 1320 } else { 1321 /* PWM is not in auto mode so we save the temp 1322 * channel assignment for later use */ 1323 data->pwm_acz[ix] = val; 1324 } 1325 break; 1326 case SYS_PWM_AUTO_PWM_MIN: 1327 /* Only valid for pwm[1-3] */ 1328 /* Refresh the cache */ 1329 data->pwm_min[ix] = dme1737_read(data, 1330 DME1737_REG_PWM_MIN(ix)); 1331 /* There are only 2 values supported for the auto_pwm_min 1332 * value: 0 or auto_point1_pwm. So if the temperature drops 1333 * below the auto_point1_temp_hyst value, the fan either turns 1334 * off or runs at auto_point1_pwm duty-cycle. */ 1335 if (val > ((data->pwm_min[ix] + 1) / 2)) { 1336 data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix, 1337 dme1737_read(data, 1338 DME1737_REG_PWM_RR(0))); 1339 } else { 1340 data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix, 1341 dme1737_read(data, 1342 DME1737_REG_PWM_RR(0))); 1343 } 1344 dme1737_write(data, DME1737_REG_PWM_RR(0), 1345 data->pwm_rr[0]); 1346 break; 1347 case SYS_PWM_AUTO_POINT1_PWM: 1348 /* Only valid for pwm[1-3] */ 1349 data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255); 1350 dme1737_write(data, DME1737_REG_PWM_MIN(ix), 1351 data->pwm_min[ix]); 1352 break; 1353 default: 1354 dev_dbg(dev, "Unknown function %d.\n", fn); 1355 } 1356 exit: 1357 mutex_unlock(&data->update_lock); 1358 1359 return count; 1360 } 1361 1362 /* --------------------------------------------------------------------- 1363 * Miscellaneous sysfs attributes 1364 * --------------------------------------------------------------------- */ 1365 1366 static ssize_t show_vrm(struct device *dev, struct device_attribute *attr, 1367 char *buf) 1368 { 1369 struct i2c_client *client = to_i2c_client(dev); 1370 struct dme1737_data *data = i2c_get_clientdata(client); 1371 1372 return sprintf(buf, "%d\n", data->vrm); 1373 } 1374 1375 static ssize_t set_vrm(struct device *dev, struct device_attribute *attr, 1376 const char *buf, size_t count) 1377 { 1378 struct dme1737_data *data = dev_get_drvdata(dev); 1379 long val = simple_strtol(buf, NULL, 10); 1380 1381 data->vrm = val; 1382 return count; 1383 } 1384 1385 static ssize_t show_vid(struct device *dev, struct device_attribute *attr, 1386 char *buf) 1387 { 1388 struct dme1737_data *data = dme1737_update_device(dev); 1389 1390 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); 1391 } 1392 1393 static ssize_t show_name(struct device *dev, struct device_attribute *attr, 1394 char *buf) 1395 { 1396 struct dme1737_data *data = dev_get_drvdata(dev); 1397 1398 return sprintf(buf, "%s\n", data->name); 1399 } 1400 1401 /* --------------------------------------------------------------------- 1402 * Sysfs device attribute defines and structs 1403 * --------------------------------------------------------------------- */ 1404 1405 /* Voltages 0-6 */ 1406 1407 #define SENSOR_DEVICE_ATTR_IN(ix) \ 1408 static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \ 1409 show_in, NULL, SYS_IN_INPUT, ix); \ 1410 static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \ 1411 show_in, set_in, SYS_IN_MIN, ix); \ 1412 static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \ 1413 show_in, set_in, SYS_IN_MAX, ix); \ 1414 static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \ 1415 show_in, NULL, SYS_IN_ALARM, ix) 1416 1417 SENSOR_DEVICE_ATTR_IN(0); 1418 SENSOR_DEVICE_ATTR_IN(1); 1419 SENSOR_DEVICE_ATTR_IN(2); 1420 SENSOR_DEVICE_ATTR_IN(3); 1421 SENSOR_DEVICE_ATTR_IN(4); 1422 SENSOR_DEVICE_ATTR_IN(5); 1423 SENSOR_DEVICE_ATTR_IN(6); 1424 1425 /* Temperatures 1-3 */ 1426 1427 #define SENSOR_DEVICE_ATTR_TEMP(ix) \ 1428 static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \ 1429 show_temp, NULL, SYS_TEMP_INPUT, ix-1); \ 1430 static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \ 1431 show_temp, set_temp, SYS_TEMP_MIN, ix-1); \ 1432 static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \ 1433 show_temp, set_temp, SYS_TEMP_MAX, ix-1); \ 1434 static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \ 1435 show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \ 1436 static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \ 1437 show_temp, NULL, SYS_TEMP_ALARM, ix-1); \ 1438 static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \ 1439 show_temp, NULL, SYS_TEMP_FAULT, ix-1) 1440 1441 SENSOR_DEVICE_ATTR_TEMP(1); 1442 SENSOR_DEVICE_ATTR_TEMP(2); 1443 SENSOR_DEVICE_ATTR_TEMP(3); 1444 1445 /* Zones 1-3 */ 1446 1447 #define SENSOR_DEVICE_ATTR_ZONE(ix) \ 1448 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \ 1449 show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \ 1450 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \ 1451 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \ 1452 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \ 1453 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \ 1454 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \ 1455 show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \ 1456 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \ 1457 show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1) 1458 1459 SENSOR_DEVICE_ATTR_ZONE(1); 1460 SENSOR_DEVICE_ATTR_ZONE(2); 1461 SENSOR_DEVICE_ATTR_ZONE(3); 1462 1463 /* Fans 1-4 */ 1464 1465 #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \ 1466 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ 1467 show_fan, NULL, SYS_FAN_INPUT, ix-1); \ 1468 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ 1469 show_fan, set_fan, SYS_FAN_MIN, ix-1); \ 1470 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ 1471 show_fan, NULL, SYS_FAN_ALARM, ix-1); \ 1472 static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \ 1473 show_fan, set_fan, SYS_FAN_TYPE, ix-1) 1474 1475 SENSOR_DEVICE_ATTR_FAN_1TO4(1); 1476 SENSOR_DEVICE_ATTR_FAN_1TO4(2); 1477 SENSOR_DEVICE_ATTR_FAN_1TO4(3); 1478 SENSOR_DEVICE_ATTR_FAN_1TO4(4); 1479 1480 /* Fans 5-6 */ 1481 1482 #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \ 1483 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ 1484 show_fan, NULL, SYS_FAN_INPUT, ix-1); \ 1485 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ 1486 show_fan, set_fan, SYS_FAN_MIN, ix-1); \ 1487 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ 1488 show_fan, NULL, SYS_FAN_ALARM, ix-1); \ 1489 static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \ 1490 show_fan, set_fan, SYS_FAN_MAX, ix-1) 1491 1492 SENSOR_DEVICE_ATTR_FAN_5TO6(5); 1493 SENSOR_DEVICE_ATTR_FAN_5TO6(6); 1494 1495 /* PWMs 1-3 */ 1496 1497 #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \ 1498 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ 1499 show_pwm, set_pwm, SYS_PWM, ix-1); \ 1500 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ 1501 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ 1502 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ 1503 show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \ 1504 static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \ 1505 show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \ 1506 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \ 1507 show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \ 1508 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \ 1509 show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \ 1510 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \ 1511 show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \ 1512 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \ 1513 show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1) 1514 1515 SENSOR_DEVICE_ATTR_PWM_1TO3(1); 1516 SENSOR_DEVICE_ATTR_PWM_1TO3(2); 1517 SENSOR_DEVICE_ATTR_PWM_1TO3(3); 1518 1519 /* PWMs 5-6 */ 1520 1521 #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \ 1522 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ 1523 show_pwm, set_pwm, SYS_PWM, ix-1); \ 1524 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ 1525 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ 1526 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ 1527 show_pwm, NULL, SYS_PWM_ENABLE, ix-1) 1528 1529 SENSOR_DEVICE_ATTR_PWM_5TO6(5); 1530 SENSOR_DEVICE_ATTR_PWM_5TO6(6); 1531 1532 /* Misc */ 1533 1534 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm); 1535 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL); 1536 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */ 1537 1538 /* This struct holds all the attributes that are always present and need to be 1539 * created unconditionally. The attributes that need modification of their 1540 * permissions are created read-only and write permissions are added or removed 1541 * on the fly when required */ 1542 static struct attribute *dme1737_attr[] ={ 1543 /* Voltages */ 1544 &sensor_dev_attr_in0_input.dev_attr.attr, 1545 &sensor_dev_attr_in0_min.dev_attr.attr, 1546 &sensor_dev_attr_in0_max.dev_attr.attr, 1547 &sensor_dev_attr_in0_alarm.dev_attr.attr, 1548 &sensor_dev_attr_in1_input.dev_attr.attr, 1549 &sensor_dev_attr_in1_min.dev_attr.attr, 1550 &sensor_dev_attr_in1_max.dev_attr.attr, 1551 &sensor_dev_attr_in1_alarm.dev_attr.attr, 1552 &sensor_dev_attr_in2_input.dev_attr.attr, 1553 &sensor_dev_attr_in2_min.dev_attr.attr, 1554 &sensor_dev_attr_in2_max.dev_attr.attr, 1555 &sensor_dev_attr_in2_alarm.dev_attr.attr, 1556 &sensor_dev_attr_in3_input.dev_attr.attr, 1557 &sensor_dev_attr_in3_min.dev_attr.attr, 1558 &sensor_dev_attr_in3_max.dev_attr.attr, 1559 &sensor_dev_attr_in3_alarm.dev_attr.attr, 1560 &sensor_dev_attr_in4_input.dev_attr.attr, 1561 &sensor_dev_attr_in4_min.dev_attr.attr, 1562 &sensor_dev_attr_in4_max.dev_attr.attr, 1563 &sensor_dev_attr_in4_alarm.dev_attr.attr, 1564 &sensor_dev_attr_in5_input.dev_attr.attr, 1565 &sensor_dev_attr_in5_min.dev_attr.attr, 1566 &sensor_dev_attr_in5_max.dev_attr.attr, 1567 &sensor_dev_attr_in5_alarm.dev_attr.attr, 1568 &sensor_dev_attr_in6_input.dev_attr.attr, 1569 &sensor_dev_attr_in6_min.dev_attr.attr, 1570 &sensor_dev_attr_in6_max.dev_attr.attr, 1571 &sensor_dev_attr_in6_alarm.dev_attr.attr, 1572 /* Temperatures */ 1573 &sensor_dev_attr_temp1_input.dev_attr.attr, 1574 &sensor_dev_attr_temp1_min.dev_attr.attr, 1575 &sensor_dev_attr_temp1_max.dev_attr.attr, 1576 &sensor_dev_attr_temp1_alarm.dev_attr.attr, 1577 &sensor_dev_attr_temp1_fault.dev_attr.attr, 1578 &sensor_dev_attr_temp2_input.dev_attr.attr, 1579 &sensor_dev_attr_temp2_min.dev_attr.attr, 1580 &sensor_dev_attr_temp2_max.dev_attr.attr, 1581 &sensor_dev_attr_temp2_alarm.dev_attr.attr, 1582 &sensor_dev_attr_temp2_fault.dev_attr.attr, 1583 &sensor_dev_attr_temp3_input.dev_attr.attr, 1584 &sensor_dev_attr_temp3_min.dev_attr.attr, 1585 &sensor_dev_attr_temp3_max.dev_attr.attr, 1586 &sensor_dev_attr_temp3_alarm.dev_attr.attr, 1587 &sensor_dev_attr_temp3_fault.dev_attr.attr, 1588 /* Zones */ 1589 &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, 1590 &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, 1591 &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr, 1592 &sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr, 1593 &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr, 1594 &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr, 1595 &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr, 1596 &sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr, 1597 &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, 1598 &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, 1599 &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr, 1600 &sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr, 1601 NULL 1602 }; 1603 1604 static const struct attribute_group dme1737_group = { 1605 .attrs = dme1737_attr, 1606 }; 1607 1608 /* The following struct holds misc attributes, which are not available in all 1609 * chips. Their creation depends on the chip type which is determined during 1610 * module load. */ 1611 static struct attribute *dme1737_misc_attr[] = { 1612 /* Temperatures */ 1613 &sensor_dev_attr_temp1_offset.dev_attr.attr, 1614 &sensor_dev_attr_temp2_offset.dev_attr.attr, 1615 &sensor_dev_attr_temp3_offset.dev_attr.attr, 1616 /* Zones */ 1617 &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr, 1618 &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr, 1619 &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr, 1620 NULL 1621 }; 1622 1623 static const struct attribute_group dme1737_misc_group = { 1624 .attrs = dme1737_misc_attr, 1625 }; 1626 1627 /* The following struct holds VID-related attributes. Their creation 1628 depends on the chip type which is determined during module load. */ 1629 static struct attribute *dme1737_vid_attr[] = { 1630 &dev_attr_vrm.attr, 1631 &dev_attr_cpu0_vid.attr, 1632 NULL 1633 }; 1634 1635 static const struct attribute_group dme1737_vid_group = { 1636 .attrs = dme1737_vid_attr, 1637 }; 1638 1639 /* The following structs hold the PWM attributes, some of which are optional. 1640 * Their creation depends on the chip configuration which is determined during 1641 * module load. */ 1642 static struct attribute *dme1737_pwm1_attr[] = { 1643 &sensor_dev_attr_pwm1.dev_attr.attr, 1644 &sensor_dev_attr_pwm1_freq.dev_attr.attr, 1645 &sensor_dev_attr_pwm1_enable.dev_attr.attr, 1646 &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr, 1647 &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr, 1648 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, 1649 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, 1650 NULL 1651 }; 1652 static struct attribute *dme1737_pwm2_attr[] = { 1653 &sensor_dev_attr_pwm2.dev_attr.attr, 1654 &sensor_dev_attr_pwm2_freq.dev_attr.attr, 1655 &sensor_dev_attr_pwm2_enable.dev_attr.attr, 1656 &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr, 1657 &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr, 1658 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, 1659 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, 1660 NULL 1661 }; 1662 static struct attribute *dme1737_pwm3_attr[] = { 1663 &sensor_dev_attr_pwm3.dev_attr.attr, 1664 &sensor_dev_attr_pwm3_freq.dev_attr.attr, 1665 &sensor_dev_attr_pwm3_enable.dev_attr.attr, 1666 &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr, 1667 &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr, 1668 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, 1669 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, 1670 NULL 1671 }; 1672 static struct attribute *dme1737_pwm5_attr[] = { 1673 &sensor_dev_attr_pwm5.dev_attr.attr, 1674 &sensor_dev_attr_pwm5_freq.dev_attr.attr, 1675 &sensor_dev_attr_pwm5_enable.dev_attr.attr, 1676 NULL 1677 }; 1678 static struct attribute *dme1737_pwm6_attr[] = { 1679 &sensor_dev_attr_pwm6.dev_attr.attr, 1680 &sensor_dev_attr_pwm6_freq.dev_attr.attr, 1681 &sensor_dev_attr_pwm6_enable.dev_attr.attr, 1682 NULL 1683 }; 1684 1685 static const struct attribute_group dme1737_pwm_group[] = { 1686 { .attrs = dme1737_pwm1_attr }, 1687 { .attrs = dme1737_pwm2_attr }, 1688 { .attrs = dme1737_pwm3_attr }, 1689 { .attrs = NULL }, 1690 { .attrs = dme1737_pwm5_attr }, 1691 { .attrs = dme1737_pwm6_attr }, 1692 }; 1693 1694 /* The following struct holds misc PWM attributes, which are not available in 1695 * all chips. Their creation depends on the chip type which is determined 1696 * during module load. */ 1697 static struct attribute *dme1737_pwm_misc_attr[] = { 1698 &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr, 1699 &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr, 1700 &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr, 1701 }; 1702 1703 /* The following structs hold the fan attributes, some of which are optional. 1704 * Their creation depends on the chip configuration which is determined during 1705 * module load. */ 1706 static struct attribute *dme1737_fan1_attr[] = { 1707 &sensor_dev_attr_fan1_input.dev_attr.attr, 1708 &sensor_dev_attr_fan1_min.dev_attr.attr, 1709 &sensor_dev_attr_fan1_alarm.dev_attr.attr, 1710 &sensor_dev_attr_fan1_type.dev_attr.attr, 1711 NULL 1712 }; 1713 static struct attribute *dme1737_fan2_attr[] = { 1714 &sensor_dev_attr_fan2_input.dev_attr.attr, 1715 &sensor_dev_attr_fan2_min.dev_attr.attr, 1716 &sensor_dev_attr_fan2_alarm.dev_attr.attr, 1717 &sensor_dev_attr_fan2_type.dev_attr.attr, 1718 NULL 1719 }; 1720 static struct attribute *dme1737_fan3_attr[] = { 1721 &sensor_dev_attr_fan3_input.dev_attr.attr, 1722 &sensor_dev_attr_fan3_min.dev_attr.attr, 1723 &sensor_dev_attr_fan3_alarm.dev_attr.attr, 1724 &sensor_dev_attr_fan3_type.dev_attr.attr, 1725 NULL 1726 }; 1727 static struct attribute *dme1737_fan4_attr[] = { 1728 &sensor_dev_attr_fan4_input.dev_attr.attr, 1729 &sensor_dev_attr_fan4_min.dev_attr.attr, 1730 &sensor_dev_attr_fan4_alarm.dev_attr.attr, 1731 &sensor_dev_attr_fan4_type.dev_attr.attr, 1732 NULL 1733 }; 1734 static struct attribute *dme1737_fan5_attr[] = { 1735 &sensor_dev_attr_fan5_input.dev_attr.attr, 1736 &sensor_dev_attr_fan5_min.dev_attr.attr, 1737 &sensor_dev_attr_fan5_alarm.dev_attr.attr, 1738 &sensor_dev_attr_fan5_max.dev_attr.attr, 1739 NULL 1740 }; 1741 static struct attribute *dme1737_fan6_attr[] = { 1742 &sensor_dev_attr_fan6_input.dev_attr.attr, 1743 &sensor_dev_attr_fan6_min.dev_attr.attr, 1744 &sensor_dev_attr_fan6_alarm.dev_attr.attr, 1745 &sensor_dev_attr_fan6_max.dev_attr.attr, 1746 NULL 1747 }; 1748 1749 static const struct attribute_group dme1737_fan_group[] = { 1750 { .attrs = dme1737_fan1_attr }, 1751 { .attrs = dme1737_fan2_attr }, 1752 { .attrs = dme1737_fan3_attr }, 1753 { .attrs = dme1737_fan4_attr }, 1754 { .attrs = dme1737_fan5_attr }, 1755 { .attrs = dme1737_fan6_attr }, 1756 }; 1757 1758 /* The permissions of the following zone attributes are changed to read- 1759 * writeable if the chip is *not* locked. Otherwise they stay read-only. */ 1760 static struct attribute *dme1737_zone_chmod_attr[] = { 1761 &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, 1762 &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, 1763 &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr, 1764 &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr, 1765 &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr, 1766 &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr, 1767 &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, 1768 &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, 1769 &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr, 1770 NULL 1771 }; 1772 1773 static const struct attribute_group dme1737_zone_chmod_group = { 1774 .attrs = dme1737_zone_chmod_attr, 1775 }; 1776 1777 /* The permissions of the following PWM attributes are changed to read- 1778 * writeable if the chip is *not* locked and the respective PWM is available. 1779 * Otherwise they stay read-only. */ 1780 static struct attribute *dme1737_pwm1_chmod_attr[] = { 1781 &sensor_dev_attr_pwm1_freq.dev_attr.attr, 1782 &sensor_dev_attr_pwm1_enable.dev_attr.attr, 1783 &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr, 1784 &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr, 1785 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, 1786 NULL 1787 }; 1788 static struct attribute *dme1737_pwm2_chmod_attr[] = { 1789 &sensor_dev_attr_pwm2_freq.dev_attr.attr, 1790 &sensor_dev_attr_pwm2_enable.dev_attr.attr, 1791 &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr, 1792 &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr, 1793 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, 1794 NULL 1795 }; 1796 static struct attribute *dme1737_pwm3_chmod_attr[] = { 1797 &sensor_dev_attr_pwm3_freq.dev_attr.attr, 1798 &sensor_dev_attr_pwm3_enable.dev_attr.attr, 1799 &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr, 1800 &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr, 1801 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, 1802 NULL 1803 }; 1804 static struct attribute *dme1737_pwm5_chmod_attr[] = { 1805 &sensor_dev_attr_pwm5.dev_attr.attr, 1806 &sensor_dev_attr_pwm5_freq.dev_attr.attr, 1807 NULL 1808 }; 1809 static struct attribute *dme1737_pwm6_chmod_attr[] = { 1810 &sensor_dev_attr_pwm6.dev_attr.attr, 1811 &sensor_dev_attr_pwm6_freq.dev_attr.attr, 1812 NULL 1813 }; 1814 1815 static const struct attribute_group dme1737_pwm_chmod_group[] = { 1816 { .attrs = dme1737_pwm1_chmod_attr }, 1817 { .attrs = dme1737_pwm2_chmod_attr }, 1818 { .attrs = dme1737_pwm3_chmod_attr }, 1819 { .attrs = NULL }, 1820 { .attrs = dme1737_pwm5_chmod_attr }, 1821 { .attrs = dme1737_pwm6_chmod_attr }, 1822 }; 1823 1824 /* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the 1825 * chip is not locked. Otherwise they are read-only. */ 1826 static struct attribute *dme1737_pwm_chmod_attr[] = { 1827 &sensor_dev_attr_pwm1.dev_attr.attr, 1828 &sensor_dev_attr_pwm2.dev_attr.attr, 1829 &sensor_dev_attr_pwm3.dev_attr.attr, 1830 }; 1831 1832 /* --------------------------------------------------------------------- 1833 * Super-IO functions 1834 * --------------------------------------------------------------------- */ 1835 1836 static inline void dme1737_sio_enter(int sio_cip) 1837 { 1838 outb(0x55, sio_cip); 1839 } 1840 1841 static inline void dme1737_sio_exit(int sio_cip) 1842 { 1843 outb(0xaa, sio_cip); 1844 } 1845 1846 static inline int dme1737_sio_inb(int sio_cip, int reg) 1847 { 1848 outb(reg, sio_cip); 1849 return inb(sio_cip + 1); 1850 } 1851 1852 static inline void dme1737_sio_outb(int sio_cip, int reg, int val) 1853 { 1854 outb(reg, sio_cip); 1855 outb(val, sio_cip + 1); 1856 } 1857 1858 /* --------------------------------------------------------------------- 1859 * Device initialization 1860 * --------------------------------------------------------------------- */ 1861 1862 static int dme1737_i2c_get_features(int, struct dme1737_data*); 1863 1864 static void dme1737_chmod_file(struct device *dev, 1865 struct attribute *attr, mode_t mode) 1866 { 1867 if (sysfs_chmod_file(&dev->kobj, attr, mode)) { 1868 dev_warn(dev, "Failed to change permissions of %s.\n", 1869 attr->name); 1870 } 1871 } 1872 1873 static void dme1737_chmod_group(struct device *dev, 1874 const struct attribute_group *group, 1875 mode_t mode) 1876 { 1877 struct attribute **attr; 1878 1879 for (attr = group->attrs; *attr; attr++) { 1880 dme1737_chmod_file(dev, *attr, mode); 1881 } 1882 } 1883 1884 static void dme1737_remove_files(struct device *dev) 1885 { 1886 struct dme1737_data *data = dev_get_drvdata(dev); 1887 int ix; 1888 1889 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { 1890 if (data->has_fan & (1 << ix)) { 1891 sysfs_remove_group(&dev->kobj, 1892 &dme1737_fan_group[ix]); 1893 } 1894 } 1895 1896 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { 1897 if (data->has_pwm & (1 << ix)) { 1898 sysfs_remove_group(&dev->kobj, 1899 &dme1737_pwm_group[ix]); 1900 if (data->type != sch5027 && ix < 3) { 1901 sysfs_remove_file(&dev->kobj, 1902 dme1737_pwm_misc_attr[ix]); 1903 } 1904 } 1905 } 1906 1907 if (data->type != sch5027) { 1908 sysfs_remove_group(&dev->kobj, &dme1737_misc_group); 1909 } 1910 if (data->type == dme1737) { 1911 sysfs_remove_group(&dev->kobj, &dme1737_vid_group); 1912 } 1913 1914 sysfs_remove_group(&dev->kobj, &dme1737_group); 1915 1916 if (!data->client) { 1917 sysfs_remove_file(&dev->kobj, &dev_attr_name.attr); 1918 } 1919 } 1920 1921 static int dme1737_create_files(struct device *dev) 1922 { 1923 struct dme1737_data *data = dev_get_drvdata(dev); 1924 int err, ix; 1925 1926 /* Create a name attribute for ISA devices */ 1927 if (!data->client && 1928 (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) { 1929 goto exit; 1930 } 1931 1932 /* Create standard sysfs attributes */ 1933 if ((err = sysfs_create_group(&dev->kobj, &dme1737_group))) { 1934 goto exit_remove; 1935 } 1936 1937 /* Create misc sysfs attributes */ 1938 if ((data->type != sch5027) && 1939 (err = sysfs_create_group(&dev->kobj, 1940 &dme1737_misc_group))) { 1941 goto exit_remove; 1942 } 1943 1944 /* Create VID-related sysfs attributes */ 1945 if ((data->type == dme1737) && 1946 (err = sysfs_create_group(&dev->kobj, 1947 &dme1737_vid_group))) { 1948 goto exit_remove; 1949 } 1950 1951 /* Create fan sysfs attributes */ 1952 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { 1953 if (data->has_fan & (1 << ix)) { 1954 if ((err = sysfs_create_group(&dev->kobj, 1955 &dme1737_fan_group[ix]))) { 1956 goto exit_remove; 1957 } 1958 } 1959 } 1960 1961 /* Create PWM sysfs attributes */ 1962 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { 1963 if (data->has_pwm & (1 << ix)) { 1964 if ((err = sysfs_create_group(&dev->kobj, 1965 &dme1737_pwm_group[ix]))) { 1966 goto exit_remove; 1967 } 1968 if (data->type != sch5027 && ix < 3 && 1969 (err = sysfs_create_file(&dev->kobj, 1970 dme1737_pwm_misc_attr[ix]))) { 1971 goto exit_remove; 1972 } 1973 } 1974 } 1975 1976 /* Inform if the device is locked. Otherwise change the permissions of 1977 * selected attributes from read-only to read-writeable. */ 1978 if (data->config & 0x02) { 1979 dev_info(dev, "Device is locked. Some attributes " 1980 "will be read-only.\n"); 1981 } else { 1982 /* Change permissions of zone sysfs attributes */ 1983 dme1737_chmod_group(dev, &dme1737_zone_chmod_group, 1984 S_IRUGO | S_IWUSR); 1985 1986 /* Change permissions of misc sysfs attributes */ 1987 if (data->type != sch5027) { 1988 dme1737_chmod_group(dev, &dme1737_misc_group, 1989 S_IRUGO | S_IWUSR); 1990 } 1991 1992 /* Change permissions of PWM sysfs attributes */ 1993 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_chmod_group); ix++) { 1994 if (data->has_pwm & (1 << ix)) { 1995 dme1737_chmod_group(dev, 1996 &dme1737_pwm_chmod_group[ix], 1997 S_IRUGO | S_IWUSR); 1998 if (data->type != sch5027 && ix < 3) { 1999 dme1737_chmod_file(dev, 2000 dme1737_pwm_misc_attr[ix], 2001 S_IRUGO | S_IWUSR); 2002 } 2003 } 2004 } 2005 2006 /* Change permissions of pwm[1-3] if in manual mode */ 2007 for (ix = 0; ix < 3; ix++) { 2008 if ((data->has_pwm & (1 << ix)) && 2009 (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) { 2010 dme1737_chmod_file(dev, 2011 dme1737_pwm_chmod_attr[ix], 2012 S_IRUGO | S_IWUSR); 2013 } 2014 } 2015 } 2016 2017 return 0; 2018 2019 exit_remove: 2020 dme1737_remove_files(dev); 2021 exit: 2022 return err; 2023 } 2024 2025 static int dme1737_init_device(struct device *dev) 2026 { 2027 struct dme1737_data *data = dev_get_drvdata(dev); 2028 struct i2c_client *client = data->client; 2029 int ix; 2030 u8 reg; 2031 2032 /* Point to the right nominal voltages array */ 2033 data->in_nominal = IN_NOMINAL(data->type); 2034 2035 data->config = dme1737_read(data, DME1737_REG_CONFIG); 2036 /* Inform if part is not monitoring/started */ 2037 if (!(data->config & 0x01)) { 2038 if (!force_start) { 2039 dev_err(dev, "Device is not monitoring. " 2040 "Use the force_start load parameter to " 2041 "override.\n"); 2042 return -EFAULT; 2043 } 2044 2045 /* Force monitoring */ 2046 data->config |= 0x01; 2047 dme1737_write(data, DME1737_REG_CONFIG, data->config); 2048 } 2049 /* Inform if part is not ready */ 2050 if (!(data->config & 0x04)) { 2051 dev_err(dev, "Device is not ready.\n"); 2052 return -EFAULT; 2053 } 2054 2055 /* Determine which optional fan and pwm features are enabled/present */ 2056 if (client) { /* I2C chip */ 2057 data->config2 = dme1737_read(data, DME1737_REG_CONFIG2); 2058 /* Check if optional fan3 input is enabled */ 2059 if (data->config2 & 0x04) { 2060 data->has_fan |= (1 << 2); 2061 } 2062 2063 /* Fan4 and pwm3 are only available if the client's I2C address 2064 * is the default 0x2e. Otherwise the I/Os associated with 2065 * these functions are used for addr enable/select. */ 2066 if (client->addr == 0x2e) { 2067 data->has_fan |= (1 << 3); 2068 data->has_pwm |= (1 << 2); 2069 } 2070 2071 /* Determine which of the optional fan[5-6] and pwm[5-6] 2072 * features are enabled. For this, we need to query the runtime 2073 * registers through the Super-IO LPC interface. Try both 2074 * config ports 0x2e and 0x4e. */ 2075 if (dme1737_i2c_get_features(0x2e, data) && 2076 dme1737_i2c_get_features(0x4e, data)) { 2077 dev_warn(dev, "Failed to query Super-IO for optional " 2078 "features.\n"); 2079 } 2080 } else { /* ISA chip */ 2081 /* Fan3 and pwm3 are always available. Fan[4-5] and pwm[5-6] 2082 * don't exist in the ISA chip. */ 2083 data->has_fan |= (1 << 2); 2084 data->has_pwm |= (1 << 2); 2085 } 2086 2087 /* Fan1, fan2, pwm1, and pwm2 are always present */ 2088 data->has_fan |= 0x03; 2089 data->has_pwm |= 0x03; 2090 2091 dev_info(dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, " 2092 "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n", 2093 (data->has_pwm & (1 << 2)) ? "yes" : "no", 2094 (data->has_pwm & (1 << 4)) ? "yes" : "no", 2095 (data->has_pwm & (1 << 5)) ? "yes" : "no", 2096 (data->has_fan & (1 << 2)) ? "yes" : "no", 2097 (data->has_fan & (1 << 3)) ? "yes" : "no", 2098 (data->has_fan & (1 << 4)) ? "yes" : "no", 2099 (data->has_fan & (1 << 5)) ? "yes" : "no"); 2100 2101 reg = dme1737_read(data, DME1737_REG_TACH_PWM); 2102 /* Inform if fan-to-pwm mapping differs from the default */ 2103 if (client && reg != 0xa4) { /* I2C chip */ 2104 dev_warn(dev, "Non-standard fan to pwm mapping: " 2105 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, " 2106 "fan4->pwm%d. Please report to the driver " 2107 "maintainer.\n", 2108 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, 2109 ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1); 2110 } else if (!client && reg != 0x24) { /* ISA chip */ 2111 dev_warn(dev, "Non-standard fan to pwm mapping: " 2112 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. " 2113 "Please report to the driver maintainer.\n", 2114 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, 2115 ((reg >> 4) & 0x03) + 1); 2116 } 2117 2118 /* Switch pwm[1-3] to manual mode if they are currently disabled and 2119 * set the duty-cycles to 0% (which is identical to the PWMs being 2120 * disabled). */ 2121 if (!(data->config & 0x02)) { 2122 for (ix = 0; ix < 3; ix++) { 2123 data->pwm_config[ix] = dme1737_read(data, 2124 DME1737_REG_PWM_CONFIG(ix)); 2125 if ((data->has_pwm & (1 << ix)) && 2126 (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) { 2127 dev_info(dev, "Switching pwm%d to " 2128 "manual mode.\n", ix + 1); 2129 data->pwm_config[ix] = PWM_EN_TO_REG(1, 2130 data->pwm_config[ix]); 2131 dme1737_write(data, DME1737_REG_PWM(ix), 0); 2132 dme1737_write(data, 2133 DME1737_REG_PWM_CONFIG(ix), 2134 data->pwm_config[ix]); 2135 } 2136 } 2137 } 2138 2139 /* Initialize the default PWM auto channels zone (acz) assignments */ 2140 data->pwm_acz[0] = 1; /* pwm1 -> zone1 */ 2141 data->pwm_acz[1] = 2; /* pwm2 -> zone2 */ 2142 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ 2143 2144 /* Set VRM */ 2145 if (data->type == dme1737) { 2146 data->vrm = vid_which_vrm(); 2147 } 2148 2149 return 0; 2150 } 2151 2152 /* --------------------------------------------------------------------- 2153 * I2C device detection and registration 2154 * --------------------------------------------------------------------- */ 2155 2156 static struct i2c_driver dme1737_i2c_driver; 2157 2158 static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data) 2159 { 2160 int err = 0, reg; 2161 u16 addr; 2162 2163 dme1737_sio_enter(sio_cip); 2164 2165 /* Check device ID 2166 * The DME1737 can return either 0x78 or 0x77 as its device ID. 2167 * The SCH5027 returns 0x89 as its device ID. */ 2168 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); 2169 if (!(reg == 0x77 || reg == 0x78 || reg == 0x89)) { 2170 err = -ENODEV; 2171 goto exit; 2172 } 2173 2174 /* Select logical device A (runtime registers) */ 2175 dme1737_sio_outb(sio_cip, 0x07, 0x0a); 2176 2177 /* Get the base address of the runtime registers */ 2178 if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | 2179 dme1737_sio_inb(sio_cip, 0x61))) { 2180 err = -ENODEV; 2181 goto exit; 2182 } 2183 2184 /* Read the runtime registers to determine which optional features 2185 * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set 2186 * to '10' if the respective feature is enabled. */ 2187 if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */ 2188 data->has_fan |= (1 << 5); 2189 } 2190 if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */ 2191 data->has_pwm |= (1 << 5); 2192 } 2193 if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */ 2194 data->has_fan |= (1 << 4); 2195 } 2196 if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */ 2197 data->has_pwm |= (1 << 4); 2198 } 2199 2200 exit: 2201 dme1737_sio_exit(sio_cip); 2202 2203 return err; 2204 } 2205 2206 /* Return 0 if detection is successful, -ENODEV otherwise */ 2207 static int dme1737_i2c_detect(struct i2c_client *client, 2208 struct i2c_board_info *info) 2209 { 2210 struct i2c_adapter *adapter = client->adapter; 2211 struct device *dev = &adapter->dev; 2212 u8 company, verstep = 0; 2213 const char *name; 2214 2215 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { 2216 return -ENODEV; 2217 } 2218 2219 company = i2c_smbus_read_byte_data(client, DME1737_REG_COMPANY); 2220 verstep = i2c_smbus_read_byte_data(client, DME1737_REG_VERSTEP); 2221 2222 if (company == DME1737_COMPANY_SMSC && 2223 verstep == SCH5027_VERSTEP) { 2224 name = "sch5027"; 2225 2226 } else if (company == DME1737_COMPANY_SMSC && 2227 (verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP) { 2228 name = "dme1737"; 2229 } else { 2230 return -ENODEV; 2231 } 2232 2233 dev_info(dev, "Found a %s chip at 0x%02x (rev 0x%02x).\n", 2234 verstep == SCH5027_VERSTEP ? "SCH5027" : "DME1737", 2235 client->addr, verstep); 2236 strlcpy(info->type, name, I2C_NAME_SIZE); 2237 2238 return 0; 2239 } 2240 2241 static int dme1737_i2c_probe(struct i2c_client *client, 2242 const struct i2c_device_id *id) 2243 { 2244 struct dme1737_data *data; 2245 struct device *dev = &client->dev; 2246 int err; 2247 2248 data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL); 2249 if (!data) { 2250 err = -ENOMEM; 2251 goto exit; 2252 } 2253 2254 i2c_set_clientdata(client, data); 2255 data->type = id->driver_data; 2256 data->client = client; 2257 data->name = client->name; 2258 mutex_init(&data->update_lock); 2259 2260 /* Initialize the DME1737 chip */ 2261 if ((err = dme1737_init_device(dev))) { 2262 dev_err(dev, "Failed to initialize device.\n"); 2263 goto exit_kfree; 2264 } 2265 2266 /* Create sysfs files */ 2267 if ((err = dme1737_create_files(dev))) { 2268 dev_err(dev, "Failed to create sysfs files.\n"); 2269 goto exit_kfree; 2270 } 2271 2272 /* Register device */ 2273 data->hwmon_dev = hwmon_device_register(dev); 2274 if (IS_ERR(data->hwmon_dev)) { 2275 dev_err(dev, "Failed to register device.\n"); 2276 err = PTR_ERR(data->hwmon_dev); 2277 goto exit_remove; 2278 } 2279 2280 return 0; 2281 2282 exit_remove: 2283 dme1737_remove_files(dev); 2284 exit_kfree: 2285 kfree(data); 2286 exit: 2287 return err; 2288 } 2289 2290 static int dme1737_i2c_remove(struct i2c_client *client) 2291 { 2292 struct dme1737_data *data = i2c_get_clientdata(client); 2293 2294 hwmon_device_unregister(data->hwmon_dev); 2295 dme1737_remove_files(&client->dev); 2296 2297 kfree(data); 2298 return 0; 2299 } 2300 2301 static const struct i2c_device_id dme1737_id[] = { 2302 { "dme1737", dme1737 }, 2303 { "sch5027", sch5027 }, 2304 { } 2305 }; 2306 MODULE_DEVICE_TABLE(i2c, dme1737_id); 2307 2308 static struct i2c_driver dme1737_i2c_driver = { 2309 .class = I2C_CLASS_HWMON, 2310 .driver = { 2311 .name = "dme1737", 2312 }, 2313 .probe = dme1737_i2c_probe, 2314 .remove = dme1737_i2c_remove, 2315 .id_table = dme1737_id, 2316 .detect = dme1737_i2c_detect, 2317 .address_list = normal_i2c, 2318 }; 2319 2320 /* --------------------------------------------------------------------- 2321 * ISA device detection and registration 2322 * --------------------------------------------------------------------- */ 2323 2324 static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr) 2325 { 2326 int err = 0, reg; 2327 unsigned short base_addr; 2328 2329 dme1737_sio_enter(sio_cip); 2330 2331 /* Check device ID 2332 * We currently know about SCH3112 (0x7c), SCH3114 (0x7d), and 2333 * SCH3116 (0x7f). */ 2334 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); 2335 if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) { 2336 err = -ENODEV; 2337 goto exit; 2338 } 2339 2340 /* Select logical device A (runtime registers) */ 2341 dme1737_sio_outb(sio_cip, 0x07, 0x0a); 2342 2343 /* Get the base address of the runtime registers */ 2344 if (!(base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | 2345 dme1737_sio_inb(sio_cip, 0x61))) { 2346 printk(KERN_ERR "dme1737: Base address not set.\n"); 2347 err = -ENODEV; 2348 goto exit; 2349 } 2350 2351 /* Access to the hwmon registers is through an index/data register 2352 * pair located at offset 0x70/0x71. */ 2353 *addr = base_addr + 0x70; 2354 2355 exit: 2356 dme1737_sio_exit(sio_cip); 2357 return err; 2358 } 2359 2360 static int __init dme1737_isa_device_add(unsigned short addr) 2361 { 2362 struct resource res = { 2363 .start = addr, 2364 .end = addr + DME1737_EXTENT - 1, 2365 .name = "dme1737", 2366 .flags = IORESOURCE_IO, 2367 }; 2368 int err; 2369 2370 err = acpi_check_resource_conflict(&res); 2371 if (err) 2372 goto exit; 2373 2374 if (!(pdev = platform_device_alloc("dme1737", addr))) { 2375 printk(KERN_ERR "dme1737: Failed to allocate device.\n"); 2376 err = -ENOMEM; 2377 goto exit; 2378 } 2379 2380 if ((err = platform_device_add_resources(pdev, &res, 1))) { 2381 printk(KERN_ERR "dme1737: Failed to add device resource " 2382 "(err = %d).\n", err); 2383 goto exit_device_put; 2384 } 2385 2386 if ((err = platform_device_add(pdev))) { 2387 printk(KERN_ERR "dme1737: Failed to add device (err = %d).\n", 2388 err); 2389 goto exit_device_put; 2390 } 2391 2392 return 0; 2393 2394 exit_device_put: 2395 platform_device_put(pdev); 2396 pdev = NULL; 2397 exit: 2398 return err; 2399 } 2400 2401 static int __devinit dme1737_isa_probe(struct platform_device *pdev) 2402 { 2403 u8 company, device; 2404 struct resource *res; 2405 struct dme1737_data *data; 2406 struct device *dev = &pdev->dev; 2407 int err; 2408 2409 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 2410 if (!request_region(res->start, DME1737_EXTENT, "dme1737")) { 2411 dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n", 2412 (unsigned short)res->start, 2413 (unsigned short)res->start + DME1737_EXTENT - 1); 2414 err = -EBUSY; 2415 goto exit; 2416 } 2417 2418 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) { 2419 err = -ENOMEM; 2420 goto exit_release_region; 2421 } 2422 2423 data->addr = res->start; 2424 platform_set_drvdata(pdev, data); 2425 2426 /* Skip chip detection if module is loaded with force_id parameter */ 2427 if (!force_id) { 2428 company = dme1737_read(data, DME1737_REG_COMPANY); 2429 device = dme1737_read(data, DME1737_REG_DEVICE); 2430 2431 if (!((company == DME1737_COMPANY_SMSC) && 2432 (device == SCH311X_DEVICE))) { 2433 err = -ENODEV; 2434 goto exit_kfree; 2435 } 2436 } 2437 data->type = sch311x; 2438 2439 /* Fill in the remaining client fields and initialize the mutex */ 2440 data->name = "sch311x"; 2441 mutex_init(&data->update_lock); 2442 2443 dev_info(dev, "Found a SCH311x chip at 0x%04x\n", data->addr); 2444 2445 /* Initialize the chip */ 2446 if ((err = dme1737_init_device(dev))) { 2447 dev_err(dev, "Failed to initialize device.\n"); 2448 goto exit_kfree; 2449 } 2450 2451 /* Create sysfs files */ 2452 if ((err = dme1737_create_files(dev))) { 2453 dev_err(dev, "Failed to create sysfs files.\n"); 2454 goto exit_kfree; 2455 } 2456 2457 /* Register device */ 2458 data->hwmon_dev = hwmon_device_register(dev); 2459 if (IS_ERR(data->hwmon_dev)) { 2460 dev_err(dev, "Failed to register device.\n"); 2461 err = PTR_ERR(data->hwmon_dev); 2462 goto exit_remove_files; 2463 } 2464 2465 return 0; 2466 2467 exit_remove_files: 2468 dme1737_remove_files(dev); 2469 exit_kfree: 2470 platform_set_drvdata(pdev, NULL); 2471 kfree(data); 2472 exit_release_region: 2473 release_region(res->start, DME1737_EXTENT); 2474 exit: 2475 return err; 2476 } 2477 2478 static int __devexit dme1737_isa_remove(struct platform_device *pdev) 2479 { 2480 struct dme1737_data *data = platform_get_drvdata(pdev); 2481 2482 hwmon_device_unregister(data->hwmon_dev); 2483 dme1737_remove_files(&pdev->dev); 2484 release_region(data->addr, DME1737_EXTENT); 2485 platform_set_drvdata(pdev, NULL); 2486 kfree(data); 2487 2488 return 0; 2489 } 2490 2491 static struct platform_driver dme1737_isa_driver = { 2492 .driver = { 2493 .owner = THIS_MODULE, 2494 .name = "dme1737", 2495 }, 2496 .probe = dme1737_isa_probe, 2497 .remove = __devexit_p(dme1737_isa_remove), 2498 }; 2499 2500 /* --------------------------------------------------------------------- 2501 * Module initialization and cleanup 2502 * --------------------------------------------------------------------- */ 2503 2504 static int __init dme1737_init(void) 2505 { 2506 int err; 2507 unsigned short addr; 2508 2509 if ((err = i2c_add_driver(&dme1737_i2c_driver))) { 2510 goto exit; 2511 } 2512 2513 if (dme1737_isa_detect(0x2e, &addr) && 2514 dme1737_isa_detect(0x4e, &addr) && 2515 (!probe_all_addr || 2516 (dme1737_isa_detect(0x162e, &addr) && 2517 dme1737_isa_detect(0x164e, &addr)))) { 2518 /* Return 0 if we didn't find an ISA device */ 2519 return 0; 2520 } 2521 2522 if ((err = platform_driver_register(&dme1737_isa_driver))) { 2523 goto exit_del_i2c_driver; 2524 } 2525 2526 /* Sets global pdev as a side effect */ 2527 if ((err = dme1737_isa_device_add(addr))) { 2528 goto exit_del_isa_driver; 2529 } 2530 2531 return 0; 2532 2533 exit_del_isa_driver: 2534 platform_driver_unregister(&dme1737_isa_driver); 2535 exit_del_i2c_driver: 2536 i2c_del_driver(&dme1737_i2c_driver); 2537 exit: 2538 return err; 2539 } 2540 2541 static void __exit dme1737_exit(void) 2542 { 2543 if (pdev) { 2544 platform_device_unregister(pdev); 2545 platform_driver_unregister(&dme1737_isa_driver); 2546 } 2547 2548 i2c_del_driver(&dme1737_i2c_driver); 2549 } 2550 2551 MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>"); 2552 MODULE_DESCRIPTION("DME1737 sensors"); 2553 MODULE_LICENSE("GPL"); 2554 2555 module_init(dme1737_init); 2556 module_exit(dme1737_exit); 2557