xref: /openbmc/linux/drivers/hwmon/coretemp.c (revision 9d749629)
1 /*
2  * coretemp.c - Linux kernel module for hardware monitoring
3  *
4  * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5  *
6  * Inspired from many hwmon drivers
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; version 2 of the License.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20  * 02110-1301 USA.
21  */
22 
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/smp.h>
38 #include <linux/moduleparam.h>
39 #include <asm/msr.h>
40 #include <asm/processor.h>
41 #include <asm/cpu_device_id.h>
42 
43 #define DRVNAME	"coretemp"
44 
45 /*
46  * force_tjmax only matters when TjMax can't be read from the CPU itself.
47  * When set, it replaces the driver's suboptimal heuristic.
48  */
49 static int force_tjmax;
50 module_param_named(tjmax, force_tjmax, int, 0444);
51 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
52 
53 #define BASE_SYSFS_ATTR_NO	2	/* Sysfs Base attr no for coretemp */
54 #define NUM_REAL_CORES		32	/* Number of Real cores per cpu */
55 #define CORETEMP_NAME_LENGTH	17	/* String Length of attrs */
56 #define MAX_CORE_ATTRS		4	/* Maximum no of basic attrs */
57 #define TOTAL_ATTRS		(MAX_CORE_ATTRS + 1)
58 #define MAX_CORE_DATA		(NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
59 
60 #define TO_PHYS_ID(cpu)		(cpu_data(cpu).phys_proc_id)
61 #define TO_CORE_ID(cpu)		(cpu_data(cpu).cpu_core_id)
62 #define TO_ATTR_NO(cpu)		(TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
63 
64 #ifdef CONFIG_SMP
65 #define for_each_sibling(i, cpu)	for_each_cpu(i, cpu_sibling_mask(cpu))
66 #else
67 #define for_each_sibling(i, cpu)	for (i = 0; false; )
68 #endif
69 
70 /*
71  * Per-Core Temperature Data
72  * @last_updated: The time when the current temperature value was updated
73  *		earlier (in jiffies).
74  * @cpu_core_id: The CPU Core from which temperature values should be read
75  *		This value is passed as "id" field to rdmsr/wrmsr functions.
76  * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
77  *		from where the temperature values should be read.
78  * @attr_size:  Total number of pre-core attrs displayed in the sysfs.
79  * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
80  *		Otherwise, temp_data holds coretemp data.
81  * @valid: If this is 1, the current temperature is valid.
82  */
83 struct temp_data {
84 	int temp;
85 	int ttarget;
86 	int tjmax;
87 	unsigned long last_updated;
88 	unsigned int cpu;
89 	u32 cpu_core_id;
90 	u32 status_reg;
91 	int attr_size;
92 	bool is_pkg_data;
93 	bool valid;
94 	struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
95 	char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
96 	struct mutex update_lock;
97 };
98 
99 /* Platform Data per Physical CPU */
100 struct platform_data {
101 	struct device *hwmon_dev;
102 	u16 phys_proc_id;
103 	struct temp_data *core_data[MAX_CORE_DATA];
104 	struct device_attribute name_attr;
105 };
106 
107 struct pdev_entry {
108 	struct list_head list;
109 	struct platform_device *pdev;
110 	u16 phys_proc_id;
111 };
112 
113 static LIST_HEAD(pdev_list);
114 static DEFINE_MUTEX(pdev_list_mutex);
115 
116 static ssize_t show_name(struct device *dev,
117 			struct device_attribute *devattr, char *buf)
118 {
119 	return sprintf(buf, "%s\n", DRVNAME);
120 }
121 
122 static ssize_t show_label(struct device *dev,
123 				struct device_attribute *devattr, char *buf)
124 {
125 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
126 	struct platform_data *pdata = dev_get_drvdata(dev);
127 	struct temp_data *tdata = pdata->core_data[attr->index];
128 
129 	if (tdata->is_pkg_data)
130 		return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
131 
132 	return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
133 }
134 
135 static ssize_t show_crit_alarm(struct device *dev,
136 				struct device_attribute *devattr, char *buf)
137 {
138 	u32 eax, edx;
139 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
140 	struct platform_data *pdata = dev_get_drvdata(dev);
141 	struct temp_data *tdata = pdata->core_data[attr->index];
142 
143 	rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
144 
145 	return sprintf(buf, "%d\n", (eax >> 5) & 1);
146 }
147 
148 static ssize_t show_tjmax(struct device *dev,
149 			struct device_attribute *devattr, char *buf)
150 {
151 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
152 	struct platform_data *pdata = dev_get_drvdata(dev);
153 
154 	return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
155 }
156 
157 static ssize_t show_ttarget(struct device *dev,
158 				struct device_attribute *devattr, char *buf)
159 {
160 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
161 	struct platform_data *pdata = dev_get_drvdata(dev);
162 
163 	return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
164 }
165 
166 static ssize_t show_temp(struct device *dev,
167 			struct device_attribute *devattr, char *buf)
168 {
169 	u32 eax, edx;
170 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
171 	struct platform_data *pdata = dev_get_drvdata(dev);
172 	struct temp_data *tdata = pdata->core_data[attr->index];
173 
174 	mutex_lock(&tdata->update_lock);
175 
176 	/* Check whether the time interval has elapsed */
177 	if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
178 		rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
179 		tdata->valid = 0;
180 		/* Check whether the data is valid */
181 		if (eax & 0x80000000) {
182 			tdata->temp = tdata->tjmax -
183 					((eax >> 16) & 0x7f) * 1000;
184 			tdata->valid = 1;
185 		}
186 		tdata->last_updated = jiffies;
187 	}
188 
189 	mutex_unlock(&tdata->update_lock);
190 	return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
191 }
192 
193 struct tjmax {
194 	char const *id;
195 	int tjmax;
196 };
197 
198 static const struct tjmax __cpuinitconst tjmax_table[] = {
199 	{ "CPU  230", 100000 },		/* Model 0x1c, stepping 2	*/
200 	{ "CPU  330", 125000 },		/* Model 0x1c, stepping 2	*/
201 	{ "CPU CE4110", 110000 },	/* Model 0x1c, stepping 10 Sodaville */
202 	{ "CPU CE4150", 110000 },	/* Model 0x1c, stepping 10	*/
203 	{ "CPU CE4170", 110000 },	/* Model 0x1c, stepping 10	*/
204 };
205 
206 struct tjmax_model {
207 	u8 model;
208 	u8 mask;
209 	int tjmax;
210 };
211 
212 #define ANY 0xff
213 
214 static const struct tjmax_model __cpuinitconst tjmax_model_table[] = {
215 	{ 0x1c, 10, 100000 },	/* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
216 	{ 0x1c, ANY, 90000 },	/* Z5xx, N2xx, possibly others
217 				 * Note: Also matches 230 and 330,
218 				 * which are covered by tjmax_table
219 				 */
220 	{ 0x26, ANY, 90000 },	/* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
221 				 * Note: TjMax for E6xxT is 110C, but CPU type
222 				 * is undetectable by software
223 				 */
224 	{ 0x27, ANY, 90000 },	/* Atom Medfield (Z2460) */
225 	{ 0x35, ANY, 90000 },	/* Atom Clover Trail/Cloverview (Z2760) */
226 	{ 0x36, ANY, 100000 },	/* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) */
227 };
228 
229 static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
230 				  struct device *dev)
231 {
232 	/* The 100C is default for both mobile and non mobile CPUs */
233 
234 	int tjmax = 100000;
235 	int tjmax_ee = 85000;
236 	int usemsr_ee = 1;
237 	int err;
238 	u32 eax, edx;
239 	int i;
240 
241 	/* explicit tjmax table entries override heuristics */
242 	for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
243 		if (strstr(c->x86_model_id, tjmax_table[i].id))
244 			return tjmax_table[i].tjmax;
245 	}
246 
247 	for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
248 		const struct tjmax_model *tm = &tjmax_model_table[i];
249 		if (c->x86_model == tm->model &&
250 		    (tm->mask == ANY || c->x86_mask == tm->mask))
251 			return tm->tjmax;
252 	}
253 
254 	/* Early chips have no MSR for TjMax */
255 
256 	if (c->x86_model == 0xf && c->x86_mask < 4)
257 		usemsr_ee = 0;
258 
259 	if (c->x86_model > 0xe && usemsr_ee) {
260 		u8 platform_id;
261 
262 		/*
263 		 * Now we can detect the mobile CPU using Intel provided table
264 		 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
265 		 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
266 		 */
267 		err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
268 		if (err) {
269 			dev_warn(dev,
270 				 "Unable to access MSR 0x17, assuming desktop"
271 				 " CPU\n");
272 			usemsr_ee = 0;
273 		} else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
274 			/*
275 			 * Trust bit 28 up to Penryn, I could not find any
276 			 * documentation on that; if you happen to know
277 			 * someone at Intel please ask
278 			 */
279 			usemsr_ee = 0;
280 		} else {
281 			/* Platform ID bits 52:50 (EDX starts at bit 32) */
282 			platform_id = (edx >> 18) & 0x7;
283 
284 			/*
285 			 * Mobile Penryn CPU seems to be platform ID 7 or 5
286 			 * (guesswork)
287 			 */
288 			if (c->x86_model == 0x17 &&
289 			    (platform_id == 5 || platform_id == 7)) {
290 				/*
291 				 * If MSR EE bit is set, set it to 90 degrees C,
292 				 * otherwise 105 degrees C
293 				 */
294 				tjmax_ee = 90000;
295 				tjmax = 105000;
296 			}
297 		}
298 	}
299 
300 	if (usemsr_ee) {
301 		err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
302 		if (err) {
303 			dev_warn(dev,
304 				 "Unable to access MSR 0xEE, for Tjmax, left"
305 				 " at default\n");
306 		} else if (eax & 0x40000000) {
307 			tjmax = tjmax_ee;
308 		}
309 	} else if (tjmax == 100000) {
310 		/*
311 		 * If we don't use msr EE it means we are desktop CPU
312 		 * (with exeception of Atom)
313 		 */
314 		dev_warn(dev, "Using relative temperature scale!\n");
315 	}
316 
317 	return tjmax;
318 }
319 
320 static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
321 			       struct device *dev)
322 {
323 	int err;
324 	u32 eax, edx;
325 	u32 val;
326 
327 	/*
328 	 * A new feature of current Intel(R) processors, the
329 	 * IA32_TEMPERATURE_TARGET contains the TjMax value
330 	 */
331 	err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
332 	if (err) {
333 		if (c->x86_model > 0xe && c->x86_model != 0x1c)
334 			dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
335 	} else {
336 		val = (eax >> 16) & 0xff;
337 		/*
338 		 * If the TjMax is not plausible, an assumption
339 		 * will be used
340 		 */
341 		if (val) {
342 			dev_dbg(dev, "TjMax is %d degrees C\n", val);
343 			return val * 1000;
344 		}
345 	}
346 
347 	if (force_tjmax) {
348 		dev_notice(dev, "TjMax forced to %d degrees C by user\n",
349 			   force_tjmax);
350 		return force_tjmax * 1000;
351 	}
352 
353 	/*
354 	 * An assumption is made for early CPUs and unreadable MSR.
355 	 * NOTE: the calculated value may not be correct.
356 	 */
357 	return adjust_tjmax(c, id, dev);
358 }
359 
360 static int create_name_attr(struct platform_data *pdata,
361 				      struct device *dev)
362 {
363 	sysfs_attr_init(&pdata->name_attr.attr);
364 	pdata->name_attr.attr.name = "name";
365 	pdata->name_attr.attr.mode = S_IRUGO;
366 	pdata->name_attr.show = show_name;
367 	return device_create_file(dev, &pdata->name_attr);
368 }
369 
370 static int __cpuinit create_core_attrs(struct temp_data *tdata,
371 				       struct device *dev, int attr_no)
372 {
373 	int err, i;
374 	static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
375 			struct device_attribute *devattr, char *buf) = {
376 			show_label, show_crit_alarm, show_temp, show_tjmax,
377 			show_ttarget };
378 	static const char *const names[TOTAL_ATTRS] = {
379 					"temp%d_label", "temp%d_crit_alarm",
380 					"temp%d_input", "temp%d_crit",
381 					"temp%d_max" };
382 
383 	for (i = 0; i < tdata->attr_size; i++) {
384 		snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
385 			attr_no);
386 		sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
387 		tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
388 		tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
389 		tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
390 		tdata->sd_attrs[i].index = attr_no;
391 		err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
392 		if (err)
393 			goto exit_free;
394 	}
395 	return 0;
396 
397 exit_free:
398 	while (--i >= 0)
399 		device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
400 	return err;
401 }
402 
403 
404 static int __cpuinit chk_ucode_version(unsigned int cpu)
405 {
406 	struct cpuinfo_x86 *c = &cpu_data(cpu);
407 
408 	/*
409 	 * Check if we have problem with errata AE18 of Core processors:
410 	 * Readings might stop update when processor visited too deep sleep,
411 	 * fixed for stepping D0 (6EC).
412 	 */
413 	if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
414 		pr_err("Errata AE18 not fixed, update BIOS or "
415 		       "microcode of the CPU!\n");
416 		return -ENODEV;
417 	}
418 	return 0;
419 }
420 
421 static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu)
422 {
423 	u16 phys_proc_id = TO_PHYS_ID(cpu);
424 	struct pdev_entry *p;
425 
426 	mutex_lock(&pdev_list_mutex);
427 
428 	list_for_each_entry(p, &pdev_list, list)
429 		if (p->phys_proc_id == phys_proc_id) {
430 			mutex_unlock(&pdev_list_mutex);
431 			return p->pdev;
432 		}
433 
434 	mutex_unlock(&pdev_list_mutex);
435 	return NULL;
436 }
437 
438 static struct temp_data __cpuinit *init_temp_data(unsigned int cpu,
439 						  int pkg_flag)
440 {
441 	struct temp_data *tdata;
442 
443 	tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
444 	if (!tdata)
445 		return NULL;
446 
447 	tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
448 							MSR_IA32_THERM_STATUS;
449 	tdata->is_pkg_data = pkg_flag;
450 	tdata->cpu = cpu;
451 	tdata->cpu_core_id = TO_CORE_ID(cpu);
452 	tdata->attr_size = MAX_CORE_ATTRS;
453 	mutex_init(&tdata->update_lock);
454 	return tdata;
455 }
456 
457 static int __cpuinit create_core_data(struct platform_device *pdev,
458 				unsigned int cpu, int pkg_flag)
459 {
460 	struct temp_data *tdata;
461 	struct platform_data *pdata = platform_get_drvdata(pdev);
462 	struct cpuinfo_x86 *c = &cpu_data(cpu);
463 	u32 eax, edx;
464 	int err, attr_no;
465 
466 	/*
467 	 * Find attr number for sysfs:
468 	 * We map the attr number to core id of the CPU
469 	 * The attr number is always core id + 2
470 	 * The Pkgtemp will always show up as temp1_*, if available
471 	 */
472 	attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
473 
474 	if (attr_no > MAX_CORE_DATA - 1)
475 		return -ERANGE;
476 
477 	/*
478 	 * Provide a single set of attributes for all HT siblings of a core
479 	 * to avoid duplicate sensors (the processor ID and core ID of all
480 	 * HT siblings of a core are the same).
481 	 * Skip if a HT sibling of this core is already registered.
482 	 * This is not an error.
483 	 */
484 	if (pdata->core_data[attr_no] != NULL)
485 		return 0;
486 
487 	tdata = init_temp_data(cpu, pkg_flag);
488 	if (!tdata)
489 		return -ENOMEM;
490 
491 	/* Test if we can access the status register */
492 	err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
493 	if (err)
494 		goto exit_free;
495 
496 	/* We can access status register. Get Critical Temperature */
497 	tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
498 
499 	/*
500 	 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
501 	 * The target temperature is available on older CPUs but not in this
502 	 * register. Atoms don't have the register at all.
503 	 */
504 	if (c->x86_model > 0xe && c->x86_model != 0x1c) {
505 		err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
506 					&eax, &edx);
507 		if (!err) {
508 			tdata->ttarget
509 			  = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
510 			tdata->attr_size++;
511 		}
512 	}
513 
514 	pdata->core_data[attr_no] = tdata;
515 
516 	/* Create sysfs interfaces */
517 	err = create_core_attrs(tdata, &pdev->dev, attr_no);
518 	if (err)
519 		goto exit_free;
520 
521 	return 0;
522 exit_free:
523 	pdata->core_data[attr_no] = NULL;
524 	kfree(tdata);
525 	return err;
526 }
527 
528 static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag)
529 {
530 	struct platform_device *pdev = coretemp_get_pdev(cpu);
531 	int err;
532 
533 	if (!pdev)
534 		return;
535 
536 	err = create_core_data(pdev, cpu, pkg_flag);
537 	if (err)
538 		dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
539 }
540 
541 static void coretemp_remove_core(struct platform_data *pdata,
542 				struct device *dev, int indx)
543 {
544 	int i;
545 	struct temp_data *tdata = pdata->core_data[indx];
546 
547 	/* Remove the sysfs attributes */
548 	for (i = 0; i < tdata->attr_size; i++)
549 		device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
550 
551 	kfree(pdata->core_data[indx]);
552 	pdata->core_data[indx] = NULL;
553 }
554 
555 static int coretemp_probe(struct platform_device *pdev)
556 {
557 	struct platform_data *pdata;
558 	int err;
559 
560 	/* Initialize the per-package data structures */
561 	pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
562 	if (!pdata)
563 		return -ENOMEM;
564 
565 	err = create_name_attr(pdata, &pdev->dev);
566 	if (err)
567 		goto exit_free;
568 
569 	pdata->phys_proc_id = pdev->id;
570 	platform_set_drvdata(pdev, pdata);
571 
572 	pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
573 	if (IS_ERR(pdata->hwmon_dev)) {
574 		err = PTR_ERR(pdata->hwmon_dev);
575 		dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
576 		goto exit_name;
577 	}
578 	return 0;
579 
580 exit_name:
581 	device_remove_file(&pdev->dev, &pdata->name_attr);
582 	platform_set_drvdata(pdev, NULL);
583 exit_free:
584 	kfree(pdata);
585 	return err;
586 }
587 
588 static int coretemp_remove(struct platform_device *pdev)
589 {
590 	struct platform_data *pdata = platform_get_drvdata(pdev);
591 	int i;
592 
593 	for (i = MAX_CORE_DATA - 1; i >= 0; --i)
594 		if (pdata->core_data[i])
595 			coretemp_remove_core(pdata, &pdev->dev, i);
596 
597 	device_remove_file(&pdev->dev, &pdata->name_attr);
598 	hwmon_device_unregister(pdata->hwmon_dev);
599 	platform_set_drvdata(pdev, NULL);
600 	kfree(pdata);
601 	return 0;
602 }
603 
604 static struct platform_driver coretemp_driver = {
605 	.driver = {
606 		.owner = THIS_MODULE,
607 		.name = DRVNAME,
608 	},
609 	.probe = coretemp_probe,
610 	.remove = coretemp_remove,
611 };
612 
613 static int __cpuinit coretemp_device_add(unsigned int cpu)
614 {
615 	int err;
616 	struct platform_device *pdev;
617 	struct pdev_entry *pdev_entry;
618 
619 	mutex_lock(&pdev_list_mutex);
620 
621 	pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
622 	if (!pdev) {
623 		err = -ENOMEM;
624 		pr_err("Device allocation failed\n");
625 		goto exit;
626 	}
627 
628 	pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
629 	if (!pdev_entry) {
630 		err = -ENOMEM;
631 		goto exit_device_put;
632 	}
633 
634 	err = platform_device_add(pdev);
635 	if (err) {
636 		pr_err("Device addition failed (%d)\n", err);
637 		goto exit_device_free;
638 	}
639 
640 	pdev_entry->pdev = pdev;
641 	pdev_entry->phys_proc_id = pdev->id;
642 
643 	list_add_tail(&pdev_entry->list, &pdev_list);
644 	mutex_unlock(&pdev_list_mutex);
645 
646 	return 0;
647 
648 exit_device_free:
649 	kfree(pdev_entry);
650 exit_device_put:
651 	platform_device_put(pdev);
652 exit:
653 	mutex_unlock(&pdev_list_mutex);
654 	return err;
655 }
656 
657 static void __cpuinit coretemp_device_remove(unsigned int cpu)
658 {
659 	struct pdev_entry *p, *n;
660 	u16 phys_proc_id = TO_PHYS_ID(cpu);
661 
662 	mutex_lock(&pdev_list_mutex);
663 	list_for_each_entry_safe(p, n, &pdev_list, list) {
664 		if (p->phys_proc_id != phys_proc_id)
665 			continue;
666 		platform_device_unregister(p->pdev);
667 		list_del(&p->list);
668 		kfree(p);
669 	}
670 	mutex_unlock(&pdev_list_mutex);
671 }
672 
673 static bool __cpuinit is_any_core_online(struct platform_data *pdata)
674 {
675 	int i;
676 
677 	/* Find online cores, except pkgtemp data */
678 	for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
679 		if (pdata->core_data[i] &&
680 			!pdata->core_data[i]->is_pkg_data) {
681 			return true;
682 		}
683 	}
684 	return false;
685 }
686 
687 static void __cpuinit get_core_online(unsigned int cpu)
688 {
689 	struct cpuinfo_x86 *c = &cpu_data(cpu);
690 	struct platform_device *pdev = coretemp_get_pdev(cpu);
691 	int err;
692 
693 	/*
694 	 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
695 	 * sensors. We check this bit only, all the early CPUs
696 	 * without thermal sensors will be filtered out.
697 	 */
698 	if (!cpu_has(c, X86_FEATURE_DTHERM))
699 		return;
700 
701 	if (!pdev) {
702 		/* Check the microcode version of the CPU */
703 		if (chk_ucode_version(cpu))
704 			return;
705 
706 		/*
707 		 * Alright, we have DTS support.
708 		 * We are bringing the _first_ core in this pkg
709 		 * online. So, initialize per-pkg data structures and
710 		 * then bring this core online.
711 		 */
712 		err = coretemp_device_add(cpu);
713 		if (err)
714 			return;
715 		/*
716 		 * Check whether pkgtemp support is available.
717 		 * If so, add interfaces for pkgtemp.
718 		 */
719 		if (cpu_has(c, X86_FEATURE_PTS))
720 			coretemp_add_core(cpu, 1);
721 	}
722 	/*
723 	 * Physical CPU device already exists.
724 	 * So, just add interfaces for this core.
725 	 */
726 	coretemp_add_core(cpu, 0);
727 }
728 
729 static void __cpuinit put_core_offline(unsigned int cpu)
730 {
731 	int i, indx;
732 	struct platform_data *pdata;
733 	struct platform_device *pdev = coretemp_get_pdev(cpu);
734 
735 	/* If the physical CPU device does not exist, just return */
736 	if (!pdev)
737 		return;
738 
739 	pdata = platform_get_drvdata(pdev);
740 
741 	indx = TO_ATTR_NO(cpu);
742 
743 	/* The core id is too big, just return */
744 	if (indx > MAX_CORE_DATA - 1)
745 		return;
746 
747 	if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
748 		coretemp_remove_core(pdata, &pdev->dev, indx);
749 
750 	/*
751 	 * If a HT sibling of a core is taken offline, but another HT sibling
752 	 * of the same core is still online, register the alternate sibling.
753 	 * This ensures that exactly one set of attributes is provided as long
754 	 * as at least one HT sibling of a core is online.
755 	 */
756 	for_each_sibling(i, cpu) {
757 		if (i != cpu) {
758 			get_core_online(i);
759 			/*
760 			 * Display temperature sensor data for one HT sibling
761 			 * per core only, so abort the loop after one such
762 			 * sibling has been found.
763 			 */
764 			break;
765 		}
766 	}
767 	/*
768 	 * If all cores in this pkg are offline, remove the device.
769 	 * coretemp_device_remove calls unregister_platform_device,
770 	 * which in turn calls coretemp_remove. This removes the
771 	 * pkgtemp entry and does other clean ups.
772 	 */
773 	if (!is_any_core_online(pdata))
774 		coretemp_device_remove(cpu);
775 }
776 
777 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
778 				 unsigned long action, void *hcpu)
779 {
780 	unsigned int cpu = (unsigned long) hcpu;
781 
782 	switch (action) {
783 	case CPU_ONLINE:
784 	case CPU_DOWN_FAILED:
785 		get_core_online(cpu);
786 		break;
787 	case CPU_DOWN_PREPARE:
788 		put_core_offline(cpu);
789 		break;
790 	}
791 	return NOTIFY_OK;
792 }
793 
794 static struct notifier_block coretemp_cpu_notifier __refdata = {
795 	.notifier_call = coretemp_cpu_callback,
796 };
797 
798 static const struct x86_cpu_id __initconst coretemp_ids[] = {
799 	{ X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
800 	{}
801 };
802 MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
803 
804 static int __init coretemp_init(void)
805 {
806 	int i, err;
807 
808 	/*
809 	 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
810 	 * sensors. We check this bit only, all the early CPUs
811 	 * without thermal sensors will be filtered out.
812 	 */
813 	if (!x86_match_cpu(coretemp_ids))
814 		return -ENODEV;
815 
816 	err = platform_driver_register(&coretemp_driver);
817 	if (err)
818 		goto exit;
819 
820 	get_online_cpus();
821 	for_each_online_cpu(i)
822 		get_core_online(i);
823 
824 #ifndef CONFIG_HOTPLUG_CPU
825 	if (list_empty(&pdev_list)) {
826 		put_online_cpus();
827 		err = -ENODEV;
828 		goto exit_driver_unreg;
829 	}
830 #endif
831 
832 	register_hotcpu_notifier(&coretemp_cpu_notifier);
833 	put_online_cpus();
834 	return 0;
835 
836 #ifndef CONFIG_HOTPLUG_CPU
837 exit_driver_unreg:
838 	platform_driver_unregister(&coretemp_driver);
839 #endif
840 exit:
841 	return err;
842 }
843 
844 static void __exit coretemp_exit(void)
845 {
846 	struct pdev_entry *p, *n;
847 
848 	get_online_cpus();
849 	unregister_hotcpu_notifier(&coretemp_cpu_notifier);
850 	mutex_lock(&pdev_list_mutex);
851 	list_for_each_entry_safe(p, n, &pdev_list, list) {
852 		platform_device_unregister(p->pdev);
853 		list_del(&p->list);
854 		kfree(p);
855 	}
856 	mutex_unlock(&pdev_list_mutex);
857 	put_online_cpus();
858 	platform_driver_unregister(&coretemp_driver);
859 }
860 
861 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
862 MODULE_DESCRIPTION("Intel Core temperature monitor");
863 MODULE_LICENSE("GPL");
864 
865 module_init(coretemp_init)
866 module_exit(coretemp_exit)
867