1 /* 2 * coretemp.c - Linux kernel module for hardware monitoring 3 * 4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> 5 * 6 * Inspired from many hwmon drivers 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; version 2 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 20 * 02110-1301 USA. 21 */ 22 23 #include <linux/module.h> 24 #include <linux/delay.h> 25 #include <linux/init.h> 26 #include <linux/slab.h> 27 #include <linux/jiffies.h> 28 #include <linux/hwmon.h> 29 #include <linux/sysfs.h> 30 #include <linux/hwmon-sysfs.h> 31 #include <linux/err.h> 32 #include <linux/mutex.h> 33 #include <linux/list.h> 34 #include <linux/platform_device.h> 35 #include <linux/cpu.h> 36 #include <asm/msr.h> 37 #include <asm/processor.h> 38 39 #define DRVNAME "coretemp" 40 41 typedef enum { SHOW_TEMP, SHOW_TJMAX, SHOW_TTARGET, SHOW_LABEL, 42 SHOW_NAME } SHOW; 43 44 /* 45 * Functions declaration 46 */ 47 48 static struct coretemp_data *coretemp_update_device(struct device *dev); 49 50 struct coretemp_data { 51 struct device *hwmon_dev; 52 struct mutex update_lock; 53 const char *name; 54 u32 id; 55 char valid; /* zero until following fields are valid */ 56 unsigned long last_updated; /* in jiffies */ 57 int temp; 58 int tjmax; 59 int ttarget; 60 u8 alarm; 61 }; 62 63 /* 64 * Sysfs stuff 65 */ 66 67 static ssize_t show_name(struct device *dev, struct device_attribute 68 *devattr, char *buf) 69 { 70 int ret; 71 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 72 struct coretemp_data *data = dev_get_drvdata(dev); 73 74 if (attr->index == SHOW_NAME) 75 ret = sprintf(buf, "%s\n", data->name); 76 else /* show label */ 77 ret = sprintf(buf, "Core %d\n", data->id); 78 return ret; 79 } 80 81 static ssize_t show_alarm(struct device *dev, struct device_attribute 82 *devattr, char *buf) 83 { 84 struct coretemp_data *data = coretemp_update_device(dev); 85 /* read the Out-of-spec log, never clear */ 86 return sprintf(buf, "%d\n", data->alarm); 87 } 88 89 static ssize_t show_temp(struct device *dev, 90 struct device_attribute *devattr, char *buf) 91 { 92 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 93 struct coretemp_data *data = coretemp_update_device(dev); 94 int err; 95 96 if (attr->index == SHOW_TEMP) 97 err = data->valid ? sprintf(buf, "%d\n", data->temp) : -EAGAIN; 98 else if (attr->index == SHOW_TJMAX) 99 err = sprintf(buf, "%d\n", data->tjmax); 100 else 101 err = sprintf(buf, "%d\n", data->ttarget); 102 return err; 103 } 104 105 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 106 SHOW_TEMP); 107 static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp, NULL, 108 SHOW_TJMAX); 109 static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp, NULL, 110 SHOW_TTARGET); 111 static DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL); 112 static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_name, NULL, SHOW_LABEL); 113 static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, SHOW_NAME); 114 115 static struct attribute *coretemp_attributes[] = { 116 &sensor_dev_attr_name.dev_attr.attr, 117 &sensor_dev_attr_temp1_label.dev_attr.attr, 118 &dev_attr_temp1_crit_alarm.attr, 119 &sensor_dev_attr_temp1_input.dev_attr.attr, 120 &sensor_dev_attr_temp1_crit.dev_attr.attr, 121 NULL 122 }; 123 124 static const struct attribute_group coretemp_group = { 125 .attrs = coretemp_attributes, 126 }; 127 128 static struct coretemp_data *coretemp_update_device(struct device *dev) 129 { 130 struct coretemp_data *data = dev_get_drvdata(dev); 131 132 mutex_lock(&data->update_lock); 133 134 if (!data->valid || time_after(jiffies, data->last_updated + HZ)) { 135 u32 eax, edx; 136 137 data->valid = 0; 138 rdmsr_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx); 139 data->alarm = (eax >> 5) & 1; 140 /* update only if data has been valid */ 141 if (eax & 0x80000000) { 142 data->temp = data->tjmax - (((eax >> 16) 143 & 0x7f) * 1000); 144 data->valid = 1; 145 } else { 146 dev_dbg(dev, "Temperature data invalid (0x%x)\n", eax); 147 } 148 data->last_updated = jiffies; 149 } 150 151 mutex_unlock(&data->update_lock); 152 return data; 153 } 154 155 static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) 156 { 157 /* The 100C is default for both mobile and non mobile CPUs */ 158 159 int tjmax = 100000; 160 int tjmax_ee = 85000; 161 int usemsr_ee = 1; 162 int err; 163 u32 eax, edx; 164 165 /* Early chips have no MSR for TjMax */ 166 167 if ((c->x86_model == 0xf) && (c->x86_mask < 4)) { 168 usemsr_ee = 0; 169 } 170 171 /* Atoms seems to have TjMax at 90C */ 172 173 if (c->x86_model == 0x1c) { 174 usemsr_ee = 0; 175 tjmax = 90000; 176 } 177 178 if ((c->x86_model > 0xe) && (usemsr_ee)) { 179 u8 platform_id; 180 181 /* Now we can detect the mobile CPU using Intel provided table 182 http://softwarecommunity.intel.com/Wiki/Mobility/720.htm 183 For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU 184 */ 185 186 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); 187 if (err) { 188 dev_warn(dev, 189 "Unable to access MSR 0x17, assuming desktop" 190 " CPU\n"); 191 usemsr_ee = 0; 192 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { 193 /* Trust bit 28 up to Penryn, I could not find any 194 documentation on that; if you happen to know 195 someone at Intel please ask */ 196 usemsr_ee = 0; 197 } else { 198 /* Platform ID bits 52:50 (EDX starts at bit 32) */ 199 platform_id = (edx >> 18) & 0x7; 200 201 /* Mobile Penryn CPU seems to be platform ID 7 or 5 202 (guesswork) */ 203 if ((c->x86_model == 0x17) && 204 ((platform_id == 5) || (platform_id == 7))) { 205 /* If MSR EE bit is set, set it to 90 degrees C, 206 otherwise 105 degrees C */ 207 tjmax_ee = 90000; 208 tjmax = 105000; 209 } 210 } 211 } 212 213 if (usemsr_ee) { 214 215 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); 216 if (err) { 217 dev_warn(dev, 218 "Unable to access MSR 0xEE, for Tjmax, left" 219 " at default"); 220 } else if (eax & 0x40000000) { 221 tjmax = tjmax_ee; 222 } 223 /* if we dont use msr EE it means we are desktop CPU (with exeception 224 of Atom) */ 225 } else if (tjmax == 100000) { 226 dev_warn(dev, "Using relative temperature scale!\n"); 227 } 228 229 return tjmax; 230 } 231 232 static int __devinit coretemp_probe(struct platform_device *pdev) 233 { 234 struct coretemp_data *data; 235 struct cpuinfo_x86 *c = &cpu_data(pdev->id); 236 int err; 237 u32 eax, edx; 238 239 if (!(data = kzalloc(sizeof(struct coretemp_data), GFP_KERNEL))) { 240 err = -ENOMEM; 241 dev_err(&pdev->dev, "Out of memory\n"); 242 goto exit; 243 } 244 245 data->id = pdev->id; 246 data->name = "coretemp"; 247 mutex_init(&data->update_lock); 248 249 /* test if we can access the THERM_STATUS MSR */ 250 err = rdmsr_safe_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx); 251 if (err) { 252 dev_err(&pdev->dev, 253 "Unable to access THERM_STATUS MSR, giving up\n"); 254 goto exit_free; 255 } 256 257 /* Check if we have problem with errata AE18 of Core processors: 258 Readings might stop update when processor visited too deep sleep, 259 fixed for stepping D0 (6EC). 260 */ 261 262 if ((c->x86_model == 0xe) && (c->x86_mask < 0xc)) { 263 /* check for microcode update */ 264 rdmsr_on_cpu(data->id, MSR_IA32_UCODE_REV, &eax, &edx); 265 if (edx < 0x39) { 266 err = -ENODEV; 267 dev_err(&pdev->dev, 268 "Errata AE18 not fixed, update BIOS or " 269 "microcode of the CPU!\n"); 270 goto exit_free; 271 } 272 } 273 274 data->tjmax = adjust_tjmax(c, data->id, &pdev->dev); 275 platform_set_drvdata(pdev, data); 276 277 /* read the still undocumented IA32_TEMPERATURE_TARGET it exists 278 on older CPUs but not in this register, Atoms don't have it either */ 279 280 if ((c->x86_model > 0xe) && (c->x86_model != 0x1c)) { 281 err = rdmsr_safe_on_cpu(data->id, 0x1a2, &eax, &edx); 282 if (err) { 283 dev_warn(&pdev->dev, "Unable to read" 284 " IA32_TEMPERATURE_TARGET MSR\n"); 285 } else { 286 data->ttarget = data->tjmax - 287 (((eax >> 8) & 0xff) * 1000); 288 err = device_create_file(&pdev->dev, 289 &sensor_dev_attr_temp1_max.dev_attr); 290 if (err) 291 goto exit_free; 292 } 293 } 294 295 if ((err = sysfs_create_group(&pdev->dev.kobj, &coretemp_group))) 296 goto exit_dev; 297 298 data->hwmon_dev = hwmon_device_register(&pdev->dev); 299 if (IS_ERR(data->hwmon_dev)) { 300 err = PTR_ERR(data->hwmon_dev); 301 dev_err(&pdev->dev, "Class registration failed (%d)\n", 302 err); 303 goto exit_class; 304 } 305 306 return 0; 307 308 exit_class: 309 sysfs_remove_group(&pdev->dev.kobj, &coretemp_group); 310 exit_dev: 311 device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr); 312 exit_free: 313 kfree(data); 314 exit: 315 return err; 316 } 317 318 static int __devexit coretemp_remove(struct platform_device *pdev) 319 { 320 struct coretemp_data *data = platform_get_drvdata(pdev); 321 322 hwmon_device_unregister(data->hwmon_dev); 323 sysfs_remove_group(&pdev->dev.kobj, &coretemp_group); 324 device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr); 325 platform_set_drvdata(pdev, NULL); 326 kfree(data); 327 return 0; 328 } 329 330 static struct platform_driver coretemp_driver = { 331 .driver = { 332 .owner = THIS_MODULE, 333 .name = DRVNAME, 334 }, 335 .probe = coretemp_probe, 336 .remove = __devexit_p(coretemp_remove), 337 }; 338 339 struct pdev_entry { 340 struct list_head list; 341 struct platform_device *pdev; 342 unsigned int cpu; 343 }; 344 345 static LIST_HEAD(pdev_list); 346 static DEFINE_MUTEX(pdev_list_mutex); 347 348 static int __cpuinit coretemp_device_add(unsigned int cpu) 349 { 350 int err; 351 struct platform_device *pdev; 352 struct pdev_entry *pdev_entry; 353 354 pdev = platform_device_alloc(DRVNAME, cpu); 355 if (!pdev) { 356 err = -ENOMEM; 357 printk(KERN_ERR DRVNAME ": Device allocation failed\n"); 358 goto exit; 359 } 360 361 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); 362 if (!pdev_entry) { 363 err = -ENOMEM; 364 goto exit_device_put; 365 } 366 367 err = platform_device_add(pdev); 368 if (err) { 369 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", 370 err); 371 goto exit_device_free; 372 } 373 374 pdev_entry->pdev = pdev; 375 pdev_entry->cpu = cpu; 376 mutex_lock(&pdev_list_mutex); 377 list_add_tail(&pdev_entry->list, &pdev_list); 378 mutex_unlock(&pdev_list_mutex); 379 380 return 0; 381 382 exit_device_free: 383 kfree(pdev_entry); 384 exit_device_put: 385 platform_device_put(pdev); 386 exit: 387 return err; 388 } 389 390 #ifdef CONFIG_HOTPLUG_CPU 391 static void coretemp_device_remove(unsigned int cpu) 392 { 393 struct pdev_entry *p, *n; 394 mutex_lock(&pdev_list_mutex); 395 list_for_each_entry_safe(p, n, &pdev_list, list) { 396 if (p->cpu == cpu) { 397 platform_device_unregister(p->pdev); 398 list_del(&p->list); 399 kfree(p); 400 } 401 } 402 mutex_unlock(&pdev_list_mutex); 403 } 404 405 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb, 406 unsigned long action, void *hcpu) 407 { 408 unsigned int cpu = (unsigned long) hcpu; 409 410 switch (action) { 411 case CPU_ONLINE: 412 case CPU_DOWN_FAILED: 413 coretemp_device_add(cpu); 414 break; 415 case CPU_DOWN_PREPARE: 416 coretemp_device_remove(cpu); 417 break; 418 } 419 return NOTIFY_OK; 420 } 421 422 static struct notifier_block coretemp_cpu_notifier __refdata = { 423 .notifier_call = coretemp_cpu_callback, 424 }; 425 #endif /* !CONFIG_HOTPLUG_CPU */ 426 427 static int __init coretemp_init(void) 428 { 429 int i, err = -ENODEV; 430 struct pdev_entry *p, *n; 431 432 /* quick check if we run Intel */ 433 if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL) 434 goto exit; 435 436 err = platform_driver_register(&coretemp_driver); 437 if (err) 438 goto exit; 439 440 for_each_online_cpu(i) { 441 struct cpuinfo_x86 *c = &cpu_data(i); 442 443 /* check if family 6, models 0xe (Pentium M DC), 444 0xf (Core 2 DC 65nm), 0x16 (Core 2 SC 65nm), 445 0x17 (Penryn 45nm), 0x1a (Nehalem), 0x1c (Atom), 446 0x1e (Lynnfield) */ 447 if ((c->cpuid_level < 0) || (c->x86 != 0x6) || 448 !((c->x86_model == 0xe) || (c->x86_model == 0xf) || 449 (c->x86_model == 0x16) || (c->x86_model == 0x17) || 450 (c->x86_model == 0x1a) || (c->x86_model == 0x1c) || 451 (c->x86_model == 0x1e))) { 452 453 /* supported CPU not found, but report the unknown 454 family 6 CPU */ 455 if ((c->x86 == 0x6) && (c->x86_model > 0xf)) 456 printk(KERN_WARNING DRVNAME ": Unknown CPU " 457 "model %x\n", c->x86_model); 458 continue; 459 } 460 461 err = coretemp_device_add(i); 462 if (err) 463 goto exit_devices_unreg; 464 } 465 if (list_empty(&pdev_list)) { 466 err = -ENODEV; 467 goto exit_driver_unreg; 468 } 469 470 #ifdef CONFIG_HOTPLUG_CPU 471 register_hotcpu_notifier(&coretemp_cpu_notifier); 472 #endif 473 return 0; 474 475 exit_devices_unreg: 476 mutex_lock(&pdev_list_mutex); 477 list_for_each_entry_safe(p, n, &pdev_list, list) { 478 platform_device_unregister(p->pdev); 479 list_del(&p->list); 480 kfree(p); 481 } 482 mutex_unlock(&pdev_list_mutex); 483 exit_driver_unreg: 484 platform_driver_unregister(&coretemp_driver); 485 exit: 486 return err; 487 } 488 489 static void __exit coretemp_exit(void) 490 { 491 struct pdev_entry *p, *n; 492 #ifdef CONFIG_HOTPLUG_CPU 493 unregister_hotcpu_notifier(&coretemp_cpu_notifier); 494 #endif 495 mutex_lock(&pdev_list_mutex); 496 list_for_each_entry_safe(p, n, &pdev_list, list) { 497 platform_device_unregister(p->pdev); 498 list_del(&p->list); 499 kfree(p); 500 } 501 mutex_unlock(&pdev_list_mutex); 502 platform_driver_unregister(&coretemp_driver); 503 } 504 505 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); 506 MODULE_DESCRIPTION("Intel Core temperature monitor"); 507 MODULE_LICENSE("GPL"); 508 509 module_init(coretemp_init) 510 module_exit(coretemp_exit) 511