xref: /openbmc/linux/drivers/hwmon/coretemp.c (revision 7490ca1e)
1 /*
2  * coretemp.c - Linux kernel module for hardware monitoring
3  *
4  * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5  *
6  * Inspired from many hwmon drivers
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; version 2 of the License.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20  * 02110-1301 USA.
21  */
22 
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/pci.h>
38 #include <linux/smp.h>
39 #include <linux/moduleparam.h>
40 #include <asm/msr.h>
41 #include <asm/processor.h>
42 
43 #define DRVNAME	"coretemp"
44 
45 /*
46  * force_tjmax only matters when TjMax can't be read from the CPU itself.
47  * When set, it replaces the driver's suboptimal heuristic.
48  */
49 static int force_tjmax;
50 module_param_named(tjmax, force_tjmax, int, 0444);
51 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
52 
53 #define BASE_SYSFS_ATTR_NO	2	/* Sysfs Base attr no for coretemp */
54 #define NUM_REAL_CORES		16	/* Number of Real cores per cpu */
55 #define CORETEMP_NAME_LENGTH	17	/* String Length of attrs */
56 #define MAX_CORE_ATTRS		4	/* Maximum no of basic attrs */
57 #define TOTAL_ATTRS		(MAX_CORE_ATTRS + 1)
58 #define MAX_CORE_DATA		(NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
59 
60 #define TO_PHYS_ID(cpu)		cpu_data(cpu).phys_proc_id
61 #define TO_CORE_ID(cpu)		cpu_data(cpu).cpu_core_id
62 #define TO_ATTR_NO(cpu)		(TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
63 
64 #ifdef CONFIG_SMP
65 #define for_each_sibling(i, cpu)	for_each_cpu(i, cpu_sibling_mask(cpu))
66 #else
67 #define for_each_sibling(i, cpu)	for (i = 0; false; )
68 #endif
69 
70 /*
71  * Per-Core Temperature Data
72  * @last_updated: The time when the current temperature value was updated
73  *		earlier (in jiffies).
74  * @cpu_core_id: The CPU Core from which temperature values should be read
75  *		This value is passed as "id" field to rdmsr/wrmsr functions.
76  * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
77  *		from where the temperature values should be read.
78  * @attr_size:  Total number of pre-core attrs displayed in the sysfs.
79  * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
80  *		Otherwise, temp_data holds coretemp data.
81  * @valid: If this is 1, the current temperature is valid.
82  */
83 struct temp_data {
84 	int temp;
85 	int ttarget;
86 	int tjmax;
87 	unsigned long last_updated;
88 	unsigned int cpu;
89 	u32 cpu_core_id;
90 	u32 status_reg;
91 	int attr_size;
92 	bool is_pkg_data;
93 	bool valid;
94 	struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
95 	char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
96 	struct mutex update_lock;
97 };
98 
99 /* Platform Data per Physical CPU */
100 struct platform_data {
101 	struct device *hwmon_dev;
102 	u16 phys_proc_id;
103 	struct temp_data *core_data[MAX_CORE_DATA];
104 	struct device_attribute name_attr;
105 };
106 
107 struct pdev_entry {
108 	struct list_head list;
109 	struct platform_device *pdev;
110 	u16 phys_proc_id;
111 };
112 
113 static LIST_HEAD(pdev_list);
114 static DEFINE_MUTEX(pdev_list_mutex);
115 
116 static ssize_t show_name(struct device *dev,
117 			struct device_attribute *devattr, char *buf)
118 {
119 	return sprintf(buf, "%s\n", DRVNAME);
120 }
121 
122 static ssize_t show_label(struct device *dev,
123 				struct device_attribute *devattr, char *buf)
124 {
125 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
126 	struct platform_data *pdata = dev_get_drvdata(dev);
127 	struct temp_data *tdata = pdata->core_data[attr->index];
128 
129 	if (tdata->is_pkg_data)
130 		return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
131 
132 	return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
133 }
134 
135 static ssize_t show_crit_alarm(struct device *dev,
136 				struct device_attribute *devattr, char *buf)
137 {
138 	u32 eax, edx;
139 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
140 	struct platform_data *pdata = dev_get_drvdata(dev);
141 	struct temp_data *tdata = pdata->core_data[attr->index];
142 
143 	rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
144 
145 	return sprintf(buf, "%d\n", (eax >> 5) & 1);
146 }
147 
148 static ssize_t show_tjmax(struct device *dev,
149 			struct device_attribute *devattr, char *buf)
150 {
151 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
152 	struct platform_data *pdata = dev_get_drvdata(dev);
153 
154 	return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
155 }
156 
157 static ssize_t show_ttarget(struct device *dev,
158 				struct device_attribute *devattr, char *buf)
159 {
160 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
161 	struct platform_data *pdata = dev_get_drvdata(dev);
162 
163 	return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
164 }
165 
166 static ssize_t show_temp(struct device *dev,
167 			struct device_attribute *devattr, char *buf)
168 {
169 	u32 eax, edx;
170 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
171 	struct platform_data *pdata = dev_get_drvdata(dev);
172 	struct temp_data *tdata = pdata->core_data[attr->index];
173 
174 	mutex_lock(&tdata->update_lock);
175 
176 	/* Check whether the time interval has elapsed */
177 	if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
178 		rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
179 		tdata->valid = 0;
180 		/* Check whether the data is valid */
181 		if (eax & 0x80000000) {
182 			tdata->temp = tdata->tjmax -
183 					((eax >> 16) & 0x7f) * 1000;
184 			tdata->valid = 1;
185 		}
186 		tdata->last_updated = jiffies;
187 	}
188 
189 	mutex_unlock(&tdata->update_lock);
190 	return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
191 }
192 
193 static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
194 				  struct device *dev)
195 {
196 	/* The 100C is default for both mobile and non mobile CPUs */
197 
198 	int tjmax = 100000;
199 	int tjmax_ee = 85000;
200 	int usemsr_ee = 1;
201 	int err;
202 	u32 eax, edx;
203 	struct pci_dev *host_bridge;
204 
205 	/* Early chips have no MSR for TjMax */
206 
207 	if (c->x86_model == 0xf && c->x86_mask < 4)
208 		usemsr_ee = 0;
209 
210 	/* Atom CPUs */
211 
212 	if (c->x86_model == 0x1c) {
213 		usemsr_ee = 0;
214 
215 		host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
216 
217 		if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
218 		    && (host_bridge->device == 0xa000	/* NM10 based nettop */
219 		    || host_bridge->device == 0xa010))	/* NM10 based netbook */
220 			tjmax = 100000;
221 		else
222 			tjmax = 90000;
223 
224 		pci_dev_put(host_bridge);
225 	}
226 
227 	if (c->x86_model > 0xe && usemsr_ee) {
228 		u8 platform_id;
229 
230 		/*
231 		 * Now we can detect the mobile CPU using Intel provided table
232 		 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
233 		 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
234 		 */
235 		err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
236 		if (err) {
237 			dev_warn(dev,
238 				 "Unable to access MSR 0x17, assuming desktop"
239 				 " CPU\n");
240 			usemsr_ee = 0;
241 		} else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
242 			/*
243 			 * Trust bit 28 up to Penryn, I could not find any
244 			 * documentation on that; if you happen to know
245 			 * someone at Intel please ask
246 			 */
247 			usemsr_ee = 0;
248 		} else {
249 			/* Platform ID bits 52:50 (EDX starts at bit 32) */
250 			platform_id = (edx >> 18) & 0x7;
251 
252 			/*
253 			 * Mobile Penryn CPU seems to be platform ID 7 or 5
254 			 * (guesswork)
255 			 */
256 			if (c->x86_model == 0x17 &&
257 			    (platform_id == 5 || platform_id == 7)) {
258 				/*
259 				 * If MSR EE bit is set, set it to 90 degrees C,
260 				 * otherwise 105 degrees C
261 				 */
262 				tjmax_ee = 90000;
263 				tjmax = 105000;
264 			}
265 		}
266 	}
267 
268 	if (usemsr_ee) {
269 		err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
270 		if (err) {
271 			dev_warn(dev,
272 				 "Unable to access MSR 0xEE, for Tjmax, left"
273 				 " at default\n");
274 		} else if (eax & 0x40000000) {
275 			tjmax = tjmax_ee;
276 		}
277 	} else if (tjmax == 100000) {
278 		/*
279 		 * If we don't use msr EE it means we are desktop CPU
280 		 * (with exeception of Atom)
281 		 */
282 		dev_warn(dev, "Using relative temperature scale!\n");
283 	}
284 
285 	return tjmax;
286 }
287 
288 static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
289 			       struct device *dev)
290 {
291 	int err;
292 	u32 eax, edx;
293 	u32 val;
294 
295 	/*
296 	 * A new feature of current Intel(R) processors, the
297 	 * IA32_TEMPERATURE_TARGET contains the TjMax value
298 	 */
299 	err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
300 	if (err) {
301 		if (c->x86_model > 0xe && c->x86_model != 0x1c)
302 			dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
303 	} else {
304 		val = (eax >> 16) & 0xff;
305 		/*
306 		 * If the TjMax is not plausible, an assumption
307 		 * will be used
308 		 */
309 		if (val) {
310 			dev_dbg(dev, "TjMax is %d degrees C\n", val);
311 			return val * 1000;
312 		}
313 	}
314 
315 	if (force_tjmax) {
316 		dev_notice(dev, "TjMax forced to %d degrees C by user\n",
317 			   force_tjmax);
318 		return force_tjmax * 1000;
319 	}
320 
321 	/*
322 	 * An assumption is made for early CPUs and unreadable MSR.
323 	 * NOTE: the calculated value may not be correct.
324 	 */
325 	return adjust_tjmax(c, id, dev);
326 }
327 
328 static int __devinit create_name_attr(struct platform_data *pdata,
329 				      struct device *dev)
330 {
331 	sysfs_attr_init(&pdata->name_attr.attr);
332 	pdata->name_attr.attr.name = "name";
333 	pdata->name_attr.attr.mode = S_IRUGO;
334 	pdata->name_attr.show = show_name;
335 	return device_create_file(dev, &pdata->name_attr);
336 }
337 
338 static int __cpuinit create_core_attrs(struct temp_data *tdata,
339 				       struct device *dev, int attr_no)
340 {
341 	int err, i;
342 	static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
343 			struct device_attribute *devattr, char *buf) = {
344 			show_label, show_crit_alarm, show_temp, show_tjmax,
345 			show_ttarget };
346 	static const char *const names[TOTAL_ATTRS] = {
347 					"temp%d_label", "temp%d_crit_alarm",
348 					"temp%d_input", "temp%d_crit",
349 					"temp%d_max" };
350 
351 	for (i = 0; i < tdata->attr_size; i++) {
352 		snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
353 			attr_no);
354 		sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
355 		tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
356 		tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
357 		tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
358 		tdata->sd_attrs[i].index = attr_no;
359 		err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
360 		if (err)
361 			goto exit_free;
362 	}
363 	return 0;
364 
365 exit_free:
366 	while (--i >= 0)
367 		device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
368 	return err;
369 }
370 
371 
372 static int __cpuinit chk_ucode_version(unsigned int cpu)
373 {
374 	struct cpuinfo_x86 *c = &cpu_data(cpu);
375 
376 	/*
377 	 * Check if we have problem with errata AE18 of Core processors:
378 	 * Readings might stop update when processor visited too deep sleep,
379 	 * fixed for stepping D0 (6EC).
380 	 */
381 	if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
382 		pr_err("Errata AE18 not fixed, update BIOS or "
383 		       "microcode of the CPU!\n");
384 		return -ENODEV;
385 	}
386 	return 0;
387 }
388 
389 static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu)
390 {
391 	u16 phys_proc_id = TO_PHYS_ID(cpu);
392 	struct pdev_entry *p;
393 
394 	mutex_lock(&pdev_list_mutex);
395 
396 	list_for_each_entry(p, &pdev_list, list)
397 		if (p->phys_proc_id == phys_proc_id) {
398 			mutex_unlock(&pdev_list_mutex);
399 			return p->pdev;
400 		}
401 
402 	mutex_unlock(&pdev_list_mutex);
403 	return NULL;
404 }
405 
406 static struct temp_data __cpuinit *init_temp_data(unsigned int cpu,
407 						  int pkg_flag)
408 {
409 	struct temp_data *tdata;
410 
411 	tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
412 	if (!tdata)
413 		return NULL;
414 
415 	tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
416 							MSR_IA32_THERM_STATUS;
417 	tdata->is_pkg_data = pkg_flag;
418 	tdata->cpu = cpu;
419 	tdata->cpu_core_id = TO_CORE_ID(cpu);
420 	tdata->attr_size = MAX_CORE_ATTRS;
421 	mutex_init(&tdata->update_lock);
422 	return tdata;
423 }
424 
425 static int __cpuinit create_core_data(struct platform_device *pdev,
426 				unsigned int cpu, int pkg_flag)
427 {
428 	struct temp_data *tdata;
429 	struct platform_data *pdata = platform_get_drvdata(pdev);
430 	struct cpuinfo_x86 *c = &cpu_data(cpu);
431 	u32 eax, edx;
432 	int err, attr_no;
433 
434 	/*
435 	 * Find attr number for sysfs:
436 	 * We map the attr number to core id of the CPU
437 	 * The attr number is always core id + 2
438 	 * The Pkgtemp will always show up as temp1_*, if available
439 	 */
440 	attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
441 
442 	if (attr_no > MAX_CORE_DATA - 1)
443 		return -ERANGE;
444 
445 	/*
446 	 * Provide a single set of attributes for all HT siblings of a core
447 	 * to avoid duplicate sensors (the processor ID and core ID of all
448 	 * HT siblings of a core are the same).
449 	 * Skip if a HT sibling of this core is already registered.
450 	 * This is not an error.
451 	 */
452 	if (pdata->core_data[attr_no] != NULL)
453 		return 0;
454 
455 	tdata = init_temp_data(cpu, pkg_flag);
456 	if (!tdata)
457 		return -ENOMEM;
458 
459 	/* Test if we can access the status register */
460 	err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
461 	if (err)
462 		goto exit_free;
463 
464 	/* We can access status register. Get Critical Temperature */
465 	tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
466 
467 	/*
468 	 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
469 	 * The target temperature is available on older CPUs but not in this
470 	 * register. Atoms don't have the register at all.
471 	 */
472 	if (c->x86_model > 0xe && c->x86_model != 0x1c) {
473 		err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
474 					&eax, &edx);
475 		if (!err) {
476 			tdata->ttarget
477 			  = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
478 			tdata->attr_size++;
479 		}
480 	}
481 
482 	pdata->core_data[attr_no] = tdata;
483 
484 	/* Create sysfs interfaces */
485 	err = create_core_attrs(tdata, &pdev->dev, attr_no);
486 	if (err)
487 		goto exit_free;
488 
489 	return 0;
490 exit_free:
491 	pdata->core_data[attr_no] = NULL;
492 	kfree(tdata);
493 	return err;
494 }
495 
496 static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag)
497 {
498 	struct platform_device *pdev = coretemp_get_pdev(cpu);
499 	int err;
500 
501 	if (!pdev)
502 		return;
503 
504 	err = create_core_data(pdev, cpu, pkg_flag);
505 	if (err)
506 		dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
507 }
508 
509 static void coretemp_remove_core(struct platform_data *pdata,
510 				struct device *dev, int indx)
511 {
512 	int i;
513 	struct temp_data *tdata = pdata->core_data[indx];
514 
515 	/* Remove the sysfs attributes */
516 	for (i = 0; i < tdata->attr_size; i++)
517 		device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
518 
519 	kfree(pdata->core_data[indx]);
520 	pdata->core_data[indx] = NULL;
521 }
522 
523 static int __devinit coretemp_probe(struct platform_device *pdev)
524 {
525 	struct platform_data *pdata;
526 	int err;
527 
528 	/* Initialize the per-package data structures */
529 	pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
530 	if (!pdata)
531 		return -ENOMEM;
532 
533 	err = create_name_attr(pdata, &pdev->dev);
534 	if (err)
535 		goto exit_free;
536 
537 	pdata->phys_proc_id = pdev->id;
538 	platform_set_drvdata(pdev, pdata);
539 
540 	pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
541 	if (IS_ERR(pdata->hwmon_dev)) {
542 		err = PTR_ERR(pdata->hwmon_dev);
543 		dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
544 		goto exit_name;
545 	}
546 	return 0;
547 
548 exit_name:
549 	device_remove_file(&pdev->dev, &pdata->name_attr);
550 	platform_set_drvdata(pdev, NULL);
551 exit_free:
552 	kfree(pdata);
553 	return err;
554 }
555 
556 static int __devexit coretemp_remove(struct platform_device *pdev)
557 {
558 	struct platform_data *pdata = platform_get_drvdata(pdev);
559 	int i;
560 
561 	for (i = MAX_CORE_DATA - 1; i >= 0; --i)
562 		if (pdata->core_data[i])
563 			coretemp_remove_core(pdata, &pdev->dev, i);
564 
565 	device_remove_file(&pdev->dev, &pdata->name_attr);
566 	hwmon_device_unregister(pdata->hwmon_dev);
567 	platform_set_drvdata(pdev, NULL);
568 	kfree(pdata);
569 	return 0;
570 }
571 
572 static struct platform_driver coretemp_driver = {
573 	.driver = {
574 		.owner = THIS_MODULE,
575 		.name = DRVNAME,
576 	},
577 	.probe = coretemp_probe,
578 	.remove = __devexit_p(coretemp_remove),
579 };
580 
581 static int __cpuinit coretemp_device_add(unsigned int cpu)
582 {
583 	int err;
584 	struct platform_device *pdev;
585 	struct pdev_entry *pdev_entry;
586 
587 	mutex_lock(&pdev_list_mutex);
588 
589 	pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
590 	if (!pdev) {
591 		err = -ENOMEM;
592 		pr_err("Device allocation failed\n");
593 		goto exit;
594 	}
595 
596 	pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
597 	if (!pdev_entry) {
598 		err = -ENOMEM;
599 		goto exit_device_put;
600 	}
601 
602 	err = platform_device_add(pdev);
603 	if (err) {
604 		pr_err("Device addition failed (%d)\n", err);
605 		goto exit_device_free;
606 	}
607 
608 	pdev_entry->pdev = pdev;
609 	pdev_entry->phys_proc_id = pdev->id;
610 
611 	list_add_tail(&pdev_entry->list, &pdev_list);
612 	mutex_unlock(&pdev_list_mutex);
613 
614 	return 0;
615 
616 exit_device_free:
617 	kfree(pdev_entry);
618 exit_device_put:
619 	platform_device_put(pdev);
620 exit:
621 	mutex_unlock(&pdev_list_mutex);
622 	return err;
623 }
624 
625 static void __cpuinit coretemp_device_remove(unsigned int cpu)
626 {
627 	struct pdev_entry *p, *n;
628 	u16 phys_proc_id = TO_PHYS_ID(cpu);
629 
630 	mutex_lock(&pdev_list_mutex);
631 	list_for_each_entry_safe(p, n, &pdev_list, list) {
632 		if (p->phys_proc_id != phys_proc_id)
633 			continue;
634 		platform_device_unregister(p->pdev);
635 		list_del(&p->list);
636 		kfree(p);
637 	}
638 	mutex_unlock(&pdev_list_mutex);
639 }
640 
641 static bool __cpuinit is_any_core_online(struct platform_data *pdata)
642 {
643 	int i;
644 
645 	/* Find online cores, except pkgtemp data */
646 	for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
647 		if (pdata->core_data[i] &&
648 			!pdata->core_data[i]->is_pkg_data) {
649 			return true;
650 		}
651 	}
652 	return false;
653 }
654 
655 static void __cpuinit get_core_online(unsigned int cpu)
656 {
657 	struct cpuinfo_x86 *c = &cpu_data(cpu);
658 	struct platform_device *pdev = coretemp_get_pdev(cpu);
659 	int err;
660 
661 	/*
662 	 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
663 	 * sensors. We check this bit only, all the early CPUs
664 	 * without thermal sensors will be filtered out.
665 	 */
666 	if (!cpu_has(c, X86_FEATURE_DTS))
667 		return;
668 
669 	if (!pdev) {
670 		/* Check the microcode version of the CPU */
671 		if (chk_ucode_version(cpu))
672 			return;
673 
674 		/*
675 		 * Alright, we have DTS support.
676 		 * We are bringing the _first_ core in this pkg
677 		 * online. So, initialize per-pkg data structures and
678 		 * then bring this core online.
679 		 */
680 		err = coretemp_device_add(cpu);
681 		if (err)
682 			return;
683 		/*
684 		 * Check whether pkgtemp support is available.
685 		 * If so, add interfaces for pkgtemp.
686 		 */
687 		if (cpu_has(c, X86_FEATURE_PTS))
688 			coretemp_add_core(cpu, 1);
689 	}
690 	/*
691 	 * Physical CPU device already exists.
692 	 * So, just add interfaces for this core.
693 	 */
694 	coretemp_add_core(cpu, 0);
695 }
696 
697 static void __cpuinit put_core_offline(unsigned int cpu)
698 {
699 	int i, indx;
700 	struct platform_data *pdata;
701 	struct platform_device *pdev = coretemp_get_pdev(cpu);
702 
703 	/* If the physical CPU device does not exist, just return */
704 	if (!pdev)
705 		return;
706 
707 	pdata = platform_get_drvdata(pdev);
708 
709 	indx = TO_ATTR_NO(cpu);
710 
711 	if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
712 		coretemp_remove_core(pdata, &pdev->dev, indx);
713 
714 	/*
715 	 * If a HT sibling of a core is taken offline, but another HT sibling
716 	 * of the same core is still online, register the alternate sibling.
717 	 * This ensures that exactly one set of attributes is provided as long
718 	 * as at least one HT sibling of a core is online.
719 	 */
720 	for_each_sibling(i, cpu) {
721 		if (i != cpu) {
722 			get_core_online(i);
723 			/*
724 			 * Display temperature sensor data for one HT sibling
725 			 * per core only, so abort the loop after one such
726 			 * sibling has been found.
727 			 */
728 			break;
729 		}
730 	}
731 	/*
732 	 * If all cores in this pkg are offline, remove the device.
733 	 * coretemp_device_remove calls unregister_platform_device,
734 	 * which in turn calls coretemp_remove. This removes the
735 	 * pkgtemp entry and does other clean ups.
736 	 */
737 	if (!is_any_core_online(pdata))
738 		coretemp_device_remove(cpu);
739 }
740 
741 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
742 				 unsigned long action, void *hcpu)
743 {
744 	unsigned int cpu = (unsigned long) hcpu;
745 
746 	switch (action) {
747 	case CPU_ONLINE:
748 	case CPU_DOWN_FAILED:
749 		get_core_online(cpu);
750 		break;
751 	case CPU_DOWN_PREPARE:
752 		put_core_offline(cpu);
753 		break;
754 	}
755 	return NOTIFY_OK;
756 }
757 
758 static struct notifier_block coretemp_cpu_notifier __refdata = {
759 	.notifier_call = coretemp_cpu_callback,
760 };
761 
762 static int __init coretemp_init(void)
763 {
764 	int i, err = -ENODEV;
765 
766 	/* quick check if we run Intel */
767 	if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL)
768 		goto exit;
769 
770 	err = platform_driver_register(&coretemp_driver);
771 	if (err)
772 		goto exit;
773 
774 	for_each_online_cpu(i)
775 		get_core_online(i);
776 
777 #ifndef CONFIG_HOTPLUG_CPU
778 	if (list_empty(&pdev_list)) {
779 		err = -ENODEV;
780 		goto exit_driver_unreg;
781 	}
782 #endif
783 
784 	register_hotcpu_notifier(&coretemp_cpu_notifier);
785 	return 0;
786 
787 #ifndef CONFIG_HOTPLUG_CPU
788 exit_driver_unreg:
789 	platform_driver_unregister(&coretemp_driver);
790 #endif
791 exit:
792 	return err;
793 }
794 
795 static void __exit coretemp_exit(void)
796 {
797 	struct pdev_entry *p, *n;
798 
799 	unregister_hotcpu_notifier(&coretemp_cpu_notifier);
800 	mutex_lock(&pdev_list_mutex);
801 	list_for_each_entry_safe(p, n, &pdev_list, list) {
802 		platform_device_unregister(p->pdev);
803 		list_del(&p->list);
804 		kfree(p);
805 	}
806 	mutex_unlock(&pdev_list_mutex);
807 	platform_driver_unregister(&coretemp_driver);
808 }
809 
810 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
811 MODULE_DESCRIPTION("Intel Core temperature monitor");
812 MODULE_LICENSE("GPL");
813 
814 module_init(coretemp_init)
815 module_exit(coretemp_exit)
816