xref: /openbmc/linux/drivers/hwmon/coretemp.c (revision 615c36f5)
1 /*
2  * coretemp.c - Linux kernel module for hardware monitoring
3  *
4  * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5  *
6  * Inspired from many hwmon drivers
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; version 2 of the License.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20  * 02110-1301 USA.
21  */
22 
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/pci.h>
38 #include <linux/smp.h>
39 #include <linux/moduleparam.h>
40 #include <asm/msr.h>
41 #include <asm/processor.h>
42 
43 #define DRVNAME	"coretemp"
44 
45 /*
46  * force_tjmax only matters when TjMax can't be read from the CPU itself.
47  * When set, it replaces the driver's suboptimal heuristic.
48  */
49 static int force_tjmax;
50 module_param_named(tjmax, force_tjmax, int, 0444);
51 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
52 
53 #define BASE_SYSFS_ATTR_NO	2	/* Sysfs Base attr no for coretemp */
54 #define NUM_REAL_CORES		16	/* Number of Real cores per cpu */
55 #define CORETEMP_NAME_LENGTH	17	/* String Length of attrs */
56 #define MAX_CORE_ATTRS		4	/* Maximum no of basic attrs */
57 #define TOTAL_ATTRS		(MAX_CORE_ATTRS + 1)
58 #define MAX_CORE_DATA		(NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
59 
60 #ifdef CONFIG_SMP
61 #define TO_PHYS_ID(cpu)		cpu_data(cpu).phys_proc_id
62 #define TO_CORE_ID(cpu)		cpu_data(cpu).cpu_core_id
63 #define for_each_sibling(i, cpu)	for_each_cpu(i, cpu_sibling_mask(cpu))
64 #else
65 #define TO_PHYS_ID(cpu)		(cpu)
66 #define TO_CORE_ID(cpu)		(cpu)
67 #define for_each_sibling(i, cpu)	for (i = 0; false; )
68 #endif
69 #define TO_ATTR_NO(cpu)		(TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
70 
71 /*
72  * Per-Core Temperature Data
73  * @last_updated: The time when the current temperature value was updated
74  *		earlier (in jiffies).
75  * @cpu_core_id: The CPU Core from which temperature values should be read
76  *		This value is passed as "id" field to rdmsr/wrmsr functions.
77  * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
78  *		from where the temperature values should be read.
79  * @attr_size:  Total number of pre-core attrs displayed in the sysfs.
80  * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
81  *		Otherwise, temp_data holds coretemp data.
82  * @valid: If this is 1, the current temperature is valid.
83  */
84 struct temp_data {
85 	int temp;
86 	int ttarget;
87 	int tjmax;
88 	unsigned long last_updated;
89 	unsigned int cpu;
90 	u32 cpu_core_id;
91 	u32 status_reg;
92 	int attr_size;
93 	bool is_pkg_data;
94 	bool valid;
95 	struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
96 	char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
97 	struct mutex update_lock;
98 };
99 
100 /* Platform Data per Physical CPU */
101 struct platform_data {
102 	struct device *hwmon_dev;
103 	u16 phys_proc_id;
104 	struct temp_data *core_data[MAX_CORE_DATA];
105 	struct device_attribute name_attr;
106 };
107 
108 struct pdev_entry {
109 	struct list_head list;
110 	struct platform_device *pdev;
111 	u16 phys_proc_id;
112 };
113 
114 static LIST_HEAD(pdev_list);
115 static DEFINE_MUTEX(pdev_list_mutex);
116 
117 static ssize_t show_name(struct device *dev,
118 			struct device_attribute *devattr, char *buf)
119 {
120 	return sprintf(buf, "%s\n", DRVNAME);
121 }
122 
123 static ssize_t show_label(struct device *dev,
124 				struct device_attribute *devattr, char *buf)
125 {
126 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
127 	struct platform_data *pdata = dev_get_drvdata(dev);
128 	struct temp_data *tdata = pdata->core_data[attr->index];
129 
130 	if (tdata->is_pkg_data)
131 		return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
132 
133 	return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
134 }
135 
136 static ssize_t show_crit_alarm(struct device *dev,
137 				struct device_attribute *devattr, char *buf)
138 {
139 	u32 eax, edx;
140 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
141 	struct platform_data *pdata = dev_get_drvdata(dev);
142 	struct temp_data *tdata = pdata->core_data[attr->index];
143 
144 	rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
145 
146 	return sprintf(buf, "%d\n", (eax >> 5) & 1);
147 }
148 
149 static ssize_t show_tjmax(struct device *dev,
150 			struct device_attribute *devattr, char *buf)
151 {
152 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
153 	struct platform_data *pdata = dev_get_drvdata(dev);
154 
155 	return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
156 }
157 
158 static ssize_t show_ttarget(struct device *dev,
159 				struct device_attribute *devattr, char *buf)
160 {
161 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
162 	struct platform_data *pdata = dev_get_drvdata(dev);
163 
164 	return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
165 }
166 
167 static ssize_t show_temp(struct device *dev,
168 			struct device_attribute *devattr, char *buf)
169 {
170 	u32 eax, edx;
171 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
172 	struct platform_data *pdata = dev_get_drvdata(dev);
173 	struct temp_data *tdata = pdata->core_data[attr->index];
174 
175 	mutex_lock(&tdata->update_lock);
176 
177 	/* Check whether the time interval has elapsed */
178 	if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
179 		rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
180 		tdata->valid = 0;
181 		/* Check whether the data is valid */
182 		if (eax & 0x80000000) {
183 			tdata->temp = tdata->tjmax -
184 					((eax >> 16) & 0x7f) * 1000;
185 			tdata->valid = 1;
186 		}
187 		tdata->last_updated = jiffies;
188 	}
189 
190 	mutex_unlock(&tdata->update_lock);
191 	return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
192 }
193 
194 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
195 {
196 	/* The 100C is default for both mobile and non mobile CPUs */
197 
198 	int tjmax = 100000;
199 	int tjmax_ee = 85000;
200 	int usemsr_ee = 1;
201 	int err;
202 	u32 eax, edx;
203 	struct pci_dev *host_bridge;
204 
205 	/* Early chips have no MSR for TjMax */
206 
207 	if (c->x86_model == 0xf && c->x86_mask < 4)
208 		usemsr_ee = 0;
209 
210 	/* Atom CPUs */
211 
212 	if (c->x86_model == 0x1c) {
213 		usemsr_ee = 0;
214 
215 		host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
216 
217 		if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
218 		    && (host_bridge->device == 0xa000	/* NM10 based nettop */
219 		    || host_bridge->device == 0xa010))	/* NM10 based netbook */
220 			tjmax = 100000;
221 		else
222 			tjmax = 90000;
223 
224 		pci_dev_put(host_bridge);
225 	}
226 
227 	if (c->x86_model > 0xe && usemsr_ee) {
228 		u8 platform_id;
229 
230 		/*
231 		 * Now we can detect the mobile CPU using Intel provided table
232 		 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
233 		 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
234 		 */
235 		err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
236 		if (err) {
237 			dev_warn(dev,
238 				 "Unable to access MSR 0x17, assuming desktop"
239 				 " CPU\n");
240 			usemsr_ee = 0;
241 		} else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
242 			/*
243 			 * Trust bit 28 up to Penryn, I could not find any
244 			 * documentation on that; if you happen to know
245 			 * someone at Intel please ask
246 			 */
247 			usemsr_ee = 0;
248 		} else {
249 			/* Platform ID bits 52:50 (EDX starts at bit 32) */
250 			platform_id = (edx >> 18) & 0x7;
251 
252 			/*
253 			 * Mobile Penryn CPU seems to be platform ID 7 or 5
254 			 * (guesswork)
255 			 */
256 			if (c->x86_model == 0x17 &&
257 			    (platform_id == 5 || platform_id == 7)) {
258 				/*
259 				 * If MSR EE bit is set, set it to 90 degrees C,
260 				 * otherwise 105 degrees C
261 				 */
262 				tjmax_ee = 90000;
263 				tjmax = 105000;
264 			}
265 		}
266 	}
267 
268 	if (usemsr_ee) {
269 		err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
270 		if (err) {
271 			dev_warn(dev,
272 				 "Unable to access MSR 0xEE, for Tjmax, left"
273 				 " at default\n");
274 		} else if (eax & 0x40000000) {
275 			tjmax = tjmax_ee;
276 		}
277 	} else if (tjmax == 100000) {
278 		/*
279 		 * If we don't use msr EE it means we are desktop CPU
280 		 * (with exeception of Atom)
281 		 */
282 		dev_warn(dev, "Using relative temperature scale!\n");
283 	}
284 
285 	return tjmax;
286 }
287 
288 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
289 {
290 	int err;
291 	u32 eax, edx;
292 	u32 val;
293 
294 	/*
295 	 * A new feature of current Intel(R) processors, the
296 	 * IA32_TEMPERATURE_TARGET contains the TjMax value
297 	 */
298 	err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
299 	if (err) {
300 		if (c->x86_model > 0xe && c->x86_model != 0x1c)
301 			dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
302 	} else {
303 		val = (eax >> 16) & 0xff;
304 		/*
305 		 * If the TjMax is not plausible, an assumption
306 		 * will be used
307 		 */
308 		if (val) {
309 			dev_dbg(dev, "TjMax is %d degrees C\n", val);
310 			return val * 1000;
311 		}
312 	}
313 
314 	if (force_tjmax) {
315 		dev_notice(dev, "TjMax forced to %d degrees C by user\n",
316 			   force_tjmax);
317 		return force_tjmax * 1000;
318 	}
319 
320 	/*
321 	 * An assumption is made for early CPUs and unreadable MSR.
322 	 * NOTE: the calculated value may not be correct.
323 	 */
324 	return adjust_tjmax(c, id, dev);
325 }
326 
327 static int create_name_attr(struct platform_data *pdata, struct device *dev)
328 {
329 	sysfs_attr_init(&pdata->name_attr.attr);
330 	pdata->name_attr.attr.name = "name";
331 	pdata->name_attr.attr.mode = S_IRUGO;
332 	pdata->name_attr.show = show_name;
333 	return device_create_file(dev, &pdata->name_attr);
334 }
335 
336 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
337 				int attr_no)
338 {
339 	int err, i;
340 	static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
341 			struct device_attribute *devattr, char *buf) = {
342 			show_label, show_crit_alarm, show_temp, show_tjmax,
343 			show_ttarget };
344 	static const char *const names[TOTAL_ATTRS] = {
345 					"temp%d_label", "temp%d_crit_alarm",
346 					"temp%d_input", "temp%d_crit",
347 					"temp%d_max" };
348 
349 	for (i = 0; i < tdata->attr_size; i++) {
350 		snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
351 			attr_no);
352 		sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
353 		tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
354 		tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
355 		tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
356 		tdata->sd_attrs[i].index = attr_no;
357 		err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
358 		if (err)
359 			goto exit_free;
360 	}
361 	return 0;
362 
363 exit_free:
364 	while (--i >= 0)
365 		device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
366 	return err;
367 }
368 
369 
370 static int __cpuinit chk_ucode_version(unsigned int cpu)
371 {
372 	struct cpuinfo_x86 *c = &cpu_data(cpu);
373 
374 	/*
375 	 * Check if we have problem with errata AE18 of Core processors:
376 	 * Readings might stop update when processor visited too deep sleep,
377 	 * fixed for stepping D0 (6EC).
378 	 */
379 	if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
380 		pr_err("Errata AE18 not fixed, update BIOS or "
381 		       "microcode of the CPU!\n");
382 		return -ENODEV;
383 	}
384 	return 0;
385 }
386 
387 static struct platform_device *coretemp_get_pdev(unsigned int cpu)
388 {
389 	u16 phys_proc_id = TO_PHYS_ID(cpu);
390 	struct pdev_entry *p;
391 
392 	mutex_lock(&pdev_list_mutex);
393 
394 	list_for_each_entry(p, &pdev_list, list)
395 		if (p->phys_proc_id == phys_proc_id) {
396 			mutex_unlock(&pdev_list_mutex);
397 			return p->pdev;
398 		}
399 
400 	mutex_unlock(&pdev_list_mutex);
401 	return NULL;
402 }
403 
404 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
405 {
406 	struct temp_data *tdata;
407 
408 	tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
409 	if (!tdata)
410 		return NULL;
411 
412 	tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
413 							MSR_IA32_THERM_STATUS;
414 	tdata->is_pkg_data = pkg_flag;
415 	tdata->cpu = cpu;
416 	tdata->cpu_core_id = TO_CORE_ID(cpu);
417 	tdata->attr_size = MAX_CORE_ATTRS;
418 	mutex_init(&tdata->update_lock);
419 	return tdata;
420 }
421 
422 static int create_core_data(struct platform_device *pdev,
423 				unsigned int cpu, int pkg_flag)
424 {
425 	struct temp_data *tdata;
426 	struct platform_data *pdata = platform_get_drvdata(pdev);
427 	struct cpuinfo_x86 *c = &cpu_data(cpu);
428 	u32 eax, edx;
429 	int err, attr_no;
430 
431 	/*
432 	 * Find attr number for sysfs:
433 	 * We map the attr number to core id of the CPU
434 	 * The attr number is always core id + 2
435 	 * The Pkgtemp will always show up as temp1_*, if available
436 	 */
437 	attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
438 
439 	if (attr_no > MAX_CORE_DATA - 1)
440 		return -ERANGE;
441 
442 	/*
443 	 * Provide a single set of attributes for all HT siblings of a core
444 	 * to avoid duplicate sensors (the processor ID and core ID of all
445 	 * HT siblings of a core are the same).
446 	 * Skip if a HT sibling of this core is already registered.
447 	 * This is not an error.
448 	 */
449 	if (pdata->core_data[attr_no] != NULL)
450 		return 0;
451 
452 	tdata = init_temp_data(cpu, pkg_flag);
453 	if (!tdata)
454 		return -ENOMEM;
455 
456 	/* Test if we can access the status register */
457 	err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
458 	if (err)
459 		goto exit_free;
460 
461 	/* We can access status register. Get Critical Temperature */
462 	tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
463 
464 	/*
465 	 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
466 	 * The target temperature is available on older CPUs but not in this
467 	 * register. Atoms don't have the register at all.
468 	 */
469 	if (c->x86_model > 0xe && c->x86_model != 0x1c) {
470 		err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
471 					&eax, &edx);
472 		if (!err) {
473 			tdata->ttarget
474 			  = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
475 			tdata->attr_size++;
476 		}
477 	}
478 
479 	pdata->core_data[attr_no] = tdata;
480 
481 	/* Create sysfs interfaces */
482 	err = create_core_attrs(tdata, &pdev->dev, attr_no);
483 	if (err)
484 		goto exit_free;
485 
486 	return 0;
487 exit_free:
488 	pdata->core_data[attr_no] = NULL;
489 	kfree(tdata);
490 	return err;
491 }
492 
493 static void coretemp_add_core(unsigned int cpu, int pkg_flag)
494 {
495 	struct platform_device *pdev = coretemp_get_pdev(cpu);
496 	int err;
497 
498 	if (!pdev)
499 		return;
500 
501 	err = create_core_data(pdev, cpu, pkg_flag);
502 	if (err)
503 		dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
504 }
505 
506 static void coretemp_remove_core(struct platform_data *pdata,
507 				struct device *dev, int indx)
508 {
509 	int i;
510 	struct temp_data *tdata = pdata->core_data[indx];
511 
512 	/* Remove the sysfs attributes */
513 	for (i = 0; i < tdata->attr_size; i++)
514 		device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
515 
516 	kfree(pdata->core_data[indx]);
517 	pdata->core_data[indx] = NULL;
518 }
519 
520 static int __devinit coretemp_probe(struct platform_device *pdev)
521 {
522 	struct platform_data *pdata;
523 	int err;
524 
525 	/* Initialize the per-package data structures */
526 	pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
527 	if (!pdata)
528 		return -ENOMEM;
529 
530 	err = create_name_attr(pdata, &pdev->dev);
531 	if (err)
532 		goto exit_free;
533 
534 	pdata->phys_proc_id = pdev->id;
535 	platform_set_drvdata(pdev, pdata);
536 
537 	pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
538 	if (IS_ERR(pdata->hwmon_dev)) {
539 		err = PTR_ERR(pdata->hwmon_dev);
540 		dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
541 		goto exit_name;
542 	}
543 	return 0;
544 
545 exit_name:
546 	device_remove_file(&pdev->dev, &pdata->name_attr);
547 	platform_set_drvdata(pdev, NULL);
548 exit_free:
549 	kfree(pdata);
550 	return err;
551 }
552 
553 static int __devexit coretemp_remove(struct platform_device *pdev)
554 {
555 	struct platform_data *pdata = platform_get_drvdata(pdev);
556 	int i;
557 
558 	for (i = MAX_CORE_DATA - 1; i >= 0; --i)
559 		if (pdata->core_data[i])
560 			coretemp_remove_core(pdata, &pdev->dev, i);
561 
562 	device_remove_file(&pdev->dev, &pdata->name_attr);
563 	hwmon_device_unregister(pdata->hwmon_dev);
564 	platform_set_drvdata(pdev, NULL);
565 	kfree(pdata);
566 	return 0;
567 }
568 
569 static struct platform_driver coretemp_driver = {
570 	.driver = {
571 		.owner = THIS_MODULE,
572 		.name = DRVNAME,
573 	},
574 	.probe = coretemp_probe,
575 	.remove = __devexit_p(coretemp_remove),
576 };
577 
578 static int __cpuinit coretemp_device_add(unsigned int cpu)
579 {
580 	int err;
581 	struct platform_device *pdev;
582 	struct pdev_entry *pdev_entry;
583 
584 	mutex_lock(&pdev_list_mutex);
585 
586 	pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
587 	if (!pdev) {
588 		err = -ENOMEM;
589 		pr_err("Device allocation failed\n");
590 		goto exit;
591 	}
592 
593 	pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
594 	if (!pdev_entry) {
595 		err = -ENOMEM;
596 		goto exit_device_put;
597 	}
598 
599 	err = platform_device_add(pdev);
600 	if (err) {
601 		pr_err("Device addition failed (%d)\n", err);
602 		goto exit_device_free;
603 	}
604 
605 	pdev_entry->pdev = pdev;
606 	pdev_entry->phys_proc_id = pdev->id;
607 
608 	list_add_tail(&pdev_entry->list, &pdev_list);
609 	mutex_unlock(&pdev_list_mutex);
610 
611 	return 0;
612 
613 exit_device_free:
614 	kfree(pdev_entry);
615 exit_device_put:
616 	platform_device_put(pdev);
617 exit:
618 	mutex_unlock(&pdev_list_mutex);
619 	return err;
620 }
621 
622 static void coretemp_device_remove(unsigned int cpu)
623 {
624 	struct pdev_entry *p, *n;
625 	u16 phys_proc_id = TO_PHYS_ID(cpu);
626 
627 	mutex_lock(&pdev_list_mutex);
628 	list_for_each_entry_safe(p, n, &pdev_list, list) {
629 		if (p->phys_proc_id != phys_proc_id)
630 			continue;
631 		platform_device_unregister(p->pdev);
632 		list_del(&p->list);
633 		kfree(p);
634 	}
635 	mutex_unlock(&pdev_list_mutex);
636 }
637 
638 static bool is_any_core_online(struct platform_data *pdata)
639 {
640 	int i;
641 
642 	/* Find online cores, except pkgtemp data */
643 	for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
644 		if (pdata->core_data[i] &&
645 			!pdata->core_data[i]->is_pkg_data) {
646 			return true;
647 		}
648 	}
649 	return false;
650 }
651 
652 static void __cpuinit get_core_online(unsigned int cpu)
653 {
654 	struct cpuinfo_x86 *c = &cpu_data(cpu);
655 	struct platform_device *pdev = coretemp_get_pdev(cpu);
656 	int err;
657 
658 	/*
659 	 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
660 	 * sensors. We check this bit only, all the early CPUs
661 	 * without thermal sensors will be filtered out.
662 	 */
663 	if (!cpu_has(c, X86_FEATURE_DTS))
664 		return;
665 
666 	if (!pdev) {
667 		/* Check the microcode version of the CPU */
668 		if (chk_ucode_version(cpu))
669 			return;
670 
671 		/*
672 		 * Alright, we have DTS support.
673 		 * We are bringing the _first_ core in this pkg
674 		 * online. So, initialize per-pkg data structures and
675 		 * then bring this core online.
676 		 */
677 		err = coretemp_device_add(cpu);
678 		if (err)
679 			return;
680 		/*
681 		 * Check whether pkgtemp support is available.
682 		 * If so, add interfaces for pkgtemp.
683 		 */
684 		if (cpu_has(c, X86_FEATURE_PTS))
685 			coretemp_add_core(cpu, 1);
686 	}
687 	/*
688 	 * Physical CPU device already exists.
689 	 * So, just add interfaces for this core.
690 	 */
691 	coretemp_add_core(cpu, 0);
692 }
693 
694 static void __cpuinit put_core_offline(unsigned int cpu)
695 {
696 	int i, indx;
697 	struct platform_data *pdata;
698 	struct platform_device *pdev = coretemp_get_pdev(cpu);
699 
700 	/* If the physical CPU device does not exist, just return */
701 	if (!pdev)
702 		return;
703 
704 	pdata = platform_get_drvdata(pdev);
705 
706 	indx = TO_ATTR_NO(cpu);
707 
708 	if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
709 		coretemp_remove_core(pdata, &pdev->dev, indx);
710 
711 	/*
712 	 * If a HT sibling of a core is taken offline, but another HT sibling
713 	 * of the same core is still online, register the alternate sibling.
714 	 * This ensures that exactly one set of attributes is provided as long
715 	 * as at least one HT sibling of a core is online.
716 	 */
717 	for_each_sibling(i, cpu) {
718 		if (i != cpu) {
719 			get_core_online(i);
720 			/*
721 			 * Display temperature sensor data for one HT sibling
722 			 * per core only, so abort the loop after one such
723 			 * sibling has been found.
724 			 */
725 			break;
726 		}
727 	}
728 	/*
729 	 * If all cores in this pkg are offline, remove the device.
730 	 * coretemp_device_remove calls unregister_platform_device,
731 	 * which in turn calls coretemp_remove. This removes the
732 	 * pkgtemp entry and does other clean ups.
733 	 */
734 	if (!is_any_core_online(pdata))
735 		coretemp_device_remove(cpu);
736 }
737 
738 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
739 				 unsigned long action, void *hcpu)
740 {
741 	unsigned int cpu = (unsigned long) hcpu;
742 
743 	switch (action) {
744 	case CPU_ONLINE:
745 	case CPU_DOWN_FAILED:
746 		get_core_online(cpu);
747 		break;
748 	case CPU_DOWN_PREPARE:
749 		put_core_offline(cpu);
750 		break;
751 	}
752 	return NOTIFY_OK;
753 }
754 
755 static struct notifier_block coretemp_cpu_notifier __refdata = {
756 	.notifier_call = coretemp_cpu_callback,
757 };
758 
759 static int __init coretemp_init(void)
760 {
761 	int i, err = -ENODEV;
762 
763 	/* quick check if we run Intel */
764 	if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL)
765 		goto exit;
766 
767 	err = platform_driver_register(&coretemp_driver);
768 	if (err)
769 		goto exit;
770 
771 	for_each_online_cpu(i)
772 		get_core_online(i);
773 
774 #ifndef CONFIG_HOTPLUG_CPU
775 	if (list_empty(&pdev_list)) {
776 		err = -ENODEV;
777 		goto exit_driver_unreg;
778 	}
779 #endif
780 
781 	register_hotcpu_notifier(&coretemp_cpu_notifier);
782 	return 0;
783 
784 #ifndef CONFIG_HOTPLUG_CPU
785 exit_driver_unreg:
786 	platform_driver_unregister(&coretemp_driver);
787 #endif
788 exit:
789 	return err;
790 }
791 
792 static void __exit coretemp_exit(void)
793 {
794 	struct pdev_entry *p, *n;
795 
796 	unregister_hotcpu_notifier(&coretemp_cpu_notifier);
797 	mutex_lock(&pdev_list_mutex);
798 	list_for_each_entry_safe(p, n, &pdev_list, list) {
799 		platform_device_unregister(p->pdev);
800 		list_del(&p->list);
801 		kfree(p);
802 	}
803 	mutex_unlock(&pdev_list_mutex);
804 	platform_driver_unregister(&coretemp_driver);
805 }
806 
807 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
808 MODULE_DESCRIPTION("Intel Core temperature monitor");
809 MODULE_LICENSE("GPL");
810 
811 module_init(coretemp_init)
812 module_exit(coretemp_exit)
813