1 /* 2 * coretemp.c - Linux kernel module for hardware monitoring 3 * 4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> 5 * 6 * Inspired from many hwmon drivers 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; version 2 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 20 * 02110-1301 USA. 21 */ 22 23 #include <linux/module.h> 24 #include <linux/delay.h> 25 #include <linux/init.h> 26 #include <linux/slab.h> 27 #include <linux/jiffies.h> 28 #include <linux/hwmon.h> 29 #include <linux/sysfs.h> 30 #include <linux/hwmon-sysfs.h> 31 #include <linux/err.h> 32 #include <linux/mutex.h> 33 #include <linux/list.h> 34 #include <linux/platform_device.h> 35 #include <linux/cpu.h> 36 #include <linux/pci.h> 37 #include <asm/msr.h> 38 #include <asm/processor.h> 39 40 #define DRVNAME "coretemp" 41 42 typedef enum { SHOW_TEMP, SHOW_TJMAX, SHOW_TTARGET, SHOW_LABEL, 43 SHOW_NAME } SHOW; 44 45 /* 46 * Functions declaration 47 */ 48 49 static struct coretemp_data *coretemp_update_device(struct device *dev); 50 51 struct coretemp_data { 52 struct device *hwmon_dev; 53 struct mutex update_lock; 54 const char *name; 55 u32 id; 56 char valid; /* zero until following fields are valid */ 57 unsigned long last_updated; /* in jiffies */ 58 int temp; 59 int tjmax; 60 int ttarget; 61 u8 alarm; 62 }; 63 64 /* 65 * Sysfs stuff 66 */ 67 68 static ssize_t show_name(struct device *dev, struct device_attribute 69 *devattr, char *buf) 70 { 71 int ret; 72 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 73 struct coretemp_data *data = dev_get_drvdata(dev); 74 75 if (attr->index == SHOW_NAME) 76 ret = sprintf(buf, "%s\n", data->name); 77 else /* show label */ 78 ret = sprintf(buf, "Core %d\n", data->id); 79 return ret; 80 } 81 82 static ssize_t show_alarm(struct device *dev, struct device_attribute 83 *devattr, char *buf) 84 { 85 struct coretemp_data *data = coretemp_update_device(dev); 86 /* read the Out-of-spec log, never clear */ 87 return sprintf(buf, "%d\n", data->alarm); 88 } 89 90 static ssize_t show_temp(struct device *dev, 91 struct device_attribute *devattr, char *buf) 92 { 93 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 94 struct coretemp_data *data = coretemp_update_device(dev); 95 int err; 96 97 if (attr->index == SHOW_TEMP) 98 err = data->valid ? sprintf(buf, "%d\n", data->temp) : -EAGAIN; 99 else if (attr->index == SHOW_TJMAX) 100 err = sprintf(buf, "%d\n", data->tjmax); 101 else 102 err = sprintf(buf, "%d\n", data->ttarget); 103 return err; 104 } 105 106 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 107 SHOW_TEMP); 108 static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp, NULL, 109 SHOW_TJMAX); 110 static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp, NULL, 111 SHOW_TTARGET); 112 static DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL); 113 static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_name, NULL, SHOW_LABEL); 114 static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, SHOW_NAME); 115 116 static struct attribute *coretemp_attributes[] = { 117 &sensor_dev_attr_name.dev_attr.attr, 118 &sensor_dev_attr_temp1_label.dev_attr.attr, 119 &dev_attr_temp1_crit_alarm.attr, 120 &sensor_dev_attr_temp1_input.dev_attr.attr, 121 &sensor_dev_attr_temp1_crit.dev_attr.attr, 122 NULL 123 }; 124 125 static const struct attribute_group coretemp_group = { 126 .attrs = coretemp_attributes, 127 }; 128 129 static struct coretemp_data *coretemp_update_device(struct device *dev) 130 { 131 struct coretemp_data *data = dev_get_drvdata(dev); 132 133 mutex_lock(&data->update_lock); 134 135 if (!data->valid || time_after(jiffies, data->last_updated + HZ)) { 136 u32 eax, edx; 137 138 data->valid = 0; 139 rdmsr_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx); 140 data->alarm = (eax >> 5) & 1; 141 /* update only if data has been valid */ 142 if (eax & 0x80000000) { 143 data->temp = data->tjmax - (((eax >> 16) 144 & 0x7f) * 1000); 145 data->valid = 1; 146 } else { 147 dev_dbg(dev, "Temperature data invalid (0x%x)\n", eax); 148 } 149 data->last_updated = jiffies; 150 } 151 152 mutex_unlock(&data->update_lock); 153 return data; 154 } 155 156 static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) 157 { 158 /* The 100C is default for both mobile and non mobile CPUs */ 159 160 int tjmax = 100000; 161 int tjmax_ee = 85000; 162 int usemsr_ee = 1; 163 int err; 164 u32 eax, edx; 165 struct pci_dev *host_bridge; 166 167 /* Early chips have no MSR for TjMax */ 168 169 if ((c->x86_model == 0xf) && (c->x86_mask < 4)) { 170 usemsr_ee = 0; 171 } 172 173 /* Atom CPUs */ 174 175 if (c->x86_model == 0x1c) { 176 usemsr_ee = 0; 177 178 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); 179 180 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL 181 && (host_bridge->device == 0xa000 /* NM10 based nettop */ 182 || host_bridge->device == 0xa010)) /* NM10 based netbook */ 183 tjmax = 100000; 184 else 185 tjmax = 90000; 186 187 pci_dev_put(host_bridge); 188 } 189 190 if ((c->x86_model > 0xe) && (usemsr_ee)) { 191 u8 platform_id; 192 193 /* Now we can detect the mobile CPU using Intel provided table 194 http://softwarecommunity.intel.com/Wiki/Mobility/720.htm 195 For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU 196 */ 197 198 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); 199 if (err) { 200 dev_warn(dev, 201 "Unable to access MSR 0x17, assuming desktop" 202 " CPU\n"); 203 usemsr_ee = 0; 204 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { 205 /* Trust bit 28 up to Penryn, I could not find any 206 documentation on that; if you happen to know 207 someone at Intel please ask */ 208 usemsr_ee = 0; 209 } else { 210 /* Platform ID bits 52:50 (EDX starts at bit 32) */ 211 platform_id = (edx >> 18) & 0x7; 212 213 /* Mobile Penryn CPU seems to be platform ID 7 or 5 214 (guesswork) */ 215 if ((c->x86_model == 0x17) && 216 ((platform_id == 5) || (platform_id == 7))) { 217 /* If MSR EE bit is set, set it to 90 degrees C, 218 otherwise 105 degrees C */ 219 tjmax_ee = 90000; 220 tjmax = 105000; 221 } 222 } 223 } 224 225 if (usemsr_ee) { 226 227 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); 228 if (err) { 229 dev_warn(dev, 230 "Unable to access MSR 0xEE, for Tjmax, left" 231 " at default"); 232 } else if (eax & 0x40000000) { 233 tjmax = tjmax_ee; 234 } 235 /* if we dont use msr EE it means we are desktop CPU (with exeception 236 of Atom) */ 237 } else if (tjmax == 100000) { 238 dev_warn(dev, "Using relative temperature scale!\n"); 239 } 240 241 return tjmax; 242 } 243 244 static int __devinit coretemp_probe(struct platform_device *pdev) 245 { 246 struct coretemp_data *data; 247 struct cpuinfo_x86 *c = &cpu_data(pdev->id); 248 int err; 249 u32 eax, edx; 250 251 if (!(data = kzalloc(sizeof(struct coretemp_data), GFP_KERNEL))) { 252 err = -ENOMEM; 253 dev_err(&pdev->dev, "Out of memory\n"); 254 goto exit; 255 } 256 257 data->id = pdev->id; 258 data->name = "coretemp"; 259 mutex_init(&data->update_lock); 260 261 /* test if we can access the THERM_STATUS MSR */ 262 err = rdmsr_safe_on_cpu(data->id, MSR_IA32_THERM_STATUS, &eax, &edx); 263 if (err) { 264 dev_err(&pdev->dev, 265 "Unable to access THERM_STATUS MSR, giving up\n"); 266 goto exit_free; 267 } 268 269 /* Check if we have problem with errata AE18 of Core processors: 270 Readings might stop update when processor visited too deep sleep, 271 fixed for stepping D0 (6EC). 272 */ 273 274 if ((c->x86_model == 0xe) && (c->x86_mask < 0xc)) { 275 /* check for microcode update */ 276 rdmsr_on_cpu(data->id, MSR_IA32_UCODE_REV, &eax, &edx); 277 if (edx < 0x39) { 278 err = -ENODEV; 279 dev_err(&pdev->dev, 280 "Errata AE18 not fixed, update BIOS or " 281 "microcode of the CPU!\n"); 282 goto exit_free; 283 } 284 } 285 286 data->tjmax = adjust_tjmax(c, data->id, &pdev->dev); 287 platform_set_drvdata(pdev, data); 288 289 /* read the still undocumented IA32_TEMPERATURE_TARGET it exists 290 on older CPUs but not in this register, Atoms don't have it either */ 291 292 if ((c->x86_model > 0xe) && (c->x86_model != 0x1c)) { 293 err = rdmsr_safe_on_cpu(data->id, 0x1a2, &eax, &edx); 294 if (err) { 295 dev_warn(&pdev->dev, "Unable to read" 296 " IA32_TEMPERATURE_TARGET MSR\n"); 297 } else { 298 data->ttarget = data->tjmax - 299 (((eax >> 8) & 0xff) * 1000); 300 err = device_create_file(&pdev->dev, 301 &sensor_dev_attr_temp1_max.dev_attr); 302 if (err) 303 goto exit_free; 304 } 305 } 306 307 if ((err = sysfs_create_group(&pdev->dev.kobj, &coretemp_group))) 308 goto exit_dev; 309 310 data->hwmon_dev = hwmon_device_register(&pdev->dev); 311 if (IS_ERR(data->hwmon_dev)) { 312 err = PTR_ERR(data->hwmon_dev); 313 dev_err(&pdev->dev, "Class registration failed (%d)\n", 314 err); 315 goto exit_class; 316 } 317 318 return 0; 319 320 exit_class: 321 sysfs_remove_group(&pdev->dev.kobj, &coretemp_group); 322 exit_dev: 323 device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr); 324 exit_free: 325 kfree(data); 326 exit: 327 return err; 328 } 329 330 static int __devexit coretemp_remove(struct platform_device *pdev) 331 { 332 struct coretemp_data *data = platform_get_drvdata(pdev); 333 334 hwmon_device_unregister(data->hwmon_dev); 335 sysfs_remove_group(&pdev->dev.kobj, &coretemp_group); 336 device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr); 337 platform_set_drvdata(pdev, NULL); 338 kfree(data); 339 return 0; 340 } 341 342 static struct platform_driver coretemp_driver = { 343 .driver = { 344 .owner = THIS_MODULE, 345 .name = DRVNAME, 346 }, 347 .probe = coretemp_probe, 348 .remove = __devexit_p(coretemp_remove), 349 }; 350 351 struct pdev_entry { 352 struct list_head list; 353 struct platform_device *pdev; 354 unsigned int cpu; 355 }; 356 357 static LIST_HEAD(pdev_list); 358 static DEFINE_MUTEX(pdev_list_mutex); 359 360 static int __cpuinit coretemp_device_add(unsigned int cpu) 361 { 362 int err; 363 struct platform_device *pdev; 364 struct pdev_entry *pdev_entry; 365 366 pdev = platform_device_alloc(DRVNAME, cpu); 367 if (!pdev) { 368 err = -ENOMEM; 369 printk(KERN_ERR DRVNAME ": Device allocation failed\n"); 370 goto exit; 371 } 372 373 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); 374 if (!pdev_entry) { 375 err = -ENOMEM; 376 goto exit_device_put; 377 } 378 379 err = platform_device_add(pdev); 380 if (err) { 381 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", 382 err); 383 goto exit_device_free; 384 } 385 386 pdev_entry->pdev = pdev; 387 pdev_entry->cpu = cpu; 388 mutex_lock(&pdev_list_mutex); 389 list_add_tail(&pdev_entry->list, &pdev_list); 390 mutex_unlock(&pdev_list_mutex); 391 392 return 0; 393 394 exit_device_free: 395 kfree(pdev_entry); 396 exit_device_put: 397 platform_device_put(pdev); 398 exit: 399 return err; 400 } 401 402 #ifdef CONFIG_HOTPLUG_CPU 403 static void coretemp_device_remove(unsigned int cpu) 404 { 405 struct pdev_entry *p, *n; 406 mutex_lock(&pdev_list_mutex); 407 list_for_each_entry_safe(p, n, &pdev_list, list) { 408 if (p->cpu == cpu) { 409 platform_device_unregister(p->pdev); 410 list_del(&p->list); 411 kfree(p); 412 } 413 } 414 mutex_unlock(&pdev_list_mutex); 415 } 416 417 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb, 418 unsigned long action, void *hcpu) 419 { 420 unsigned int cpu = (unsigned long) hcpu; 421 422 switch (action) { 423 case CPU_ONLINE: 424 case CPU_DOWN_FAILED: 425 coretemp_device_add(cpu); 426 break; 427 case CPU_DOWN_PREPARE: 428 coretemp_device_remove(cpu); 429 break; 430 } 431 return NOTIFY_OK; 432 } 433 434 static struct notifier_block coretemp_cpu_notifier __refdata = { 435 .notifier_call = coretemp_cpu_callback, 436 }; 437 #endif /* !CONFIG_HOTPLUG_CPU */ 438 439 static int __init coretemp_init(void) 440 { 441 int i, err = -ENODEV; 442 struct pdev_entry *p, *n; 443 444 /* quick check if we run Intel */ 445 if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL) 446 goto exit; 447 448 err = platform_driver_register(&coretemp_driver); 449 if (err) 450 goto exit; 451 452 for_each_online_cpu(i) { 453 struct cpuinfo_x86 *c = &cpu_data(i); 454 455 /* check if family 6, models 0xe (Pentium M DC), 456 0xf (Core 2 DC 65nm), 0x16 (Core 2 SC 65nm), 457 0x17 (Penryn 45nm), 0x1a (Nehalem), 0x1c (Atom), 458 0x1e (Lynnfield) */ 459 if ((c->cpuid_level < 0) || (c->x86 != 0x6) || 460 !((c->x86_model == 0xe) || (c->x86_model == 0xf) || 461 (c->x86_model == 0x16) || (c->x86_model == 0x17) || 462 (c->x86_model == 0x1a) || (c->x86_model == 0x1c) || 463 (c->x86_model == 0x1e))) { 464 465 /* supported CPU not found, but report the unknown 466 family 6 CPU */ 467 if ((c->x86 == 0x6) && (c->x86_model > 0xf)) 468 printk(KERN_WARNING DRVNAME ": Unknown CPU " 469 "model %x\n", c->x86_model); 470 continue; 471 } 472 473 err = coretemp_device_add(i); 474 if (err) 475 goto exit_devices_unreg; 476 } 477 if (list_empty(&pdev_list)) { 478 err = -ENODEV; 479 goto exit_driver_unreg; 480 } 481 482 #ifdef CONFIG_HOTPLUG_CPU 483 register_hotcpu_notifier(&coretemp_cpu_notifier); 484 #endif 485 return 0; 486 487 exit_devices_unreg: 488 mutex_lock(&pdev_list_mutex); 489 list_for_each_entry_safe(p, n, &pdev_list, list) { 490 platform_device_unregister(p->pdev); 491 list_del(&p->list); 492 kfree(p); 493 } 494 mutex_unlock(&pdev_list_mutex); 495 exit_driver_unreg: 496 platform_driver_unregister(&coretemp_driver); 497 exit: 498 return err; 499 } 500 501 static void __exit coretemp_exit(void) 502 { 503 struct pdev_entry *p, *n; 504 #ifdef CONFIG_HOTPLUG_CPU 505 unregister_hotcpu_notifier(&coretemp_cpu_notifier); 506 #endif 507 mutex_lock(&pdev_list_mutex); 508 list_for_each_entry_safe(p, n, &pdev_list, list) { 509 platform_device_unregister(p->pdev); 510 list_del(&p->list); 511 kfree(p); 512 } 513 mutex_unlock(&pdev_list_mutex); 514 platform_driver_unregister(&coretemp_driver); 515 } 516 517 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); 518 MODULE_DESCRIPTION("Intel Core temperature monitor"); 519 MODULE_LICENSE("GPL"); 520 521 module_init(coretemp_init) 522 module_exit(coretemp_exit) 523