1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * HWMON driver for ASUS motherboards that publish some sensor values
4  * via the embedded controller registers.
5  *
6  * Copyright (C) 2021 Eugene Shalygin <eugene.shalygin@gmail.com>
7 
8  * EC provides:
9  * - Chipset temperature
10  * - CPU temperature
11  * - Motherboard temperature
12  * - T_Sensor temperature
13  * - VRM temperature
14  * - Water In temperature
15  * - Water Out temperature
16  * - CPU Optional fan RPM
17  * - Chipset fan RPM
18  * - VRM Heat Sink fan RPM
19  * - Water Flow fan RPM
20  * - CPU current
21  * - CPU core voltage
22  */
23 
24 #include <linux/acpi.h>
25 #include <linux/bitops.h>
26 #include <linux/dev_printk.h>
27 #include <linux/dmi.h>
28 #include <linux/hwmon.h>
29 #include <linux/init.h>
30 #include <linux/jiffies.h>
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/platform_device.h>
34 #include <linux/sort.h>
35 #include <linux/units.h>
36 
37 #include <asm/unaligned.h>
38 
39 static char *mutex_path_override;
40 
41 /* Writing to this EC register switches EC bank */
42 #define ASUS_EC_BANK_REGISTER	0xff
43 #define SENSOR_LABEL_LEN	16
44 
45 /*
46  * Arbitrary set max. allowed bank number. Required for sorting banks and
47  * currently is overkill with just 2 banks used at max, but for the sake
48  * of alignment let's set it to a higher value.
49  */
50 #define ASUS_EC_MAX_BANK	3
51 
52 #define ACPI_LOCK_DELAY_MS	500
53 
54 /* ACPI mutex for locking access to the EC for the firmware */
55 #define ASUS_HW_ACCESS_MUTEX_ASMX	"\\AMW0.ASMX"
56 
57 #define ASUS_HW_ACCESS_MUTEX_RMTW_ASMX	"\\RMTW.ASMX"
58 
59 #define ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0 "\\_SB_.PCI0.SBRG.SIO1.MUT0"
60 
61 #define MAX_IDENTICAL_BOARD_VARIATIONS	3
62 
63 /* Moniker for the ACPI global lock (':' is not allowed in ASL identifiers) */
64 #define ACPI_GLOBAL_LOCK_PSEUDO_PATH	":GLOBAL_LOCK"
65 
66 typedef union {
67 	u32 value;
68 	struct {
69 		u8 index;
70 		u8 bank;
71 		u8 size;
72 		u8 dummy;
73 	} components;
74 } sensor_address;
75 
76 #define MAKE_SENSOR_ADDRESS(size, bank, index) {                               \
77 		.value = (size << 16) + (bank << 8) + index                    \
78 	}
79 
80 static u32 hwmon_attributes[hwmon_max] = {
81 	[hwmon_chip] = HWMON_C_REGISTER_TZ,
82 	[hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL,
83 	[hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL,
84 	[hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL,
85 	[hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL,
86 };
87 
88 struct ec_sensor_info {
89 	char label[SENSOR_LABEL_LEN];
90 	enum hwmon_sensor_types type;
91 	sensor_address addr;
92 };
93 
94 #define EC_SENSOR(sensor_label, sensor_type, size, bank, index) {              \
95 		.label = sensor_label, .type = sensor_type,                    \
96 		.addr = MAKE_SENSOR_ADDRESS(size, bank, index),                \
97 	}
98 
99 enum ec_sensors {
100 	/* chipset temperature [℃] */
101 	ec_sensor_temp_chipset,
102 	/* CPU temperature [℃] */
103 	ec_sensor_temp_cpu,
104 	/* motherboard temperature [℃] */
105 	ec_sensor_temp_mb,
106 	/* "T_Sensor" temperature sensor reading [℃] */
107 	ec_sensor_temp_t_sensor,
108 	/* VRM temperature [℃] */
109 	ec_sensor_temp_vrm,
110 	/* CPU Core voltage [mV] */
111 	ec_sensor_in_cpu_core,
112 	/* CPU_Opt fan [RPM] */
113 	ec_sensor_fan_cpu_opt,
114 	/* VRM heat sink fan [RPM] */
115 	ec_sensor_fan_vrm_hs,
116 	/* Chipset fan [RPM] */
117 	ec_sensor_fan_chipset,
118 	/* Water flow sensor reading [RPM] */
119 	ec_sensor_fan_water_flow,
120 	/* CPU current [A] */
121 	ec_sensor_curr_cpu,
122 	/* "Water_In" temperature sensor reading [℃] */
123 	ec_sensor_temp_water_in,
124 	/* "Water_Out" temperature sensor reading [℃] */
125 	ec_sensor_temp_water_out,
126 	/* "Water_Block_In" temperature sensor reading [℃] */
127 	ec_sensor_temp_water_block_in,
128 	/* "Water_Block_Out" temperature sensor reading [℃] */
129 	ec_sensor_temp_water_block_out,
130 	/* "T_sensor_2" temperature sensor reading [℃] */
131 	ec_sensor_temp_t_sensor_2,
132 	/* "Extra_1" temperature sensor reading [℃] */
133 	ec_sensor_temp_sensor_extra_1,
134 	/* "Extra_2" temperature sensor reading [℃] */
135 	ec_sensor_temp_sensor_extra_2,
136 	/* "Extra_3" temperature sensor reading [℃] */
137 	ec_sensor_temp_sensor_extra_3,
138 };
139 
140 #define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset)
141 #define SENSOR_TEMP_CPU BIT(ec_sensor_temp_cpu)
142 #define SENSOR_TEMP_MB BIT(ec_sensor_temp_mb)
143 #define SENSOR_TEMP_T_SENSOR BIT(ec_sensor_temp_t_sensor)
144 #define SENSOR_TEMP_VRM BIT(ec_sensor_temp_vrm)
145 #define SENSOR_IN_CPU_CORE BIT(ec_sensor_in_cpu_core)
146 #define SENSOR_FAN_CPU_OPT BIT(ec_sensor_fan_cpu_opt)
147 #define SENSOR_FAN_VRM_HS BIT(ec_sensor_fan_vrm_hs)
148 #define SENSOR_FAN_CHIPSET BIT(ec_sensor_fan_chipset)
149 #define SENSOR_FAN_WATER_FLOW BIT(ec_sensor_fan_water_flow)
150 #define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu)
151 #define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in)
152 #define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out)
153 #define SENSOR_TEMP_WATER_BLOCK_IN BIT(ec_sensor_temp_water_block_in)
154 #define SENSOR_TEMP_WATER_BLOCK_OUT BIT(ec_sensor_temp_water_block_out)
155 #define SENSOR_TEMP_T_SENSOR_2 BIT(ec_sensor_temp_t_sensor_2)
156 #define SENSOR_TEMP_SENSOR_EXTRA_1 BIT(ec_sensor_temp_sensor_extra_1)
157 #define SENSOR_TEMP_SENSOR_EXTRA_2 BIT(ec_sensor_temp_sensor_extra_2)
158 #define SENSOR_TEMP_SENSOR_EXTRA_3 BIT(ec_sensor_temp_sensor_extra_3)
159 
160 enum board_family {
161 	family_unknown,
162 	family_amd_400_series,
163 	family_amd_500_series,
164 	family_intel_300_series,
165 	family_intel_600_series
166 };
167 
168 /* All the known sensors for ASUS EC controllers */
169 static const struct ec_sensor_info sensors_family_amd_400[] = {
170 	[ec_sensor_temp_chipset] =
171 		EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
172 	[ec_sensor_temp_cpu] =
173 		EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
174 	[ec_sensor_temp_mb] =
175 		EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
176 	[ec_sensor_temp_t_sensor] =
177 		EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
178 	[ec_sensor_temp_vrm] =
179 		EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
180 	[ec_sensor_in_cpu_core] =
181 		EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2),
182 	[ec_sensor_fan_cpu_opt] =
183 		EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xbc),
184 	[ec_sensor_fan_vrm_hs] =
185 		EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
186 	[ec_sensor_fan_chipset] =
187 		/* no chipset fans in this generation */
188 		EC_SENSOR("Chipset", hwmon_fan, 0, 0x00, 0x00),
189 	[ec_sensor_fan_water_flow] =
190 		EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xb4),
191 	[ec_sensor_curr_cpu] =
192 		EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4),
193 	[ec_sensor_temp_water_in] =
194 		EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x0d),
195 	[ec_sensor_temp_water_out] =
196 		EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x0b),
197 };
198 
199 static const struct ec_sensor_info sensors_family_amd_500[] = {
200 	[ec_sensor_temp_chipset] =
201 		EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
202 	[ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
203 	[ec_sensor_temp_mb] =
204 		EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
205 	[ec_sensor_temp_t_sensor] =
206 		EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
207 	[ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
208 	[ec_sensor_in_cpu_core] =
209 		EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2),
210 	[ec_sensor_fan_cpu_opt] =
211 		EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
212 	[ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
213 	[ec_sensor_fan_chipset] =
214 		EC_SENSOR("Chipset", hwmon_fan, 2, 0x00, 0xb4),
215 	[ec_sensor_fan_water_flow] =
216 		EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc),
217 	[ec_sensor_curr_cpu] = EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4),
218 	[ec_sensor_temp_water_in] =
219 		EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
220 	[ec_sensor_temp_water_out] =
221 		EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
222 	[ec_sensor_temp_water_block_in] =
223 		EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02),
224 	[ec_sensor_temp_water_block_out] =
225 		EC_SENSOR("Water_Block_Out", hwmon_temp, 1, 0x01, 0x03),
226 	[ec_sensor_temp_sensor_extra_1] =
227 		EC_SENSOR("Extra_1", hwmon_temp, 1, 0x01, 0x09),
228 	[ec_sensor_temp_t_sensor_2] =
229 		EC_SENSOR("T_sensor_2", hwmon_temp, 1, 0x01, 0x0a),
230 	[ec_sensor_temp_sensor_extra_2] =
231 		EC_SENSOR("Extra_2", hwmon_temp, 1, 0x01, 0x0b),
232 	[ec_sensor_temp_sensor_extra_3] =
233 		EC_SENSOR("Extra_3", hwmon_temp, 1, 0x01, 0x0c),
234 };
235 
236 static const struct ec_sensor_info sensors_family_intel_300[] = {
237 	[ec_sensor_temp_chipset] =
238 		EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
239 	[ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
240 	[ec_sensor_temp_mb] =
241 		EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
242 	[ec_sensor_temp_t_sensor] =
243 		EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
244 	[ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
245 	[ec_sensor_fan_cpu_opt] =
246 		EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
247 	[ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
248 	[ec_sensor_fan_water_flow] =
249 		EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc),
250 	[ec_sensor_temp_water_in] =
251 		EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
252 	[ec_sensor_temp_water_out] =
253 		EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
254 };
255 
256 static const struct ec_sensor_info sensors_family_intel_600[] = {
257 	[ec_sensor_temp_t_sensor] =
258 		EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
259 	[ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
260 };
261 
262 /* Shortcuts for common combinations */
263 #define SENSOR_SET_TEMP_CHIPSET_CPU_MB                                         \
264 	(SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB)
265 #define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT)
266 #define SENSOR_SET_WATER_BLOCK                                                 \
267 	(SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT)
268 
269 struct ec_board_info {
270 	unsigned long sensors;
271 	/*
272 	 * Defines which mutex to use for guarding access to the state and the
273 	 * hardware. Can be either a full path to an AML mutex or the
274 	 * pseudo-path ACPI_GLOBAL_LOCK_PSEUDO_PATH to use the global ACPI lock,
275 	 * or left empty to use a regular mutex object, in which case access to
276 	 * the hardware is not guarded.
277 	 */
278 	const char *mutex_path;
279 	enum board_family family;
280 };
281 
282 static const struct ec_board_info board_info_prime_x470_pro = {
283 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
284 		SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
285 		SENSOR_FAN_CPU_OPT |
286 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
287 	.mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
288 	.family = family_amd_400_series,
289 };
290 
291 static const struct ec_board_info board_info_prime_x570_pro = {
292 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
293 		SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
294 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
295 	.family = family_amd_500_series,
296 };
297 
298 static const struct ec_board_info board_info_pro_art_x570_creator_wifi = {
299 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
300 		SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT |
301 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
302 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
303 	.family = family_amd_500_series,
304 };
305 
306 static const struct ec_board_info board_info_pro_ws_x570_ace = {
307 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
308 		SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET |
309 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
310 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
311 	.family = family_amd_500_series,
312 };
313 
314 static const struct ec_board_info board_info_crosshair_viii_dark_hero = {
315 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
316 		SENSOR_TEMP_T_SENSOR |
317 		SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
318 		SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW |
319 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
320 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
321 	.family = family_amd_500_series,
322 };
323 
324 static const struct ec_board_info board_info_crosshair_viii_hero = {
325 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
326 		SENSOR_TEMP_T_SENSOR |
327 		SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
328 		SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
329 		SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU |
330 		SENSOR_IN_CPU_CORE,
331 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
332 	.family = family_amd_500_series,
333 };
334 
335 static const struct ec_board_info board_info_maximus_xi_hero = {
336 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
337 		SENSOR_TEMP_T_SENSOR |
338 		SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
339 		SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW,
340 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
341 	.family = family_intel_300_series,
342 };
343 
344 static const struct ec_board_info board_info_crosshair_viii_impact = {
345 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
346 		SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
347 		SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
348 		SENSOR_IN_CPU_CORE,
349 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
350 	.family = family_amd_500_series,
351 };
352 
353 static const struct ec_board_info board_info_strix_b550_e_gaming = {
354 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
355 		SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
356 		SENSOR_FAN_CPU_OPT,
357 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
358 	.family = family_amd_500_series,
359 };
360 
361 static const struct ec_board_info board_info_strix_b550_i_gaming = {
362 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
363 		SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
364 		SENSOR_FAN_VRM_HS | SENSOR_CURR_CPU |
365 		SENSOR_IN_CPU_CORE,
366 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
367 	.family = family_amd_500_series,
368 };
369 
370 static const struct ec_board_info board_info_strix_x570_e_gaming = {
371 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
372 		SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
373 		SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
374 		SENSOR_IN_CPU_CORE,
375 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
376 	.family = family_amd_500_series,
377 };
378 
379 static const struct ec_board_info board_info_strix_x570_e_gaming_wifi_ii = {
380 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
381 		SENSOR_TEMP_T_SENSOR | SENSOR_CURR_CPU |
382 		SENSOR_IN_CPU_CORE,
383 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
384 	.family = family_amd_500_series,
385 };
386 
387 static const struct ec_board_info board_info_strix_x570_f_gaming = {
388 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
389 		SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
390 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
391 	.family = family_amd_500_series,
392 };
393 
394 static const struct ec_board_info board_info_strix_x570_i_gaming = {
395 	.sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM |
396 		SENSOR_TEMP_T_SENSOR |
397 		SENSOR_FAN_VRM_HS | SENSOR_FAN_CHIPSET |
398 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
399 	.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
400 	.family = family_amd_500_series,
401 };
402 
403 static const struct ec_board_info board_info_strix_z690_a_gaming_wifi_d4 = {
404 	.sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM,
405 	.mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
406 	.family = family_intel_600_series,
407 };
408 
409 static const struct ec_board_info board_info_zenith_ii_extreme = {
410 	.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
411 		SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
412 		SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS |
413 		SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE |
414 		SENSOR_SET_WATER_BLOCK |
415 		SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 |
416 		SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3,
417 	.mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
418 	.family = family_amd_500_series,
419 };
420 
421 #define DMI_EXACT_MATCH_ASUS_BOARD_NAME(name, board_info)                      \
422 	{                                                                      \
423 		.matches = {                                                   \
424 			DMI_EXACT_MATCH(DMI_BOARD_VENDOR,                      \
425 					"ASUSTeK COMPUTER INC."),              \
426 			DMI_EXACT_MATCH(DMI_BOARD_NAME, name),                 \
427 		},                                                             \
428 		.driver_data = (void *)board_info,                              \
429 	}
430 
431 static const struct dmi_system_id dmi_table[] = {
432 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X470-PRO",
433 					&board_info_prime_x470_pro),
434 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X570-PRO",
435 					&board_info_prime_x570_pro),
436 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X570-CREATOR WIFI",
437 					&board_info_pro_art_x570_creator_wifi),
438 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS X570-ACE",
439 					&board_info_pro_ws_x570_ace),
440 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII DARK HERO",
441 					&board_info_crosshair_viii_dark_hero),
442 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII FORMULA",
443 					&board_info_crosshair_viii_hero),
444 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO",
445 					&board_info_crosshair_viii_hero),
446 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO (WI-FI)",
447 					&board_info_crosshair_viii_hero),
448 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO",
449 					&board_info_maximus_xi_hero),
450 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO (WI-FI)",
451 					&board_info_maximus_xi_hero),
452 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII IMPACT",
453 					&board_info_crosshair_viii_impact),
454 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-E GAMING",
455 					&board_info_strix_b550_e_gaming),
456 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-I GAMING",
457 					&board_info_strix_b550_i_gaming),
458 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING",
459 					&board_info_strix_x570_e_gaming),
460 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING WIFI II",
461 					&board_info_strix_x570_e_gaming_wifi_ii),
462 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-F GAMING",
463 					&board_info_strix_x570_f_gaming),
464 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-I GAMING",
465 					&board_info_strix_x570_i_gaming),
466 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z690-A GAMING WIFI D4",
467 					&board_info_strix_z690_a_gaming_wifi_d4),
468 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME",
469 					&board_info_zenith_ii_extreme),
470 	DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME ALPHA",
471 					&board_info_zenith_ii_extreme),
472 	{},
473 };
474 
475 struct ec_sensor {
476 	unsigned int info_index;
477 	s32 cached_value;
478 };
479 
480 struct lock_data {
481 	union {
482 		acpi_handle aml;
483 		/* global lock handle */
484 		u32 glk;
485 	} mutex;
486 	bool (*lock)(struct lock_data *data);
487 	bool (*unlock)(struct lock_data *data);
488 };
489 
490 /*
491  * The next function pairs implement options for locking access to the
492  * state and the EC
493  */
494 static bool lock_via_acpi_mutex(struct lock_data *data)
495 {
496 	/*
497 	 * ASUS DSDT does not specify that access to the EC has to be guarded,
498 	 * but firmware does access it via ACPI
499 	 */
500 	return ACPI_SUCCESS(acpi_acquire_mutex(data->mutex.aml,
501 					       NULL, ACPI_LOCK_DELAY_MS));
502 }
503 
504 static bool unlock_acpi_mutex(struct lock_data *data)
505 {
506 	return ACPI_SUCCESS(acpi_release_mutex(data->mutex.aml, NULL));
507 }
508 
509 static bool lock_via_global_acpi_lock(struct lock_data *data)
510 {
511 	return ACPI_SUCCESS(acpi_acquire_global_lock(ACPI_LOCK_DELAY_MS,
512 						     &data->mutex.glk));
513 }
514 
515 static bool unlock_global_acpi_lock(struct lock_data *data)
516 {
517 	return ACPI_SUCCESS(acpi_release_global_lock(data->mutex.glk));
518 }
519 
520 struct ec_sensors_data {
521 	const struct ec_board_info *board_info;
522 	const struct ec_sensor_info *sensors_info;
523 	struct ec_sensor *sensors;
524 	/* EC registers to read from */
525 	u16 *registers;
526 	u8 *read_buffer;
527 	/* sorted list of unique register banks */
528 	u8 banks[ASUS_EC_MAX_BANK + 1];
529 	/* in jiffies */
530 	unsigned long last_updated;
531 	struct lock_data lock_data;
532 	/* number of board EC sensors */
533 	u8 nr_sensors;
534 	/*
535 	 * number of EC registers to read
536 	 * (sensor might span more than 1 register)
537 	 */
538 	u8 nr_registers;
539 	/* number of unique register banks */
540 	u8 nr_banks;
541 };
542 
543 static u8 register_bank(u16 reg)
544 {
545 	return reg >> 8;
546 }
547 
548 static u8 register_index(u16 reg)
549 {
550 	return reg & 0x00ff;
551 }
552 
553 static bool is_sensor_data_signed(const struct ec_sensor_info *si)
554 {
555 	/*
556 	 * guessed from WMI functions in DSDT code for boards
557 	 * of the X470 generation
558 	 */
559 	return si->type == hwmon_temp;
560 }
561 
562 static const struct ec_sensor_info *
563 get_sensor_info(const struct ec_sensors_data *state, int index)
564 {
565 	return state->sensors_info + state->sensors[index].info_index;
566 }
567 
568 static int find_ec_sensor_index(const struct ec_sensors_data *ec,
569 				enum hwmon_sensor_types type, int channel)
570 {
571 	unsigned int i;
572 
573 	for (i = 0; i < ec->nr_sensors; i++) {
574 		if (get_sensor_info(ec, i)->type == type) {
575 			if (channel == 0)
576 				return i;
577 			channel--;
578 		}
579 	}
580 	return -ENOENT;
581 }
582 
583 static int bank_compare(const void *a, const void *b)
584 {
585 	return *((const s8 *)a) - *((const s8 *)b);
586 }
587 
588 static void setup_sensor_data(struct ec_sensors_data *ec)
589 {
590 	struct ec_sensor *s = ec->sensors;
591 	bool bank_found;
592 	int i, j;
593 	u8 bank;
594 
595 	ec->nr_banks = 0;
596 	ec->nr_registers = 0;
597 
598 	for_each_set_bit(i, &ec->board_info->sensors,
599 			 BITS_PER_TYPE(ec->board_info->sensors)) {
600 		s->info_index = i;
601 		s->cached_value = 0;
602 		ec->nr_registers +=
603 			ec->sensors_info[s->info_index].addr.components.size;
604 		bank_found = false;
605 		bank = ec->sensors_info[s->info_index].addr.components.bank;
606 		for (j = 0; j < ec->nr_banks; j++) {
607 			if (ec->banks[j] == bank) {
608 				bank_found = true;
609 				break;
610 			}
611 		}
612 		if (!bank_found) {
613 			ec->banks[ec->nr_banks++] = bank;
614 		}
615 		s++;
616 	}
617 	sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL);
618 }
619 
620 static void fill_ec_registers(struct ec_sensors_data *ec)
621 {
622 	const struct ec_sensor_info *si;
623 	unsigned int i, j, register_idx = 0;
624 
625 	for (i = 0; i < ec->nr_sensors; ++i) {
626 		si = get_sensor_info(ec, i);
627 		for (j = 0; j < si->addr.components.size; ++j, ++register_idx) {
628 			ec->registers[register_idx] =
629 				(si->addr.components.bank << 8) +
630 				si->addr.components.index + j;
631 		}
632 	}
633 }
634 
635 static int setup_lock_data(struct device *dev)
636 {
637 	const char *mutex_path;
638 	int status;
639 	struct ec_sensors_data *state = dev_get_drvdata(dev);
640 
641 	mutex_path = mutex_path_override ?
642 		mutex_path_override : state->board_info->mutex_path;
643 
644 	if (!mutex_path || !strlen(mutex_path)) {
645 		dev_err(dev, "Hardware access guard mutex name is empty");
646 		return -EINVAL;
647 	}
648 	if (!strcmp(mutex_path, ACPI_GLOBAL_LOCK_PSEUDO_PATH)) {
649 		state->lock_data.mutex.glk = 0;
650 		state->lock_data.lock = lock_via_global_acpi_lock;
651 		state->lock_data.unlock = unlock_global_acpi_lock;
652 	} else {
653 		status = acpi_get_handle(NULL, (acpi_string)mutex_path,
654 					 &state->lock_data.mutex.aml);
655 		if (ACPI_FAILURE(status)) {
656 			dev_err(dev,
657 				"Failed to get hardware access guard AML mutex '%s': error %d",
658 				mutex_path, status);
659 			return -ENOENT;
660 		}
661 		state->lock_data.lock = lock_via_acpi_mutex;
662 		state->lock_data.unlock = unlock_acpi_mutex;
663 	}
664 	return 0;
665 }
666 
667 static int asus_ec_bank_switch(u8 bank, u8 *old)
668 {
669 	int status = 0;
670 
671 	if (old) {
672 		status = ec_read(ASUS_EC_BANK_REGISTER, old);
673 	}
674 	if (status || (old && (*old == bank)))
675 		return status;
676 	return ec_write(ASUS_EC_BANK_REGISTER, bank);
677 }
678 
679 static int asus_ec_block_read(const struct device *dev,
680 			      struct ec_sensors_data *ec)
681 {
682 	int ireg, ibank, status;
683 	u8 bank, reg_bank, prev_bank;
684 
685 	bank = 0;
686 	status = asus_ec_bank_switch(bank, &prev_bank);
687 	if (status) {
688 		dev_warn(dev, "EC bank switch failed");
689 		return status;
690 	}
691 
692 	if (prev_bank) {
693 		/* oops... somebody else is working with the EC too */
694 		dev_warn(dev,
695 			"Concurrent access to the ACPI EC detected.\nRace condition possible.");
696 	}
697 
698 	/* read registers minimizing bank switches. */
699 	for (ibank = 0; ibank < ec->nr_banks; ibank++) {
700 		if (bank != ec->banks[ibank]) {
701 			bank = ec->banks[ibank];
702 			if (asus_ec_bank_switch(bank, NULL)) {
703 				dev_warn(dev, "EC bank switch to %d failed",
704 					 bank);
705 				break;
706 			}
707 		}
708 		for (ireg = 0; ireg < ec->nr_registers; ireg++) {
709 			reg_bank = register_bank(ec->registers[ireg]);
710 			if (reg_bank < bank) {
711 				continue;
712 			}
713 			ec_read(register_index(ec->registers[ireg]),
714 				ec->read_buffer + ireg);
715 		}
716 	}
717 
718 	status = asus_ec_bank_switch(prev_bank, NULL);
719 	return status;
720 }
721 
722 static inline s32 get_sensor_value(const struct ec_sensor_info *si, u8 *data)
723 {
724 	if (is_sensor_data_signed(si)) {
725 		switch (si->addr.components.size) {
726 		case 1:
727 			return (s8)*data;
728 		case 2:
729 			return (s16)get_unaligned_be16(data);
730 		case 4:
731 			return (s32)get_unaligned_be32(data);
732 		default:
733 			return 0;
734 		}
735 	} else {
736 		switch (si->addr.components.size) {
737 		case 1:
738 			return *data;
739 		case 2:
740 			return get_unaligned_be16(data);
741 		case 4:
742 			return get_unaligned_be32(data);
743 		default:
744 			return 0;
745 		}
746 	}
747 }
748 
749 static void update_sensor_values(struct ec_sensors_data *ec, u8 *data)
750 {
751 	const struct ec_sensor_info *si;
752 	struct ec_sensor *s, *sensor_end;
753 
754 	sensor_end = ec->sensors + ec->nr_sensors;
755 	for (s = ec->sensors; s != sensor_end; s++) {
756 		si = ec->sensors_info + s->info_index;
757 		s->cached_value = get_sensor_value(si, data);
758 		data += si->addr.components.size;
759 	}
760 }
761 
762 static int update_ec_sensors(const struct device *dev,
763 			     struct ec_sensors_data *ec)
764 {
765 	int status;
766 
767 	if (!ec->lock_data.lock(&ec->lock_data)) {
768 		dev_warn(dev, "Failed to acquire mutex");
769 		return -EBUSY;
770 	}
771 
772 	status = asus_ec_block_read(dev, ec);
773 
774 	if (!status) {
775 		update_sensor_values(ec, ec->read_buffer);
776 	}
777 
778 	if (!ec->lock_data.unlock(&ec->lock_data))
779 		dev_err(dev, "Failed to release mutex");
780 
781 	return status;
782 }
783 
784 static long scale_sensor_value(s32 value, int data_type)
785 {
786 	switch (data_type) {
787 	case hwmon_curr:
788 	case hwmon_temp:
789 		return value * MILLI;
790 	default:
791 		return value;
792 	}
793 }
794 
795 static int get_cached_value_or_update(const struct device *dev,
796 				      int sensor_index,
797 				      struct ec_sensors_data *state, s32 *value)
798 {
799 	if (time_after(jiffies, state->last_updated + HZ)) {
800 		if (update_ec_sensors(dev, state)) {
801 			dev_err(dev, "update_ec_sensors() failure\n");
802 			return -EIO;
803 		}
804 
805 		state->last_updated = jiffies;
806 	}
807 
808 	*value = state->sensors[sensor_index].cached_value;
809 	return 0;
810 }
811 
812 /*
813  * Now follow the functions that implement the hwmon interface
814  */
815 
816 static int asus_ec_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
817 			      u32 attr, int channel, long *val)
818 {
819 	int ret;
820 	s32 value = 0;
821 
822 	struct ec_sensors_data *state = dev_get_drvdata(dev);
823 	int sidx = find_ec_sensor_index(state, type, channel);
824 
825 	if (sidx < 0) {
826 		return sidx;
827 	}
828 
829 	ret = get_cached_value_or_update(dev, sidx, state, &value);
830 	if (!ret) {
831 		*val = scale_sensor_value(value,
832 					  get_sensor_info(state, sidx)->type);
833 	}
834 
835 	return ret;
836 }
837 
838 static int asus_ec_hwmon_read_string(struct device *dev,
839 				     enum hwmon_sensor_types type, u32 attr,
840 				     int channel, const char **str)
841 {
842 	struct ec_sensors_data *state = dev_get_drvdata(dev);
843 	int sensor_index = find_ec_sensor_index(state, type, channel);
844 	*str = get_sensor_info(state, sensor_index)->label;
845 
846 	return 0;
847 }
848 
849 static umode_t asus_ec_hwmon_is_visible(const void *drvdata,
850 					enum hwmon_sensor_types type, u32 attr,
851 					int channel)
852 {
853 	const struct ec_sensors_data *state = drvdata;
854 
855 	return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0;
856 }
857 
858 static int
859 asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan,
860 			     struct device *dev, int num,
861 			     enum hwmon_sensor_types type, u32 config)
862 {
863 	int i;
864 	u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL);
865 
866 	if (!cfg)
867 		return -ENOMEM;
868 
869 	asus_ec_hwmon_chan->type = type;
870 	asus_ec_hwmon_chan->config = cfg;
871 	for (i = 0; i < num; i++, cfg++)
872 		*cfg = config;
873 
874 	return 0;
875 }
876 
877 static const struct hwmon_ops asus_ec_hwmon_ops = {
878 	.is_visible = asus_ec_hwmon_is_visible,
879 	.read = asus_ec_hwmon_read,
880 	.read_string = asus_ec_hwmon_read_string,
881 };
882 
883 static struct hwmon_chip_info asus_ec_chip_info = {
884 	.ops = &asus_ec_hwmon_ops,
885 };
886 
887 static const struct ec_board_info *get_board_info(void)
888 {
889 	const struct dmi_system_id *dmi_entry;
890 
891 	dmi_entry = dmi_first_match(dmi_table);
892 	return dmi_entry ? dmi_entry->driver_data : NULL;
893 }
894 
895 static int asus_ec_probe(struct platform_device *pdev)
896 {
897 	const struct hwmon_channel_info **ptr_asus_ec_ci;
898 	int nr_count[hwmon_max] = { 0 }, nr_types = 0;
899 	struct hwmon_channel_info *asus_ec_hwmon_chan;
900 	const struct ec_board_info *pboard_info;
901 	const struct hwmon_chip_info *chip_info;
902 	struct device *dev = &pdev->dev;
903 	struct ec_sensors_data *ec_data;
904 	const struct ec_sensor_info *si;
905 	enum hwmon_sensor_types type;
906 	struct device *hwdev;
907 	unsigned int i;
908 	int status;
909 
910 	pboard_info = get_board_info();
911 	if (!pboard_info)
912 		return -ENODEV;
913 
914 	ec_data = devm_kzalloc(dev, sizeof(struct ec_sensors_data),
915 			       GFP_KERNEL);
916 	if (!ec_data)
917 		return -ENOMEM;
918 
919 	dev_set_drvdata(dev, ec_data);
920 	ec_data->board_info = pboard_info;
921 
922 	switch (ec_data->board_info->family) {
923 	case family_amd_400_series:
924 		ec_data->sensors_info = sensors_family_amd_400;
925 		break;
926 	case family_amd_500_series:
927 		ec_data->sensors_info = sensors_family_amd_500;
928 		break;
929 	case family_intel_300_series:
930 		ec_data->sensors_info = sensors_family_intel_300;
931 		break;
932 	case family_intel_600_series:
933 		ec_data->sensors_info = sensors_family_intel_600;
934 		break;
935 	default:
936 		dev_err(dev, "Unknown board family: %d",
937 			ec_data->board_info->family);
938 		return -EINVAL;
939 	}
940 
941 	ec_data->nr_sensors = hweight_long(ec_data->board_info->sensors);
942 	ec_data->sensors = devm_kcalloc(dev, ec_data->nr_sensors,
943 					sizeof(struct ec_sensor), GFP_KERNEL);
944 	if (!ec_data->sensors)
945 		return -ENOMEM;
946 
947 	status = setup_lock_data(dev);
948 	if (status) {
949 		dev_err(dev, "Failed to setup state/EC locking: %d", status);
950 		return status;
951 	}
952 
953 	setup_sensor_data(ec_data);
954 	ec_data->registers = devm_kcalloc(dev, ec_data->nr_registers,
955 					  sizeof(u16), GFP_KERNEL);
956 	ec_data->read_buffer = devm_kcalloc(dev, ec_data->nr_registers,
957 					    sizeof(u8), GFP_KERNEL);
958 
959 	if (!ec_data->registers || !ec_data->read_buffer)
960 		return -ENOMEM;
961 
962 	fill_ec_registers(ec_data);
963 
964 	for (i = 0; i < ec_data->nr_sensors; ++i) {
965 		si = get_sensor_info(ec_data, i);
966 		if (!nr_count[si->type])
967 			++nr_types;
968 		++nr_count[si->type];
969 	}
970 
971 	if (nr_count[hwmon_temp])
972 		nr_count[hwmon_chip]++, nr_types++;
973 
974 	asus_ec_hwmon_chan = devm_kcalloc(
975 		dev, nr_types, sizeof(*asus_ec_hwmon_chan), GFP_KERNEL);
976 	if (!asus_ec_hwmon_chan)
977 		return -ENOMEM;
978 
979 	ptr_asus_ec_ci = devm_kcalloc(dev, nr_types + 1,
980 				       sizeof(*ptr_asus_ec_ci), GFP_KERNEL);
981 	if (!ptr_asus_ec_ci)
982 		return -ENOMEM;
983 
984 	asus_ec_chip_info.info = ptr_asus_ec_ci;
985 	chip_info = &asus_ec_chip_info;
986 
987 	for (type = 0; type < hwmon_max; ++type) {
988 		if (!nr_count[type])
989 			continue;
990 
991 		asus_ec_hwmon_add_chan_info(asus_ec_hwmon_chan, dev,
992 					     nr_count[type], type,
993 					     hwmon_attributes[type]);
994 		*ptr_asus_ec_ci++ = asus_ec_hwmon_chan++;
995 	}
996 
997 	dev_info(dev, "board has %d EC sensors that span %d registers",
998 		 ec_data->nr_sensors, ec_data->nr_registers);
999 
1000 	hwdev = devm_hwmon_device_register_with_info(dev, "asusec",
1001 						     ec_data, chip_info, NULL);
1002 
1003 	return PTR_ERR_OR_ZERO(hwdev);
1004 }
1005 
1006 MODULE_DEVICE_TABLE(dmi, dmi_table);
1007 
1008 static struct platform_driver asus_ec_sensors_platform_driver = {
1009 	.driver = {
1010 		.name	= "asus-ec-sensors",
1011 	},
1012 	.probe = asus_ec_probe,
1013 };
1014 
1015 static struct platform_device *asus_ec_sensors_platform_device;
1016 
1017 static int __init asus_ec_init(void)
1018 {
1019 	asus_ec_sensors_platform_device =
1020 		platform_create_bundle(&asus_ec_sensors_platform_driver,
1021 				       asus_ec_probe, NULL, 0, NULL, 0);
1022 
1023 	if (IS_ERR(asus_ec_sensors_platform_device))
1024 		return PTR_ERR(asus_ec_sensors_platform_device);
1025 
1026 	return 0;
1027 }
1028 
1029 static void __exit asus_ec_exit(void)
1030 {
1031 	platform_device_unregister(asus_ec_sensors_platform_device);
1032 	platform_driver_unregister(&asus_ec_sensors_platform_driver);
1033 }
1034 
1035 module_init(asus_ec_init);
1036 module_exit(asus_ec_exit);
1037 
1038 module_param_named(mutex_path, mutex_path_override, charp, 0);
1039 MODULE_PARM_DESC(mutex_path,
1040 		 "Override ACPI mutex path used to guard access to hardware");
1041 
1042 MODULE_AUTHOR("Eugene Shalygin <eugene.shalygin@gmail.com>");
1043 MODULE_DESCRIPTION(
1044 	"HWMON driver for sensors accessible via ACPI EC in ASUS motherboards");
1045 MODULE_LICENSE("GPL");
1046