1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * HWMON driver for ASUS motherboards that publish some sensor values 4 * via the embedded controller registers. 5 * 6 * Copyright (C) 2021 Eugene Shalygin <eugene.shalygin@gmail.com> 7 8 * EC provides: 9 * - Chipset temperature 10 * - CPU temperature 11 * - Motherboard temperature 12 * - T_Sensor temperature 13 * - VRM temperature 14 * - Water In temperature 15 * - Water Out temperature 16 * - CPU Optional fan RPM 17 * - Chipset fan RPM 18 * - VRM Heat Sink fan RPM 19 * - Water Flow fan RPM 20 * - CPU current 21 * - CPU core voltage 22 */ 23 24 #include <linux/acpi.h> 25 #include <linux/bitops.h> 26 #include <linux/dev_printk.h> 27 #include <linux/dmi.h> 28 #include <linux/hwmon.h> 29 #include <linux/init.h> 30 #include <linux/jiffies.h> 31 #include <linux/kernel.h> 32 #include <linux/module.h> 33 #include <linux/platform_device.h> 34 #include <linux/sort.h> 35 #include <linux/units.h> 36 37 #include <asm/unaligned.h> 38 39 static char *mutex_path_override; 40 41 /* Writing to this EC register switches EC bank */ 42 #define ASUS_EC_BANK_REGISTER 0xff 43 #define SENSOR_LABEL_LEN 16 44 45 /* 46 * Arbitrary set max. allowed bank number. Required for sorting banks and 47 * currently is overkill with just 2 banks used at max, but for the sake 48 * of alignment let's set it to a higher value. 49 */ 50 #define ASUS_EC_MAX_BANK 3 51 52 #define ACPI_LOCK_DELAY_MS 500 53 54 /* ACPI mutex for locking access to the EC for the firmware */ 55 #define ASUS_HW_ACCESS_MUTEX_ASMX "\\AMW0.ASMX" 56 57 #define ASUS_HW_ACCESS_MUTEX_RMTW_ASMX "\\RMTW.ASMX" 58 59 #define ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0 "\\_SB_.PCI0.SBRG.SIO1.MUT0" 60 61 #define MAX_IDENTICAL_BOARD_VARIATIONS 3 62 63 /* Moniker for the ACPI global lock (':' is not allowed in ASL identifiers) */ 64 #define ACPI_GLOBAL_LOCK_PSEUDO_PATH ":GLOBAL_LOCK" 65 66 typedef union { 67 u32 value; 68 struct { 69 u8 index; 70 u8 bank; 71 u8 size; 72 u8 dummy; 73 } components; 74 } sensor_address; 75 76 #define MAKE_SENSOR_ADDRESS(size, bank, index) { \ 77 .value = (size << 16) + (bank << 8) + index \ 78 } 79 80 static u32 hwmon_attributes[hwmon_max] = { 81 [hwmon_chip] = HWMON_C_REGISTER_TZ, 82 [hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL, 83 [hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL, 84 [hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL, 85 [hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL, 86 }; 87 88 struct ec_sensor_info { 89 char label[SENSOR_LABEL_LEN]; 90 enum hwmon_sensor_types type; 91 sensor_address addr; 92 }; 93 94 #define EC_SENSOR(sensor_label, sensor_type, size, bank, index) { \ 95 .label = sensor_label, .type = sensor_type, \ 96 .addr = MAKE_SENSOR_ADDRESS(size, bank, index), \ 97 } 98 99 enum ec_sensors { 100 /* chipset temperature [℃] */ 101 ec_sensor_temp_chipset, 102 /* CPU temperature [℃] */ 103 ec_sensor_temp_cpu, 104 /* motherboard temperature [℃] */ 105 ec_sensor_temp_mb, 106 /* "T_Sensor" temperature sensor reading [℃] */ 107 ec_sensor_temp_t_sensor, 108 /* VRM temperature [℃] */ 109 ec_sensor_temp_vrm, 110 /* CPU Core voltage [mV] */ 111 ec_sensor_in_cpu_core, 112 /* CPU_Opt fan [RPM] */ 113 ec_sensor_fan_cpu_opt, 114 /* VRM heat sink fan [RPM] */ 115 ec_sensor_fan_vrm_hs, 116 /* Chipset fan [RPM] */ 117 ec_sensor_fan_chipset, 118 /* Water flow sensor reading [RPM] */ 119 ec_sensor_fan_water_flow, 120 /* CPU current [A] */ 121 ec_sensor_curr_cpu, 122 /* "Water_In" temperature sensor reading [℃] */ 123 ec_sensor_temp_water_in, 124 /* "Water_Out" temperature sensor reading [℃] */ 125 ec_sensor_temp_water_out, 126 /* "Water_Block_In" temperature sensor reading [℃] */ 127 ec_sensor_temp_water_block_in, 128 /* "Water_Block_Out" temperature sensor reading [℃] */ 129 ec_sensor_temp_water_block_out, 130 /* "T_sensor_2" temperature sensor reading [℃] */ 131 ec_sensor_temp_t_sensor_2, 132 /* "Extra_1" temperature sensor reading [℃] */ 133 ec_sensor_temp_sensor_extra_1, 134 /* "Extra_2" temperature sensor reading [℃] */ 135 ec_sensor_temp_sensor_extra_2, 136 /* "Extra_3" temperature sensor reading [℃] */ 137 ec_sensor_temp_sensor_extra_3, 138 }; 139 140 #define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset) 141 #define SENSOR_TEMP_CPU BIT(ec_sensor_temp_cpu) 142 #define SENSOR_TEMP_MB BIT(ec_sensor_temp_mb) 143 #define SENSOR_TEMP_T_SENSOR BIT(ec_sensor_temp_t_sensor) 144 #define SENSOR_TEMP_VRM BIT(ec_sensor_temp_vrm) 145 #define SENSOR_IN_CPU_CORE BIT(ec_sensor_in_cpu_core) 146 #define SENSOR_FAN_CPU_OPT BIT(ec_sensor_fan_cpu_opt) 147 #define SENSOR_FAN_VRM_HS BIT(ec_sensor_fan_vrm_hs) 148 #define SENSOR_FAN_CHIPSET BIT(ec_sensor_fan_chipset) 149 #define SENSOR_FAN_WATER_FLOW BIT(ec_sensor_fan_water_flow) 150 #define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu) 151 #define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in) 152 #define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out) 153 #define SENSOR_TEMP_WATER_BLOCK_IN BIT(ec_sensor_temp_water_block_in) 154 #define SENSOR_TEMP_WATER_BLOCK_OUT BIT(ec_sensor_temp_water_block_out) 155 #define SENSOR_TEMP_T_SENSOR_2 BIT(ec_sensor_temp_t_sensor_2) 156 #define SENSOR_TEMP_SENSOR_EXTRA_1 BIT(ec_sensor_temp_sensor_extra_1) 157 #define SENSOR_TEMP_SENSOR_EXTRA_2 BIT(ec_sensor_temp_sensor_extra_2) 158 #define SENSOR_TEMP_SENSOR_EXTRA_3 BIT(ec_sensor_temp_sensor_extra_3) 159 160 enum board_family { 161 family_unknown, 162 family_amd_400_series, 163 family_amd_500_series, 164 family_intel_300_series, 165 family_intel_600_series 166 }; 167 168 /* All the known sensors for ASUS EC controllers */ 169 static const struct ec_sensor_info sensors_family_amd_400[] = { 170 [ec_sensor_temp_chipset] = 171 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 172 [ec_sensor_temp_cpu] = 173 EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 174 [ec_sensor_temp_mb] = 175 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 176 [ec_sensor_temp_t_sensor] = 177 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 178 [ec_sensor_temp_vrm] = 179 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 180 [ec_sensor_in_cpu_core] = 181 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2), 182 [ec_sensor_fan_cpu_opt] = 183 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xbc), 184 [ec_sensor_fan_vrm_hs] = 185 EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 186 [ec_sensor_fan_chipset] = 187 /* no chipset fans in this generation */ 188 EC_SENSOR("Chipset", hwmon_fan, 0, 0x00, 0x00), 189 [ec_sensor_fan_water_flow] = 190 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xb4), 191 [ec_sensor_curr_cpu] = 192 EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4), 193 [ec_sensor_temp_water_in] = 194 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x0d), 195 [ec_sensor_temp_water_out] = 196 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x0b), 197 }; 198 199 static const struct ec_sensor_info sensors_family_amd_500[] = { 200 [ec_sensor_temp_chipset] = 201 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 202 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 203 [ec_sensor_temp_mb] = 204 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 205 [ec_sensor_temp_t_sensor] = 206 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 207 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 208 [ec_sensor_in_cpu_core] = 209 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2), 210 [ec_sensor_fan_cpu_opt] = 211 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0), 212 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 213 [ec_sensor_fan_chipset] = 214 EC_SENSOR("Chipset", hwmon_fan, 2, 0x00, 0xb4), 215 [ec_sensor_fan_water_flow] = 216 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc), 217 [ec_sensor_curr_cpu] = EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4), 218 [ec_sensor_temp_water_in] = 219 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 220 [ec_sensor_temp_water_out] = 221 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 222 [ec_sensor_temp_water_block_in] = 223 EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02), 224 [ec_sensor_temp_water_block_out] = 225 EC_SENSOR("Water_Block_Out", hwmon_temp, 1, 0x01, 0x03), 226 [ec_sensor_temp_sensor_extra_1] = 227 EC_SENSOR("Extra_1", hwmon_temp, 1, 0x01, 0x09), 228 [ec_sensor_temp_t_sensor_2] = 229 EC_SENSOR("T_sensor_2", hwmon_temp, 1, 0x01, 0x0a), 230 [ec_sensor_temp_sensor_extra_2] = 231 EC_SENSOR("Extra_2", hwmon_temp, 1, 0x01, 0x0b), 232 [ec_sensor_temp_sensor_extra_3] = 233 EC_SENSOR("Extra_3", hwmon_temp, 1, 0x01, 0x0c), 234 }; 235 236 static const struct ec_sensor_info sensors_family_intel_300[] = { 237 [ec_sensor_temp_chipset] = 238 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 239 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 240 [ec_sensor_temp_mb] = 241 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 242 [ec_sensor_temp_t_sensor] = 243 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 244 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 245 [ec_sensor_fan_cpu_opt] = 246 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0), 247 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 248 [ec_sensor_fan_water_flow] = 249 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc), 250 [ec_sensor_temp_water_in] = 251 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 252 [ec_sensor_temp_water_out] = 253 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 254 }; 255 256 static const struct ec_sensor_info sensors_family_intel_600[] = { 257 [ec_sensor_temp_t_sensor] = 258 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 259 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 260 }; 261 262 /* Shortcuts for common combinations */ 263 #define SENSOR_SET_TEMP_CHIPSET_CPU_MB \ 264 (SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB) 265 #define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT) 266 #define SENSOR_SET_WATER_BLOCK \ 267 (SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT) 268 269 270 struct ec_board_info { 271 const char *board_names[MAX_IDENTICAL_BOARD_VARIATIONS]; 272 unsigned long sensors; 273 /* 274 * Defines which mutex to use for guarding access to the state and the 275 * hardware. Can be either a full path to an AML mutex or the 276 * pseudo-path ACPI_GLOBAL_LOCK_PSEUDO_PATH to use the global ACPI lock, 277 * or left empty to use a regular mutex object, in which case access to 278 * the hardware is not guarded. 279 */ 280 const char *mutex_path; 281 enum board_family family; 282 }; 283 284 static const struct ec_board_info board_info[] = { 285 { 286 .board_names = {"PRIME X470-PRO"}, 287 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 288 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 289 SENSOR_FAN_CPU_OPT | 290 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 291 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH, 292 .family = family_amd_400_series, 293 }, 294 { 295 .board_names = {"PRIME X570-PRO"}, 296 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 297 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET, 298 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 299 .family = family_amd_500_series, 300 }, 301 { 302 .board_names = {"ProArt X570-CREATOR WIFI"}, 303 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 304 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT | 305 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 306 }, 307 { 308 .board_names = {"Pro WS X570-ACE"}, 309 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 310 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET | 311 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 312 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 313 .family = family_amd_500_series, 314 }, 315 { 316 .board_names = {"ROG CROSSHAIR VIII DARK HERO"}, 317 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 318 SENSOR_TEMP_T_SENSOR | 319 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 320 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW | 321 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 322 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 323 .family = family_amd_500_series, 324 }, 325 { 326 .board_names = { 327 "ROG CROSSHAIR VIII FORMULA", 328 "ROG CROSSHAIR VIII HERO", 329 "ROG CROSSHAIR VIII HERO (WI-FI)", 330 }, 331 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 332 SENSOR_TEMP_T_SENSOR | 333 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 334 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | 335 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | 336 SENSOR_IN_CPU_CORE, 337 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 338 .family = family_amd_500_series, 339 }, 340 { 341 .board_names = { 342 "ROG MAXIMUS XI HERO", 343 "ROG MAXIMUS XI HERO (WI-FI)", 344 }, 345 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 346 SENSOR_TEMP_T_SENSOR | 347 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 348 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW, 349 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 350 .family = family_intel_300_series, 351 }, 352 { 353 .board_names = {"ROG CROSSHAIR VIII IMPACT"}, 354 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 355 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 356 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | 357 SENSOR_IN_CPU_CORE, 358 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 359 .family = family_amd_500_series, 360 }, 361 { 362 .board_names = {"ROG STRIX B550-E GAMING"}, 363 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 364 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 365 SENSOR_FAN_CPU_OPT, 366 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 367 .family = family_amd_500_series, 368 }, 369 { 370 .board_names = {"ROG STRIX B550-I GAMING"}, 371 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 372 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 373 SENSOR_FAN_VRM_HS | SENSOR_CURR_CPU | 374 SENSOR_IN_CPU_CORE, 375 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 376 .family = family_amd_500_series, 377 }, 378 { 379 .board_names = {"ROG STRIX X570-E GAMING"}, 380 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 381 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 382 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | 383 SENSOR_IN_CPU_CORE, 384 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 385 .family = family_amd_500_series, 386 }, 387 { 388 .board_names = {"ROG STRIX X570-E GAMING WIFI II"}, 389 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 390 SENSOR_TEMP_T_SENSOR | SENSOR_CURR_CPU | 391 SENSOR_IN_CPU_CORE, 392 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 393 .family = family_amd_500_series, 394 }, 395 { 396 .board_names = {"ROG STRIX X570-F GAMING"}, 397 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 398 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET, 399 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 400 .family = family_amd_500_series, 401 }, 402 { 403 .board_names = {"ROG STRIX X570-I GAMING"}, 404 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM | 405 SENSOR_TEMP_T_SENSOR | 406 SENSOR_FAN_VRM_HS | SENSOR_FAN_CHIPSET | 407 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 408 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 409 .family = family_amd_500_series, 410 }, 411 { 412 .board_names = {"ROG STRIX Z690-A GAMING WIFI D4"}, 413 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM, 414 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX, 415 .family = family_intel_600_series, 416 }, 417 { 418 .board_names = {"ROG ZENITH II EXTREME"}, 419 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR | 420 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 421 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS | 422 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE | 423 SENSOR_SET_WATER_BLOCK | 424 SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 | 425 SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3, 426 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0, 427 .family = family_amd_500_series, 428 }, 429 {} 430 }; 431 432 struct ec_sensor { 433 unsigned int info_index; 434 s32 cached_value; 435 }; 436 437 struct lock_data { 438 union { 439 acpi_handle aml; 440 /* global lock handle */ 441 u32 glk; 442 } mutex; 443 bool (*lock)(struct lock_data *data); 444 bool (*unlock)(struct lock_data *data); 445 }; 446 447 /* 448 * The next function pairs implement options for locking access to the 449 * state and the EC 450 */ 451 static bool lock_via_acpi_mutex(struct lock_data *data) 452 { 453 /* 454 * ASUS DSDT does not specify that access to the EC has to be guarded, 455 * but firmware does access it via ACPI 456 */ 457 return ACPI_SUCCESS(acpi_acquire_mutex(data->mutex.aml, 458 NULL, ACPI_LOCK_DELAY_MS)); 459 } 460 461 static bool unlock_acpi_mutex(struct lock_data *data) 462 { 463 return ACPI_SUCCESS(acpi_release_mutex(data->mutex.aml, NULL)); 464 } 465 466 static bool lock_via_global_acpi_lock(struct lock_data *data) 467 { 468 return ACPI_SUCCESS(acpi_acquire_global_lock(ACPI_LOCK_DELAY_MS, 469 &data->mutex.glk)); 470 } 471 472 static bool unlock_global_acpi_lock(struct lock_data *data) 473 { 474 return ACPI_SUCCESS(acpi_release_global_lock(data->mutex.glk)); 475 } 476 477 struct ec_sensors_data { 478 const struct ec_board_info *board_info; 479 const struct ec_sensor_info *sensors_info; 480 struct ec_sensor *sensors; 481 /* EC registers to read from */ 482 u16 *registers; 483 u8 *read_buffer; 484 /* sorted list of unique register banks */ 485 u8 banks[ASUS_EC_MAX_BANK + 1]; 486 /* in jiffies */ 487 unsigned long last_updated; 488 struct lock_data lock_data; 489 /* number of board EC sensors */ 490 u8 nr_sensors; 491 /* 492 * number of EC registers to read 493 * (sensor might span more than 1 register) 494 */ 495 u8 nr_registers; 496 /* number of unique register banks */ 497 u8 nr_banks; 498 }; 499 500 static u8 register_bank(u16 reg) 501 { 502 return reg >> 8; 503 } 504 505 static u8 register_index(u16 reg) 506 { 507 return reg & 0x00ff; 508 } 509 510 static bool is_sensor_data_signed(const struct ec_sensor_info *si) 511 { 512 /* 513 * guessed from WMI functions in DSDT code for boards 514 * of the X470 generation 515 */ 516 return si->type == hwmon_temp; 517 } 518 519 static const struct ec_sensor_info * 520 get_sensor_info(const struct ec_sensors_data *state, int index) 521 { 522 return state->sensors_info + state->sensors[index].info_index; 523 } 524 525 static int find_ec_sensor_index(const struct ec_sensors_data *ec, 526 enum hwmon_sensor_types type, int channel) 527 { 528 unsigned int i; 529 530 for (i = 0; i < ec->nr_sensors; i++) { 531 if (get_sensor_info(ec, i)->type == type) { 532 if (channel == 0) 533 return i; 534 channel--; 535 } 536 } 537 return -ENOENT; 538 } 539 540 static int __init bank_compare(const void *a, const void *b) 541 { 542 return *((const s8 *)a) - *((const s8 *)b); 543 } 544 545 static void __init setup_sensor_data(struct ec_sensors_data *ec) 546 { 547 struct ec_sensor *s = ec->sensors; 548 bool bank_found; 549 int i, j; 550 u8 bank; 551 552 ec->nr_banks = 0; 553 ec->nr_registers = 0; 554 555 for_each_set_bit(i, &ec->board_info->sensors, 556 BITS_PER_TYPE(ec->board_info->sensors)) { 557 s->info_index = i; 558 s->cached_value = 0; 559 ec->nr_registers += 560 ec->sensors_info[s->info_index].addr.components.size; 561 bank_found = false; 562 bank = ec->sensors_info[s->info_index].addr.components.bank; 563 for (j = 0; j < ec->nr_banks; j++) { 564 if (ec->banks[j] == bank) { 565 bank_found = true; 566 break; 567 } 568 } 569 if (!bank_found) { 570 ec->banks[ec->nr_banks++] = bank; 571 } 572 s++; 573 } 574 sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL); 575 } 576 577 static void __init fill_ec_registers(struct ec_sensors_data *ec) 578 { 579 const struct ec_sensor_info *si; 580 unsigned int i, j, register_idx = 0; 581 582 for (i = 0; i < ec->nr_sensors; ++i) { 583 si = get_sensor_info(ec, i); 584 for (j = 0; j < si->addr.components.size; ++j, ++register_idx) { 585 ec->registers[register_idx] = 586 (si->addr.components.bank << 8) + 587 si->addr.components.index + j; 588 } 589 } 590 } 591 592 static int __init setup_lock_data(struct device *dev) 593 { 594 const char *mutex_path; 595 int status; 596 struct ec_sensors_data *state = dev_get_drvdata(dev); 597 598 mutex_path = mutex_path_override ? 599 mutex_path_override : state->board_info->mutex_path; 600 601 if (!mutex_path || !strlen(mutex_path)) { 602 dev_err(dev, "Hardware access guard mutex name is empty"); 603 return -EINVAL; 604 } 605 if (!strcmp(mutex_path, ACPI_GLOBAL_LOCK_PSEUDO_PATH)) { 606 state->lock_data.mutex.glk = 0; 607 state->lock_data.lock = lock_via_global_acpi_lock; 608 state->lock_data.unlock = unlock_global_acpi_lock; 609 } else { 610 status = acpi_get_handle(NULL, (acpi_string)mutex_path, 611 &state->lock_data.mutex.aml); 612 if (ACPI_FAILURE(status)) { 613 dev_err(dev, 614 "Failed to get hardware access guard AML mutex '%s': error %d", 615 mutex_path, status); 616 return -ENOENT; 617 } 618 state->lock_data.lock = lock_via_acpi_mutex; 619 state->lock_data.unlock = unlock_acpi_mutex; 620 } 621 return 0; 622 } 623 624 static int asus_ec_bank_switch(u8 bank, u8 *old) 625 { 626 int status = 0; 627 628 if (old) { 629 status = ec_read(ASUS_EC_BANK_REGISTER, old); 630 } 631 if (status || (old && (*old == bank))) 632 return status; 633 return ec_write(ASUS_EC_BANK_REGISTER, bank); 634 } 635 636 static int asus_ec_block_read(const struct device *dev, 637 struct ec_sensors_data *ec) 638 { 639 int ireg, ibank, status; 640 u8 bank, reg_bank, prev_bank; 641 642 bank = 0; 643 status = asus_ec_bank_switch(bank, &prev_bank); 644 if (status) { 645 dev_warn(dev, "EC bank switch failed"); 646 return status; 647 } 648 649 if (prev_bank) { 650 /* oops... somebody else is working with the EC too */ 651 dev_warn(dev, 652 "Concurrent access to the ACPI EC detected.\nRace condition possible."); 653 } 654 655 /* read registers minimizing bank switches. */ 656 for (ibank = 0; ibank < ec->nr_banks; ibank++) { 657 if (bank != ec->banks[ibank]) { 658 bank = ec->banks[ibank]; 659 if (asus_ec_bank_switch(bank, NULL)) { 660 dev_warn(dev, "EC bank switch to %d failed", 661 bank); 662 break; 663 } 664 } 665 for (ireg = 0; ireg < ec->nr_registers; ireg++) { 666 reg_bank = register_bank(ec->registers[ireg]); 667 if (reg_bank < bank) { 668 continue; 669 } 670 ec_read(register_index(ec->registers[ireg]), 671 ec->read_buffer + ireg); 672 } 673 } 674 675 status = asus_ec_bank_switch(prev_bank, NULL); 676 return status; 677 } 678 679 static inline s32 get_sensor_value(const struct ec_sensor_info *si, u8 *data) 680 { 681 if (is_sensor_data_signed(si)) { 682 switch (si->addr.components.size) { 683 case 1: 684 return (s8)*data; 685 case 2: 686 return (s16)get_unaligned_be16(data); 687 case 4: 688 return (s32)get_unaligned_be32(data); 689 default: 690 return 0; 691 } 692 } else { 693 switch (si->addr.components.size) { 694 case 1: 695 return *data; 696 case 2: 697 return get_unaligned_be16(data); 698 case 4: 699 return get_unaligned_be32(data); 700 default: 701 return 0; 702 } 703 } 704 } 705 706 static void update_sensor_values(struct ec_sensors_data *ec, u8 *data) 707 { 708 const struct ec_sensor_info *si; 709 struct ec_sensor *s, *sensor_end; 710 711 sensor_end = ec->sensors + ec->nr_sensors; 712 for (s = ec->sensors; s != sensor_end; s++) { 713 si = ec->sensors_info + s->info_index; 714 s->cached_value = get_sensor_value(si, data); 715 data += si->addr.components.size; 716 } 717 } 718 719 static int update_ec_sensors(const struct device *dev, 720 struct ec_sensors_data *ec) 721 { 722 int status; 723 724 if (!ec->lock_data.lock(&ec->lock_data)) { 725 dev_warn(dev, "Failed to acquire mutex"); 726 return -EBUSY; 727 } 728 729 status = asus_ec_block_read(dev, ec); 730 731 if (!status) { 732 update_sensor_values(ec, ec->read_buffer); 733 } 734 735 if (!ec->lock_data.unlock(&ec->lock_data)) 736 dev_err(dev, "Failed to release mutex"); 737 738 return status; 739 } 740 741 static long scale_sensor_value(s32 value, int data_type) 742 { 743 switch (data_type) { 744 case hwmon_curr: 745 case hwmon_temp: 746 return value * MILLI; 747 default: 748 return value; 749 } 750 } 751 752 static int get_cached_value_or_update(const struct device *dev, 753 int sensor_index, 754 struct ec_sensors_data *state, s32 *value) 755 { 756 if (time_after(jiffies, state->last_updated + HZ)) { 757 if (update_ec_sensors(dev, state)) { 758 dev_err(dev, "update_ec_sensors() failure\n"); 759 return -EIO; 760 } 761 762 state->last_updated = jiffies; 763 } 764 765 *value = state->sensors[sensor_index].cached_value; 766 return 0; 767 } 768 769 /* 770 * Now follow the functions that implement the hwmon interface 771 */ 772 773 static int asus_ec_hwmon_read(struct device *dev, enum hwmon_sensor_types type, 774 u32 attr, int channel, long *val) 775 { 776 int ret; 777 s32 value = 0; 778 779 struct ec_sensors_data *state = dev_get_drvdata(dev); 780 int sidx = find_ec_sensor_index(state, type, channel); 781 782 if (sidx < 0) { 783 return sidx; 784 } 785 786 ret = get_cached_value_or_update(dev, sidx, state, &value); 787 if (!ret) { 788 *val = scale_sensor_value(value, 789 get_sensor_info(state, sidx)->type); 790 } 791 792 return ret; 793 } 794 795 static int asus_ec_hwmon_read_string(struct device *dev, 796 enum hwmon_sensor_types type, u32 attr, 797 int channel, const char **str) 798 { 799 struct ec_sensors_data *state = dev_get_drvdata(dev); 800 int sensor_index = find_ec_sensor_index(state, type, channel); 801 *str = get_sensor_info(state, sensor_index)->label; 802 803 return 0; 804 } 805 806 static umode_t asus_ec_hwmon_is_visible(const void *drvdata, 807 enum hwmon_sensor_types type, u32 attr, 808 int channel) 809 { 810 const struct ec_sensors_data *state = drvdata; 811 812 return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0; 813 } 814 815 static int __init 816 asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan, 817 struct device *dev, int num, 818 enum hwmon_sensor_types type, u32 config) 819 { 820 int i; 821 u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL); 822 823 if (!cfg) 824 return -ENOMEM; 825 826 asus_ec_hwmon_chan->type = type; 827 asus_ec_hwmon_chan->config = cfg; 828 for (i = 0; i < num; i++, cfg++) 829 *cfg = config; 830 831 return 0; 832 } 833 834 static const struct hwmon_ops asus_ec_hwmon_ops = { 835 .is_visible = asus_ec_hwmon_is_visible, 836 .read = asus_ec_hwmon_read, 837 .read_string = asus_ec_hwmon_read_string, 838 }; 839 840 static struct hwmon_chip_info asus_ec_chip_info = { 841 .ops = &asus_ec_hwmon_ops, 842 }; 843 844 static const struct ec_board_info * __init get_board_info(void) 845 { 846 const char *dmi_board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR); 847 const char *dmi_board_name = dmi_get_system_info(DMI_BOARD_NAME); 848 const struct ec_board_info *board; 849 850 if (!dmi_board_vendor || !dmi_board_name || 851 strcasecmp(dmi_board_vendor, "ASUSTeK COMPUTER INC.")) 852 return NULL; 853 854 for (board = board_info; board->sensors; board++) { 855 if (match_string(board->board_names, 856 MAX_IDENTICAL_BOARD_VARIATIONS, 857 dmi_board_name) >= 0) 858 return board; 859 } 860 861 return NULL; 862 } 863 864 static int __init asus_ec_probe(struct platform_device *pdev) 865 { 866 const struct hwmon_channel_info **ptr_asus_ec_ci; 867 int nr_count[hwmon_max] = { 0 }, nr_types = 0; 868 struct hwmon_channel_info *asus_ec_hwmon_chan; 869 const struct ec_board_info *pboard_info; 870 const struct hwmon_chip_info *chip_info; 871 struct device *dev = &pdev->dev; 872 struct ec_sensors_data *ec_data; 873 const struct ec_sensor_info *si; 874 enum hwmon_sensor_types type; 875 struct device *hwdev; 876 unsigned int i; 877 int status; 878 879 pboard_info = get_board_info(); 880 if (!pboard_info) 881 return -ENODEV; 882 883 ec_data = devm_kzalloc(dev, sizeof(struct ec_sensors_data), 884 GFP_KERNEL); 885 if (!ec_data) 886 return -ENOMEM; 887 888 dev_set_drvdata(dev, ec_data); 889 ec_data->board_info = pboard_info; 890 891 switch (ec_data->board_info->family) { 892 case family_amd_400_series: 893 ec_data->sensors_info = sensors_family_amd_400; 894 break; 895 case family_amd_500_series: 896 ec_data->sensors_info = sensors_family_amd_500; 897 break; 898 case family_intel_300_series: 899 ec_data->sensors_info = sensors_family_intel_300; 900 break; 901 case family_intel_600_series: 902 ec_data->sensors_info = sensors_family_intel_600; 903 break; 904 default: 905 dev_err(dev, "Unknown board family: %d", 906 ec_data->board_info->family); 907 return -EINVAL; 908 } 909 910 ec_data->nr_sensors = hweight_long(ec_data->board_info->sensors); 911 ec_data->sensors = devm_kcalloc(dev, ec_data->nr_sensors, 912 sizeof(struct ec_sensor), GFP_KERNEL); 913 914 status = setup_lock_data(dev); 915 if (status) { 916 dev_err(dev, "Failed to setup state/EC locking: %d", status); 917 return status; 918 } 919 920 setup_sensor_data(ec_data); 921 ec_data->registers = devm_kcalloc(dev, ec_data->nr_registers, 922 sizeof(u16), GFP_KERNEL); 923 ec_data->read_buffer = devm_kcalloc(dev, ec_data->nr_registers, 924 sizeof(u8), GFP_KERNEL); 925 926 if (!ec_data->registers || !ec_data->read_buffer) 927 return -ENOMEM; 928 929 fill_ec_registers(ec_data); 930 931 for (i = 0; i < ec_data->nr_sensors; ++i) { 932 si = get_sensor_info(ec_data, i); 933 if (!nr_count[si->type]) 934 ++nr_types; 935 ++nr_count[si->type]; 936 } 937 938 if (nr_count[hwmon_temp]) 939 nr_count[hwmon_chip]++, nr_types++; 940 941 asus_ec_hwmon_chan = devm_kcalloc( 942 dev, nr_types, sizeof(*asus_ec_hwmon_chan), GFP_KERNEL); 943 if (!asus_ec_hwmon_chan) 944 return -ENOMEM; 945 946 ptr_asus_ec_ci = devm_kcalloc(dev, nr_types + 1, 947 sizeof(*ptr_asus_ec_ci), GFP_KERNEL); 948 if (!ptr_asus_ec_ci) 949 return -ENOMEM; 950 951 asus_ec_chip_info.info = ptr_asus_ec_ci; 952 chip_info = &asus_ec_chip_info; 953 954 for (type = 0; type < hwmon_max; ++type) { 955 if (!nr_count[type]) 956 continue; 957 958 asus_ec_hwmon_add_chan_info(asus_ec_hwmon_chan, dev, 959 nr_count[type], type, 960 hwmon_attributes[type]); 961 *ptr_asus_ec_ci++ = asus_ec_hwmon_chan++; 962 } 963 964 dev_info(dev, "board has %d EC sensors that span %d registers", 965 ec_data->nr_sensors, ec_data->nr_registers); 966 967 hwdev = devm_hwmon_device_register_with_info(dev, "asusec", 968 ec_data, chip_info, NULL); 969 970 return PTR_ERR_OR_ZERO(hwdev); 971 } 972 973 974 static const struct acpi_device_id acpi_ec_ids[] = { 975 /* Embedded Controller Device */ 976 { "PNP0C09", 0 }, 977 {} 978 }; 979 980 static struct platform_driver asus_ec_sensors_platform_driver = { 981 .driver = { 982 .name = "asus-ec-sensors", 983 .acpi_match_table = acpi_ec_ids, 984 }, 985 }; 986 987 MODULE_DEVICE_TABLE(acpi, acpi_ec_ids); 988 /* 989 * we use module_platform_driver_probe() rather than module_platform_driver() 990 * because the probe function (and its dependants) are marked with __init, which 991 * means we can't put it into the .probe member of the platform_driver struct 992 * above, and we can't mark the asus_ec_sensors_platform_driver object as __init 993 * because the object is referenced from the module exit code. 994 */ 995 module_platform_driver_probe(asus_ec_sensors_platform_driver, asus_ec_probe); 996 997 module_param_named(mutex_path, mutex_path_override, charp, 0); 998 MODULE_PARM_DESC(mutex_path, 999 "Override ACPI mutex path used to guard access to hardware"); 1000 1001 MODULE_AUTHOR("Eugene Shalygin <eugene.shalygin@gmail.com>"); 1002 MODULE_DESCRIPTION( 1003 "HWMON driver for sensors accessible via ACPI EC in ASUS motherboards"); 1004 MODULE_LICENSE("GPL"); 1005