1 /* 2 * Copyright (c) 2009, Microsoft Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License along with 14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple 15 * Place - Suite 330, Boston, MA 02111-1307 USA. 16 * 17 * Authors: 18 * Haiyang Zhang <haiyangz@microsoft.com> 19 * Hank Janssen <hjanssen@microsoft.com> 20 * 21 */ 22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 23 24 #include <linux/kernel.h> 25 #include <linux/mm.h> 26 #include <linux/slab.h> 27 #include <linux/vmalloc.h> 28 #include <linux/hyperv.h> 29 #include <linux/version.h> 30 #include <linux/random.h> 31 #include <linux/clockchips.h> 32 #include <asm/hyperv.h> 33 #include <asm/mshyperv.h> 34 #include "hyperv_vmbus.h" 35 36 /* The one and only */ 37 struct hv_context hv_context = { 38 .synic_initialized = false, 39 }; 40 41 /* 42 * If false, we're using the old mechanism for stimer0 interrupts 43 * where it sends a VMbus message when it expires. The old 44 * mechanism is used when running on older versions of Hyper-V 45 * that don't support Direct Mode. While Hyper-V provides 46 * four stimer's per CPU, Linux uses only stimer0. 47 */ 48 static bool direct_mode_enabled; 49 static int stimer0_irq; 50 static int stimer0_vector; 51 52 #define HV_TIMER_FREQUENCY (10 * 1000 * 1000) /* 100ns period */ 53 #define HV_MAX_MAX_DELTA_TICKS 0xffffffff 54 #define HV_MIN_DELTA_TICKS 1 55 56 /* 57 * hv_init - Main initialization routine. 58 * 59 * This routine must be called before any other routines in here are called 60 */ 61 int hv_init(void) 62 { 63 hv_context.cpu_context = alloc_percpu(struct hv_per_cpu_context); 64 if (!hv_context.cpu_context) 65 return -ENOMEM; 66 67 direct_mode_enabled = ms_hyperv.misc_features & 68 HV_X64_STIMER_DIRECT_MODE_AVAILABLE; 69 return 0; 70 } 71 72 /* 73 * hv_post_message - Post a message using the hypervisor message IPC. 74 * 75 * This involves a hypercall. 76 */ 77 int hv_post_message(union hv_connection_id connection_id, 78 enum hv_message_type message_type, 79 void *payload, size_t payload_size) 80 { 81 struct hv_input_post_message *aligned_msg; 82 struct hv_per_cpu_context *hv_cpu; 83 u64 status; 84 85 if (payload_size > HV_MESSAGE_PAYLOAD_BYTE_COUNT) 86 return -EMSGSIZE; 87 88 hv_cpu = get_cpu_ptr(hv_context.cpu_context); 89 aligned_msg = hv_cpu->post_msg_page; 90 aligned_msg->connectionid = connection_id; 91 aligned_msg->reserved = 0; 92 aligned_msg->message_type = message_type; 93 aligned_msg->payload_size = payload_size; 94 memcpy((void *)aligned_msg->payload, payload, payload_size); 95 96 status = hv_do_hypercall(HVCALL_POST_MESSAGE, aligned_msg, NULL); 97 98 /* Preemption must remain disabled until after the hypercall 99 * so some other thread can't get scheduled onto this cpu and 100 * corrupt the per-cpu post_msg_page 101 */ 102 put_cpu_ptr(hv_cpu); 103 104 return status & 0xFFFF; 105 } 106 107 /* 108 * ISR for when stimer0 is operating in Direct Mode. Direct Mode 109 * does not use VMbus or any VMbus messages, so process here and not 110 * in the VMbus driver code. 111 */ 112 113 static void hv_stimer0_isr(void) 114 { 115 struct hv_per_cpu_context *hv_cpu; 116 117 hv_cpu = this_cpu_ptr(hv_context.cpu_context); 118 hv_cpu->clk_evt->event_handler(hv_cpu->clk_evt); 119 add_interrupt_randomness(stimer0_vector, 0); 120 } 121 122 static int hv_ce_set_next_event(unsigned long delta, 123 struct clock_event_device *evt) 124 { 125 u64 current_tick; 126 127 WARN_ON(!clockevent_state_oneshot(evt)); 128 129 current_tick = hyperv_cs->read(NULL); 130 current_tick += delta; 131 hv_init_timer(HV_X64_MSR_STIMER0_COUNT, current_tick); 132 return 0; 133 } 134 135 static int hv_ce_shutdown(struct clock_event_device *evt) 136 { 137 hv_init_timer(HV_X64_MSR_STIMER0_COUNT, 0); 138 hv_init_timer_config(HV_X64_MSR_STIMER0_CONFIG, 0); 139 if (direct_mode_enabled) 140 hv_disable_stimer0_percpu_irq(stimer0_irq); 141 142 return 0; 143 } 144 145 static int hv_ce_set_oneshot(struct clock_event_device *evt) 146 { 147 union hv_timer_config timer_cfg; 148 149 timer_cfg.as_uint64 = 0; 150 timer_cfg.enable = 1; 151 timer_cfg.auto_enable = 1; 152 if (direct_mode_enabled) { 153 /* 154 * When it expires, the timer will directly interrupt 155 * on the specified hardware vector/IRQ. 156 */ 157 timer_cfg.direct_mode = 1; 158 timer_cfg.apic_vector = stimer0_vector; 159 hv_enable_stimer0_percpu_irq(stimer0_irq); 160 } else { 161 /* 162 * When it expires, the timer will generate a VMbus message, 163 * to be handled by the normal VMbus interrupt handler. 164 */ 165 timer_cfg.direct_mode = 0; 166 timer_cfg.sintx = VMBUS_MESSAGE_SINT; 167 } 168 hv_init_timer_config(HV_X64_MSR_STIMER0_CONFIG, timer_cfg.as_uint64); 169 return 0; 170 } 171 172 static void hv_init_clockevent_device(struct clock_event_device *dev, int cpu) 173 { 174 dev->name = "Hyper-V clockevent"; 175 dev->features = CLOCK_EVT_FEAT_ONESHOT; 176 dev->cpumask = cpumask_of(cpu); 177 dev->rating = 1000; 178 /* 179 * Avoid settint dev->owner = THIS_MODULE deliberately as doing so will 180 * result in clockevents_config_and_register() taking additional 181 * references to the hv_vmbus module making it impossible to unload. 182 */ 183 184 dev->set_state_shutdown = hv_ce_shutdown; 185 dev->set_state_oneshot = hv_ce_set_oneshot; 186 dev->set_next_event = hv_ce_set_next_event; 187 } 188 189 190 int hv_synic_alloc(void) 191 { 192 int cpu; 193 194 hv_context.hv_numa_map = kzalloc(sizeof(struct cpumask) * nr_node_ids, 195 GFP_KERNEL); 196 if (hv_context.hv_numa_map == NULL) { 197 pr_err("Unable to allocate NUMA map\n"); 198 goto err; 199 } 200 201 for_each_present_cpu(cpu) { 202 struct hv_per_cpu_context *hv_cpu 203 = per_cpu_ptr(hv_context.cpu_context, cpu); 204 205 memset(hv_cpu, 0, sizeof(*hv_cpu)); 206 tasklet_init(&hv_cpu->msg_dpc, 207 vmbus_on_msg_dpc, (unsigned long) hv_cpu); 208 209 hv_cpu->clk_evt = kzalloc(sizeof(struct clock_event_device), 210 GFP_KERNEL); 211 if (hv_cpu->clk_evt == NULL) { 212 pr_err("Unable to allocate clock event device\n"); 213 goto err; 214 } 215 hv_init_clockevent_device(hv_cpu->clk_evt, cpu); 216 217 hv_cpu->synic_message_page = 218 (void *)get_zeroed_page(GFP_ATOMIC); 219 if (hv_cpu->synic_message_page == NULL) { 220 pr_err("Unable to allocate SYNIC message page\n"); 221 goto err; 222 } 223 224 hv_cpu->synic_event_page = (void *)get_zeroed_page(GFP_ATOMIC); 225 if (hv_cpu->synic_event_page == NULL) { 226 pr_err("Unable to allocate SYNIC event page\n"); 227 goto err; 228 } 229 230 hv_cpu->post_msg_page = (void *)get_zeroed_page(GFP_ATOMIC); 231 if (hv_cpu->post_msg_page == NULL) { 232 pr_err("Unable to allocate post msg page\n"); 233 goto err; 234 } 235 236 INIT_LIST_HEAD(&hv_cpu->chan_list); 237 } 238 239 if (direct_mode_enabled && 240 hv_setup_stimer0_irq(&stimer0_irq, &stimer0_vector, 241 hv_stimer0_isr)) 242 goto err; 243 244 return 0; 245 err: 246 return -ENOMEM; 247 } 248 249 250 void hv_synic_free(void) 251 { 252 int cpu; 253 254 for_each_present_cpu(cpu) { 255 struct hv_per_cpu_context *hv_cpu 256 = per_cpu_ptr(hv_context.cpu_context, cpu); 257 258 if (hv_cpu->synic_event_page) 259 free_page((unsigned long)hv_cpu->synic_event_page); 260 if (hv_cpu->synic_message_page) 261 free_page((unsigned long)hv_cpu->synic_message_page); 262 if (hv_cpu->post_msg_page) 263 free_page((unsigned long)hv_cpu->post_msg_page); 264 } 265 266 kfree(hv_context.hv_numa_map); 267 } 268 269 /* 270 * hv_synic_init - Initialize the Synthetic Interrupt Controller. 271 * 272 * If it is already initialized by another entity (ie x2v shim), we need to 273 * retrieve the initialized message and event pages. Otherwise, we create and 274 * initialize the message and event pages. 275 */ 276 int hv_synic_init(unsigned int cpu) 277 { 278 struct hv_per_cpu_context *hv_cpu 279 = per_cpu_ptr(hv_context.cpu_context, cpu); 280 union hv_synic_simp simp; 281 union hv_synic_siefp siefp; 282 union hv_synic_sint shared_sint; 283 union hv_synic_scontrol sctrl; 284 285 /* Setup the Synic's message page */ 286 hv_get_simp(simp.as_uint64); 287 simp.simp_enabled = 1; 288 simp.base_simp_gpa = virt_to_phys(hv_cpu->synic_message_page) 289 >> PAGE_SHIFT; 290 291 hv_set_simp(simp.as_uint64); 292 293 /* Setup the Synic's event page */ 294 hv_get_siefp(siefp.as_uint64); 295 siefp.siefp_enabled = 1; 296 siefp.base_siefp_gpa = virt_to_phys(hv_cpu->synic_event_page) 297 >> PAGE_SHIFT; 298 299 hv_set_siefp(siefp.as_uint64); 300 301 /* Setup the shared SINT. */ 302 hv_get_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, 303 shared_sint.as_uint64); 304 305 shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR; 306 shared_sint.masked = false; 307 if (ms_hyperv.hints & HV_X64_DEPRECATING_AEOI_RECOMMENDED) 308 shared_sint.auto_eoi = false; 309 else 310 shared_sint.auto_eoi = true; 311 312 hv_set_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, 313 shared_sint.as_uint64); 314 315 /* Enable the global synic bit */ 316 hv_get_synic_state(sctrl.as_uint64); 317 sctrl.enable = 1; 318 319 hv_set_synic_state(sctrl.as_uint64); 320 321 hv_context.synic_initialized = true; 322 323 /* 324 * Register the per-cpu clockevent source. 325 */ 326 if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE) 327 clockevents_config_and_register(hv_cpu->clk_evt, 328 HV_TIMER_FREQUENCY, 329 HV_MIN_DELTA_TICKS, 330 HV_MAX_MAX_DELTA_TICKS); 331 return 0; 332 } 333 334 /* 335 * hv_synic_clockevents_cleanup - Cleanup clockevent devices 336 */ 337 void hv_synic_clockevents_cleanup(void) 338 { 339 int cpu; 340 341 if (!(ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE)) 342 return; 343 344 if (direct_mode_enabled) 345 hv_remove_stimer0_irq(stimer0_irq); 346 347 for_each_present_cpu(cpu) { 348 struct hv_per_cpu_context *hv_cpu 349 = per_cpu_ptr(hv_context.cpu_context, cpu); 350 351 clockevents_unbind_device(hv_cpu->clk_evt, cpu); 352 } 353 } 354 355 /* 356 * hv_synic_cleanup - Cleanup routine for hv_synic_init(). 357 */ 358 int hv_synic_cleanup(unsigned int cpu) 359 { 360 union hv_synic_sint shared_sint; 361 union hv_synic_simp simp; 362 union hv_synic_siefp siefp; 363 union hv_synic_scontrol sctrl; 364 struct vmbus_channel *channel, *sc; 365 bool channel_found = false; 366 unsigned long flags; 367 368 if (!hv_context.synic_initialized) 369 return -EFAULT; 370 371 /* 372 * Search for channels which are bound to the CPU we're about to 373 * cleanup. In case we find one and vmbus is still connected we need to 374 * fail, this will effectively prevent CPU offlining. There is no way 375 * we can re-bind channels to different CPUs for now. 376 */ 377 mutex_lock(&vmbus_connection.channel_mutex); 378 list_for_each_entry(channel, &vmbus_connection.chn_list, listentry) { 379 if (channel->target_cpu == cpu) { 380 channel_found = true; 381 break; 382 } 383 spin_lock_irqsave(&channel->lock, flags); 384 list_for_each_entry(sc, &channel->sc_list, sc_list) { 385 if (sc->target_cpu == cpu) { 386 channel_found = true; 387 break; 388 } 389 } 390 spin_unlock_irqrestore(&channel->lock, flags); 391 if (channel_found) 392 break; 393 } 394 mutex_unlock(&vmbus_connection.channel_mutex); 395 396 if (channel_found && vmbus_connection.conn_state == CONNECTED) 397 return -EBUSY; 398 399 /* Turn off clockevent device */ 400 if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE) { 401 struct hv_per_cpu_context *hv_cpu 402 = this_cpu_ptr(hv_context.cpu_context); 403 404 clockevents_unbind_device(hv_cpu->clk_evt, cpu); 405 hv_ce_shutdown(hv_cpu->clk_evt); 406 put_cpu_ptr(hv_cpu); 407 } 408 409 hv_get_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, 410 shared_sint.as_uint64); 411 412 shared_sint.masked = 1; 413 414 /* Need to correctly cleanup in the case of SMP!!! */ 415 /* Disable the interrupt */ 416 hv_set_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, 417 shared_sint.as_uint64); 418 419 hv_get_simp(simp.as_uint64); 420 simp.simp_enabled = 0; 421 simp.base_simp_gpa = 0; 422 423 hv_set_simp(simp.as_uint64); 424 425 hv_get_siefp(siefp.as_uint64); 426 siefp.siefp_enabled = 0; 427 siefp.base_siefp_gpa = 0; 428 429 hv_set_siefp(siefp.as_uint64); 430 431 /* Disable the global synic bit */ 432 hv_get_synic_state(sctrl.as_uint64); 433 sctrl.enable = 0; 434 hv_set_synic_state(sctrl.as_uint64); 435 436 return 0; 437 } 438