1 /* 2 * Copyright (c) 2009, Microsoft Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License along with 14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple 15 * Place - Suite 330, Boston, MA 02111-1307 USA. 16 * 17 * Authors: 18 * Haiyang Zhang <haiyangz@microsoft.com> 19 * Hank Janssen <hjanssen@microsoft.com> 20 * 21 */ 22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 23 24 #include <linux/kernel.h> 25 #include <linux/mm.h> 26 #include <linux/slab.h> 27 #include <linux/vmalloc.h> 28 #include <linux/hyperv.h> 29 #include <linux/version.h> 30 #include <linux/interrupt.h> 31 #include <linux/clockchips.h> 32 #include <asm/hyperv.h> 33 #include <asm/mshyperv.h> 34 #include "hyperv_vmbus.h" 35 36 /* The one and only */ 37 struct hv_context hv_context = { 38 .synic_initialized = false, 39 .hypercall_page = NULL, 40 }; 41 42 #define HV_TIMER_FREQUENCY (10 * 1000 * 1000) /* 100ns period */ 43 #define HV_MAX_MAX_DELTA_TICKS 0xffffffff 44 #define HV_MIN_DELTA_TICKS 1 45 46 /* 47 * query_hypervisor_info - Get version info of the windows hypervisor 48 */ 49 unsigned int host_info_eax; 50 unsigned int host_info_ebx; 51 unsigned int host_info_ecx; 52 unsigned int host_info_edx; 53 54 static int query_hypervisor_info(void) 55 { 56 unsigned int eax; 57 unsigned int ebx; 58 unsigned int ecx; 59 unsigned int edx; 60 unsigned int max_leaf; 61 unsigned int op; 62 63 /* 64 * Its assumed that this is called after confirming that Viridian 65 * is present. Query id and revision. 66 */ 67 eax = 0; 68 ebx = 0; 69 ecx = 0; 70 edx = 0; 71 op = HVCPUID_VENDOR_MAXFUNCTION; 72 cpuid(op, &eax, &ebx, &ecx, &edx); 73 74 max_leaf = eax; 75 76 if (max_leaf >= HVCPUID_VERSION) { 77 eax = 0; 78 ebx = 0; 79 ecx = 0; 80 edx = 0; 81 op = HVCPUID_VERSION; 82 cpuid(op, &eax, &ebx, &ecx, &edx); 83 host_info_eax = eax; 84 host_info_ebx = ebx; 85 host_info_ecx = ecx; 86 host_info_edx = edx; 87 } 88 return max_leaf; 89 } 90 91 /* 92 * hv_do_hypercall- Invoke the specified hypercall 93 */ 94 u64 hv_do_hypercall(u64 control, void *input, void *output) 95 { 96 u64 input_address = (input) ? virt_to_phys(input) : 0; 97 u64 output_address = (output) ? virt_to_phys(output) : 0; 98 void *hypercall_page = hv_context.hypercall_page; 99 #ifdef CONFIG_X86_64 100 u64 hv_status = 0; 101 102 if (!hypercall_page) 103 return (u64)ULLONG_MAX; 104 105 __asm__ __volatile__("mov %0, %%r8" : : "r" (output_address) : "r8"); 106 __asm__ __volatile__("call *%3" : "=a" (hv_status) : 107 "c" (control), "d" (input_address), 108 "m" (hypercall_page)); 109 110 return hv_status; 111 112 #else 113 114 u32 control_hi = control >> 32; 115 u32 control_lo = control & 0xFFFFFFFF; 116 u32 hv_status_hi = 1; 117 u32 hv_status_lo = 1; 118 u32 input_address_hi = input_address >> 32; 119 u32 input_address_lo = input_address & 0xFFFFFFFF; 120 u32 output_address_hi = output_address >> 32; 121 u32 output_address_lo = output_address & 0xFFFFFFFF; 122 123 if (!hypercall_page) 124 return (u64)ULLONG_MAX; 125 126 __asm__ __volatile__ ("call *%8" : "=d"(hv_status_hi), 127 "=a"(hv_status_lo) : "d" (control_hi), 128 "a" (control_lo), "b" (input_address_hi), 129 "c" (input_address_lo), "D"(output_address_hi), 130 "S"(output_address_lo), "m" (hypercall_page)); 131 132 return hv_status_lo | ((u64)hv_status_hi << 32); 133 #endif /* !x86_64 */ 134 } 135 EXPORT_SYMBOL_GPL(hv_do_hypercall); 136 137 #ifdef CONFIG_X86_64 138 static cycle_t read_hv_clock_tsc(struct clocksource *arg) 139 { 140 cycle_t current_tick; 141 struct ms_hyperv_tsc_page *tsc_pg = hv_context.tsc_page; 142 143 if (tsc_pg->tsc_sequence != 0) { 144 /* 145 * Use the tsc page to compute the value. 146 */ 147 148 while (1) { 149 cycle_t tmp; 150 u32 sequence = tsc_pg->tsc_sequence; 151 u64 cur_tsc; 152 u64 scale = tsc_pg->tsc_scale; 153 s64 offset = tsc_pg->tsc_offset; 154 155 rdtscll(cur_tsc); 156 /* current_tick = ((cur_tsc *scale) >> 64) + offset */ 157 asm("mulq %3" 158 : "=d" (current_tick), "=a" (tmp) 159 : "a" (cur_tsc), "r" (scale)); 160 161 current_tick += offset; 162 if (tsc_pg->tsc_sequence == sequence) 163 return current_tick; 164 165 if (tsc_pg->tsc_sequence != 0) 166 continue; 167 /* 168 * Fallback using MSR method. 169 */ 170 break; 171 } 172 } 173 rdmsrl(HV_X64_MSR_TIME_REF_COUNT, current_tick); 174 return current_tick; 175 } 176 177 static struct clocksource hyperv_cs_tsc = { 178 .name = "hyperv_clocksource_tsc_page", 179 .rating = 425, 180 .read = read_hv_clock_tsc, 181 .mask = CLOCKSOURCE_MASK(64), 182 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 183 }; 184 #endif 185 186 187 /* 188 * hv_init - Main initialization routine. 189 * 190 * This routine must be called before any other routines in here are called 191 */ 192 int hv_init(void) 193 { 194 int max_leaf; 195 union hv_x64_msr_hypercall_contents hypercall_msr; 196 void *virtaddr = NULL; 197 198 memset(hv_context.synic_event_page, 0, sizeof(void *) * NR_CPUS); 199 memset(hv_context.synic_message_page, 0, 200 sizeof(void *) * NR_CPUS); 201 memset(hv_context.post_msg_page, 0, 202 sizeof(void *) * NR_CPUS); 203 memset(hv_context.vp_index, 0, 204 sizeof(int) * NR_CPUS); 205 memset(hv_context.event_dpc, 0, 206 sizeof(void *) * NR_CPUS); 207 memset(hv_context.clk_evt, 0, 208 sizeof(void *) * NR_CPUS); 209 210 max_leaf = query_hypervisor_info(); 211 212 /* 213 * Write our OS ID. 214 */ 215 hv_context.guestid = generate_guest_id(0, LINUX_VERSION_CODE, 0); 216 wrmsrl(HV_X64_MSR_GUEST_OS_ID, hv_context.guestid); 217 218 /* See if the hypercall page is already set */ 219 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 220 221 virtaddr = __vmalloc(PAGE_SIZE, GFP_KERNEL, PAGE_KERNEL_EXEC); 222 223 if (!virtaddr) 224 goto cleanup; 225 226 hypercall_msr.enable = 1; 227 228 hypercall_msr.guest_physical_address = vmalloc_to_pfn(virtaddr); 229 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 230 231 /* Confirm that hypercall page did get setup. */ 232 hypercall_msr.as_uint64 = 0; 233 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 234 235 if (!hypercall_msr.enable) 236 goto cleanup; 237 238 hv_context.hypercall_page = virtaddr; 239 240 #ifdef CONFIG_X86_64 241 if (ms_hyperv.features & HV_X64_MSR_REFERENCE_TSC_AVAILABLE) { 242 union hv_x64_msr_hypercall_contents tsc_msr; 243 void *va_tsc; 244 245 va_tsc = __vmalloc(PAGE_SIZE, GFP_KERNEL, PAGE_KERNEL); 246 if (!va_tsc) 247 goto cleanup; 248 hv_context.tsc_page = va_tsc; 249 250 rdmsrl(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64); 251 252 tsc_msr.enable = 1; 253 tsc_msr.guest_physical_address = vmalloc_to_pfn(va_tsc); 254 255 wrmsrl(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64); 256 clocksource_register_hz(&hyperv_cs_tsc, NSEC_PER_SEC/100); 257 } 258 #endif 259 return 0; 260 261 cleanup: 262 if (virtaddr) { 263 if (hypercall_msr.enable) { 264 hypercall_msr.as_uint64 = 0; 265 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 266 } 267 268 vfree(virtaddr); 269 } 270 271 return -ENOTSUPP; 272 } 273 274 /* 275 * hv_cleanup - Cleanup routine. 276 * 277 * This routine is called normally during driver unloading or exiting. 278 */ 279 void hv_cleanup(void) 280 { 281 union hv_x64_msr_hypercall_contents hypercall_msr; 282 283 /* Reset our OS id */ 284 wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0); 285 286 if (hv_context.hypercall_page) { 287 hypercall_msr.as_uint64 = 0; 288 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); 289 vfree(hv_context.hypercall_page); 290 hv_context.hypercall_page = NULL; 291 } 292 293 #ifdef CONFIG_X86_64 294 /* 295 * Cleanup the TSC page based CS. 296 */ 297 if (ms_hyperv.features & HV_X64_MSR_REFERENCE_TSC_AVAILABLE) { 298 clocksource_change_rating(&hyperv_cs_tsc, 10); 299 clocksource_unregister(&hyperv_cs_tsc); 300 301 hypercall_msr.as_uint64 = 0; 302 wrmsrl(HV_X64_MSR_REFERENCE_TSC, hypercall_msr.as_uint64); 303 vfree(hv_context.tsc_page); 304 hv_context.tsc_page = NULL; 305 } 306 #endif 307 } 308 309 /* 310 * hv_post_message - Post a message using the hypervisor message IPC. 311 * 312 * This involves a hypercall. 313 */ 314 int hv_post_message(union hv_connection_id connection_id, 315 enum hv_message_type message_type, 316 void *payload, size_t payload_size) 317 { 318 319 struct hv_input_post_message *aligned_msg; 320 u64 status; 321 322 if (payload_size > HV_MESSAGE_PAYLOAD_BYTE_COUNT) 323 return -EMSGSIZE; 324 325 aligned_msg = (struct hv_input_post_message *) 326 hv_context.post_msg_page[get_cpu()]; 327 328 aligned_msg->connectionid = connection_id; 329 aligned_msg->reserved = 0; 330 aligned_msg->message_type = message_type; 331 aligned_msg->payload_size = payload_size; 332 memcpy((void *)aligned_msg->payload, payload, payload_size); 333 334 status = hv_do_hypercall(HVCALL_POST_MESSAGE, aligned_msg, NULL); 335 336 put_cpu(); 337 return status & 0xFFFF; 338 } 339 340 341 /* 342 * hv_signal_event - 343 * Signal an event on the specified connection using the hypervisor event IPC. 344 * 345 * This involves a hypercall. 346 */ 347 int hv_signal_event(void *con_id) 348 { 349 u64 status; 350 351 status = hv_do_hypercall(HVCALL_SIGNAL_EVENT, con_id, NULL); 352 353 return status & 0xFFFF; 354 } 355 356 static int hv_ce_set_next_event(unsigned long delta, 357 struct clock_event_device *evt) 358 { 359 cycle_t current_tick; 360 361 WARN_ON(!clockevent_state_oneshot(evt)); 362 363 rdmsrl(HV_X64_MSR_TIME_REF_COUNT, current_tick); 364 current_tick += delta; 365 wrmsrl(HV_X64_MSR_STIMER0_COUNT, current_tick); 366 return 0; 367 } 368 369 static int hv_ce_shutdown(struct clock_event_device *evt) 370 { 371 wrmsrl(HV_X64_MSR_STIMER0_COUNT, 0); 372 wrmsrl(HV_X64_MSR_STIMER0_CONFIG, 0); 373 374 return 0; 375 } 376 377 static int hv_ce_set_oneshot(struct clock_event_device *evt) 378 { 379 union hv_timer_config timer_cfg; 380 381 timer_cfg.enable = 1; 382 timer_cfg.auto_enable = 1; 383 timer_cfg.sintx = VMBUS_MESSAGE_SINT; 384 wrmsrl(HV_X64_MSR_STIMER0_CONFIG, timer_cfg.as_uint64); 385 386 return 0; 387 } 388 389 static void hv_init_clockevent_device(struct clock_event_device *dev, int cpu) 390 { 391 dev->name = "Hyper-V clockevent"; 392 dev->features = CLOCK_EVT_FEAT_ONESHOT; 393 dev->cpumask = cpumask_of(cpu); 394 dev->rating = 1000; 395 /* 396 * Avoid settint dev->owner = THIS_MODULE deliberately as doing so will 397 * result in clockevents_config_and_register() taking additional 398 * references to the hv_vmbus module making it impossible to unload. 399 */ 400 401 dev->set_state_shutdown = hv_ce_shutdown; 402 dev->set_state_oneshot = hv_ce_set_oneshot; 403 dev->set_next_event = hv_ce_set_next_event; 404 } 405 406 407 int hv_synic_alloc(void) 408 { 409 size_t size = sizeof(struct tasklet_struct); 410 size_t ced_size = sizeof(struct clock_event_device); 411 int cpu; 412 413 hv_context.hv_numa_map = kzalloc(sizeof(struct cpumask) * nr_node_ids, 414 GFP_ATOMIC); 415 if (hv_context.hv_numa_map == NULL) { 416 pr_err("Unable to allocate NUMA map\n"); 417 goto err; 418 } 419 420 for_each_online_cpu(cpu) { 421 hv_context.event_dpc[cpu] = kmalloc(size, GFP_ATOMIC); 422 if (hv_context.event_dpc[cpu] == NULL) { 423 pr_err("Unable to allocate event dpc\n"); 424 goto err; 425 } 426 tasklet_init(hv_context.event_dpc[cpu], vmbus_on_event, cpu); 427 428 hv_context.clk_evt[cpu] = kzalloc(ced_size, GFP_ATOMIC); 429 if (hv_context.clk_evt[cpu] == NULL) { 430 pr_err("Unable to allocate clock event device\n"); 431 goto err; 432 } 433 434 hv_init_clockevent_device(hv_context.clk_evt[cpu], cpu); 435 436 hv_context.synic_message_page[cpu] = 437 (void *)get_zeroed_page(GFP_ATOMIC); 438 439 if (hv_context.synic_message_page[cpu] == NULL) { 440 pr_err("Unable to allocate SYNIC message page\n"); 441 goto err; 442 } 443 444 hv_context.synic_event_page[cpu] = 445 (void *)get_zeroed_page(GFP_ATOMIC); 446 447 if (hv_context.synic_event_page[cpu] == NULL) { 448 pr_err("Unable to allocate SYNIC event page\n"); 449 goto err; 450 } 451 452 hv_context.post_msg_page[cpu] = 453 (void *)get_zeroed_page(GFP_ATOMIC); 454 455 if (hv_context.post_msg_page[cpu] == NULL) { 456 pr_err("Unable to allocate post msg page\n"); 457 goto err; 458 } 459 } 460 461 return 0; 462 err: 463 return -ENOMEM; 464 } 465 466 static void hv_synic_free_cpu(int cpu) 467 { 468 kfree(hv_context.event_dpc[cpu]); 469 kfree(hv_context.clk_evt[cpu]); 470 if (hv_context.synic_event_page[cpu]) 471 free_page((unsigned long)hv_context.synic_event_page[cpu]); 472 if (hv_context.synic_message_page[cpu]) 473 free_page((unsigned long)hv_context.synic_message_page[cpu]); 474 if (hv_context.post_msg_page[cpu]) 475 free_page((unsigned long)hv_context.post_msg_page[cpu]); 476 } 477 478 void hv_synic_free(void) 479 { 480 int cpu; 481 482 kfree(hv_context.hv_numa_map); 483 for_each_online_cpu(cpu) 484 hv_synic_free_cpu(cpu); 485 } 486 487 /* 488 * hv_synic_init - Initialize the Synthethic Interrupt Controller. 489 * 490 * If it is already initialized by another entity (ie x2v shim), we need to 491 * retrieve the initialized message and event pages. Otherwise, we create and 492 * initialize the message and event pages. 493 */ 494 void hv_synic_init(void *arg) 495 { 496 u64 version; 497 union hv_synic_simp simp; 498 union hv_synic_siefp siefp; 499 union hv_synic_sint shared_sint; 500 union hv_synic_scontrol sctrl; 501 u64 vp_index; 502 503 int cpu = smp_processor_id(); 504 505 if (!hv_context.hypercall_page) 506 return; 507 508 /* Check the version */ 509 rdmsrl(HV_X64_MSR_SVERSION, version); 510 511 /* Setup the Synic's message page */ 512 rdmsrl(HV_X64_MSR_SIMP, simp.as_uint64); 513 simp.simp_enabled = 1; 514 simp.base_simp_gpa = virt_to_phys(hv_context.synic_message_page[cpu]) 515 >> PAGE_SHIFT; 516 517 wrmsrl(HV_X64_MSR_SIMP, simp.as_uint64); 518 519 /* Setup the Synic's event page */ 520 rdmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64); 521 siefp.siefp_enabled = 1; 522 siefp.base_siefp_gpa = virt_to_phys(hv_context.synic_event_page[cpu]) 523 >> PAGE_SHIFT; 524 525 wrmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64); 526 527 /* Setup the shared SINT. */ 528 rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64); 529 530 shared_sint.as_uint64 = 0; 531 shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR; 532 shared_sint.masked = false; 533 shared_sint.auto_eoi = true; 534 535 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64); 536 537 /* Enable the global synic bit */ 538 rdmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64); 539 sctrl.enable = 1; 540 541 wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64); 542 543 hv_context.synic_initialized = true; 544 545 /* 546 * Setup the mapping between Hyper-V's notion 547 * of cpuid and Linux' notion of cpuid. 548 * This array will be indexed using Linux cpuid. 549 */ 550 rdmsrl(HV_X64_MSR_VP_INDEX, vp_index); 551 hv_context.vp_index[cpu] = (u32)vp_index; 552 553 INIT_LIST_HEAD(&hv_context.percpu_list[cpu]); 554 555 /* 556 * Register the per-cpu clockevent source. 557 */ 558 if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE) 559 clockevents_config_and_register(hv_context.clk_evt[cpu], 560 HV_TIMER_FREQUENCY, 561 HV_MIN_DELTA_TICKS, 562 HV_MAX_MAX_DELTA_TICKS); 563 return; 564 } 565 566 /* 567 * hv_synic_clockevents_cleanup - Cleanup clockevent devices 568 */ 569 void hv_synic_clockevents_cleanup(void) 570 { 571 int cpu; 572 573 if (!(ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE)) 574 return; 575 576 for_each_online_cpu(cpu) 577 clockevents_unbind_device(hv_context.clk_evt[cpu], cpu); 578 } 579 580 /* 581 * hv_synic_cleanup - Cleanup routine for hv_synic_init(). 582 */ 583 void hv_synic_cleanup(void *arg) 584 { 585 union hv_synic_sint shared_sint; 586 union hv_synic_simp simp; 587 union hv_synic_siefp siefp; 588 union hv_synic_scontrol sctrl; 589 int cpu = smp_processor_id(); 590 591 if (!hv_context.synic_initialized) 592 return; 593 594 /* Turn off clockevent device */ 595 if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE) 596 hv_ce_shutdown(hv_context.clk_evt[cpu]); 597 598 rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64); 599 600 shared_sint.masked = 1; 601 602 /* Need to correctly cleanup in the case of SMP!!! */ 603 /* Disable the interrupt */ 604 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64); 605 606 rdmsrl(HV_X64_MSR_SIMP, simp.as_uint64); 607 simp.simp_enabled = 0; 608 simp.base_simp_gpa = 0; 609 610 wrmsrl(HV_X64_MSR_SIMP, simp.as_uint64); 611 612 rdmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64); 613 siefp.siefp_enabled = 0; 614 siefp.base_siefp_gpa = 0; 615 616 wrmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64); 617 618 /* Disable the global synic bit */ 619 rdmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64); 620 sctrl.enable = 0; 621 wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64); 622 } 623