1 /* OMAP SSI internal interface.
2  *
3  * Copyright (C) 2010 Nokia Corporation. All rights reserved.
4  * Copyright (C) 2013 Sebastian Reichel
5  *
6  * Contact: Carlos Chinea <carlos.chinea@nokia.com>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20  * 02110-1301 USA
21  */
22 
23 #ifndef __LINUX_HSI_OMAP_SSI_H__
24 #define __LINUX_HSI_OMAP_SSI_H__
25 
26 #include <linux/device.h>
27 #include <linux/module.h>
28 #include <linux/platform_device.h>
29 #include <linux/hsi/hsi.h>
30 #include <linux/gpio.h>
31 #include <linux/interrupt.h>
32 #include <linux/io.h>
33 
34 #define SSI_MAX_CHANNELS	8
35 #define SSI_MAX_GDD_LCH		8
36 #define SSI_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1)
37 
38 /**
39  * struct omap_ssm_ctx - OMAP synchronous serial module (TX/RX) context
40  * @mode: Bit transmission mode
41  * @channels: Number of channels
42  * @framesize: Frame size in bits
43  * @timeout: RX frame timeout
44  * @divisor: TX divider
45  * @arb_mode: Arbitration mode for TX frame (Round robin, priority)
46  */
47 struct omap_ssm_ctx {
48 	u32	mode;
49 	u32	channels;
50 	u32	frame_size;
51 	union	{
52 			u32	timeout; /* Rx Only */
53 			struct	{
54 					u32	arb_mode;
55 					u32	divisor;
56 			}; /* Tx only */
57 	};
58 };
59 
60 /**
61  * struct omap_ssi_port - OMAP SSI port data
62  * @dev: device associated to the port (HSI port)
63  * @pdev: platform device associated to the port
64  * @sst_dma: SSI transmitter physical base address
65  * @ssr_dma: SSI receiver physical base address
66  * @sst_base: SSI transmitter base address
67  * @ssr_base: SSI receiver base address
68  * @wk_lock: spin lock to serialize access to the wake lines
69  * @lock: Spin lock to serialize access to the SSI port
70  * @channels: Current number of channels configured (1,2,4 or 8)
71  * @txqueue: TX message queues
72  * @rxqueue: RX message queues
73  * @brkqueue: Queue of incoming HWBREAK requests (FRAME mode)
74  * @irq: IRQ number
75  * @wake_irq: IRQ number for incoming wake line (-1 if none)
76  * @wake_gpio: GPIO number for incoming wake line (-1 if none)
77  * @pio_tasklet: Bottom half for PIO transfers and events
78  * @wake_tasklet: Bottom half for incoming wake events
79  * @wkin_cken: Keep track of clock references due to the incoming wake line
80  * @wk_refcount: Reference count for output wake line
81  * @sys_mpu_enable: Context for the interrupt enable register for irq 0
82  * @sst: Context for the synchronous serial transmitter
83  * @ssr: Context for the synchronous serial receiver
84  */
85 struct omap_ssi_port {
86 	struct device		*dev;
87 	struct device           *pdev;
88 	dma_addr_t		sst_dma;
89 	dma_addr_t		ssr_dma;
90 	void __iomem		*sst_base;
91 	void __iomem		*ssr_base;
92 	spinlock_t		wk_lock;
93 	spinlock_t		lock;
94 	unsigned int		channels;
95 	struct list_head	txqueue[SSI_MAX_CHANNELS];
96 	struct list_head	rxqueue[SSI_MAX_CHANNELS];
97 	struct list_head	brkqueue;
98 	unsigned int		irq;
99 	int			wake_irq;
100 	int			wake_gpio;
101 	struct tasklet_struct	pio_tasklet;
102 	struct tasklet_struct	wake_tasklet;
103 	bool			wktest:1; /* FIXME: HACK to be removed */
104 	bool			wkin_cken:1; /* Workaround */
105 	unsigned int		wk_refcount;
106 	/* OMAP SSI port context */
107 	u32			sys_mpu_enable; /* We use only one irq */
108 	struct omap_ssm_ctx	sst;
109 	struct omap_ssm_ctx	ssr;
110 	u32			loss_count;
111 	u32			port_id;
112 #ifdef CONFIG_DEBUG_FS
113 	struct dentry *dir;
114 #endif
115 };
116 
117 /**
118  * struct gdd_trn - GDD transaction data
119  * @msg: Pointer to the HSI message being served
120  * @sg: Pointer to the current sg entry being served
121  */
122 struct gdd_trn {
123 	struct hsi_msg		*msg;
124 	struct scatterlist	*sg;
125 };
126 
127 /**
128  * struct omap_ssi_controller - OMAP SSI controller data
129  * @dev: device associated to the controller (HSI controller)
130  * @sys: SSI I/O base address
131  * @gdd: GDD I/O base address
132  * @fck: SSI functional clock
133  * @gdd_irq: IRQ line for GDD
134  * @gdd_tasklet: bottom half for DMA transfers
135  * @gdd_trn: Array of GDD transaction data for ongoing GDD transfers
136  * @lock: lock to serialize access to GDD
137  * @loss_count: To follow if we need to restore context or not
138  * @max_speed: Maximum TX speed (Kb/s) set by the clients.
139  * @sysconfig: SSI controller saved context
140  * @gdd_gcr: SSI GDD saved context
141  * @get_loss: Pointer to omap_pm_get_dev_context_loss_count, if any
142  * @port: Array of pointers of the ports of the controller
143  * @dir: Debugfs SSI root directory
144  */
145 struct omap_ssi_controller {
146 	struct device		*dev;
147 	void __iomem		*sys;
148 	void __iomem		*gdd;
149 	struct clk		*fck;
150 	unsigned int		gdd_irq;
151 	struct tasklet_struct	gdd_tasklet;
152 	struct gdd_trn		gdd_trn[SSI_MAX_GDD_LCH];
153 	spinlock_t		lock;
154 	unsigned long		fck_rate;
155 	u32			loss_count;
156 	u32			max_speed;
157 	/* OMAP SSI Controller context */
158 	u32			sysconfig;
159 	u32			gdd_gcr;
160 	int			(*get_loss)(struct device *dev);
161 	struct omap_ssi_port	**port;
162 #ifdef CONFIG_DEBUG_FS
163 	struct dentry *dir;
164 #endif
165 };
166 
167 #endif /* __LINUX_HSI_OMAP_SSI_H__ */
168