1 /* OMAP SSI internal interface.
2  *
3  * Copyright (C) 2010 Nokia Corporation. All rights reserved.
4  * Copyright (C) 2013 Sebastian Reichel
5  *
6  * Contact: Carlos Chinea <carlos.chinea@nokia.com>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * version 2 as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but
13  * WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20  * 02110-1301 USA
21  */
22 
23 #ifndef __LINUX_HSI_OMAP_SSI_H__
24 #define __LINUX_HSI_OMAP_SSI_H__
25 
26 #include <linux/device.h>
27 #include <linux/module.h>
28 #include <linux/platform_device.h>
29 #include <linux/hsi/hsi.h>
30 #include <linux/gpio/consumer.h>
31 #include <linux/interrupt.h>
32 #include <linux/io.h>
33 
34 #define SSI_MAX_CHANNELS	8
35 #define SSI_MAX_GDD_LCH		8
36 #define SSI_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1)
37 
38 #define SSI_WAKE_EN 0
39 
40 /**
41  * struct omap_ssm_ctx - OMAP synchronous serial module (TX/RX) context
42  * @mode: Bit transmission mode
43  * @channels: Number of channels
44  * @framesize: Frame size in bits
45  * @timeout: RX frame timeout
46  * @divisor: TX divider
47  * @arb_mode: Arbitration mode for TX frame (Round robin, priority)
48  */
49 struct omap_ssm_ctx {
50 	u32	mode;
51 	u32	channels;
52 	u32	frame_size;
53 	union	{
54 			u32	timeout; /* Rx Only */
55 			struct	{
56 					u32	arb_mode;
57 					u32	divisor;
58 			}; /* Tx only */
59 	};
60 };
61 
62 /**
63  * struct omap_ssi_port - OMAP SSI port data
64  * @dev: device associated to the port (HSI port)
65  * @pdev: platform device associated to the port
66  * @sst_dma: SSI transmitter physical base address
67  * @ssr_dma: SSI receiver physical base address
68  * @sst_base: SSI transmitter base address
69  * @ssr_base: SSI receiver base address
70  * @wk_lock: spin lock to serialize access to the wake lines
71  * @lock: Spin lock to serialize access to the SSI port
72  * @channels: Current number of channels configured (1,2,4 or 8)
73  * @txqueue: TX message queues
74  * @rxqueue: RX message queues
75  * @brkqueue: Queue of incoming HWBREAK requests (FRAME mode)
76  * @errqueue: Queue for failed messages
77  * @errqueue_work: Delayed Work for failed messages
78  * @irq: IRQ number
79  * @wake_irq: IRQ number for incoming wake line (-1 if none)
80  * @wake_gpio: GPIO number for incoming wake line (-1 if none)
81  * @flags: flags to keep track of states
82  * @wk_refcount: Reference count for output wake line
83  * @work: worker for starting TX
84  * @sys_mpu_enable: Context for the interrupt enable register for irq 0
85  * @sst: Context for the synchronous serial transmitter
86  * @ssr: Context for the synchronous serial receiver
87  */
88 struct omap_ssi_port {
89 	struct device		*dev;
90 	struct device           *pdev;
91 	dma_addr_t		sst_dma;
92 	dma_addr_t		ssr_dma;
93 	void __iomem		*sst_base;
94 	void __iomem		*ssr_base;
95 	spinlock_t		wk_lock;
96 	spinlock_t		lock;
97 	unsigned int		channels;
98 	struct list_head	txqueue[SSI_MAX_CHANNELS];
99 	struct list_head	rxqueue[SSI_MAX_CHANNELS];
100 	struct list_head	brkqueue;
101 	struct list_head	errqueue;
102 	struct delayed_work	errqueue_work;
103 	unsigned int		irq;
104 	int			wake_irq;
105 	struct gpio_desc	*wake_gpio;
106 	bool			wktest:1; /* FIXME: HACK to be removed */
107 	unsigned long		flags;
108 	unsigned int		wk_refcount;
109 	struct work_struct	work;
110 	/* OMAP SSI port context */
111 	u32			sys_mpu_enable; /* We use only one irq */
112 	struct omap_ssm_ctx	sst;
113 	struct omap_ssm_ctx	ssr;
114 	u32			loss_count;
115 	u32			port_id;
116 #ifdef CONFIG_DEBUG_FS
117 	struct dentry *dir;
118 #endif
119 };
120 
121 /**
122  * struct gdd_trn - GDD transaction data
123  * @msg: Pointer to the HSI message being served
124  * @sg: Pointer to the current sg entry being served
125  */
126 struct gdd_trn {
127 	struct hsi_msg		*msg;
128 	struct scatterlist	*sg;
129 };
130 
131 /**
132  * struct omap_ssi_controller - OMAP SSI controller data
133  * @dev: device associated to the controller (HSI controller)
134  * @sys: SSI I/O base address
135  * @gdd: GDD I/O base address
136  * @fck: SSI functional clock
137  * @gdd_irq: IRQ line for GDD
138  * @gdd_tasklet: bottom half for DMA transfers
139  * @gdd_trn: Array of GDD transaction data for ongoing GDD transfers
140  * @lock: lock to serialize access to GDD
141  * @fck_nb: DVFS notfifier block
142  * @fck_rate: clock rate
143  * @loss_count: To follow if we need to restore context or not
144  * @max_speed: Maximum TX speed (Kb/s) set by the clients.
145  * @gdd_gcr: SSI GDD saved context
146  * @get_loss: Pointer to omap_pm_get_dev_context_loss_count, if any
147  * @port: Array of pointers of the ports of the controller
148  * @dir: Debugfs SSI root directory
149  */
150 struct omap_ssi_controller {
151 	struct device		*dev;
152 	void __iomem		*sys;
153 	void __iomem		*gdd;
154 	struct clk		*fck;
155 	unsigned int		gdd_irq;
156 	struct tasklet_struct	gdd_tasklet;
157 	struct gdd_trn		gdd_trn[SSI_MAX_GDD_LCH];
158 	spinlock_t		lock;
159 	struct notifier_block	fck_nb;
160 	unsigned long		fck_rate;
161 	u32			loss_count;
162 	u32			max_speed;
163 	/* OMAP SSI Controller context */
164 	u32			gdd_gcr;
165 	int			(*get_loss)(struct device *dev);
166 	struct omap_ssi_port	**port;
167 #ifdef CONFIG_DEBUG_FS
168 	struct dentry *dir;
169 #endif
170 };
171 
172 void omap_ssi_port_update_fclk(struct hsi_controller *ssi,
173 			       struct omap_ssi_port *omap_port);
174 
175 extern struct platform_driver ssi_port_pdriver;
176 
177 #endif /* __LINUX_HSI_OMAP_SSI_H__ */
178