1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * PCI glue for ISHTP provider device (ISH) driver 4 * 5 * Copyright (c) 2014-2016, Intel Corporation. 6 */ 7 8 #include <linux/acpi.h> 9 #include <linux/module.h> 10 #include <linux/moduleparam.h> 11 #include <linux/kernel.h> 12 #include <linux/device.h> 13 #include <linux/fs.h> 14 #include <linux/errno.h> 15 #include <linux/types.h> 16 #include <linux/pci.h> 17 #include <linux/sched.h> 18 #include <linux/suspend.h> 19 #include <linux/interrupt.h> 20 #include <linux/workqueue.h> 21 #define CREATE_TRACE_POINTS 22 #include <trace/events/intel_ish.h> 23 #include "ishtp-dev.h" 24 #include "hw-ish.h" 25 26 static const struct pci_device_id ish_pci_tbl[] = { 27 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CHV_DEVICE_ID)}, 28 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, BXT_Ax_DEVICE_ID)}, 29 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, BXT_Bx_DEVICE_ID)}, 30 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, APL_Ax_DEVICE_ID)}, 31 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, SPT_Ax_DEVICE_ID)}, 32 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_Ax_DEVICE_ID)}, 33 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, GLK_Ax_DEVICE_ID)}, 34 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_H_DEVICE_ID)}, 35 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ICL_MOBILE_DEVICE_ID)}, 36 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, SPT_H_DEVICE_ID)}, 37 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CML_LP_DEVICE_ID)}, 38 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CMP_H_DEVICE_ID)}, 39 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, EHL_Ax_DEVICE_ID)}, 40 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, TGL_LP_DEVICE_ID)}, 41 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, TGL_H_DEVICE_ID)}, 42 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ADL_S_DEVICE_ID)}, 43 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ADL_P_DEVICE_ID)}, 44 {0, } 45 }; 46 MODULE_DEVICE_TABLE(pci, ish_pci_tbl); 47 48 /** 49 * ish_event_tracer() - Callback function to dump trace messages 50 * @dev: ishtp device 51 * @format: printf style format 52 * 53 * Callback to direct log messages to Linux trace buffers 54 */ 55 static __printf(2, 3) 56 void ish_event_tracer(struct ishtp_device *dev, const char *format, ...) 57 { 58 if (trace_ishtp_dump_enabled()) { 59 va_list args; 60 char tmp_buf[100]; 61 62 va_start(args, format); 63 vsnprintf(tmp_buf, sizeof(tmp_buf), format, args); 64 va_end(args); 65 66 trace_ishtp_dump(tmp_buf); 67 } 68 } 69 70 /** 71 * ish_init() - Init function 72 * @dev: ishtp device 73 * 74 * This function initialize wait queues for suspend/resume and call 75 * calls hadware initialization function. This will initiate 76 * startup sequence 77 * 78 * Return: 0 for success or error code for failure 79 */ 80 static int ish_init(struct ishtp_device *dev) 81 { 82 int ret; 83 84 /* Set the state of ISH HW to start */ 85 ret = ish_hw_start(dev); 86 if (ret) { 87 dev_err(dev->devc, "ISH: hw start failed.\n"); 88 return ret; 89 } 90 91 /* Start the inter process communication to ISH processor */ 92 ret = ishtp_start(dev); 93 if (ret) { 94 dev_err(dev->devc, "ISHTP: Protocol init failed.\n"); 95 return ret; 96 } 97 98 return 0; 99 } 100 101 static const struct pci_device_id ish_invalid_pci_ids[] = { 102 /* Mehlow platform special pci ids */ 103 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xA309)}, 104 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xA30A)}, 105 {} 106 }; 107 108 static inline bool ish_should_enter_d0i3(struct pci_dev *pdev) 109 { 110 return !pm_suspend_via_firmware() || pdev->device == CHV_DEVICE_ID; 111 } 112 113 static inline bool ish_should_leave_d0i3(struct pci_dev *pdev) 114 { 115 return !pm_resume_via_firmware() || pdev->device == CHV_DEVICE_ID; 116 } 117 118 static int enable_gpe(struct device *dev) 119 { 120 #ifdef CONFIG_ACPI 121 acpi_status acpi_sts; 122 struct acpi_device *adev; 123 struct acpi_device_wakeup *wakeup; 124 125 adev = ACPI_COMPANION(dev); 126 if (!adev) { 127 dev_err(dev, "get acpi handle failed\n"); 128 return -ENODEV; 129 } 130 wakeup = &adev->wakeup; 131 132 acpi_sts = acpi_enable_gpe(wakeup->gpe_device, wakeup->gpe_number); 133 if (ACPI_FAILURE(acpi_sts)) { 134 dev_err(dev, "enable ose_gpe failed\n"); 135 return -EIO; 136 } 137 138 return 0; 139 #else 140 return -ENODEV; 141 #endif 142 } 143 144 static void enable_pme_wake(struct pci_dev *pdev) 145 { 146 if ((pci_pme_capable(pdev, PCI_D0) || 147 pci_pme_capable(pdev, PCI_D3hot) || 148 pci_pme_capable(pdev, PCI_D3cold)) && !enable_gpe(&pdev->dev)) { 149 pci_pme_active(pdev, true); 150 dev_dbg(&pdev->dev, "ish ipc driver pme wake enabled\n"); 151 } 152 } 153 154 /** 155 * ish_probe() - PCI driver probe callback 156 * @pdev: pci device 157 * @ent: pci device id 158 * 159 * Initialize PCI function, setup interrupt and call for ISH initialization 160 * 161 * Return: 0 for success or error code for failure 162 */ 163 static int ish_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 164 { 165 int ret; 166 struct ish_hw *hw; 167 unsigned long irq_flag = 0; 168 struct ishtp_device *ishtp; 169 struct device *dev = &pdev->dev; 170 171 /* Check for invalid platforms for ISH support */ 172 if (pci_dev_present(ish_invalid_pci_ids)) 173 return -ENODEV; 174 175 /* enable pci dev */ 176 ret = pcim_enable_device(pdev); 177 if (ret) { 178 dev_err(dev, "ISH: Failed to enable PCI device\n"); 179 return ret; 180 } 181 182 /* set PCI host mastering */ 183 pci_set_master(pdev); 184 185 /* pci request regions for ISH driver */ 186 ret = pcim_iomap_regions(pdev, 1 << 0, KBUILD_MODNAME); 187 if (ret) { 188 dev_err(dev, "ISH: Failed to get PCI regions\n"); 189 return ret; 190 } 191 192 /* allocates and initializes the ISH dev structure */ 193 ishtp = ish_dev_init(pdev); 194 if (!ishtp) { 195 ret = -ENOMEM; 196 return ret; 197 } 198 hw = to_ish_hw(ishtp); 199 ishtp->print_log = ish_event_tracer; 200 201 /* mapping IO device memory */ 202 hw->mem_addr = pcim_iomap_table(pdev)[0]; 203 ishtp->pdev = pdev; 204 205 /* request and enable interrupt */ 206 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 207 if (!pdev->msi_enabled && !pdev->msix_enabled) 208 irq_flag = IRQF_SHARED; 209 210 ret = devm_request_irq(dev, pdev->irq, ish_irq_handler, 211 irq_flag, KBUILD_MODNAME, ishtp); 212 if (ret) { 213 dev_err(dev, "ISH: request IRQ %d failed\n", pdev->irq); 214 return ret; 215 } 216 217 dev_set_drvdata(ishtp->devc, ishtp); 218 219 init_waitqueue_head(&ishtp->suspend_wait); 220 init_waitqueue_head(&ishtp->resume_wait); 221 222 /* Enable PME for EHL */ 223 if (pdev->device == EHL_Ax_DEVICE_ID) 224 enable_pme_wake(pdev); 225 226 ret = ish_init(ishtp); 227 if (ret) 228 return ret; 229 230 return 0; 231 } 232 233 /** 234 * ish_remove() - PCI driver remove callback 235 * @pdev: pci device 236 * 237 * This function does cleanup of ISH on pci remove callback 238 */ 239 static void ish_remove(struct pci_dev *pdev) 240 { 241 struct ishtp_device *ishtp_dev = pci_get_drvdata(pdev); 242 243 ishtp_bus_remove_all_clients(ishtp_dev, false); 244 ish_device_disable(ishtp_dev); 245 } 246 247 static struct device __maybe_unused *ish_resume_device; 248 249 /* 50ms to get resume response */ 250 #define WAIT_FOR_RESUME_ACK_MS 50 251 252 /** 253 * ish_resume_handler() - Work function to complete resume 254 * @work: work struct 255 * 256 * The resume work function to complete resume function asynchronously. 257 * There are two resume paths, one where ISH is not powered off, 258 * in that case a simple resume message is enough, others we need 259 * a reset sequence. 260 */ 261 static void __maybe_unused ish_resume_handler(struct work_struct *work) 262 { 263 struct pci_dev *pdev = to_pci_dev(ish_resume_device); 264 struct ishtp_device *dev = pci_get_drvdata(pdev); 265 uint32_t fwsts = dev->ops->get_fw_status(dev); 266 267 if (ish_should_leave_d0i3(pdev) && !dev->suspend_flag 268 && IPC_IS_ISH_ILUP(fwsts)) { 269 disable_irq_wake(pdev->irq); 270 271 ish_set_host_ready(dev); 272 273 ishtp_send_resume(dev); 274 275 /* Waiting to get resume response */ 276 if (dev->resume_flag) 277 wait_event_interruptible_timeout(dev->resume_wait, 278 !dev->resume_flag, 279 msecs_to_jiffies(WAIT_FOR_RESUME_ACK_MS)); 280 281 /* 282 * If the flag is not cleared, something is wrong with ISH FW. 283 * So on resume, need to go through init sequence again. 284 */ 285 if (dev->resume_flag) 286 ish_init(dev); 287 } else { 288 /* 289 * Resume from the D3, full reboot of ISH processor will happen, 290 * so need to go through init sequence again. 291 */ 292 ish_init(dev); 293 } 294 } 295 296 /** 297 * ish_suspend() - ISH suspend callback 298 * @device: device pointer 299 * 300 * ISH suspend callback 301 * 302 * Return: 0 to the pm core 303 */ 304 static int __maybe_unused ish_suspend(struct device *device) 305 { 306 struct pci_dev *pdev = to_pci_dev(device); 307 struct ishtp_device *dev = pci_get_drvdata(pdev); 308 309 if (ish_should_enter_d0i3(pdev)) { 310 /* 311 * If previous suspend hasn't been asnwered then ISH is likely 312 * dead, don't attempt nested notification 313 */ 314 if (dev->suspend_flag) 315 return 0; 316 317 dev->resume_flag = 0; 318 dev->suspend_flag = 1; 319 ishtp_send_suspend(dev); 320 321 /* 25 ms should be enough for live ISH to flush all IPC buf */ 322 if (dev->suspend_flag) 323 wait_event_interruptible_timeout(dev->suspend_wait, 324 !dev->suspend_flag, 325 msecs_to_jiffies(25)); 326 327 if (dev->suspend_flag) { 328 /* 329 * It looks like FW halt, clear the DMA bit, and put 330 * ISH into D3, and FW would reset on resume. 331 */ 332 ish_disable_dma(dev); 333 } else { 334 /* 335 * Save state so PCI core will keep the device at D0, 336 * the ISH would enter D0i3 337 */ 338 pci_save_state(pdev); 339 340 enable_irq_wake(pdev->irq); 341 } 342 } else { 343 /* 344 * Clear the DMA bit before putting ISH into D3, 345 * or ISH FW would reset automatically. 346 */ 347 ish_disable_dma(dev); 348 } 349 350 return 0; 351 } 352 353 static __maybe_unused DECLARE_WORK(resume_work, ish_resume_handler); 354 /** 355 * ish_resume() - ISH resume callback 356 * @device: device pointer 357 * 358 * ISH resume callback 359 * 360 * Return: 0 to the pm core 361 */ 362 static int __maybe_unused ish_resume(struct device *device) 363 { 364 struct pci_dev *pdev = to_pci_dev(device); 365 struct ishtp_device *dev = pci_get_drvdata(pdev); 366 367 /* add this to finish power flow for EHL */ 368 if (dev->pdev->device == EHL_Ax_DEVICE_ID) { 369 pci_set_power_state(pdev, PCI_D0); 370 enable_pme_wake(pdev); 371 dev_dbg(dev->devc, "set power state to D0 for ehl\n"); 372 } 373 374 ish_resume_device = device; 375 dev->resume_flag = 1; 376 377 schedule_work(&resume_work); 378 379 return 0; 380 } 381 382 static SIMPLE_DEV_PM_OPS(ish_pm_ops, ish_suspend, ish_resume); 383 384 static struct pci_driver ish_driver = { 385 .name = KBUILD_MODNAME, 386 .id_table = ish_pci_tbl, 387 .probe = ish_probe, 388 .remove = ish_remove, 389 .driver.pm = &ish_pm_ops, 390 }; 391 392 module_pci_driver(ish_driver); 393 394 /* Original author */ 395 MODULE_AUTHOR("Daniel Drubin <daniel.drubin@intel.com>"); 396 /* Adoption to upstream Linux kernel */ 397 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); 398 399 MODULE_DESCRIPTION("Intel(R) Integrated Sensor Hub PCI Device Driver"); 400 MODULE_LICENSE("GPL"); 401