1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * H/W layer of ISHTP provider device (ISH) 4 * 5 * Copyright (c) 2014-2016, Intel Corporation. 6 */ 7 8 #ifndef _ISHTP_HW_ISH_H_ 9 #define _ISHTP_HW_ISH_H_ 10 11 #include <linux/pci.h> 12 #include <linux/interrupt.h> 13 #include "hw-ish-regs.h" 14 #include "ishtp-dev.h" 15 16 #define CHV_DEVICE_ID 0x22D8 17 #define BXT_Ax_DEVICE_ID 0x0AA2 18 #define BXT_Bx_DEVICE_ID 0x1AA2 19 #define APL_Ax_DEVICE_ID 0x5AA2 20 #define SPT_Ax_DEVICE_ID 0x9D35 21 #define CNL_Ax_DEVICE_ID 0x9DFC 22 #define GLK_Ax_DEVICE_ID 0x31A2 23 #define CNL_H_DEVICE_ID 0xA37C 24 #define ICL_MOBILE_DEVICE_ID 0x34FC 25 #define SPT_H_DEVICE_ID 0xA135 26 #define CML_LP_DEVICE_ID 0x02FC 27 28 #define REVISION_ID_CHT_A0 0x6 29 #define REVISION_ID_CHT_Ax_SI 0x0 30 #define REVISION_ID_CHT_Bx_SI 0x10 31 #define REVISION_ID_CHT_Kx_SI 0x20 32 #define REVISION_ID_CHT_Dx_SI 0x30 33 #define REVISION_ID_CHT_B0 0xB0 34 #define REVISION_ID_SI_MASK 0x70 35 36 struct ipc_rst_payload_type { 37 uint16_t reset_id; 38 uint16_t reserved; 39 }; 40 41 struct time_sync_format { 42 uint8_t ts1_source; 43 uint8_t ts2_source; 44 uint16_t reserved; 45 } __packed; 46 47 struct ipc_time_update_msg { 48 uint64_t primary_host_time; 49 struct time_sync_format sync_info; 50 uint64_t secondary_host_time; 51 } __packed; 52 53 enum { 54 HOST_UTC_TIME_USEC = 0, 55 HOST_SYSTEM_TIME_USEC = 1 56 }; 57 58 struct ish_hw { 59 void __iomem *mem_addr; 60 }; 61 62 /* 63 * ISH FW status type 64 */ 65 enum { 66 FWSTS_AFTER_RESET = 0, 67 FWSTS_WAIT_FOR_HOST = 4, 68 FWSTS_START_KERNEL_DMA = 5, 69 FWSTS_FW_IS_RUNNING = 7, 70 FWSTS_SENSOR_APP_LOADED = 8, 71 FWSTS_SENSOR_APP_RUNNING = 15 72 }; 73 74 #define to_ish_hw(dev) (struct ish_hw *)((dev)->hw) 75 76 irqreturn_t ish_irq_handler(int irq, void *dev_id); 77 struct ishtp_device *ish_dev_init(struct pci_dev *pdev); 78 int ish_hw_start(struct ishtp_device *dev); 79 void ish_device_disable(struct ishtp_device *dev); 80 81 #endif /* _ISHTP_HW_ISH_H_ */ 82