1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * AMD MP2 PCIe communication driver
4  * Copyright 2020 Advanced Micro Devices, Inc.
5  * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
6  *	    Sandeep Singh <Sandeep.singh@amd.com>
7  */
8 
9 #ifndef PCIE_MP2_AMD_H
10 #define PCIE_MP2_AMD_H
11 
12 #include <linux/pci.h>
13 #include "amd_sfh_hid.h"
14 
15 #define PCI_DEVICE_ID_AMD_MP2	0x15E4
16 
17 #define ENABLE_SENSOR		1
18 #define DISABLE_SENSOR		2
19 #define STOP_ALL_SENSORS	8
20 
21 /* MP2 C2P Message Registers */
22 #define AMD_C2P_MSG0	0x10500
23 #define AMD_C2P_MSG1	0x10504
24 #define AMD_C2P_MSG2	0x10508
25 
26 #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
27 #define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))
28 
29 /* MP2 P2C Message Registers */
30 #define AMD_P2C_MSG3	0x1068C /* Supported Sensors info */
31 
32 #define V2_STATUS	0x2
33 
34 #define SENSOR_ENABLED     4
35 #define SENSOR_DISABLED    5
36 
37 #define HPD_IDX		16
38 
39 #define AMD_SFH_IDLE_LOOP	200
40 
41 /* SFH Command register */
42 union sfh_cmd_base {
43 	u32 ul;
44 	struct {
45 		u32 cmd_id : 8;
46 		u32 sensor_id : 8;
47 		u32 period : 16;
48 	} s;
49 	struct {
50 		u32 cmd_id : 4;
51 		u32 intr_enable : 1;
52 		u32 rsvd1 : 3;
53 		u32 length : 7;
54 		u32 mem_type : 1;
55 		u32 sensor_id : 8;
56 		u32 period : 8;
57 	} cmd_v2;
58 };
59 
60 union cmd_response {
61 	u32 resp;
62 	struct {
63 		u32 status	: 2;
64 		u32 out_in_c2p	: 1;
65 		u32 rsvd1	: 1;
66 		u32 response	: 4;
67 		u32 sub_cmd	: 8;
68 		u32 sensor_id	: 6;
69 		u32 rsvd2	: 10;
70 	} response_v2;
71 };
72 
73 union sfh_cmd_param {
74 	u32 ul;
75 	struct {
76 		u32 buf_layout : 2;
77 		u32 buf_length : 6;
78 		u32 rsvd : 24;
79 	} s;
80 };
81 
82 struct sfh_cmd_reg {
83 	union sfh_cmd_base cmd_base;
84 	union sfh_cmd_param cmd_param;
85 	phys_addr_t phys_addr;
86 };
87 
88 enum sensor_idx {
89 	accel_idx = 0,
90 	gyro_idx = 1,
91 	mag_idx = 2,
92 	als_idx = 19
93 };
94 
95 struct amd_mp2_dev {
96 	struct pci_dev *pdev;
97 	struct amdtp_cl_data *cl_data;
98 	void __iomem *mmio;
99 	const struct amd_mp2_ops *mp2_ops;
100 	struct amd_input_data in_data;
101 	/* mp2 active control status */
102 	u32 mp2_acs;
103 };
104 
105 struct amd_mp2_sensor_info {
106 	u8 sensor_idx;
107 	u32 period;
108 	dma_addr_t dma_address;
109 };
110 
111 enum mem_use_type {
112 	USE_DRAM,
113 	USE_C2P_REG,
114 };
115 
116 struct hpd_status {
117 	union {
118 		struct {
119 			u32 human_presence_report : 4;
120 			u32 human_presence_actual : 4;
121 			u32 probablity		  : 8;
122 			u32 object_distance       : 16;
123 		} shpd;
124 		u32 val;
125 	};
126 };
127 
128 void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
129 void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx);
130 void amd_stop_all_sensors(struct amd_mp2_dev *privdata);
131 int amd_mp2_get_sensor_num(struct amd_mp2_dev *privdata, u8 *sensor_id);
132 int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata);
133 int amd_sfh_hid_client_deinit(struct amd_mp2_dev *privdata);
134 u32 amd_sfh_wait_for_response(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
135 void amd_mp2_suspend(struct amd_mp2_dev *mp2);
136 void amd_mp2_resume(struct amd_mp2_dev *mp2);
137 
138 struct amd_mp2_ops {
139 	 void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
140 	 void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);
141 	 void (*stop_all)(struct amd_mp2_dev *privdata);
142 	 int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
143 };
144 #endif
145