16947f312SBasavaraj Natikar /* SPDX-License-Identifier: GPL-2.0-or-later */
26947f312SBasavaraj Natikar /*
36947f312SBasavaraj Natikar  * AMD MP2 common macros and structures
46947f312SBasavaraj Natikar  *
56947f312SBasavaraj Natikar  * Copyright (c) 2022, Advanced Micro Devices, Inc.
66947f312SBasavaraj Natikar  * All Rights Reserved.
76947f312SBasavaraj Natikar  *
86947f312SBasavaraj Natikar  * Author: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
96947f312SBasavaraj Natikar  */
106947f312SBasavaraj Natikar #ifndef AMD_SFH_COMMON_H
116947f312SBasavaraj Natikar #define AMD_SFH_COMMON_H
126947f312SBasavaraj Natikar 
136947f312SBasavaraj Natikar #include <linux/pci.h>
146947f312SBasavaraj Natikar #include "amd_sfh_hid.h"
156947f312SBasavaraj Natikar 
166947f312SBasavaraj Natikar #define PCI_DEVICE_ID_AMD_MP2		0x15E4
17*93ce5e02SBasavaraj Natikar #define PCI_DEVICE_ID_AMD_MP2_1_1	0x164A
186947f312SBasavaraj Natikar 
196947f312SBasavaraj Natikar #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
206947f312SBasavaraj Natikar #define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))
216947f312SBasavaraj Natikar 
226947f312SBasavaraj Natikar #define SENSOR_ENABLED			4
236947f312SBasavaraj Natikar #define SENSOR_DISABLED			5
246947f312SBasavaraj Natikar 
256947f312SBasavaraj Natikar #define AMD_SFH_IDLE_LOOP		200
266947f312SBasavaraj Natikar 
276947f312SBasavaraj Natikar enum cmd_id {
286947f312SBasavaraj Natikar 	NO_OP,
296947f312SBasavaraj Natikar 	ENABLE_SENSOR,
306947f312SBasavaraj Natikar 	DISABLE_SENSOR,
316947f312SBasavaraj Natikar 	STOP_ALL_SENSORS = 8,
326947f312SBasavaraj Natikar };
336947f312SBasavaraj Natikar 
346947f312SBasavaraj Natikar struct amd_mp2_sensor_info {
356947f312SBasavaraj Natikar 	u8 sensor_idx;
366947f312SBasavaraj Natikar 	u32 period;
376947f312SBasavaraj Natikar 	dma_addr_t dma_address;
386947f312SBasavaraj Natikar };
396947f312SBasavaraj Natikar 
406947f312SBasavaraj Natikar struct amd_mp2_dev {
416947f312SBasavaraj Natikar 	struct pci_dev *pdev;
426947f312SBasavaraj Natikar 	struct amdtp_cl_data *cl_data;
436947f312SBasavaraj Natikar 	void __iomem *mmio;
44*93ce5e02SBasavaraj Natikar 	void __iomem *vsbase;
45*93ce5e02SBasavaraj Natikar 	const struct amd_sfh1_1_ops *sfh1_1_ops;
46786aa1b9SBasavaraj Natikar 	struct amd_mp2_ops *mp2_ops;
476947f312SBasavaraj Natikar 	struct amd_input_data in_data;
486947f312SBasavaraj Natikar 	/* mp2 active control status */
496947f312SBasavaraj Natikar 	u32 mp2_acs;
506947f312SBasavaraj Natikar };
516947f312SBasavaraj Natikar 
526947f312SBasavaraj Natikar struct amd_mp2_ops {
536947f312SBasavaraj Natikar 	void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
546947f312SBasavaraj Natikar 	void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);
556947f312SBasavaraj Natikar 	void (*stop_all)(struct amd_mp2_dev *privdata);
566947f312SBasavaraj Natikar 	int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
576947f312SBasavaraj Natikar 	void (*clear_intr)(struct amd_mp2_dev *privdata);
586947f312SBasavaraj Natikar 	int (*init_intr)(struct amd_mp2_dev *privdata);
596947f312SBasavaraj Natikar 	int (*discovery_status)(struct amd_mp2_dev *privdata);
609acadc72SBasavaraj Natikar 	void (*suspend)(struct amd_mp2_dev *mp2);
619acadc72SBasavaraj Natikar 	void (*resume)(struct amd_mp2_dev *mp2);
62722658f8SBasavaraj Natikar 	void (*remove)(void *privdata);
63786aa1b9SBasavaraj Natikar 	int (*get_rep_desc)(int sensor_idx, u8 rep_desc[]);
64786aa1b9SBasavaraj Natikar 	u32 (*get_desc_sz)(int sensor_idx, int descriptor_name);
65786aa1b9SBasavaraj Natikar 	u8 (*get_feat_rep)(int sensor_idx, int report_id, u8 *feature_report);
66786aa1b9SBasavaraj Natikar 	u8 (*get_in_rep)(u8 current_index, int sensor_idx, int report_id,
67786aa1b9SBasavaraj Natikar 			 struct amd_input_data *in_data);
686947f312SBasavaraj Natikar };
696947f312SBasavaraj Natikar 
70e7f535eaSBasavaraj Natikar void amd_sfh_work(struct work_struct *work);
71e7f535eaSBasavaraj Natikar void amd_sfh_work_buffer(struct work_struct *work);
72014730c4SBasavaraj Natikar void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata);
73014730c4SBasavaraj Natikar int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata);
74014730c4SBasavaraj Natikar void amd_sfh_clear_intr(struct amd_mp2_dev *privdata);
75014730c4SBasavaraj Natikar int amd_sfh_irq_init(struct amd_mp2_dev *privdata);
766947f312SBasavaraj Natikar #endif
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