1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2017 NVIDIA Corporation.
4  */
5 
6 #define HOST1X_HV_SYNCPT_PROT_EN			0x1ac4
7 #define HOST1X_HV_SYNCPT_PROT_EN_CH_EN			BIT(1)
8 #define HOST1X_HV_CH_KERNEL_FILTER_GBUFFER(x)		(0x2020 + (x * 4))
9 #define HOST1X_HV_CMDFIFO_PEEK_CTRL			0x233c
10 #define HOST1X_HV_CMDFIFO_PEEK_CTRL_ADDR(x)		(x)
11 #define HOST1X_HV_CMDFIFO_PEEK_CTRL_CHANNEL(x)		((x) << 16)
12 #define HOST1X_HV_CMDFIFO_PEEK_CTRL_ENABLE		BIT(31)
13 #define HOST1X_HV_CMDFIFO_PEEK_READ			0x2340
14 #define HOST1X_HV_CMDFIFO_PEEK_PTRS			0x2344
15 #define HOST1X_HV_CMDFIFO_PEEK_PTRS_WR_PTR_V(x)		(((x) >> 16) & 0xfff)
16 #define HOST1X_HV_CMDFIFO_PEEK_PTRS_RD_PTR_V(x)		((x) & 0xfff)
17 #define HOST1X_HV_CMDFIFO_SETUP(x)			(0x2588 + (x * 4))
18 #define HOST1X_HV_CMDFIFO_SETUP_LIMIT_V(x)		(((x) >> 16) & 0xfff)
19 #define HOST1X_HV_CMDFIFO_SETUP_BASE_V(x)		((x) & 0xfff)
20 #define HOST1X_HV_ICG_EN_OVERRIDE			0x2aa8
21