1e6fff4aaSThierry Reding /* 2e6fff4aaSThierry Reding * Copyright (c) 2013 NVIDIA Corporation. 3e6fff4aaSThierry Reding * 4e6fff4aaSThierry Reding * This program is free software; you can redistribute it and/or modify it 5e6fff4aaSThierry Reding * under the terms and conditions of the GNU General Public License, 6e6fff4aaSThierry Reding * version 2, as published by the Free Software Foundation. 7e6fff4aaSThierry Reding * 8e6fff4aaSThierry Reding * This program is distributed in the hope it will be useful, but WITHOUT 9e6fff4aaSThierry Reding * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10e6fff4aaSThierry Reding * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11e6fff4aaSThierry Reding * more details. 12e6fff4aaSThierry Reding * 13e6fff4aaSThierry Reding * You should have received a copy of the GNU General Public License 14e6fff4aaSThierry Reding * along with this program. If not, see <http://www.gnu.org/licenses/>. 15e6fff4aaSThierry Reding * 16e6fff4aaSThierry Reding */ 17e6fff4aaSThierry Reding 18e6fff4aaSThierry Reding /* 19e6fff4aaSThierry Reding * Function naming determines intended use: 20e6fff4aaSThierry Reding * 21e6fff4aaSThierry Reding * <x>_r(void) : Returns the offset for register <x>. 22e6fff4aaSThierry Reding * 23e6fff4aaSThierry Reding * <x>_w(void) : Returns the word offset for word (4 byte) element <x>. 24e6fff4aaSThierry Reding * 25e6fff4aaSThierry Reding * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits. 26e6fff4aaSThierry Reding * 27e6fff4aaSThierry Reding * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted 28e6fff4aaSThierry Reding * and masked to place it at field <y> of register <x>. This value 29e6fff4aaSThierry Reding * can be |'d with others to produce a full register value for 30e6fff4aaSThierry Reding * register <x>. 31e6fff4aaSThierry Reding * 32e6fff4aaSThierry Reding * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This 33e6fff4aaSThierry Reding * value can be ~'d and then &'d to clear the value of field <y> for 34e6fff4aaSThierry Reding * register <x>. 35e6fff4aaSThierry Reding * 36e6fff4aaSThierry Reding * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted 37e6fff4aaSThierry Reding * to place it at field <y> of register <x>. This value can be |'d 38e6fff4aaSThierry Reding * with others to produce a full register value for <x>. 39e6fff4aaSThierry Reding * 40e6fff4aaSThierry Reding * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register 41e6fff4aaSThierry Reding * <x> value 'r' after being shifted to place its LSB at bit 0. 42e6fff4aaSThierry Reding * This value is suitable for direct comparison with other unshifted 43e6fff4aaSThierry Reding * values appropriate for use in field <y> of register <x>. 44e6fff4aaSThierry Reding * 45e6fff4aaSThierry Reding * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for 46e6fff4aaSThierry Reding * field <y> of register <x>. This value is suitable for direct 47e6fff4aaSThierry Reding * comparison with unshifted values appropriate for use in field <y> 48e6fff4aaSThierry Reding * of register <x>. 49e6fff4aaSThierry Reding */ 50e6fff4aaSThierry Reding 51e6fff4aaSThierry Reding #ifndef HOST1X_HW_HOST1X04_SYNC_H 52e6fff4aaSThierry Reding #define HOST1X_HW_HOST1X04_SYNC_H 53e6fff4aaSThierry Reding 54e6fff4aaSThierry Reding #define REGISTER_STRIDE 4 55e6fff4aaSThierry Reding 56e6fff4aaSThierry Reding static inline u32 host1x_sync_syncpt_r(unsigned int id) 57e6fff4aaSThierry Reding { 58e6fff4aaSThierry Reding return 0xf80 + id * REGISTER_STRIDE; 59e6fff4aaSThierry Reding } 60e6fff4aaSThierry Reding #define HOST1X_SYNC_SYNCPT(id) \ 61e6fff4aaSThierry Reding host1x_sync_syncpt_r(id) 62e6fff4aaSThierry Reding static inline u32 host1x_sync_syncpt_thresh_cpu0_int_status_r(unsigned int id) 63e6fff4aaSThierry Reding { 64e6fff4aaSThierry Reding return 0xe80 + id * REGISTER_STRIDE; 65e6fff4aaSThierry Reding } 66e6fff4aaSThierry Reding #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(id) \ 67e6fff4aaSThierry Reding host1x_sync_syncpt_thresh_cpu0_int_status_r(id) 68e6fff4aaSThierry Reding static inline u32 host1x_sync_syncpt_thresh_int_disable_r(unsigned int id) 69e6fff4aaSThierry Reding { 70e6fff4aaSThierry Reding return 0xf00 + id * REGISTER_STRIDE; 71e6fff4aaSThierry Reding } 72e6fff4aaSThierry Reding #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(id) \ 73e6fff4aaSThierry Reding host1x_sync_syncpt_thresh_int_disable_r(id) 74e6fff4aaSThierry Reding static inline u32 host1x_sync_syncpt_thresh_int_enable_cpu0_r(unsigned int id) 75e6fff4aaSThierry Reding { 76e6fff4aaSThierry Reding return 0xf20 + id * REGISTER_STRIDE; 77e6fff4aaSThierry Reding } 78e6fff4aaSThierry Reding #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(id) \ 79e6fff4aaSThierry Reding host1x_sync_syncpt_thresh_int_enable_cpu0_r(id) 80e6fff4aaSThierry Reding static inline u32 host1x_sync_cf_setup_r(unsigned int channel) 81e6fff4aaSThierry Reding { 82e6fff4aaSThierry Reding return 0xc00 + channel * REGISTER_STRIDE; 83e6fff4aaSThierry Reding } 84e6fff4aaSThierry Reding #define HOST1X_SYNC_CF_SETUP(channel) \ 85e6fff4aaSThierry Reding host1x_sync_cf_setup_r(channel) 86e6fff4aaSThierry Reding static inline u32 host1x_sync_cf_setup_base_v(u32 r) 87e6fff4aaSThierry Reding { 88e6fff4aaSThierry Reding return (r >> 0) & 0x3ff; 89e6fff4aaSThierry Reding } 90e6fff4aaSThierry Reding #define HOST1X_SYNC_CF_SETUP_BASE_V(r) \ 91e6fff4aaSThierry Reding host1x_sync_cf_setup_base_v(r) 92e6fff4aaSThierry Reding static inline u32 host1x_sync_cf_setup_limit_v(u32 r) 93e6fff4aaSThierry Reding { 94e6fff4aaSThierry Reding return (r >> 16) & 0x3ff; 95e6fff4aaSThierry Reding } 96e6fff4aaSThierry Reding #define HOST1X_SYNC_CF_SETUP_LIMIT_V(r) \ 97e6fff4aaSThierry Reding host1x_sync_cf_setup_limit_v(r) 98e6fff4aaSThierry Reding static inline u32 host1x_sync_cmdproc_stop_r(void) 99e6fff4aaSThierry Reding { 100e6fff4aaSThierry Reding return 0xac; 101e6fff4aaSThierry Reding } 102e6fff4aaSThierry Reding #define HOST1X_SYNC_CMDPROC_STOP \ 103e6fff4aaSThierry Reding host1x_sync_cmdproc_stop_r() 104e6fff4aaSThierry Reding static inline u32 host1x_sync_ch_teardown_r(void) 105e6fff4aaSThierry Reding { 106e6fff4aaSThierry Reding return 0xb0; 107e6fff4aaSThierry Reding } 108e6fff4aaSThierry Reding #define HOST1X_SYNC_CH_TEARDOWN \ 109e6fff4aaSThierry Reding host1x_sync_ch_teardown_r() 110e6fff4aaSThierry Reding static inline u32 host1x_sync_usec_clk_r(void) 111e6fff4aaSThierry Reding { 112e6fff4aaSThierry Reding return 0x1a4; 113e6fff4aaSThierry Reding } 114e6fff4aaSThierry Reding #define HOST1X_SYNC_USEC_CLK \ 115e6fff4aaSThierry Reding host1x_sync_usec_clk_r() 116e6fff4aaSThierry Reding static inline u32 host1x_sync_ctxsw_timeout_cfg_r(void) 117e6fff4aaSThierry Reding { 118e6fff4aaSThierry Reding return 0x1a8; 119e6fff4aaSThierry Reding } 120e6fff4aaSThierry Reding #define HOST1X_SYNC_CTXSW_TIMEOUT_CFG \ 121e6fff4aaSThierry Reding host1x_sync_ctxsw_timeout_cfg_r() 122e6fff4aaSThierry Reding static inline u32 host1x_sync_ip_busy_timeout_r(void) 123e6fff4aaSThierry Reding { 124e6fff4aaSThierry Reding return 0x1bc; 125e6fff4aaSThierry Reding } 126e6fff4aaSThierry Reding #define HOST1X_SYNC_IP_BUSY_TIMEOUT \ 127e6fff4aaSThierry Reding host1x_sync_ip_busy_timeout_r() 128e6fff4aaSThierry Reding static inline u32 host1x_sync_mlock_owner_r(unsigned int id) 129e6fff4aaSThierry Reding { 130e6fff4aaSThierry Reding return 0x340 + id * REGISTER_STRIDE; 131e6fff4aaSThierry Reding } 132e6fff4aaSThierry Reding #define HOST1X_SYNC_MLOCK_OWNER(id) \ 133e6fff4aaSThierry Reding host1x_sync_mlock_owner_r(id) 1343fe2c7d4SDmitry Osipenko static inline u32 host1x_sync_mlock_owner_chid_v(u32 v) 135e6fff4aaSThierry Reding { 1363fe2c7d4SDmitry Osipenko return (v >> 8) & 0xf; 137e6fff4aaSThierry Reding } 1383fe2c7d4SDmitry Osipenko #define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ 1393fe2c7d4SDmitry Osipenko host1x_sync_mlock_owner_chid_v(v) 140e6fff4aaSThierry Reding static inline u32 host1x_sync_mlock_owner_cpu_owns_v(u32 r) 141e6fff4aaSThierry Reding { 142e6fff4aaSThierry Reding return (r >> 1) & 0x1; 143e6fff4aaSThierry Reding } 144e6fff4aaSThierry Reding #define HOST1X_SYNC_MLOCK_OWNER_CPU_OWNS_V(r) \ 145e6fff4aaSThierry Reding host1x_sync_mlock_owner_cpu_owns_v(r) 146e6fff4aaSThierry Reding static inline u32 host1x_sync_mlock_owner_ch_owns_v(u32 r) 147e6fff4aaSThierry Reding { 148e6fff4aaSThierry Reding return (r >> 0) & 0x1; 149e6fff4aaSThierry Reding } 150e6fff4aaSThierry Reding #define HOST1X_SYNC_MLOCK_OWNER_CH_OWNS_V(r) \ 151e6fff4aaSThierry Reding host1x_sync_mlock_owner_ch_owns_v(r) 152e6fff4aaSThierry Reding static inline u32 host1x_sync_syncpt_int_thresh_r(unsigned int id) 153e6fff4aaSThierry Reding { 154e6fff4aaSThierry Reding return 0x1380 + id * REGISTER_STRIDE; 155e6fff4aaSThierry Reding } 156e6fff4aaSThierry Reding #define HOST1X_SYNC_SYNCPT_INT_THRESH(id) \ 157e6fff4aaSThierry Reding host1x_sync_syncpt_int_thresh_r(id) 158e6fff4aaSThierry Reding static inline u32 host1x_sync_syncpt_base_r(unsigned int id) 159e6fff4aaSThierry Reding { 160e6fff4aaSThierry Reding return 0x600 + id * REGISTER_STRIDE; 161e6fff4aaSThierry Reding } 162e6fff4aaSThierry Reding #define HOST1X_SYNC_SYNCPT_BASE(id) \ 163e6fff4aaSThierry Reding host1x_sync_syncpt_base_r(id) 164e6fff4aaSThierry Reding static inline u32 host1x_sync_syncpt_cpu_incr_r(unsigned int id) 165e6fff4aaSThierry Reding { 166e6fff4aaSThierry Reding return 0xf60 + id * REGISTER_STRIDE; 167e6fff4aaSThierry Reding } 168e6fff4aaSThierry Reding #define HOST1X_SYNC_SYNCPT_CPU_INCR(id) \ 169e6fff4aaSThierry Reding host1x_sync_syncpt_cpu_incr_r(id) 170e6fff4aaSThierry Reding static inline u32 host1x_sync_cbread_r(unsigned int channel) 171e6fff4aaSThierry Reding { 172e6fff4aaSThierry Reding return 0xc80 + channel * REGISTER_STRIDE; 173e6fff4aaSThierry Reding } 174e6fff4aaSThierry Reding #define HOST1X_SYNC_CBREAD(channel) \ 175e6fff4aaSThierry Reding host1x_sync_cbread_r(channel) 176e6fff4aaSThierry Reding static inline u32 host1x_sync_cfpeek_ctrl_r(void) 177e6fff4aaSThierry Reding { 178e6fff4aaSThierry Reding return 0x74c; 179e6fff4aaSThierry Reding } 180e6fff4aaSThierry Reding #define HOST1X_SYNC_CFPEEK_CTRL \ 181e6fff4aaSThierry Reding host1x_sync_cfpeek_ctrl_r() 182e6fff4aaSThierry Reding static inline u32 host1x_sync_cfpeek_ctrl_addr_f(u32 v) 183e6fff4aaSThierry Reding { 184e6fff4aaSThierry Reding return (v & 0x3ff) << 0; 185e6fff4aaSThierry Reding } 186e6fff4aaSThierry Reding #define HOST1X_SYNC_CFPEEK_CTRL_ADDR_F(v) \ 187e6fff4aaSThierry Reding host1x_sync_cfpeek_ctrl_addr_f(v) 188e6fff4aaSThierry Reding static inline u32 host1x_sync_cfpeek_ctrl_channr_f(u32 v) 189e6fff4aaSThierry Reding { 190e6fff4aaSThierry Reding return (v & 0xf) << 16; 191e6fff4aaSThierry Reding } 192e6fff4aaSThierry Reding #define HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(v) \ 193e6fff4aaSThierry Reding host1x_sync_cfpeek_ctrl_channr_f(v) 194e6fff4aaSThierry Reding static inline u32 host1x_sync_cfpeek_ctrl_ena_f(u32 v) 195e6fff4aaSThierry Reding { 196e6fff4aaSThierry Reding return (v & 0x1) << 31; 197e6fff4aaSThierry Reding } 198e6fff4aaSThierry Reding #define HOST1X_SYNC_CFPEEK_CTRL_ENA_F(v) \ 199e6fff4aaSThierry Reding host1x_sync_cfpeek_ctrl_ena_f(v) 200e6fff4aaSThierry Reding static inline u32 host1x_sync_cfpeek_read_r(void) 201e6fff4aaSThierry Reding { 202e6fff4aaSThierry Reding return 0x750; 203e6fff4aaSThierry Reding } 204e6fff4aaSThierry Reding #define HOST1X_SYNC_CFPEEK_READ \ 205e6fff4aaSThierry Reding host1x_sync_cfpeek_read_r() 206e6fff4aaSThierry Reding static inline u32 host1x_sync_cfpeek_ptrs_r(void) 207e6fff4aaSThierry Reding { 208e6fff4aaSThierry Reding return 0x754; 209e6fff4aaSThierry Reding } 210e6fff4aaSThierry Reding #define HOST1X_SYNC_CFPEEK_PTRS \ 211e6fff4aaSThierry Reding host1x_sync_cfpeek_ptrs_r() 212e6fff4aaSThierry Reding static inline u32 host1x_sync_cfpeek_ptrs_cf_rd_ptr_v(u32 r) 213e6fff4aaSThierry Reding { 214e6fff4aaSThierry Reding return (r >> 0) & 0x3ff; 215e6fff4aaSThierry Reding } 216e6fff4aaSThierry Reding #define HOST1X_SYNC_CFPEEK_PTRS_CF_RD_PTR_V(r) \ 217e6fff4aaSThierry Reding host1x_sync_cfpeek_ptrs_cf_rd_ptr_v(r) 218e6fff4aaSThierry Reding static inline u32 host1x_sync_cfpeek_ptrs_cf_wr_ptr_v(u32 r) 219e6fff4aaSThierry Reding { 220e6fff4aaSThierry Reding return (r >> 16) & 0x3ff; 221e6fff4aaSThierry Reding } 222e6fff4aaSThierry Reding #define HOST1X_SYNC_CFPEEK_PTRS_CF_WR_PTR_V(r) \ 223e6fff4aaSThierry Reding host1x_sync_cfpeek_ptrs_cf_wr_ptr_v(r) 224e6fff4aaSThierry Reding static inline u32 host1x_sync_cbstat_r(unsigned int channel) 225e6fff4aaSThierry Reding { 226e6fff4aaSThierry Reding return 0xcc0 + channel * REGISTER_STRIDE; 227e6fff4aaSThierry Reding } 228e6fff4aaSThierry Reding #define HOST1X_SYNC_CBSTAT(channel) \ 229e6fff4aaSThierry Reding host1x_sync_cbstat_r(channel) 230e6fff4aaSThierry Reding static inline u32 host1x_sync_cbstat_cboffset_v(u32 r) 231e6fff4aaSThierry Reding { 232e6fff4aaSThierry Reding return (r >> 0) & 0xffff; 233e6fff4aaSThierry Reding } 234e6fff4aaSThierry Reding #define HOST1X_SYNC_CBSTAT_CBOFFSET_V(r) \ 235e6fff4aaSThierry Reding host1x_sync_cbstat_cboffset_v(r) 236e6fff4aaSThierry Reding static inline u32 host1x_sync_cbstat_cbclass_v(u32 r) 237e6fff4aaSThierry Reding { 238e6fff4aaSThierry Reding return (r >> 16) & 0x3ff; 239e6fff4aaSThierry Reding } 240e6fff4aaSThierry Reding #define HOST1X_SYNC_CBSTAT_CBCLASS_V(r) \ 241e6fff4aaSThierry Reding host1x_sync_cbstat_cbclass_v(r) 242e6fff4aaSThierry Reding 243e6fff4aaSThierry Reding #endif 244