15407f31bSThierry Reding /* 25407f31bSThierry Reding * Copyright (c) 2013 NVIDIA Corporation. 35407f31bSThierry Reding * 45407f31bSThierry Reding * This program is free software; you can redistribute it and/or modify it 55407f31bSThierry Reding * under the terms and conditions of the GNU General Public License, 65407f31bSThierry Reding * version 2, as published by the Free Software Foundation. 75407f31bSThierry Reding * 85407f31bSThierry Reding * This program is distributed in the hope it will be useful, but WITHOUT 95407f31bSThierry Reding * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 105407f31bSThierry Reding * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 115407f31bSThierry Reding * more details. 125407f31bSThierry Reding * 135407f31bSThierry Reding * You should have received a copy of the GNU General Public License 145407f31bSThierry Reding * along with this program. If not, see <http://www.gnu.org/licenses/>. 155407f31bSThierry Reding * 165407f31bSThierry Reding */ 175407f31bSThierry Reding 185407f31bSThierry Reding /* 195407f31bSThierry Reding * Function naming determines intended use: 205407f31bSThierry Reding * 215407f31bSThierry Reding * <x>_r(void) : Returns the offset for register <x>. 225407f31bSThierry Reding * 235407f31bSThierry Reding * <x>_w(void) : Returns the word offset for word (4 byte) element <x>. 245407f31bSThierry Reding * 255407f31bSThierry Reding * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits. 265407f31bSThierry Reding * 275407f31bSThierry Reding * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted 285407f31bSThierry Reding * and masked to place it at field <y> of register <x>. This value 295407f31bSThierry Reding * can be |'d with others to produce a full register value for 305407f31bSThierry Reding * register <x>. 315407f31bSThierry Reding * 325407f31bSThierry Reding * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This 335407f31bSThierry Reding * value can be ~'d and then &'d to clear the value of field <y> for 345407f31bSThierry Reding * register <x>. 355407f31bSThierry Reding * 365407f31bSThierry Reding * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted 375407f31bSThierry Reding * to place it at field <y> of register <x>. This value can be |'d 385407f31bSThierry Reding * with others to produce a full register value for <x>. 395407f31bSThierry Reding * 405407f31bSThierry Reding * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register 415407f31bSThierry Reding * <x> value 'r' after being shifted to place its LSB at bit 0. 425407f31bSThierry Reding * This value is suitable for direct comparison with other unshifted 435407f31bSThierry Reding * values appropriate for use in field <y> of register <x>. 445407f31bSThierry Reding * 455407f31bSThierry Reding * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for 465407f31bSThierry Reding * field <y> of register <x>. This value is suitable for direct 475407f31bSThierry Reding * comparison with unshifted values appropriate for use in field <y> 485407f31bSThierry Reding * of register <x>. 495407f31bSThierry Reding */ 505407f31bSThierry Reding 515407f31bSThierry Reding #ifndef HOST1X_HW_HOST1X02_SYNC_H 525407f31bSThierry Reding #define HOST1X_HW_HOST1X02_SYNC_H 535407f31bSThierry Reding 545407f31bSThierry Reding #define REGISTER_STRIDE 4 555407f31bSThierry Reding 565407f31bSThierry Reding static inline u32 host1x_sync_syncpt_r(unsigned int id) 575407f31bSThierry Reding { 585407f31bSThierry Reding return 0x400 + id * REGISTER_STRIDE; 595407f31bSThierry Reding } 605407f31bSThierry Reding #define HOST1X_SYNC_SYNCPT(id) \ 615407f31bSThierry Reding host1x_sync_syncpt_r(id) 625407f31bSThierry Reding static inline u32 host1x_sync_syncpt_thresh_cpu0_int_status_r(unsigned int id) 635407f31bSThierry Reding { 645407f31bSThierry Reding return 0x40 + id * REGISTER_STRIDE; 655407f31bSThierry Reding } 665407f31bSThierry Reding #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(id) \ 675407f31bSThierry Reding host1x_sync_syncpt_thresh_cpu0_int_status_r(id) 685407f31bSThierry Reding static inline u32 host1x_sync_syncpt_thresh_int_disable_r(unsigned int id) 695407f31bSThierry Reding { 705407f31bSThierry Reding return 0x60 + id * REGISTER_STRIDE; 715407f31bSThierry Reding } 725407f31bSThierry Reding #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(id) \ 735407f31bSThierry Reding host1x_sync_syncpt_thresh_int_disable_r(id) 745407f31bSThierry Reding static inline u32 host1x_sync_syncpt_thresh_int_enable_cpu0_r(unsigned int id) 755407f31bSThierry Reding { 765407f31bSThierry Reding return 0x68 + id * REGISTER_STRIDE; 775407f31bSThierry Reding } 785407f31bSThierry Reding #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(id) \ 795407f31bSThierry Reding host1x_sync_syncpt_thresh_int_enable_cpu0_r(id) 805407f31bSThierry Reding static inline u32 host1x_sync_cf_setup_r(unsigned int channel) 815407f31bSThierry Reding { 825407f31bSThierry Reding return 0x80 + channel * REGISTER_STRIDE; 835407f31bSThierry Reding } 845407f31bSThierry Reding #define HOST1X_SYNC_CF_SETUP(channel) \ 855407f31bSThierry Reding host1x_sync_cf_setup_r(channel) 865407f31bSThierry Reding static inline u32 host1x_sync_cf_setup_base_v(u32 r) 875407f31bSThierry Reding { 885407f31bSThierry Reding return (r >> 0) & 0x3ff; 895407f31bSThierry Reding } 905407f31bSThierry Reding #define HOST1X_SYNC_CF_SETUP_BASE_V(r) \ 915407f31bSThierry Reding host1x_sync_cf_setup_base_v(r) 925407f31bSThierry Reding static inline u32 host1x_sync_cf_setup_limit_v(u32 r) 935407f31bSThierry Reding { 945407f31bSThierry Reding return (r >> 16) & 0x3ff; 955407f31bSThierry Reding } 965407f31bSThierry Reding #define HOST1X_SYNC_CF_SETUP_LIMIT_V(r) \ 975407f31bSThierry Reding host1x_sync_cf_setup_limit_v(r) 985407f31bSThierry Reding static inline u32 host1x_sync_cmdproc_stop_r(void) 995407f31bSThierry Reding { 1005407f31bSThierry Reding return 0xac; 1015407f31bSThierry Reding } 1025407f31bSThierry Reding #define HOST1X_SYNC_CMDPROC_STOP \ 1035407f31bSThierry Reding host1x_sync_cmdproc_stop_r() 1045407f31bSThierry Reding static inline u32 host1x_sync_ch_teardown_r(void) 1055407f31bSThierry Reding { 1065407f31bSThierry Reding return 0xb0; 1075407f31bSThierry Reding } 1085407f31bSThierry Reding #define HOST1X_SYNC_CH_TEARDOWN \ 1095407f31bSThierry Reding host1x_sync_ch_teardown_r() 1105407f31bSThierry Reding static inline u32 host1x_sync_usec_clk_r(void) 1115407f31bSThierry Reding { 1125407f31bSThierry Reding return 0x1a4; 1135407f31bSThierry Reding } 1145407f31bSThierry Reding #define HOST1X_SYNC_USEC_CLK \ 1155407f31bSThierry Reding host1x_sync_usec_clk_r() 1165407f31bSThierry Reding static inline u32 host1x_sync_ctxsw_timeout_cfg_r(void) 1175407f31bSThierry Reding { 1185407f31bSThierry Reding return 0x1a8; 1195407f31bSThierry Reding } 1205407f31bSThierry Reding #define HOST1X_SYNC_CTXSW_TIMEOUT_CFG \ 1215407f31bSThierry Reding host1x_sync_ctxsw_timeout_cfg_r() 1225407f31bSThierry Reding static inline u32 host1x_sync_ip_busy_timeout_r(void) 1235407f31bSThierry Reding { 1245407f31bSThierry Reding return 0x1bc; 1255407f31bSThierry Reding } 1265407f31bSThierry Reding #define HOST1X_SYNC_IP_BUSY_TIMEOUT \ 1275407f31bSThierry Reding host1x_sync_ip_busy_timeout_r() 1285407f31bSThierry Reding static inline u32 host1x_sync_mlock_owner_r(unsigned int id) 1295407f31bSThierry Reding { 1305407f31bSThierry Reding return 0x340 + id * REGISTER_STRIDE; 1315407f31bSThierry Reding } 1325407f31bSThierry Reding #define HOST1X_SYNC_MLOCK_OWNER(id) \ 1335407f31bSThierry Reding host1x_sync_mlock_owner_r(id) 1345407f31bSThierry Reding static inline u32 host1x_sync_mlock_owner_chid_f(u32 v) 1355407f31bSThierry Reding { 1365407f31bSThierry Reding return (v & 0xf) << 8; 1375407f31bSThierry Reding } 1385407f31bSThierry Reding #define HOST1X_SYNC_MLOCK_OWNER_CHID_F(v) \ 1395407f31bSThierry Reding host1x_sync_mlock_owner_chid_f(v) 1405407f31bSThierry Reding static inline u32 host1x_sync_mlock_owner_cpu_owns_v(u32 r) 1415407f31bSThierry Reding { 1425407f31bSThierry Reding return (r >> 1) & 0x1; 1435407f31bSThierry Reding } 1445407f31bSThierry Reding #define HOST1X_SYNC_MLOCK_OWNER_CPU_OWNS_V(r) \ 1455407f31bSThierry Reding host1x_sync_mlock_owner_cpu_owns_v(r) 1465407f31bSThierry Reding static inline u32 host1x_sync_mlock_owner_ch_owns_v(u32 r) 1475407f31bSThierry Reding { 1485407f31bSThierry Reding return (r >> 0) & 0x1; 1495407f31bSThierry Reding } 1505407f31bSThierry Reding #define HOST1X_SYNC_MLOCK_OWNER_CH_OWNS_V(r) \ 1515407f31bSThierry Reding host1x_sync_mlock_owner_ch_owns_v(r) 1525407f31bSThierry Reding static inline u32 host1x_sync_syncpt_int_thresh_r(unsigned int id) 1535407f31bSThierry Reding { 1545407f31bSThierry Reding return 0x500 + id * REGISTER_STRIDE; 1555407f31bSThierry Reding } 1565407f31bSThierry Reding #define HOST1X_SYNC_SYNCPT_INT_THRESH(id) \ 1575407f31bSThierry Reding host1x_sync_syncpt_int_thresh_r(id) 1585407f31bSThierry Reding static inline u32 host1x_sync_syncpt_base_r(unsigned int id) 1595407f31bSThierry Reding { 1605407f31bSThierry Reding return 0x600 + id * REGISTER_STRIDE; 1615407f31bSThierry Reding } 1625407f31bSThierry Reding #define HOST1X_SYNC_SYNCPT_BASE(id) \ 1635407f31bSThierry Reding host1x_sync_syncpt_base_r(id) 1645407f31bSThierry Reding static inline u32 host1x_sync_syncpt_cpu_incr_r(unsigned int id) 1655407f31bSThierry Reding { 1665407f31bSThierry Reding return 0x700 + id * REGISTER_STRIDE; 1675407f31bSThierry Reding } 1685407f31bSThierry Reding #define HOST1X_SYNC_SYNCPT_CPU_INCR(id) \ 1695407f31bSThierry Reding host1x_sync_syncpt_cpu_incr_r(id) 1705407f31bSThierry Reding static inline u32 host1x_sync_cbread_r(unsigned int channel) 1715407f31bSThierry Reding { 1725407f31bSThierry Reding return 0x720 + channel * REGISTER_STRIDE; 1735407f31bSThierry Reding } 1745407f31bSThierry Reding #define HOST1X_SYNC_CBREAD(channel) \ 1755407f31bSThierry Reding host1x_sync_cbread_r(channel) 1765407f31bSThierry Reding static inline u32 host1x_sync_cfpeek_ctrl_r(void) 1775407f31bSThierry Reding { 1785407f31bSThierry Reding return 0x74c; 1795407f31bSThierry Reding } 1805407f31bSThierry Reding #define HOST1X_SYNC_CFPEEK_CTRL \ 1815407f31bSThierry Reding host1x_sync_cfpeek_ctrl_r() 1825407f31bSThierry Reding static inline u32 host1x_sync_cfpeek_ctrl_addr_f(u32 v) 1835407f31bSThierry Reding { 1845407f31bSThierry Reding return (v & 0x3ff) << 0; 1855407f31bSThierry Reding } 1865407f31bSThierry Reding #define HOST1X_SYNC_CFPEEK_CTRL_ADDR_F(v) \ 1875407f31bSThierry Reding host1x_sync_cfpeek_ctrl_addr_f(v) 1885407f31bSThierry Reding static inline u32 host1x_sync_cfpeek_ctrl_channr_f(u32 v) 1895407f31bSThierry Reding { 1905407f31bSThierry Reding return (v & 0xf) << 16; 1915407f31bSThierry Reding } 1925407f31bSThierry Reding #define HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(v) \ 1935407f31bSThierry Reding host1x_sync_cfpeek_ctrl_channr_f(v) 1945407f31bSThierry Reding static inline u32 host1x_sync_cfpeek_ctrl_ena_f(u32 v) 1955407f31bSThierry Reding { 1965407f31bSThierry Reding return (v & 0x1) << 31; 1975407f31bSThierry Reding } 1985407f31bSThierry Reding #define HOST1X_SYNC_CFPEEK_CTRL_ENA_F(v) \ 1995407f31bSThierry Reding host1x_sync_cfpeek_ctrl_ena_f(v) 2005407f31bSThierry Reding static inline u32 host1x_sync_cfpeek_read_r(void) 2015407f31bSThierry Reding { 2025407f31bSThierry Reding return 0x750; 2035407f31bSThierry Reding } 2045407f31bSThierry Reding #define HOST1X_SYNC_CFPEEK_READ \ 2055407f31bSThierry Reding host1x_sync_cfpeek_read_r() 2065407f31bSThierry Reding static inline u32 host1x_sync_cfpeek_ptrs_r(void) 2075407f31bSThierry Reding { 2085407f31bSThierry Reding return 0x754; 2095407f31bSThierry Reding } 2105407f31bSThierry Reding #define HOST1X_SYNC_CFPEEK_PTRS \ 2115407f31bSThierry Reding host1x_sync_cfpeek_ptrs_r() 2125407f31bSThierry Reding static inline u32 host1x_sync_cfpeek_ptrs_cf_rd_ptr_v(u32 r) 2135407f31bSThierry Reding { 2145407f31bSThierry Reding return (r >> 0) & 0x3ff; 2155407f31bSThierry Reding } 2165407f31bSThierry Reding #define HOST1X_SYNC_CFPEEK_PTRS_CF_RD_PTR_V(r) \ 2175407f31bSThierry Reding host1x_sync_cfpeek_ptrs_cf_rd_ptr_v(r) 2185407f31bSThierry Reding static inline u32 host1x_sync_cfpeek_ptrs_cf_wr_ptr_v(u32 r) 2195407f31bSThierry Reding { 2205407f31bSThierry Reding return (r >> 16) & 0x3ff; 2215407f31bSThierry Reding } 2225407f31bSThierry Reding #define HOST1X_SYNC_CFPEEK_PTRS_CF_WR_PTR_V(r) \ 2235407f31bSThierry Reding host1x_sync_cfpeek_ptrs_cf_wr_ptr_v(r) 2245407f31bSThierry Reding static inline u32 host1x_sync_cbstat_r(unsigned int channel) 2255407f31bSThierry Reding { 2265407f31bSThierry Reding return 0x758 + channel * REGISTER_STRIDE; 2275407f31bSThierry Reding } 2285407f31bSThierry Reding #define HOST1X_SYNC_CBSTAT(channel) \ 2295407f31bSThierry Reding host1x_sync_cbstat_r(channel) 2305407f31bSThierry Reding static inline u32 host1x_sync_cbstat_cboffset_v(u32 r) 2315407f31bSThierry Reding { 2325407f31bSThierry Reding return (r >> 0) & 0xffff; 2335407f31bSThierry Reding } 2345407f31bSThierry Reding #define HOST1X_SYNC_CBSTAT_CBOFFSET_V(r) \ 2355407f31bSThierry Reding host1x_sync_cbstat_cboffset_v(r) 2365407f31bSThierry Reding static inline u32 host1x_sync_cbstat_cbclass_v(u32 r) 2375407f31bSThierry Reding { 2385407f31bSThierry Reding return (r >> 16) & 0x3ff; 2395407f31bSThierry Reding } 2405407f31bSThierry Reding #define HOST1X_SYNC_CBSTAT_CBCLASS_V(r) \ 2415407f31bSThierry Reding host1x_sync_cbstat_cbclass_v(r) 2425407f31bSThierry Reding 2435407f31bSThierry Reding #endif 244