175471687STerje Bergstrom /* 275471687STerje Bergstrom * Copyright (c) 2012-2013, NVIDIA Corporation. 375471687STerje Bergstrom * 475471687STerje Bergstrom * This program is free software; you can redistribute it and/or modify it 575471687STerje Bergstrom * under the terms and conditions of the GNU General Public License, 675471687STerje Bergstrom * version 2, as published by the Free Software Foundation. 775471687STerje Bergstrom * 875471687STerje Bergstrom * This program is distributed in the hope it will be useful, but WITHOUT 975471687STerje Bergstrom * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1075471687STerje Bergstrom * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1175471687STerje Bergstrom * more details. 1275471687STerje Bergstrom * 1375471687STerje Bergstrom * You should have received a copy of the GNU General Public License 1475471687STerje Bergstrom * along with this program. If not, see <http://www.gnu.org/licenses/>. 1575471687STerje Bergstrom * 1675471687STerje Bergstrom */ 1775471687STerje Bergstrom 1875471687STerje Bergstrom /* 1975471687STerje Bergstrom * Function naming determines intended use: 2075471687STerje Bergstrom * 2175471687STerje Bergstrom * <x>_r(void) : Returns the offset for register <x>. 2275471687STerje Bergstrom * 2375471687STerje Bergstrom * <x>_w(void) : Returns the word offset for word (4 byte) element <x>. 2475471687STerje Bergstrom * 2575471687STerje Bergstrom * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits. 2675471687STerje Bergstrom * 2775471687STerje Bergstrom * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted 2875471687STerje Bergstrom * and masked to place it at field <y> of register <x>. This value 2975471687STerje Bergstrom * can be |'d with others to produce a full register value for 3075471687STerje Bergstrom * register <x>. 3175471687STerje Bergstrom * 3275471687STerje Bergstrom * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This 3375471687STerje Bergstrom * value can be ~'d and then &'d to clear the value of field <y> for 3475471687STerje Bergstrom * register <x>. 3575471687STerje Bergstrom * 3675471687STerje Bergstrom * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted 3775471687STerje Bergstrom * to place it at field <y> of register <x>. This value can be |'d 3875471687STerje Bergstrom * with others to produce a full register value for <x>. 3975471687STerje Bergstrom * 4075471687STerje Bergstrom * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register 4175471687STerje Bergstrom * <x> value 'r' after being shifted to place its LSB at bit 0. 4275471687STerje Bergstrom * This value is suitable for direct comparison with other unshifted 4375471687STerje Bergstrom * values appropriate for use in field <y> of register <x>. 4475471687STerje Bergstrom * 4575471687STerje Bergstrom * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for 4675471687STerje Bergstrom * field <y> of register <x>. This value is suitable for direct 4775471687STerje Bergstrom * comparison with unshifted values appropriate for use in field <y> 4875471687STerje Bergstrom * of register <x>. 4975471687STerje Bergstrom */ 5075471687STerje Bergstrom 5175471687STerje Bergstrom #ifndef __hw_host1x01_sync_h__ 5275471687STerje Bergstrom #define __hw_host1x01_sync_h__ 5375471687STerje Bergstrom 5475471687STerje Bergstrom #define REGISTER_STRIDE 4 5575471687STerje Bergstrom 5675471687STerje Bergstrom static inline u32 host1x_sync_syncpt_r(unsigned int id) 5775471687STerje Bergstrom { 5875471687STerje Bergstrom return 0x400 + id * REGISTER_STRIDE; 5975471687STerje Bergstrom } 6075471687STerje Bergstrom #define HOST1X_SYNC_SYNCPT(id) \ 6175471687STerje Bergstrom host1x_sync_syncpt_r(id) 627ede0b0bSTerje Bergstrom static inline u32 host1x_sync_syncpt_thresh_cpu0_int_status_r(unsigned int id) 637ede0b0bSTerje Bergstrom { 647ede0b0bSTerje Bergstrom return 0x40 + id * REGISTER_STRIDE; 657ede0b0bSTerje Bergstrom } 667ede0b0bSTerje Bergstrom #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(id) \ 677ede0b0bSTerje Bergstrom host1x_sync_syncpt_thresh_cpu0_int_status_r(id) 687ede0b0bSTerje Bergstrom static inline u32 host1x_sync_syncpt_thresh_int_disable_r(unsigned int id) 697ede0b0bSTerje Bergstrom { 707ede0b0bSTerje Bergstrom return 0x60 + id * REGISTER_STRIDE; 717ede0b0bSTerje Bergstrom } 727ede0b0bSTerje Bergstrom #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(id) \ 737ede0b0bSTerje Bergstrom host1x_sync_syncpt_thresh_int_disable_r(id) 747ede0b0bSTerje Bergstrom static inline u32 host1x_sync_syncpt_thresh_int_enable_cpu0_r(unsigned int id) 757ede0b0bSTerje Bergstrom { 767ede0b0bSTerje Bergstrom return 0x68 + id * REGISTER_STRIDE; 777ede0b0bSTerje Bergstrom } 787ede0b0bSTerje Bergstrom #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(id) \ 797ede0b0bSTerje Bergstrom host1x_sync_syncpt_thresh_int_enable_cpu0_r(id) 806236451dSTerje Bergstrom static inline u32 host1x_sync_cf_setup_r(unsigned int channel) 816236451dSTerje Bergstrom { 826236451dSTerje Bergstrom return 0x80 + channel * REGISTER_STRIDE; 836236451dSTerje Bergstrom } 846236451dSTerje Bergstrom #define HOST1X_SYNC_CF_SETUP(channel) \ 856236451dSTerje Bergstrom host1x_sync_cf_setup_r(channel) 866236451dSTerje Bergstrom static inline u32 host1x_sync_cf_setup_base_v(u32 r) 876236451dSTerje Bergstrom { 886236451dSTerje Bergstrom return (r >> 0) & 0x1ff; 896236451dSTerje Bergstrom } 906236451dSTerje Bergstrom #define HOST1X_SYNC_CF_SETUP_BASE_V(r) \ 916236451dSTerje Bergstrom host1x_sync_cf_setup_base_v(r) 926236451dSTerje Bergstrom static inline u32 host1x_sync_cf_setup_limit_v(u32 r) 936236451dSTerje Bergstrom { 946236451dSTerje Bergstrom return (r >> 16) & 0x1ff; 956236451dSTerje Bergstrom } 966236451dSTerje Bergstrom #define HOST1X_SYNC_CF_SETUP_LIMIT_V(r) \ 976236451dSTerje Bergstrom host1x_sync_cf_setup_limit_v(r) 986579324aSTerje Bergstrom static inline u32 host1x_sync_cmdproc_stop_r(void) 996579324aSTerje Bergstrom { 1006579324aSTerje Bergstrom return 0xac; 1016579324aSTerje Bergstrom } 1026579324aSTerje Bergstrom #define HOST1X_SYNC_CMDPROC_STOP \ 1036579324aSTerje Bergstrom host1x_sync_cmdproc_stop_r() 1046579324aSTerje Bergstrom static inline u32 host1x_sync_ch_teardown_r(void) 1056579324aSTerje Bergstrom { 1066579324aSTerje Bergstrom return 0xb0; 1076579324aSTerje Bergstrom } 1086579324aSTerje Bergstrom #define HOST1X_SYNC_CH_TEARDOWN \ 1096579324aSTerje Bergstrom host1x_sync_ch_teardown_r() 1107ede0b0bSTerje Bergstrom static inline u32 host1x_sync_usec_clk_r(void) 1117ede0b0bSTerje Bergstrom { 1127ede0b0bSTerje Bergstrom return 0x1a4; 1137ede0b0bSTerje Bergstrom } 1147ede0b0bSTerje Bergstrom #define HOST1X_SYNC_USEC_CLK \ 1157ede0b0bSTerje Bergstrom host1x_sync_usec_clk_r() 1167ede0b0bSTerje Bergstrom static inline u32 host1x_sync_ctxsw_timeout_cfg_r(void) 1177ede0b0bSTerje Bergstrom { 1187ede0b0bSTerje Bergstrom return 0x1a8; 1197ede0b0bSTerje Bergstrom } 1207ede0b0bSTerje Bergstrom #define HOST1X_SYNC_CTXSW_TIMEOUT_CFG \ 1217ede0b0bSTerje Bergstrom host1x_sync_ctxsw_timeout_cfg_r() 1227ede0b0bSTerje Bergstrom static inline u32 host1x_sync_ip_busy_timeout_r(void) 1237ede0b0bSTerje Bergstrom { 1247ede0b0bSTerje Bergstrom return 0x1bc; 1257ede0b0bSTerje Bergstrom } 1267ede0b0bSTerje Bergstrom #define HOST1X_SYNC_IP_BUSY_TIMEOUT \ 1277ede0b0bSTerje Bergstrom host1x_sync_ip_busy_timeout_r() 1286236451dSTerje Bergstrom static inline u32 host1x_sync_mlock_owner_r(unsigned int id) 1296236451dSTerje Bergstrom { 1306236451dSTerje Bergstrom return 0x340 + id * REGISTER_STRIDE; 1316236451dSTerje Bergstrom } 1326236451dSTerje Bergstrom #define HOST1X_SYNC_MLOCK_OWNER(id) \ 1336236451dSTerje Bergstrom host1x_sync_mlock_owner_r(id) 1346236451dSTerje Bergstrom static inline u32 host1x_sync_mlock_owner_chid_f(u32 v) 1356236451dSTerje Bergstrom { 1366236451dSTerje Bergstrom return (v & 0xf) << 8; 1376236451dSTerje Bergstrom } 1386236451dSTerje Bergstrom #define HOST1X_SYNC_MLOCK_OWNER_CHID_F(v) \ 1396236451dSTerje Bergstrom host1x_sync_mlock_owner_chid_f(v) 1406236451dSTerje Bergstrom static inline u32 host1x_sync_mlock_owner_cpu_owns_v(u32 r) 1416236451dSTerje Bergstrom { 1426236451dSTerje Bergstrom return (r >> 1) & 0x1; 1436236451dSTerje Bergstrom } 1446236451dSTerje Bergstrom #define HOST1X_SYNC_MLOCK_OWNER_CPU_OWNS_V(r) \ 1456236451dSTerje Bergstrom host1x_sync_mlock_owner_cpu_owns_v(r) 1466236451dSTerje Bergstrom static inline u32 host1x_sync_mlock_owner_ch_owns_v(u32 r) 1476236451dSTerje Bergstrom { 1486236451dSTerje Bergstrom return (r >> 0) & 0x1; 1496236451dSTerje Bergstrom } 1506236451dSTerje Bergstrom #define HOST1X_SYNC_MLOCK_OWNER_CH_OWNS_V(r) \ 1516236451dSTerje Bergstrom host1x_sync_mlock_owner_ch_owns_v(r) 1527ede0b0bSTerje Bergstrom static inline u32 host1x_sync_syncpt_int_thresh_r(unsigned int id) 1537ede0b0bSTerje Bergstrom { 1547ede0b0bSTerje Bergstrom return 0x500 + id * REGISTER_STRIDE; 1557ede0b0bSTerje Bergstrom } 1567ede0b0bSTerje Bergstrom #define HOST1X_SYNC_SYNCPT_INT_THRESH(id) \ 1577ede0b0bSTerje Bergstrom host1x_sync_syncpt_int_thresh_r(id) 15875471687STerje Bergstrom static inline u32 host1x_sync_syncpt_base_r(unsigned int id) 15975471687STerje Bergstrom { 16075471687STerje Bergstrom return 0x600 + id * REGISTER_STRIDE; 16175471687STerje Bergstrom } 16275471687STerje Bergstrom #define HOST1X_SYNC_SYNCPT_BASE(id) \ 16375471687STerje Bergstrom host1x_sync_syncpt_base_r(id) 16475471687STerje Bergstrom static inline u32 host1x_sync_syncpt_cpu_incr_r(unsigned int id) 16575471687STerje Bergstrom { 16675471687STerje Bergstrom return 0x700 + id * REGISTER_STRIDE; 16775471687STerje Bergstrom } 16875471687STerje Bergstrom #define HOST1X_SYNC_SYNCPT_CPU_INCR(id) \ 16975471687STerje Bergstrom host1x_sync_syncpt_cpu_incr_r(id) 1706236451dSTerje Bergstrom static inline u32 host1x_sync_cbread_r(unsigned int channel) 1716236451dSTerje Bergstrom { 1726236451dSTerje Bergstrom return 0x720 + channel * REGISTER_STRIDE; 1736236451dSTerje Bergstrom } 1746236451dSTerje Bergstrom #define HOST1X_SYNC_CBREAD(channel) \ 1756236451dSTerje Bergstrom host1x_sync_cbread_r(channel) 1766236451dSTerje Bergstrom static inline u32 host1x_sync_cfpeek_ctrl_r(void) 1776236451dSTerje Bergstrom { 1786236451dSTerje Bergstrom return 0x74c; 1796236451dSTerje Bergstrom } 1806236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_CTRL \ 1816236451dSTerje Bergstrom host1x_sync_cfpeek_ctrl_r() 1826236451dSTerje Bergstrom static inline u32 host1x_sync_cfpeek_ctrl_addr_f(u32 v) 1836236451dSTerje Bergstrom { 1846236451dSTerje Bergstrom return (v & 0x1ff) << 0; 1856236451dSTerje Bergstrom } 1866236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_CTRL_ADDR_F(v) \ 1876236451dSTerje Bergstrom host1x_sync_cfpeek_ctrl_addr_f(v) 1886236451dSTerje Bergstrom static inline u32 host1x_sync_cfpeek_ctrl_channr_f(u32 v) 1896236451dSTerje Bergstrom { 1906236451dSTerje Bergstrom return (v & 0x7) << 16; 1916236451dSTerje Bergstrom } 1926236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(v) \ 1936236451dSTerje Bergstrom host1x_sync_cfpeek_ctrl_channr_f(v) 1946236451dSTerje Bergstrom static inline u32 host1x_sync_cfpeek_ctrl_ena_f(u32 v) 1956236451dSTerje Bergstrom { 1966236451dSTerje Bergstrom return (v & 0x1) << 31; 1976236451dSTerje Bergstrom } 1986236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_CTRL_ENA_F(v) \ 1996236451dSTerje Bergstrom host1x_sync_cfpeek_ctrl_ena_f(v) 2006236451dSTerje Bergstrom static inline u32 host1x_sync_cfpeek_read_r(void) 2016236451dSTerje Bergstrom { 2026236451dSTerje Bergstrom return 0x750; 2036236451dSTerje Bergstrom } 2046236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_READ \ 2056236451dSTerje Bergstrom host1x_sync_cfpeek_read_r() 2066236451dSTerje Bergstrom static inline u32 host1x_sync_cfpeek_ptrs_r(void) 2076236451dSTerje Bergstrom { 2086236451dSTerje Bergstrom return 0x754; 2096236451dSTerje Bergstrom } 2106236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_PTRS \ 2116236451dSTerje Bergstrom host1x_sync_cfpeek_ptrs_r() 2126236451dSTerje Bergstrom static inline u32 host1x_sync_cfpeek_ptrs_cf_rd_ptr_v(u32 r) 2136236451dSTerje Bergstrom { 2146236451dSTerje Bergstrom return (r >> 0) & 0x1ff; 2156236451dSTerje Bergstrom } 2166236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_PTRS_CF_RD_PTR_V(r) \ 2176236451dSTerje Bergstrom host1x_sync_cfpeek_ptrs_cf_rd_ptr_v(r) 2186236451dSTerje Bergstrom static inline u32 host1x_sync_cfpeek_ptrs_cf_wr_ptr_v(u32 r) 2196236451dSTerje Bergstrom { 2206236451dSTerje Bergstrom return (r >> 16) & 0x1ff; 2216236451dSTerje Bergstrom } 2226236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_PTRS_CF_WR_PTR_V(r) \ 2236236451dSTerje Bergstrom host1x_sync_cfpeek_ptrs_cf_wr_ptr_v(r) 2246236451dSTerje Bergstrom static inline u32 host1x_sync_cbstat_r(unsigned int channel) 2256236451dSTerje Bergstrom { 2266236451dSTerje Bergstrom return 0x758 + channel * REGISTER_STRIDE; 2276236451dSTerje Bergstrom } 2286236451dSTerje Bergstrom #define HOST1X_SYNC_CBSTAT(channel) \ 2296236451dSTerje Bergstrom host1x_sync_cbstat_r(channel) 2306236451dSTerje Bergstrom static inline u32 host1x_sync_cbstat_cboffset_v(u32 r) 2316236451dSTerje Bergstrom { 2326236451dSTerje Bergstrom return (r >> 0) & 0xffff; 2336236451dSTerje Bergstrom } 2346236451dSTerje Bergstrom #define HOST1X_SYNC_CBSTAT_CBOFFSET_V(r) \ 2356236451dSTerje Bergstrom host1x_sync_cbstat_cboffset_v(r) 2366236451dSTerje Bergstrom static inline u32 host1x_sync_cbstat_cbclass_v(u32 r) 2376236451dSTerje Bergstrom { 2386236451dSTerje Bergstrom return (r >> 16) & 0x3ff; 2396236451dSTerje Bergstrom } 2406236451dSTerje Bergstrom #define HOST1X_SYNC_CBSTAT_CBCLASS_V(r) \ 2416236451dSTerje Bergstrom host1x_sync_cbstat_cbclass_v(r) 2426236451dSTerje Bergstrom 24375471687STerje Bergstrom #endif /* __hw_host1x01_sync_h__ */ 244