19952f691SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 275471687STerje Bergstrom /* 375471687STerje Bergstrom * Copyright (c) 2012-2013, NVIDIA Corporation. 475471687STerje Bergstrom */ 575471687STerje Bergstrom 675471687STerje Bergstrom /* 775471687STerje Bergstrom * Function naming determines intended use: 875471687STerje Bergstrom * 975471687STerje Bergstrom * <x>_r(void) : Returns the offset for register <x>. 1075471687STerje Bergstrom * 1175471687STerje Bergstrom * <x>_w(void) : Returns the word offset for word (4 byte) element <x>. 1275471687STerje Bergstrom * 1375471687STerje Bergstrom * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits. 1475471687STerje Bergstrom * 1575471687STerje Bergstrom * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted 1675471687STerje Bergstrom * and masked to place it at field <y> of register <x>. This value 1775471687STerje Bergstrom * can be |'d with others to produce a full register value for 1875471687STerje Bergstrom * register <x>. 1975471687STerje Bergstrom * 2075471687STerje Bergstrom * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This 2175471687STerje Bergstrom * value can be ~'d and then &'d to clear the value of field <y> for 2275471687STerje Bergstrom * register <x>. 2375471687STerje Bergstrom * 2475471687STerje Bergstrom * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted 2575471687STerje Bergstrom * to place it at field <y> of register <x>. This value can be |'d 2675471687STerje Bergstrom * with others to produce a full register value for <x>. 2775471687STerje Bergstrom * 2875471687STerje Bergstrom * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register 2975471687STerje Bergstrom * <x> value 'r' after being shifted to place its LSB at bit 0. 3075471687STerje Bergstrom * This value is suitable for direct comparison with other unshifted 3175471687STerje Bergstrom * values appropriate for use in field <y> of register <x>. 3275471687STerje Bergstrom * 3375471687STerje Bergstrom * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for 3475471687STerje Bergstrom * field <y> of register <x>. This value is suitable for direct 3575471687STerje Bergstrom * comparison with unshifted values appropriate for use in field <y> 3675471687STerje Bergstrom * of register <x>. 3775471687STerje Bergstrom */ 3875471687STerje Bergstrom 3975471687STerje Bergstrom #ifndef __hw_host1x01_sync_h__ 4075471687STerje Bergstrom #define __hw_host1x01_sync_h__ 4175471687STerje Bergstrom 4275471687STerje Bergstrom #define REGISTER_STRIDE 4 4375471687STerje Bergstrom host1x_sync_syncpt_r(unsigned int id)4475471687STerje Bergstromstatic inline u32 host1x_sync_syncpt_r(unsigned int id) 4575471687STerje Bergstrom { 4675471687STerje Bergstrom return 0x400 + id * REGISTER_STRIDE; 4775471687STerje Bergstrom } 4875471687STerje Bergstrom #define HOST1X_SYNC_SYNCPT(id) \ 4975471687STerje Bergstrom host1x_sync_syncpt_r(id) host1x_sync_syncpt_thresh_cpu0_int_status_r(unsigned int id)507ede0b0bSTerje Bergstromstatic inline u32 host1x_sync_syncpt_thresh_cpu0_int_status_r(unsigned int id) 517ede0b0bSTerje Bergstrom { 527ede0b0bSTerje Bergstrom return 0x40 + id * REGISTER_STRIDE; 537ede0b0bSTerje Bergstrom } 547ede0b0bSTerje Bergstrom #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(id) \ 557ede0b0bSTerje Bergstrom host1x_sync_syncpt_thresh_cpu0_int_status_r(id) host1x_sync_syncpt_thresh_int_disable_r(unsigned int id)567ede0b0bSTerje Bergstromstatic inline u32 host1x_sync_syncpt_thresh_int_disable_r(unsigned int id) 577ede0b0bSTerje Bergstrom { 587ede0b0bSTerje Bergstrom return 0x60 + id * REGISTER_STRIDE; 597ede0b0bSTerje Bergstrom } 607ede0b0bSTerje Bergstrom #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(id) \ 617ede0b0bSTerje Bergstrom host1x_sync_syncpt_thresh_int_disable_r(id) host1x_sync_syncpt_thresh_int_enable_cpu0_r(unsigned int id)627ede0b0bSTerje Bergstromstatic inline u32 host1x_sync_syncpt_thresh_int_enable_cpu0_r(unsigned int id) 637ede0b0bSTerje Bergstrom { 647ede0b0bSTerje Bergstrom return 0x68 + id * REGISTER_STRIDE; 657ede0b0bSTerje Bergstrom } 667ede0b0bSTerje Bergstrom #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(id) \ 677ede0b0bSTerje Bergstrom host1x_sync_syncpt_thresh_int_enable_cpu0_r(id) host1x_sync_cf_setup_r(unsigned int channel)686236451dSTerje Bergstromstatic inline u32 host1x_sync_cf_setup_r(unsigned int channel) 696236451dSTerje Bergstrom { 706236451dSTerje Bergstrom return 0x80 + channel * REGISTER_STRIDE; 716236451dSTerje Bergstrom } 726236451dSTerje Bergstrom #define HOST1X_SYNC_CF_SETUP(channel) \ 736236451dSTerje Bergstrom host1x_sync_cf_setup_r(channel) host1x_sync_cf_setup_base_v(u32 r)746236451dSTerje Bergstromstatic inline u32 host1x_sync_cf_setup_base_v(u32 r) 756236451dSTerje Bergstrom { 766236451dSTerje Bergstrom return (r >> 0) & 0x1ff; 776236451dSTerje Bergstrom } 786236451dSTerje Bergstrom #define HOST1X_SYNC_CF_SETUP_BASE_V(r) \ 796236451dSTerje Bergstrom host1x_sync_cf_setup_base_v(r) host1x_sync_cf_setup_limit_v(u32 r)806236451dSTerje Bergstromstatic inline u32 host1x_sync_cf_setup_limit_v(u32 r) 816236451dSTerje Bergstrom { 826236451dSTerje Bergstrom return (r >> 16) & 0x1ff; 836236451dSTerje Bergstrom } 846236451dSTerje Bergstrom #define HOST1X_SYNC_CF_SETUP_LIMIT_V(r) \ 856236451dSTerje Bergstrom host1x_sync_cf_setup_limit_v(r) host1x_sync_cmdproc_stop_r(void)866579324aSTerje Bergstromstatic inline u32 host1x_sync_cmdproc_stop_r(void) 876579324aSTerje Bergstrom { 886579324aSTerje Bergstrom return 0xac; 896579324aSTerje Bergstrom } 906579324aSTerje Bergstrom #define HOST1X_SYNC_CMDPROC_STOP \ 916579324aSTerje Bergstrom host1x_sync_cmdproc_stop_r() host1x_sync_ch_teardown_r(void)926579324aSTerje Bergstromstatic inline u32 host1x_sync_ch_teardown_r(void) 936579324aSTerje Bergstrom { 946579324aSTerje Bergstrom return 0xb0; 956579324aSTerje Bergstrom } 966579324aSTerje Bergstrom #define HOST1X_SYNC_CH_TEARDOWN \ 976579324aSTerje Bergstrom host1x_sync_ch_teardown_r() host1x_sync_usec_clk_r(void)987ede0b0bSTerje Bergstromstatic inline u32 host1x_sync_usec_clk_r(void) 997ede0b0bSTerje Bergstrom { 1007ede0b0bSTerje Bergstrom return 0x1a4; 1017ede0b0bSTerje Bergstrom } 1027ede0b0bSTerje Bergstrom #define HOST1X_SYNC_USEC_CLK \ 1037ede0b0bSTerje Bergstrom host1x_sync_usec_clk_r() host1x_sync_ctxsw_timeout_cfg_r(void)1047ede0b0bSTerje Bergstromstatic inline u32 host1x_sync_ctxsw_timeout_cfg_r(void) 1057ede0b0bSTerje Bergstrom { 1067ede0b0bSTerje Bergstrom return 0x1a8; 1077ede0b0bSTerje Bergstrom } 1087ede0b0bSTerje Bergstrom #define HOST1X_SYNC_CTXSW_TIMEOUT_CFG \ 1097ede0b0bSTerje Bergstrom host1x_sync_ctxsw_timeout_cfg_r() host1x_sync_ip_busy_timeout_r(void)1107ede0b0bSTerje Bergstromstatic inline u32 host1x_sync_ip_busy_timeout_r(void) 1117ede0b0bSTerje Bergstrom { 1127ede0b0bSTerje Bergstrom return 0x1bc; 1137ede0b0bSTerje Bergstrom } 1147ede0b0bSTerje Bergstrom #define HOST1X_SYNC_IP_BUSY_TIMEOUT \ 1157ede0b0bSTerje Bergstrom host1x_sync_ip_busy_timeout_r() host1x_sync_mlock_owner_r(unsigned int id)1166236451dSTerje Bergstromstatic inline u32 host1x_sync_mlock_owner_r(unsigned int id) 1176236451dSTerje Bergstrom { 1186236451dSTerje Bergstrom return 0x340 + id * REGISTER_STRIDE; 1196236451dSTerje Bergstrom } 1206236451dSTerje Bergstrom #define HOST1X_SYNC_MLOCK_OWNER(id) \ 1216236451dSTerje Bergstrom host1x_sync_mlock_owner_r(id) host1x_sync_mlock_owner_chid_v(u32 v)1223fe2c7d4SDmitry Osipenkostatic inline u32 host1x_sync_mlock_owner_chid_v(u32 v) 1236236451dSTerje Bergstrom { 1243fe2c7d4SDmitry Osipenko return (v >> 8) & 0xf; 1256236451dSTerje Bergstrom } 1263fe2c7d4SDmitry Osipenko #define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ 1273fe2c7d4SDmitry Osipenko host1x_sync_mlock_owner_chid_v(v) host1x_sync_mlock_owner_cpu_owns_v(u32 r)1286236451dSTerje Bergstromstatic inline u32 host1x_sync_mlock_owner_cpu_owns_v(u32 r) 1296236451dSTerje Bergstrom { 1306236451dSTerje Bergstrom return (r >> 1) & 0x1; 1316236451dSTerje Bergstrom } 1326236451dSTerje Bergstrom #define HOST1X_SYNC_MLOCK_OWNER_CPU_OWNS_V(r) \ 1336236451dSTerje Bergstrom host1x_sync_mlock_owner_cpu_owns_v(r) host1x_sync_mlock_owner_ch_owns_v(u32 r)1346236451dSTerje Bergstromstatic inline u32 host1x_sync_mlock_owner_ch_owns_v(u32 r) 1356236451dSTerje Bergstrom { 1366236451dSTerje Bergstrom return (r >> 0) & 0x1; 1376236451dSTerje Bergstrom } 1386236451dSTerje Bergstrom #define HOST1X_SYNC_MLOCK_OWNER_CH_OWNS_V(r) \ 1396236451dSTerje Bergstrom host1x_sync_mlock_owner_ch_owns_v(r) host1x_sync_syncpt_int_thresh_r(unsigned int id)1407ede0b0bSTerje Bergstromstatic inline u32 host1x_sync_syncpt_int_thresh_r(unsigned int id) 1417ede0b0bSTerje Bergstrom { 1427ede0b0bSTerje Bergstrom return 0x500 + id * REGISTER_STRIDE; 1437ede0b0bSTerje Bergstrom } 1447ede0b0bSTerje Bergstrom #define HOST1X_SYNC_SYNCPT_INT_THRESH(id) \ 1457ede0b0bSTerje Bergstrom host1x_sync_syncpt_int_thresh_r(id) host1x_sync_syncpt_base_r(unsigned int id)14675471687STerje Bergstromstatic inline u32 host1x_sync_syncpt_base_r(unsigned int id) 14775471687STerje Bergstrom { 14875471687STerje Bergstrom return 0x600 + id * REGISTER_STRIDE; 14975471687STerje Bergstrom } 15075471687STerje Bergstrom #define HOST1X_SYNC_SYNCPT_BASE(id) \ 15175471687STerje Bergstrom host1x_sync_syncpt_base_r(id) host1x_sync_syncpt_cpu_incr_r(unsigned int id)15275471687STerje Bergstromstatic inline u32 host1x_sync_syncpt_cpu_incr_r(unsigned int id) 15375471687STerje Bergstrom { 15475471687STerje Bergstrom return 0x700 + id * REGISTER_STRIDE; 15575471687STerje Bergstrom } 15675471687STerje Bergstrom #define HOST1X_SYNC_SYNCPT_CPU_INCR(id) \ 15775471687STerje Bergstrom host1x_sync_syncpt_cpu_incr_r(id) host1x_sync_cbread_r(unsigned int channel)1586236451dSTerje Bergstromstatic inline u32 host1x_sync_cbread_r(unsigned int channel) 1596236451dSTerje Bergstrom { 1606236451dSTerje Bergstrom return 0x720 + channel * REGISTER_STRIDE; 1616236451dSTerje Bergstrom } 1626236451dSTerje Bergstrom #define HOST1X_SYNC_CBREAD(channel) \ 1636236451dSTerje Bergstrom host1x_sync_cbread_r(channel) host1x_sync_cfpeek_ctrl_r(void)1646236451dSTerje Bergstromstatic inline u32 host1x_sync_cfpeek_ctrl_r(void) 1656236451dSTerje Bergstrom { 1666236451dSTerje Bergstrom return 0x74c; 1676236451dSTerje Bergstrom } 1686236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_CTRL \ 1696236451dSTerje Bergstrom host1x_sync_cfpeek_ctrl_r() host1x_sync_cfpeek_ctrl_addr_f(u32 v)1706236451dSTerje Bergstromstatic inline u32 host1x_sync_cfpeek_ctrl_addr_f(u32 v) 1716236451dSTerje Bergstrom { 1726236451dSTerje Bergstrom return (v & 0x1ff) << 0; 1736236451dSTerje Bergstrom } 1746236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_CTRL_ADDR_F(v) \ 1756236451dSTerje Bergstrom host1x_sync_cfpeek_ctrl_addr_f(v) host1x_sync_cfpeek_ctrl_channr_f(u32 v)1766236451dSTerje Bergstromstatic inline u32 host1x_sync_cfpeek_ctrl_channr_f(u32 v) 1776236451dSTerje Bergstrom { 1786236451dSTerje Bergstrom return (v & 0x7) << 16; 1796236451dSTerje Bergstrom } 1806236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_CTRL_CHANNR_F(v) \ 1816236451dSTerje Bergstrom host1x_sync_cfpeek_ctrl_channr_f(v) host1x_sync_cfpeek_ctrl_ena_f(u32 v)1826236451dSTerje Bergstromstatic inline u32 host1x_sync_cfpeek_ctrl_ena_f(u32 v) 1836236451dSTerje Bergstrom { 1846236451dSTerje Bergstrom return (v & 0x1) << 31; 1856236451dSTerje Bergstrom } 1866236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_CTRL_ENA_F(v) \ 1876236451dSTerje Bergstrom host1x_sync_cfpeek_ctrl_ena_f(v) host1x_sync_cfpeek_read_r(void)1886236451dSTerje Bergstromstatic inline u32 host1x_sync_cfpeek_read_r(void) 1896236451dSTerje Bergstrom { 1906236451dSTerje Bergstrom return 0x750; 1916236451dSTerje Bergstrom } 1926236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_READ \ 1936236451dSTerje Bergstrom host1x_sync_cfpeek_read_r() host1x_sync_cfpeek_ptrs_r(void)1946236451dSTerje Bergstromstatic inline u32 host1x_sync_cfpeek_ptrs_r(void) 1956236451dSTerje Bergstrom { 1966236451dSTerje Bergstrom return 0x754; 1976236451dSTerje Bergstrom } 1986236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_PTRS \ 1996236451dSTerje Bergstrom host1x_sync_cfpeek_ptrs_r() host1x_sync_cfpeek_ptrs_cf_rd_ptr_v(u32 r)2006236451dSTerje Bergstromstatic inline u32 host1x_sync_cfpeek_ptrs_cf_rd_ptr_v(u32 r) 2016236451dSTerje Bergstrom { 2026236451dSTerje Bergstrom return (r >> 0) & 0x1ff; 2036236451dSTerje Bergstrom } 2046236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_PTRS_CF_RD_PTR_V(r) \ 2056236451dSTerje Bergstrom host1x_sync_cfpeek_ptrs_cf_rd_ptr_v(r) host1x_sync_cfpeek_ptrs_cf_wr_ptr_v(u32 r)2066236451dSTerje Bergstromstatic inline u32 host1x_sync_cfpeek_ptrs_cf_wr_ptr_v(u32 r) 2076236451dSTerje Bergstrom { 2086236451dSTerje Bergstrom return (r >> 16) & 0x1ff; 2096236451dSTerje Bergstrom } 2106236451dSTerje Bergstrom #define HOST1X_SYNC_CFPEEK_PTRS_CF_WR_PTR_V(r) \ 2116236451dSTerje Bergstrom host1x_sync_cfpeek_ptrs_cf_wr_ptr_v(r) host1x_sync_cbstat_r(unsigned int channel)2126236451dSTerje Bergstromstatic inline u32 host1x_sync_cbstat_r(unsigned int channel) 2136236451dSTerje Bergstrom { 2146236451dSTerje Bergstrom return 0x758 + channel * REGISTER_STRIDE; 2156236451dSTerje Bergstrom } 2166236451dSTerje Bergstrom #define HOST1X_SYNC_CBSTAT(channel) \ 2176236451dSTerje Bergstrom host1x_sync_cbstat_r(channel) host1x_sync_cbstat_cboffset_v(u32 r)2186236451dSTerje Bergstromstatic inline u32 host1x_sync_cbstat_cboffset_v(u32 r) 2196236451dSTerje Bergstrom { 2206236451dSTerje Bergstrom return (r >> 0) & 0xffff; 2216236451dSTerje Bergstrom } 2226236451dSTerje Bergstrom #define HOST1X_SYNC_CBSTAT_CBOFFSET_V(r) \ 2236236451dSTerje Bergstrom host1x_sync_cbstat_cboffset_v(r) host1x_sync_cbstat_cbclass_v(u32 r)2246236451dSTerje Bergstromstatic inline u32 host1x_sync_cbstat_cbclass_v(u32 r) 2256236451dSTerje Bergstrom { 2266236451dSTerje Bergstrom return (r >> 16) & 0x3ff; 2276236451dSTerje Bergstrom } 2286236451dSTerje Bergstrom #define HOST1X_SYNC_CBSTAT_CBCLASS_V(r) \ 2296236451dSTerje Bergstrom host1x_sync_cbstat_cbclass_v(r) 2306236451dSTerje Bergstrom 23175471687STerje Bergstrom #endif /* __hw_host1x01_sync_h__ */ 232