1 /* 2 * Copyright (c) 2012-2015, NVIDIA Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 17 #ifndef HOST1X_DEV_H 18 #define HOST1X_DEV_H 19 20 #include <linux/device.h> 21 #include <linux/iommu.h> 22 #include <linux/iova.h> 23 #include <linux/platform_device.h> 24 #include <linux/reset.h> 25 26 #include "cdma.h" 27 #include "channel.h" 28 #include "intr.h" 29 #include "job.h" 30 #include "syncpt.h" 31 32 struct host1x_syncpt; 33 struct host1x_syncpt_base; 34 struct host1x_channel; 35 struct host1x_cdma; 36 struct host1x_job; 37 struct push_buffer; 38 struct output; 39 struct dentry; 40 41 struct host1x_channel_ops { 42 int (*init)(struct host1x_channel *channel, struct host1x *host, 43 unsigned int id); 44 int (*submit)(struct host1x_job *job); 45 }; 46 47 struct host1x_cdma_ops { 48 void (*start)(struct host1x_cdma *cdma); 49 void (*stop)(struct host1x_cdma *cdma); 50 void (*flush)(struct host1x_cdma *cdma); 51 int (*timeout_init)(struct host1x_cdma *cdma, unsigned int syncpt); 52 void (*timeout_destroy)(struct host1x_cdma *cdma); 53 void (*freeze)(struct host1x_cdma *cdma); 54 void (*resume)(struct host1x_cdma *cdma, u32 getptr); 55 void (*timeout_cpu_incr)(struct host1x_cdma *cdma, u32 getptr, 56 u32 syncpt_incrs, u32 syncval, u32 nr_slots); 57 }; 58 59 struct host1x_pushbuffer_ops { 60 void (*init)(struct push_buffer *pb); 61 }; 62 63 struct host1x_debug_ops { 64 void (*debug_init)(struct dentry *de); 65 void (*show_channel_cdma)(struct host1x *host, 66 struct host1x_channel *ch, 67 struct output *o); 68 void (*show_channel_fifo)(struct host1x *host, 69 struct host1x_channel *ch, 70 struct output *o); 71 void (*show_mlocks)(struct host1x *host, struct output *output); 72 73 }; 74 75 struct host1x_syncpt_ops { 76 void (*restore)(struct host1x_syncpt *syncpt); 77 void (*restore_wait_base)(struct host1x_syncpt *syncpt); 78 void (*load_wait_base)(struct host1x_syncpt *syncpt); 79 u32 (*load)(struct host1x_syncpt *syncpt); 80 int (*cpu_incr)(struct host1x_syncpt *syncpt); 81 int (*patch_wait)(struct host1x_syncpt *syncpt, void *patch_addr); 82 void (*assign_to_channel)(struct host1x_syncpt *syncpt, 83 struct host1x_channel *channel); 84 void (*enable_protection)(struct host1x *host); 85 }; 86 87 struct host1x_intr_ops { 88 int (*init_host_sync)(struct host1x *host, u32 cpm, 89 void (*syncpt_thresh_work)(struct work_struct *work)); 90 void (*set_syncpt_threshold)( 91 struct host1x *host, unsigned int id, u32 thresh); 92 void (*enable_syncpt_intr)(struct host1x *host, unsigned int id); 93 void (*disable_syncpt_intr)(struct host1x *host, unsigned int id); 94 void (*disable_all_syncpt_intrs)(struct host1x *host); 95 int (*free_syncpt_irq)(struct host1x *host); 96 }; 97 98 struct host1x_info { 99 unsigned int nb_channels; /* host1x: number of channels supported */ 100 unsigned int nb_pts; /* host1x: number of syncpoints supported */ 101 unsigned int nb_bases; /* host1x: number of syncpoint bases supported */ 102 unsigned int nb_mlocks; /* host1x: number of mlocks supported */ 103 int (*init)(struct host1x *host1x); /* initialize per SoC ops */ 104 unsigned int sync_offset; /* offset of syncpoint registers */ 105 u64 dma_mask; /* mask of addressable memory */ 106 bool has_hypervisor; /* has hypervisor registers */ 107 }; 108 109 struct host1x { 110 const struct host1x_info *info; 111 112 void __iomem *regs; 113 void __iomem *hv_regs; /* hypervisor region */ 114 struct host1x_syncpt *syncpt; 115 struct host1x_syncpt_base *bases; 116 struct device *dev; 117 struct clk *clk; 118 struct reset_control *rst; 119 120 struct iommu_domain *domain; 121 struct iova_domain iova; 122 dma_addr_t iova_end; 123 124 struct mutex intr_mutex; 125 int intr_syncpt_irq; 126 127 const struct host1x_syncpt_ops *syncpt_op; 128 const struct host1x_intr_ops *intr_op; 129 const struct host1x_channel_ops *channel_op; 130 const struct host1x_cdma_ops *cdma_op; 131 const struct host1x_pushbuffer_ops *cdma_pb_op; 132 const struct host1x_debug_ops *debug_op; 133 134 struct host1x_syncpt *nop_sp; 135 136 struct mutex syncpt_mutex; 137 138 struct host1x_channel_list channel_list; 139 140 struct dentry *debugfs; 141 142 struct mutex devices_lock; 143 struct list_head devices; 144 145 struct list_head list; 146 }; 147 148 void host1x_hypervisor_writel(struct host1x *host1x, u32 r, u32 v); 149 u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r); 150 void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v); 151 u32 host1x_sync_readl(struct host1x *host1x, u32 r); 152 void host1x_ch_writel(struct host1x_channel *ch, u32 r, u32 v); 153 u32 host1x_ch_readl(struct host1x_channel *ch, u32 r); 154 155 static inline void host1x_hw_syncpt_restore(struct host1x *host, 156 struct host1x_syncpt *sp) 157 { 158 host->syncpt_op->restore(sp); 159 } 160 161 static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host, 162 struct host1x_syncpt *sp) 163 { 164 host->syncpt_op->restore_wait_base(sp); 165 } 166 167 static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host, 168 struct host1x_syncpt *sp) 169 { 170 host->syncpt_op->load_wait_base(sp); 171 } 172 173 static inline u32 host1x_hw_syncpt_load(struct host1x *host, 174 struct host1x_syncpt *sp) 175 { 176 return host->syncpt_op->load(sp); 177 } 178 179 static inline int host1x_hw_syncpt_cpu_incr(struct host1x *host, 180 struct host1x_syncpt *sp) 181 { 182 return host->syncpt_op->cpu_incr(sp); 183 } 184 185 static inline int host1x_hw_syncpt_patch_wait(struct host1x *host, 186 struct host1x_syncpt *sp, 187 void *patch_addr) 188 { 189 return host->syncpt_op->patch_wait(sp, patch_addr); 190 } 191 192 static inline void host1x_hw_syncpt_assign_to_channel( 193 struct host1x *host, struct host1x_syncpt *sp, 194 struct host1x_channel *ch) 195 { 196 return host->syncpt_op->assign_to_channel(sp, ch); 197 } 198 199 static inline void host1x_hw_syncpt_enable_protection(struct host1x *host) 200 { 201 return host->syncpt_op->enable_protection(host); 202 } 203 204 static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm, 205 void (*syncpt_thresh_work)(struct work_struct *)) 206 { 207 return host->intr_op->init_host_sync(host, cpm, syncpt_thresh_work); 208 } 209 210 static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host, 211 unsigned int id, 212 u32 thresh) 213 { 214 host->intr_op->set_syncpt_threshold(host, id, thresh); 215 } 216 217 static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host, 218 unsigned int id) 219 { 220 host->intr_op->enable_syncpt_intr(host, id); 221 } 222 223 static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host, 224 unsigned int id) 225 { 226 host->intr_op->disable_syncpt_intr(host, id); 227 } 228 229 static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host) 230 { 231 host->intr_op->disable_all_syncpt_intrs(host); 232 } 233 234 static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host) 235 { 236 return host->intr_op->free_syncpt_irq(host); 237 } 238 239 static inline int host1x_hw_channel_init(struct host1x *host, 240 struct host1x_channel *channel, 241 unsigned int id) 242 { 243 return host->channel_op->init(channel, host, id); 244 } 245 246 static inline int host1x_hw_channel_submit(struct host1x *host, 247 struct host1x_job *job) 248 { 249 return host->channel_op->submit(job); 250 } 251 252 static inline void host1x_hw_cdma_start(struct host1x *host, 253 struct host1x_cdma *cdma) 254 { 255 host->cdma_op->start(cdma); 256 } 257 258 static inline void host1x_hw_cdma_stop(struct host1x *host, 259 struct host1x_cdma *cdma) 260 { 261 host->cdma_op->stop(cdma); 262 } 263 264 static inline void host1x_hw_cdma_flush(struct host1x *host, 265 struct host1x_cdma *cdma) 266 { 267 host->cdma_op->flush(cdma); 268 } 269 270 static inline int host1x_hw_cdma_timeout_init(struct host1x *host, 271 struct host1x_cdma *cdma, 272 unsigned int syncpt) 273 { 274 return host->cdma_op->timeout_init(cdma, syncpt); 275 } 276 277 static inline void host1x_hw_cdma_timeout_destroy(struct host1x *host, 278 struct host1x_cdma *cdma) 279 { 280 host->cdma_op->timeout_destroy(cdma); 281 } 282 283 static inline void host1x_hw_cdma_freeze(struct host1x *host, 284 struct host1x_cdma *cdma) 285 { 286 host->cdma_op->freeze(cdma); 287 } 288 289 static inline void host1x_hw_cdma_resume(struct host1x *host, 290 struct host1x_cdma *cdma, u32 getptr) 291 { 292 host->cdma_op->resume(cdma, getptr); 293 } 294 295 static inline void host1x_hw_cdma_timeout_cpu_incr(struct host1x *host, 296 struct host1x_cdma *cdma, 297 u32 getptr, 298 u32 syncpt_incrs, 299 u32 syncval, u32 nr_slots) 300 { 301 host->cdma_op->timeout_cpu_incr(cdma, getptr, syncpt_incrs, syncval, 302 nr_slots); 303 } 304 305 static inline void host1x_hw_pushbuffer_init(struct host1x *host, 306 struct push_buffer *pb) 307 { 308 host->cdma_pb_op->init(pb); 309 } 310 311 static inline void host1x_hw_debug_init(struct host1x *host, struct dentry *de) 312 { 313 if (host->debug_op && host->debug_op->debug_init) 314 host->debug_op->debug_init(de); 315 } 316 317 static inline void host1x_hw_show_channel_cdma(struct host1x *host, 318 struct host1x_channel *channel, 319 struct output *o) 320 { 321 host->debug_op->show_channel_cdma(host, channel, o); 322 } 323 324 static inline void host1x_hw_show_channel_fifo(struct host1x *host, 325 struct host1x_channel *channel, 326 struct output *o) 327 { 328 host->debug_op->show_channel_fifo(host, channel, o); 329 } 330 331 static inline void host1x_hw_show_mlocks(struct host1x *host, struct output *o) 332 { 333 host->debug_op->show_mlocks(host, o); 334 } 335 336 extern struct platform_driver tegra_mipi_driver; 337 338 #endif 339