1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2012-2015, NVIDIA Corporation. 4 */ 5 6 #ifndef HOST1X_DEV_H 7 #define HOST1X_DEV_H 8 9 #include <linux/device.h> 10 #include <linux/iommu.h> 11 #include <linux/iova.h> 12 #include <linux/platform_device.h> 13 #include <linux/reset.h> 14 15 #include "cdma.h" 16 #include "channel.h" 17 #include "context.h" 18 #include "intr.h" 19 #include "job.h" 20 #include "syncpt.h" 21 22 struct host1x_syncpt; 23 struct host1x_syncpt_base; 24 struct host1x_channel; 25 struct host1x_cdma; 26 struct host1x_job; 27 struct push_buffer; 28 struct output; 29 struct dentry; 30 31 struct host1x_channel_ops { 32 int (*init)(struct host1x_channel *channel, struct host1x *host, 33 unsigned int id); 34 int (*submit)(struct host1x_job *job); 35 }; 36 37 struct host1x_cdma_ops { 38 void (*start)(struct host1x_cdma *cdma); 39 void (*stop)(struct host1x_cdma *cdma); 40 void (*flush)(struct host1x_cdma *cdma); 41 int (*timeout_init)(struct host1x_cdma *cdma); 42 void (*timeout_destroy)(struct host1x_cdma *cdma); 43 void (*freeze)(struct host1x_cdma *cdma); 44 void (*resume)(struct host1x_cdma *cdma, u32 getptr); 45 void (*timeout_cpu_incr)(struct host1x_cdma *cdma, u32 getptr, 46 u32 syncpt_incrs, u32 syncval, u32 nr_slots); 47 }; 48 49 struct host1x_pushbuffer_ops { 50 void (*init)(struct push_buffer *pb); 51 }; 52 53 struct host1x_debug_ops { 54 void (*debug_init)(struct dentry *de); 55 void (*show_channel_cdma)(struct host1x *host, 56 struct host1x_channel *ch, 57 struct output *o); 58 void (*show_channel_fifo)(struct host1x *host, 59 struct host1x_channel *ch, 60 struct output *o); 61 void (*show_mlocks)(struct host1x *host, struct output *output); 62 63 }; 64 65 struct host1x_syncpt_ops { 66 void (*restore)(struct host1x_syncpt *syncpt); 67 void (*restore_wait_base)(struct host1x_syncpt *syncpt); 68 void (*load_wait_base)(struct host1x_syncpt *syncpt); 69 u32 (*load)(struct host1x_syncpt *syncpt); 70 int (*cpu_incr)(struct host1x_syncpt *syncpt); 71 void (*assign_to_channel)(struct host1x_syncpt *syncpt, 72 struct host1x_channel *channel); 73 void (*enable_protection)(struct host1x *host); 74 }; 75 76 struct host1x_intr_ops { 77 int (*init_host_sync)(struct host1x *host, u32 cpm, 78 void (*syncpt_thresh_work)(struct work_struct *work)); 79 void (*set_syncpt_threshold)( 80 struct host1x *host, unsigned int id, u32 thresh); 81 void (*enable_syncpt_intr)(struct host1x *host, unsigned int id); 82 void (*disable_syncpt_intr)(struct host1x *host, unsigned int id); 83 void (*disable_all_syncpt_intrs)(struct host1x *host); 84 int (*free_syncpt_irq)(struct host1x *host); 85 }; 86 87 struct host1x_sid_entry { 88 unsigned int base; 89 unsigned int offset; 90 unsigned int limit; 91 }; 92 93 struct host1x_table_desc { 94 unsigned int base; 95 unsigned int count; 96 }; 97 98 struct host1x_info { 99 unsigned int nb_channels; /* host1x: number of channels supported */ 100 unsigned int nb_pts; /* host1x: number of syncpoints supported */ 101 unsigned int nb_bases; /* host1x: number of syncpoint bases supported */ 102 unsigned int nb_mlocks; /* host1x: number of mlocks supported */ 103 int (*init)(struct host1x *host1x); /* initialize per SoC ops */ 104 unsigned int sync_offset; /* offset of syncpoint registers */ 105 u64 dma_mask; /* mask of addressable memory */ 106 bool has_wide_gather; /* supports GATHER_W opcode */ 107 bool has_hypervisor; /* has hypervisor registers */ 108 bool has_common; /* has common registers separate from hypervisor */ 109 unsigned int num_sid_entries; 110 const struct host1x_sid_entry *sid_table; 111 struct host1x_table_desc streamid_vm_table; 112 struct host1x_table_desc classid_vm_table; 113 struct host1x_table_desc mmio_vm_table; 114 /* 115 * On T20-T148, the boot chain may setup DC to increment syncpoints 116 * 26/27 on VBLANK. As such we cannot use these syncpoints until 117 * the display driver disables VBLANK increments. 118 */ 119 bool reserve_vblank_syncpts; 120 }; 121 122 struct host1x { 123 const struct host1x_info *info; 124 125 void __iomem *regs; 126 void __iomem *hv_regs; /* hypervisor region */ 127 void __iomem *common_regs; 128 struct host1x_syncpt *syncpt; 129 struct host1x_syncpt_base *bases; 130 struct device *dev; 131 struct clk *clk; 132 struct reset_control_bulk_data resets[2]; 133 unsigned int nresets; 134 135 struct iommu_group *group; 136 struct iommu_domain *domain; 137 struct iova_domain iova; 138 dma_addr_t iova_end; 139 140 struct mutex intr_mutex; 141 int intr_syncpt_irq; 142 143 const struct host1x_syncpt_ops *syncpt_op; 144 const struct host1x_intr_ops *intr_op; 145 const struct host1x_channel_ops *channel_op; 146 const struct host1x_cdma_ops *cdma_op; 147 const struct host1x_pushbuffer_ops *cdma_pb_op; 148 const struct host1x_debug_ops *debug_op; 149 150 struct host1x_syncpt *nop_sp; 151 152 struct mutex syncpt_mutex; 153 154 struct host1x_channel_list channel_list; 155 struct host1x_memory_context_list context_list; 156 157 struct dentry *debugfs; 158 159 struct mutex devices_lock; 160 struct list_head devices; 161 162 struct list_head list; 163 164 struct device_dma_parameters dma_parms; 165 166 struct host1x_bo_cache cache; 167 }; 168 169 void host1x_common_writel(struct host1x *host1x, u32 v, u32 r); 170 void host1x_hypervisor_writel(struct host1x *host1x, u32 r, u32 v); 171 u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r); 172 void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v); 173 u32 host1x_sync_readl(struct host1x *host1x, u32 r); 174 void host1x_ch_writel(struct host1x_channel *ch, u32 r, u32 v); 175 u32 host1x_ch_readl(struct host1x_channel *ch, u32 r); 176 177 static inline void host1x_hw_syncpt_restore(struct host1x *host, 178 struct host1x_syncpt *sp) 179 { 180 host->syncpt_op->restore(sp); 181 } 182 183 static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host, 184 struct host1x_syncpt *sp) 185 { 186 host->syncpt_op->restore_wait_base(sp); 187 } 188 189 static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host, 190 struct host1x_syncpt *sp) 191 { 192 host->syncpt_op->load_wait_base(sp); 193 } 194 195 static inline u32 host1x_hw_syncpt_load(struct host1x *host, 196 struct host1x_syncpt *sp) 197 { 198 return host->syncpt_op->load(sp); 199 } 200 201 static inline int host1x_hw_syncpt_cpu_incr(struct host1x *host, 202 struct host1x_syncpt *sp) 203 { 204 return host->syncpt_op->cpu_incr(sp); 205 } 206 207 static inline void host1x_hw_syncpt_assign_to_channel( 208 struct host1x *host, struct host1x_syncpt *sp, 209 struct host1x_channel *ch) 210 { 211 return host->syncpt_op->assign_to_channel(sp, ch); 212 } 213 214 static inline void host1x_hw_syncpt_enable_protection(struct host1x *host) 215 { 216 return host->syncpt_op->enable_protection(host); 217 } 218 219 static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm, 220 void (*syncpt_thresh_work)(struct work_struct *)) 221 { 222 return host->intr_op->init_host_sync(host, cpm, syncpt_thresh_work); 223 } 224 225 static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host, 226 unsigned int id, 227 u32 thresh) 228 { 229 host->intr_op->set_syncpt_threshold(host, id, thresh); 230 } 231 232 static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host, 233 unsigned int id) 234 { 235 host->intr_op->enable_syncpt_intr(host, id); 236 } 237 238 static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host, 239 unsigned int id) 240 { 241 host->intr_op->disable_syncpt_intr(host, id); 242 } 243 244 static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host) 245 { 246 host->intr_op->disable_all_syncpt_intrs(host); 247 } 248 249 static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host) 250 { 251 return host->intr_op->free_syncpt_irq(host); 252 } 253 254 static inline int host1x_hw_channel_init(struct host1x *host, 255 struct host1x_channel *channel, 256 unsigned int id) 257 { 258 return host->channel_op->init(channel, host, id); 259 } 260 261 static inline int host1x_hw_channel_submit(struct host1x *host, 262 struct host1x_job *job) 263 { 264 return host->channel_op->submit(job); 265 } 266 267 static inline void host1x_hw_cdma_start(struct host1x *host, 268 struct host1x_cdma *cdma) 269 { 270 host->cdma_op->start(cdma); 271 } 272 273 static inline void host1x_hw_cdma_stop(struct host1x *host, 274 struct host1x_cdma *cdma) 275 { 276 host->cdma_op->stop(cdma); 277 } 278 279 static inline void host1x_hw_cdma_flush(struct host1x *host, 280 struct host1x_cdma *cdma) 281 { 282 host->cdma_op->flush(cdma); 283 } 284 285 static inline int host1x_hw_cdma_timeout_init(struct host1x *host, 286 struct host1x_cdma *cdma) 287 { 288 return host->cdma_op->timeout_init(cdma); 289 } 290 291 static inline void host1x_hw_cdma_timeout_destroy(struct host1x *host, 292 struct host1x_cdma *cdma) 293 { 294 host->cdma_op->timeout_destroy(cdma); 295 } 296 297 static inline void host1x_hw_cdma_freeze(struct host1x *host, 298 struct host1x_cdma *cdma) 299 { 300 host->cdma_op->freeze(cdma); 301 } 302 303 static inline void host1x_hw_cdma_resume(struct host1x *host, 304 struct host1x_cdma *cdma, u32 getptr) 305 { 306 host->cdma_op->resume(cdma, getptr); 307 } 308 309 static inline void host1x_hw_cdma_timeout_cpu_incr(struct host1x *host, 310 struct host1x_cdma *cdma, 311 u32 getptr, 312 u32 syncpt_incrs, 313 u32 syncval, u32 nr_slots) 314 { 315 host->cdma_op->timeout_cpu_incr(cdma, getptr, syncpt_incrs, syncval, 316 nr_slots); 317 } 318 319 static inline void host1x_hw_pushbuffer_init(struct host1x *host, 320 struct push_buffer *pb) 321 { 322 host->cdma_pb_op->init(pb); 323 } 324 325 static inline void host1x_hw_debug_init(struct host1x *host, struct dentry *de) 326 { 327 if (host->debug_op && host->debug_op->debug_init) 328 host->debug_op->debug_init(de); 329 } 330 331 static inline void host1x_hw_show_channel_cdma(struct host1x *host, 332 struct host1x_channel *channel, 333 struct output *o) 334 { 335 host->debug_op->show_channel_cdma(host, channel, o); 336 } 337 338 static inline void host1x_hw_show_channel_fifo(struct host1x *host, 339 struct host1x_channel *channel, 340 struct output *o) 341 { 342 host->debug_op->show_channel_fifo(host, channel, o); 343 } 344 345 static inline void host1x_hw_show_mlocks(struct host1x *host, struct output *o) 346 { 347 host->debug_op->show_mlocks(host, o); 348 } 349 350 extern struct platform_driver tegra_mipi_driver; 351 352 #endif 353