1 /* 2 * Tegra host1x driver 3 * 4 * Copyright (c) 2010-2013, NVIDIA Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program. If not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 #include <linux/module.h> 20 #include <linux/list.h> 21 #include <linux/slab.h> 22 #include <linux/of.h> 23 #include <linux/of_device.h> 24 #include <linux/clk.h> 25 #include <linux/io.h> 26 27 #define CREATE_TRACE_POINTS 28 #include <trace/events/host1x.h> 29 30 #include "bus.h" 31 #include "dev.h" 32 #include "intr.h" 33 #include "channel.h" 34 #include "debug.h" 35 #include "hw/host1x01.h" 36 #include "hw/host1x02.h" 37 #include "hw/host1x04.h" 38 #include "hw/host1x05.h" 39 40 void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r) 41 { 42 void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset; 43 44 writel(v, sync_regs + r); 45 } 46 47 u32 host1x_sync_readl(struct host1x *host1x, u32 r) 48 { 49 void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset; 50 51 return readl(sync_regs + r); 52 } 53 54 void host1x_ch_writel(struct host1x_channel *ch, u32 v, u32 r) 55 { 56 writel(v, ch->regs + r); 57 } 58 59 u32 host1x_ch_readl(struct host1x_channel *ch, u32 r) 60 { 61 return readl(ch->regs + r); 62 } 63 64 static const struct host1x_info host1x01_info = { 65 .nb_channels = 8, 66 .nb_pts = 32, 67 .nb_mlocks = 16, 68 .nb_bases = 8, 69 .init = host1x01_init, 70 .sync_offset = 0x3000, 71 }; 72 73 static const struct host1x_info host1x02_info = { 74 .nb_channels = 9, 75 .nb_pts = 32, 76 .nb_mlocks = 16, 77 .nb_bases = 12, 78 .init = host1x02_init, 79 .sync_offset = 0x3000, 80 }; 81 82 static const struct host1x_info host1x04_info = { 83 .nb_channels = 12, 84 .nb_pts = 192, 85 .nb_mlocks = 16, 86 .nb_bases = 64, 87 .init = host1x04_init, 88 .sync_offset = 0x2100, 89 }; 90 91 static const struct host1x_info host1x05_info = { 92 .nb_channels = 14, 93 .nb_pts = 192, 94 .nb_mlocks = 16, 95 .nb_bases = 64, 96 .init = host1x05_init, 97 .sync_offset = 0x2100, 98 }; 99 100 static struct of_device_id host1x_of_match[] = { 101 { .compatible = "nvidia,tegra210-host1x", .data = &host1x05_info, }, 102 { .compatible = "nvidia,tegra124-host1x", .data = &host1x04_info, }, 103 { .compatible = "nvidia,tegra114-host1x", .data = &host1x02_info, }, 104 { .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, }, 105 { .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, }, 106 { }, 107 }; 108 MODULE_DEVICE_TABLE(of, host1x_of_match); 109 110 static int host1x_probe(struct platform_device *pdev) 111 { 112 const struct of_device_id *id; 113 struct host1x *host; 114 struct resource *regs; 115 int syncpt_irq; 116 int err; 117 118 id = of_match_device(host1x_of_match, &pdev->dev); 119 if (!id) 120 return -EINVAL; 121 122 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 123 if (!regs) { 124 dev_err(&pdev->dev, "failed to get registers\n"); 125 return -ENXIO; 126 } 127 128 syncpt_irq = platform_get_irq(pdev, 0); 129 if (syncpt_irq < 0) { 130 dev_err(&pdev->dev, "failed to get IRQ\n"); 131 return -ENXIO; 132 } 133 134 host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL); 135 if (!host) 136 return -ENOMEM; 137 138 mutex_init(&host->devices_lock); 139 INIT_LIST_HEAD(&host->devices); 140 INIT_LIST_HEAD(&host->list); 141 host->dev = &pdev->dev; 142 host->info = id->data; 143 144 /* set common host1x device data */ 145 platform_set_drvdata(pdev, host); 146 147 host->regs = devm_ioremap_resource(&pdev->dev, regs); 148 if (IS_ERR(host->regs)) 149 return PTR_ERR(host->regs); 150 151 if (host->info->init) { 152 err = host->info->init(host); 153 if (err) 154 return err; 155 } 156 157 host->clk = devm_clk_get(&pdev->dev, NULL); 158 if (IS_ERR(host->clk)) { 159 dev_err(&pdev->dev, "failed to get clock\n"); 160 err = PTR_ERR(host->clk); 161 return err; 162 } 163 164 err = host1x_channel_list_init(host); 165 if (err) { 166 dev_err(&pdev->dev, "failed to initialize channel list\n"); 167 return err; 168 } 169 170 err = clk_prepare_enable(host->clk); 171 if (err < 0) { 172 dev_err(&pdev->dev, "failed to enable clock\n"); 173 return err; 174 } 175 176 err = host1x_syncpt_init(host); 177 if (err) { 178 dev_err(&pdev->dev, "failed to initialize syncpts\n"); 179 goto fail_unprepare_disable; 180 } 181 182 err = host1x_intr_init(host, syncpt_irq); 183 if (err) { 184 dev_err(&pdev->dev, "failed to initialize interrupts\n"); 185 goto fail_deinit_syncpt; 186 } 187 188 host1x_debug_init(host); 189 190 err = host1x_register(host); 191 if (err < 0) 192 goto fail_deinit_intr; 193 194 return 0; 195 196 fail_deinit_intr: 197 host1x_intr_deinit(host); 198 fail_deinit_syncpt: 199 host1x_syncpt_deinit(host); 200 fail_unprepare_disable: 201 clk_disable_unprepare(host->clk); 202 return err; 203 } 204 205 static int host1x_remove(struct platform_device *pdev) 206 { 207 struct host1x *host = platform_get_drvdata(pdev); 208 209 host1x_unregister(host); 210 host1x_intr_deinit(host); 211 host1x_syncpt_deinit(host); 212 clk_disable_unprepare(host->clk); 213 214 return 0; 215 } 216 217 static struct platform_driver tegra_host1x_driver = { 218 .driver = { 219 .name = "tegra-host1x", 220 .of_match_table = host1x_of_match, 221 }, 222 .probe = host1x_probe, 223 .remove = host1x_remove, 224 }; 225 226 static struct platform_driver * const drivers[] = { 227 &tegra_host1x_driver, 228 &tegra_mipi_driver, 229 }; 230 231 static int __init tegra_host1x_init(void) 232 { 233 int err; 234 235 err = bus_register(&host1x_bus_type); 236 if (err < 0) 237 return err; 238 239 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers)); 240 if (err < 0) 241 bus_unregister(&host1x_bus_type); 242 243 return err; 244 } 245 module_init(tegra_host1x_init); 246 247 static void __exit tegra_host1x_exit(void) 248 { 249 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); 250 bus_unregister(&host1x_bus_type); 251 } 252 module_exit(tegra_host1x_exit); 253 254 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>"); 255 MODULE_AUTHOR("Terje Bergstrom <tbergstrom@nvidia.com>"); 256 MODULE_DESCRIPTION("Host1x driver for Tegra products"); 257 MODULE_LICENSE("GPL"); 258