1 /* 2 * Tegra host1x driver 3 * 4 * Copyright (c) 2010-2013, NVIDIA Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program. If not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 #include <linux/module.h> 20 #include <linux/list.h> 21 #include <linux/slab.h> 22 #include <linux/of.h> 23 #include <linux/of_device.h> 24 #include <linux/clk.h> 25 #include <linux/io.h> 26 27 #define CREATE_TRACE_POINTS 28 #include <trace/events/host1x.h> 29 30 #include "bus.h" 31 #include "dev.h" 32 #include "intr.h" 33 #include "channel.h" 34 #include "debug.h" 35 #include "hw/host1x01.h" 36 #include "hw/host1x02.h" 37 38 void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r) 39 { 40 void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset; 41 42 writel(v, sync_regs + r); 43 } 44 45 u32 host1x_sync_readl(struct host1x *host1x, u32 r) 46 { 47 void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset; 48 49 return readl(sync_regs + r); 50 } 51 52 void host1x_ch_writel(struct host1x_channel *ch, u32 v, u32 r) 53 { 54 writel(v, ch->regs + r); 55 } 56 57 u32 host1x_ch_readl(struct host1x_channel *ch, u32 r) 58 { 59 return readl(ch->regs + r); 60 } 61 62 static const struct host1x_info host1x01_info = { 63 .nb_channels = 8, 64 .nb_pts = 32, 65 .nb_mlocks = 16, 66 .nb_bases = 8, 67 .init = host1x01_init, 68 .sync_offset = 0x3000, 69 }; 70 71 static const struct host1x_info host1x02_info = { 72 .nb_channels = 9, 73 .nb_pts = 32, 74 .nb_mlocks = 16, 75 .nb_bases = 12, 76 .init = host1x02_init, 77 .sync_offset = 0x3000, 78 }; 79 80 static struct of_device_id host1x_of_match[] = { 81 { .compatible = "nvidia,tegra114-host1x", .data = &host1x02_info, }, 82 { .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, }, 83 { .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, }, 84 { }, 85 }; 86 MODULE_DEVICE_TABLE(of, host1x_of_match); 87 88 static int host1x_probe(struct platform_device *pdev) 89 { 90 const struct of_device_id *id; 91 struct host1x *host; 92 struct resource *regs; 93 int syncpt_irq; 94 int err; 95 96 id = of_match_device(host1x_of_match, &pdev->dev); 97 if (!id) 98 return -EINVAL; 99 100 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 101 if (!regs) { 102 dev_err(&pdev->dev, "failed to get registers\n"); 103 return -ENXIO; 104 } 105 106 syncpt_irq = platform_get_irq(pdev, 0); 107 if (syncpt_irq < 0) { 108 dev_err(&pdev->dev, "failed to get IRQ\n"); 109 return -ENXIO; 110 } 111 112 host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL); 113 if (!host) 114 return -ENOMEM; 115 116 mutex_init(&host->devices_lock); 117 INIT_LIST_HEAD(&host->devices); 118 INIT_LIST_HEAD(&host->list); 119 host->dev = &pdev->dev; 120 host->info = id->data; 121 122 /* set common host1x device data */ 123 platform_set_drvdata(pdev, host); 124 125 host->regs = devm_ioremap_resource(&pdev->dev, regs); 126 if (IS_ERR(host->regs)) 127 return PTR_ERR(host->regs); 128 129 if (host->info->init) { 130 err = host->info->init(host); 131 if (err) 132 return err; 133 } 134 135 host->clk = devm_clk_get(&pdev->dev, NULL); 136 if (IS_ERR(host->clk)) { 137 dev_err(&pdev->dev, "failed to get clock\n"); 138 err = PTR_ERR(host->clk); 139 return err; 140 } 141 142 err = host1x_channel_list_init(host); 143 if (err) { 144 dev_err(&pdev->dev, "failed to initialize channel list\n"); 145 return err; 146 } 147 148 err = clk_prepare_enable(host->clk); 149 if (err < 0) { 150 dev_err(&pdev->dev, "failed to enable clock\n"); 151 return err; 152 } 153 154 err = host1x_syncpt_init(host); 155 if (err) { 156 dev_err(&pdev->dev, "failed to initialize syncpts\n"); 157 goto fail_unprepare_disable; 158 } 159 160 err = host1x_intr_init(host, syncpt_irq); 161 if (err) { 162 dev_err(&pdev->dev, "failed to initialize interrupts\n"); 163 goto fail_deinit_syncpt; 164 } 165 166 host1x_debug_init(host); 167 168 err = host1x_register(host); 169 if (err < 0) 170 goto fail_deinit_intr; 171 172 return 0; 173 174 fail_deinit_intr: 175 host1x_intr_deinit(host); 176 fail_deinit_syncpt: 177 host1x_syncpt_deinit(host); 178 fail_unprepare_disable: 179 clk_disable_unprepare(host->clk); 180 return err; 181 } 182 183 static int host1x_remove(struct platform_device *pdev) 184 { 185 struct host1x *host = platform_get_drvdata(pdev); 186 187 host1x_unregister(host); 188 host1x_intr_deinit(host); 189 host1x_syncpt_deinit(host); 190 clk_disable_unprepare(host->clk); 191 192 return 0; 193 } 194 195 static struct platform_driver tegra_host1x_driver = { 196 .driver = { 197 .name = "tegra-host1x", 198 .of_match_table = host1x_of_match, 199 }, 200 .probe = host1x_probe, 201 .remove = host1x_remove, 202 }; 203 204 static int __init tegra_host1x_init(void) 205 { 206 int err; 207 208 err = host1x_bus_init(); 209 if (err < 0) 210 return err; 211 212 err = platform_driver_register(&tegra_host1x_driver); 213 if (err < 0) { 214 host1x_bus_exit(); 215 return err; 216 } 217 218 return 0; 219 } 220 module_init(tegra_host1x_init); 221 222 static void __exit tegra_host1x_exit(void) 223 { 224 platform_driver_unregister(&tegra_host1x_driver); 225 host1x_bus_exit(); 226 } 227 module_exit(tegra_host1x_exit); 228 229 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>"); 230 MODULE_AUTHOR("Terje Bergstrom <tbergstrom@nvidia.com>"); 231 MODULE_DESCRIPTION("Host1x driver for Tegra products"); 232 MODULE_LICENSE("GPL"); 233