1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * ZynqMP DisplayPort Subsystem Driver
4  *
5  * Copyright (C) 2017 - 2020 Xilinx, Inc.
6  *
7  * Authors:
8  * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9  * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10  */
11 
12 #include <linux/clk.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/module.h>
15 #include <linux/of_reserved_mem.h>
16 #include <linux/platform_device.h>
17 #include <linux/pm_runtime.h>
18 
19 #include <drm/drm_atomic_helper.h>
20 #include <drm/drm_device.h>
21 #include <drm/drm_drv.h>
22 #include <drm/drm_fb_helper.h>
23 #include <drm/drm_fourcc.h>
24 #include <drm/drm_gem_cma_helper.h>
25 #include <drm/drm_gem_framebuffer_helper.h>
26 #include <drm/drm_managed.h>
27 #include <drm/drm_mode_config.h>
28 #include <drm/drm_probe_helper.h>
29 #include <drm/drm_vblank.h>
30 
31 #include "zynqmp_disp.h"
32 #include "zynqmp_dp.h"
33 #include "zynqmp_dpsub.h"
34 
35 /* -----------------------------------------------------------------------------
36  * Dumb Buffer & Framebuffer Allocation
37  */
38 
39 static int zynqmp_dpsub_dumb_create(struct drm_file *file_priv,
40 				    struct drm_device *drm,
41 				    struct drm_mode_create_dumb *args)
42 {
43 	struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
44 	unsigned int pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
45 
46 	/* Enforce the alignment constraints of the DMA engine. */
47 	args->pitch = ALIGN(pitch, dpsub->dma_align);
48 
49 	return drm_gem_cma_dumb_create_internal(file_priv, drm, args);
50 }
51 
52 static struct drm_framebuffer *
53 zynqmp_dpsub_fb_create(struct drm_device *drm, struct drm_file *file_priv,
54 		       const struct drm_mode_fb_cmd2 *mode_cmd)
55 {
56 	struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
57 	struct drm_mode_fb_cmd2 cmd = *mode_cmd;
58 	unsigned int i;
59 
60 	/* Enforce the alignment constraints of the DMA engine. */
61 	for (i = 0; i < ARRAY_SIZE(cmd.pitches); ++i)
62 		cmd.pitches[i] = ALIGN(cmd.pitches[i], dpsub->dma_align);
63 
64 	return drm_gem_fb_create(drm, file_priv, &cmd);
65 }
66 
67 static const struct drm_mode_config_funcs zynqmp_dpsub_mode_config_funcs = {
68 	.fb_create		= zynqmp_dpsub_fb_create,
69 	.atomic_check		= drm_atomic_helper_check,
70 	.atomic_commit		= drm_atomic_helper_commit,
71 };
72 
73 /* -----------------------------------------------------------------------------
74  * DRM/KMS Driver
75  */
76 
77 DEFINE_DRM_GEM_CMA_FOPS(zynqmp_dpsub_drm_fops);
78 
79 static const struct drm_driver zynqmp_dpsub_drm_driver = {
80 	.driver_features		= DRIVER_MODESET | DRIVER_GEM |
81 					  DRIVER_ATOMIC,
82 
83 	DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(zynqmp_dpsub_dumb_create),
84 
85 	.fops				= &zynqmp_dpsub_drm_fops,
86 
87 	.name				= "zynqmp-dpsub",
88 	.desc				= "Xilinx DisplayPort Subsystem Driver",
89 	.date				= "20130509",
90 	.major				= 1,
91 	.minor				= 0,
92 };
93 
94 static int zynqmp_dpsub_drm_init(struct zynqmp_dpsub *dpsub)
95 {
96 	struct drm_device *drm = &dpsub->drm;
97 	int ret;
98 
99 	/* Initialize mode config, vblank and the KMS poll helper. */
100 	ret = drmm_mode_config_init(drm);
101 	if (ret < 0)
102 		return ret;
103 
104 	drm->mode_config.funcs = &zynqmp_dpsub_mode_config_funcs;
105 	drm->mode_config.min_width = 0;
106 	drm->mode_config.min_height = 0;
107 	drm->mode_config.max_width = ZYNQMP_DISP_MAX_WIDTH;
108 	drm->mode_config.max_height = ZYNQMP_DISP_MAX_HEIGHT;
109 
110 	ret = drm_vblank_init(drm, 1);
111 	if (ret)
112 		return ret;
113 
114 	drm_kms_helper_poll_init(drm);
115 
116 	/*
117 	 * Initialize the DISP and DP components. This will creates planes,
118 	 * CRTC, encoder and connector. The DISP should be initialized first as
119 	 * the DP encoder needs the CRTC.
120 	 */
121 	ret = zynqmp_disp_drm_init(dpsub);
122 	if (ret)
123 		goto err_poll_fini;
124 
125 	ret = zynqmp_dp_drm_init(dpsub);
126 	if (ret)
127 		goto err_poll_fini;
128 
129 	/* Reset all components and register the DRM device. */
130 	drm_mode_config_reset(drm);
131 
132 	ret = drm_dev_register(drm, 0);
133 	if (ret < 0)
134 		goto err_poll_fini;
135 
136 	/* Initialize fbdev generic emulation. */
137 	drm_fbdev_generic_setup(drm, 24);
138 
139 	return 0;
140 
141 err_poll_fini:
142 	drm_kms_helper_poll_fini(drm);
143 	return ret;
144 }
145 
146 /* -----------------------------------------------------------------------------
147  * Power Management
148  */
149 
150 static int __maybe_unused zynqmp_dpsub_suspend(struct device *dev)
151 {
152 	struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
153 
154 	return drm_mode_config_helper_suspend(&dpsub->drm);
155 }
156 
157 static int __maybe_unused zynqmp_dpsub_resume(struct device *dev)
158 {
159 	struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
160 
161 	return drm_mode_config_helper_resume(&dpsub->drm);
162 }
163 
164 static const struct dev_pm_ops zynqmp_dpsub_pm_ops = {
165 	SET_SYSTEM_SLEEP_PM_OPS(zynqmp_dpsub_suspend, zynqmp_dpsub_resume)
166 };
167 
168 /* -----------------------------------------------------------------------------
169  * Probe & Remove
170  */
171 
172 static int zynqmp_dpsub_init_clocks(struct zynqmp_dpsub *dpsub)
173 {
174 	int ret;
175 
176 	dpsub->apb_clk = devm_clk_get(dpsub->dev, "dp_apb_clk");
177 	if (IS_ERR(dpsub->apb_clk))
178 		return PTR_ERR(dpsub->apb_clk);
179 
180 	ret = clk_prepare_enable(dpsub->apb_clk);
181 	if (ret) {
182 		dev_err(dpsub->dev, "failed to enable the APB clock\n");
183 		return ret;
184 	}
185 
186 	return 0;
187 }
188 
189 static int zynqmp_dpsub_probe(struct platform_device *pdev)
190 {
191 	struct zynqmp_dpsub *dpsub;
192 	int ret;
193 
194 	/* Allocate private data. */
195 	dpsub = devm_drm_dev_alloc(&pdev->dev, &zynqmp_dpsub_drm_driver,
196 				   struct zynqmp_dpsub, drm);
197 	if (IS_ERR(dpsub))
198 		return PTR_ERR(dpsub);
199 
200 	dpsub->dev = &pdev->dev;
201 	platform_set_drvdata(pdev, dpsub);
202 
203 	dma_set_mask(dpsub->dev, DMA_BIT_MASK(ZYNQMP_DISP_MAX_DMA_BIT));
204 
205 	/* Try the reserved memory. Proceed if there's none. */
206 	of_reserved_mem_device_init(&pdev->dev);
207 
208 	ret = zynqmp_dpsub_init_clocks(dpsub);
209 	if (ret < 0)
210 		goto err_mem;
211 
212 	pm_runtime_enable(&pdev->dev);
213 
214 	/*
215 	 * DP should be probed first so that the zynqmp_disp can set the output
216 	 * format accordingly.
217 	 */
218 	ret = zynqmp_dp_probe(dpsub, &dpsub->drm);
219 	if (ret)
220 		goto err_pm;
221 
222 	ret = zynqmp_disp_probe(dpsub, &dpsub->drm);
223 	if (ret)
224 		goto err_dp;
225 
226 	ret = zynqmp_dpsub_drm_init(dpsub);
227 	if (ret)
228 		goto err_disp;
229 
230 	dev_info(&pdev->dev, "ZynqMP DisplayPort Subsystem driver probed");
231 
232 	return 0;
233 
234 err_disp:
235 	zynqmp_disp_remove(dpsub);
236 err_dp:
237 	zynqmp_dp_remove(dpsub);
238 err_pm:
239 	pm_runtime_disable(&pdev->dev);
240 	clk_disable_unprepare(dpsub->apb_clk);
241 err_mem:
242 	of_reserved_mem_device_release(&pdev->dev);
243 	return ret;
244 }
245 
246 static int zynqmp_dpsub_remove(struct platform_device *pdev)
247 {
248 	struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
249 	struct drm_device *drm = &dpsub->drm;
250 
251 	drm_dev_unregister(drm);
252 	drm_atomic_helper_shutdown(drm);
253 	drm_kms_helper_poll_fini(drm);
254 
255 	zynqmp_disp_remove(dpsub);
256 	zynqmp_dp_remove(dpsub);
257 
258 	pm_runtime_disable(&pdev->dev);
259 	clk_disable_unprepare(dpsub->apb_clk);
260 	of_reserved_mem_device_release(&pdev->dev);
261 
262 	return 0;
263 }
264 
265 static void zynqmp_dpsub_shutdown(struct platform_device *pdev)
266 {
267 	struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
268 
269 	drm_atomic_helper_shutdown(&dpsub->drm);
270 }
271 
272 static const struct of_device_id zynqmp_dpsub_of_match[] = {
273 	{ .compatible = "xlnx,zynqmp-dpsub-1.7", },
274 	{ /* end of table */ },
275 };
276 MODULE_DEVICE_TABLE(of, zynqmp_dpsub_of_match);
277 
278 static struct platform_driver zynqmp_dpsub_driver = {
279 	.probe			= zynqmp_dpsub_probe,
280 	.remove			= zynqmp_dpsub_remove,
281 	.shutdown		= zynqmp_dpsub_shutdown,
282 	.driver			= {
283 		.name		= "zynqmp-dpsub",
284 		.pm		= &zynqmp_dpsub_pm_ops,
285 		.of_match_table	= zynqmp_dpsub_of_match,
286 	},
287 };
288 
289 module_platform_driver(zynqmp_dpsub_driver);
290 
291 MODULE_AUTHOR("Xilinx, Inc.");
292 MODULE_DESCRIPTION("ZynqMP DP Subsystem Driver");
293 MODULE_LICENSE("GPL v2");
294